Add loongarch64 support

Add loongarch64 definitions & lua module setjmp asm

LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V.

Reviewed-by: Richard Yao <richard.yao@alumni.stonybrook.edu>
Reviewed-by: Brian Behlendorf <behlendorf1@llnl.gov>
Signed-off-by: Han Gao <gaohan@uniontech.com>
Signed-off-by: WANG Xuerui <xen0n@gentoo.org>
Closes #13422

diff --git a/include/os/linux/spl/sys/isa_defs.h b/include/os/linux/spl/sys/isa_defs.h
index 5801ec92bc2b857ae22de1426c2d83ec6b3eee1e..7c95c94c1cf1d3b9fb51d79ba0abc4aaaf7509d3 100644 (file)
--- a/include/os/linux/spl/sys/isa_defs.h
+++ b/include/os/linux/spl/sys/isa_defs.h
@@ -195,10 +195,26 @@
 
 #define        _SUNOS_VTOC_16
 
+/*
+ * LoongArch arch specific defines
+ * only LoongArch64 is supported yet
+ */
+#elif defined(__loongarch__) && defined(__loongarch_lp64)
+
+#if !defined(_LP64)
+#define        _LP64
+#endif
+
+#define        _ZFS_LITTLE_ENDIAN
+#define        _SUNOS_VTOC_16
+
+/* not all LoongArch cores support unaligned accesses in hardware */
+#define        _ALIGNMENT_REQUIRED     1
+
 #else
 /*
  * Currently supported:
- * x86_64, x32, i386, arm, powerpc, s390, sparc, mips, and RV64G
+ * x86_64, x32, i386, arm, powerpc, s390, sparc, mips, RV64G, and LoongArch64
  */
 #error "Unsupported ISA type"
 #endif

diff --git a/lib/libspl/include/sys/isa_defs.h b/lib/libspl/include/sys/isa_defs.h
index 114cca4f1545f711609c673e6b26fe63c097b38a..302f31e989cbc78039b9a43700d6e3d0abe2dfc8 100644 (file)
--- a/lib/libspl/include/sys/isa_defs.h
+++ b/lib/libspl/include/sys/isa_defs.h
@@ -246,10 +246,26 @@ extern "C" {
 
 #define        _SUNOS_VTOC_16
 
+/*
+ * LoongArch arch specific defines
+ * only LoongArch64 is supported yet
+ */
+#elif defined(__loongarch__) && defined(__loongarch_lp64)
+
+#if !defined(_LP64)
+#define        _LP64
+#endif
+
+#define        _ZFS_LITTLE_ENDIAN
+#define        _SUNOS_VTOC_16
+
+/* not all LoongArch cores support unaligned accesses in hardware */
+#define        _ALIGNMENT_REQUIRED     1
+
 #else
 /*
  * Currently supported:
- * x86_64, x32, i386, arm, powerpc, s390, sparc, mips, and RV64G
+ * x86_64, x32, i386, arm, powerpc, s390, sparc, mips, RV64G, and LoongArch64
  */
 #error "Unsupported ISA type"
 #endif

diff --git a/module/lua/ldo.c b/module/lua/ldo.c
index bf525588e2609bd5ecda10e8915a2b0ba9146572..38bd4e08a73d8a917bb5c8b4da8f013721c6eff9 100644 (file)
--- a/module/lua/ldo.c
+++ b/module/lua/ldo.c
@@ -84,6 +84,8 @@ static intptr_t stack_remaining(void) {
 #define JMP_BUF_CNT    18
 #elif defined(__riscv)
 #define JMP_BUF_CNT     64
+#elif defined(__loongarch_lp64)
+#define JMP_BUF_CNT     64
 #else
 #define        JMP_BUF_CNT     1
 #endif

diff --git a/module/lua/setjmp/setjmp.S b/module/lua/setjmp/setjmp.S
index 1f461a0a4ef3a334c11de755c00a32023c0399a0..6f03eea92711451f86ddf5113768a0cae13906ba 100644 (file)
--- a/module/lua/setjmp/setjmp.S
+++ b/module/lua/setjmp/setjmp.S
@@ -16,4 +16,6 @@
 #include "setjmp_s390x.S"
 #elif defined(__riscv)
 #include "setjmp_rv64g.S"
+#elif defined(__loongarch_lp64)
+#include "setjmp_loongarch64.S"
 #endif

diff --git a/module/lua/setjmp/setjmp_loongarch64.S b/module/lua/setjmp/setjmp_loongarch64.S
new file mode 100644 (file)
index 0000000..216b829
--- /dev/null
+++ b/module/lua/setjmp/setjmp_loongarch64.S
@@ -0,0 +1,82 @@
+/*-
+ * Copyright 2022 Han Gao <gaohan@uniontech.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if __loongarch_lp64
+
+#define ENTRY(symbol) \
+  .text; \
+  .globl symbol; \
+  .align 3; \
+  .type symbol, @function; \
+  symbol:
+
+#define END(function) \
+  .size function, .- function;
+
+ENTRY(setjmp)
+       st.d    $ra, $a0, 0*8
+       st.d    $sp, $a0, 1*8
+       st.d    $r21, $a0, 2*8
+       st.d    $fp, $a0, 3*8
+       st.d    $s0, $a0, 4*8
+       st.d    $s1, $a0, 5*8
+       st.d    $s2, $a0, 6*8
+       st.d    $s3, $a0, 7*8
+       st.d    $s4, $a0, 8*8
+       st.d    $s5, $a0, 9*8
+       st.d    $s6, $a0, 10*8
+       st.d    $s7, $a0, 11*8
+       st.d    $s8, $a0, 12*8
+
+       li.w    $a0, 0
+       jr      $ra
+END(setjmp)
+
+ENTRY(longjmp)
+       ld.d    $ra, $a0, 0*8
+       ld.d    $sp, $a0, 1*8
+       ld.d    $r21, $a0, 2*8
+       ld.d    $fp, $a0, 3*8
+       ld.d    $s0, $a0, 4*8
+       ld.d    $s1, $a0, 5*8
+       ld.d    $s2, $a0, 6*8
+       ld.d    $s3, $a0, 7*8
+       ld.d    $s4, $a0, 8*8
+       ld.d    $s5, $a0, 9*8
+       ld.d    $s6, $a0, 10*8
+       ld.d    $s7, $a0, 11*8
+       ld.d    $s8, $a0, 12*8
+
+       sltui   $a0, $a1, 1
+       add.d   $a0, $a0, $a1   // a0 = (a1 == 0) ? 1 : a1
+       jr      $ra
+END(longjmp)
+
+#ifdef __ELF__
+.section .note.GNU-stack,"",%progbits
+#endif
+
+#endif