};
#endif
-#elif defined(__aarch64__) || (defined(__arm__) && __ARM_ARCH > 6)
+#elif defined(__aarch64__) || defined(__arm__)
+extern void zfs_sha256_block_armv7(uint32_t s[8], const void *, size_t);
+const sha256_ops_t sha256_armv7_impl = {
+ .is_supported = sha2_is_supported,
+ .transform = zfs_sha256_block_armv7,
+ .name = "armv7"
+};
+
+#if __ARM_ARCH > 6
static boolean_t sha256_have_neon(void)
{
return (kfpu_allowed() && zfs_neon_available());
return (kfpu_allowed() && zfs_sha256_available());
}
-extern void zfs_sha256_block_armv7(uint32_t s[8], const void *, size_t);
-const sha256_ops_t sha256_armv7_impl = {
- .is_supported = sha2_is_supported,
- .transform = zfs_sha256_block_armv7,
- .name = "armv7"
-};
-
TF(zfs_sha256_block_neon, tf_sha256_neon);
const sha256_ops_t sha256_neon_impl = {
.is_supported = sha256_have_neon,
.transform = tf_sha256_armv8ce,
.name = "armv8-ce"
};
+#endif
#elif defined(__PPC64__)
static boolean_t sha256_have_isa207(void)
#if defined(__x86_64) && defined(HAVE_SSE4_1)
&sha256_shani_impl,
#endif
-#if defined(__aarch64__) || (defined(__arm__) && __ARM_ARCH > 6)
+#if defined(__aarch64__) || defined(__arm__)
&sha256_armv7_impl,
+#if __ARM_ARCH > 6
&sha256_neon_impl,
&sha256_armv8_impl,
#endif
+#endif
#if defined(__PPC64__)
&sha256_ppc_impl,
&sha256_power8_impl,
};
#endif
-#elif defined(__aarch64__)
+#elif defined(__aarch64__) || defined(__arm__)
extern void zfs_sha512_block_armv7(uint64_t s[8], const void *, size_t);
const sha512_ops_t sha512_armv7_impl = {
.is_supported = sha2_is_supported,
.name = "armv7"
};
+#if defined(__aarch64__)
static boolean_t sha512_have_armv8ce(void)
{
return (kfpu_allowed() && zfs_sha512_available());
.transform = tf_sha512_armv8ce,
.name = "armv8-ce"
};
+#endif
-#elif defined(__arm__) && __ARM_ARCH > 6
-extern void zfs_sha512_block_armv7(uint64_t s[8], const void *, size_t);
-const sha512_ops_t sha512_armv7_impl = {
- .is_supported = sha2_is_supported,
- .transform = zfs_sha512_block_armv7,
- .name = "armv7"
-};
-
+#if defined(__arm__) && __ARM_ARCH > 6
static boolean_t sha512_have_neon(void)
{
return (kfpu_allowed() && zfs_neon_available());
.transform = tf_sha512_neon,
.name = "neon"
};
+#endif
#elif defined(__PPC64__)
TF(zfs_sha512_ppc, tf_sha512_ppc);
#if defined(__x86_64) && defined(HAVE_AVX2)
&sha512_avx2_impl,
#endif
-#if defined(__aarch64__)
+#if defined(__aarch64__) || defined(__arm__)
&sha512_armv7_impl,
+#if defined(__aarch64__)
&sha512_armv8_impl,
#endif
#if defined(__arm__) && __ARM_ARCH > 6
- &sha512_armv7_impl,
&sha512_neon_impl,
#endif
+#endif
#if defined(__PPC64__)
&sha512_ppc_impl,
&sha512_power8_impl,
#endif
.size zfs_sha256_block_armv7,.-zfs_sha256_block_armv7
+#if __ARM_ARCH__ >= 7
.arch armv7-a
.fpu neon
stmdb sp!,{r4-r12,lr}
sub r11,sp,#16*4+16
-#if __ARM_ARCH__ >=7
adr r14,K256
-#else
- ldr r14,=K256
-#endif
bic r11,r11,#15 @ align for 128-bit stores
mov r12,sp
mov sp,r11 @ alloca
bx lr @ bx lr
.size zfs_sha256_block_armv8,.-zfs_sha256_block_armv8
-#endif
+#endif // #if __ARM_ARCH__ >= 7
+#endif // #if defined(__arm__)
#endif
.size zfs_sha512_block_armv7,.-zfs_sha512_block_armv7
+#if __ARM_ARCH__ >= 7
.arch armv7-a
.fpu neon
VFP_ABI_POP
bx lr @ .word 0xe12fff1e
.size zfs_sha512_block_neon,.-zfs_sha512_block_neon
-#endif
+#endif // #if __ARM_ARCH__ >= 7
+#endif // #if defined(__arm__)