debian/patches/extra/0007-x86-define-a-new-MSR-based-feature-word-FEATURE_WORD.patch

   1 From 13edfb1c1bc0b0b419e078cdc158804eedc499f7 Mon Sep 17 00:00:00 2001
   2 From: Robert Hoo <robert.hu@linux.intel.com>
   3 Date: Mon, 15 Oct 2018 12:47:25 +0800
   4 Subject: [PATCH] x86: define a new MSR based feature word --
   5  FEATURE_WORDS_ARCH_CAPABILITIES
   6
   7 Note RSBA is specially treated -- no matter host support it or not, qemu
   8 pretends it is supported.
   9
  10 Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
  11 Message-Id: <1539578845-37944-4-git-send-email-robert.hu@linux.intel.com>
  12 [ehabkost: removed automatic enabling of RSBA]
  13 Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
  14 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
  15
  16 (cherry picked from commit d86f963694df27f11b3681ffd225c9362de1b634)
  17 Signed-off-by: Oguz Bektas <o.bektas@proxmox.com>
  18 ---
  19  target/i386/cpu.c | 24 +++++++++++++++++++++++-
  20  target/i386/cpu.h |  8 ++++++++
  21  target/i386/kvm.c | 11 +++++++++++
  22  3 files changed, 42 insertions(+), 1 deletion(-)
  23
  24 diff --git a/target/i386/cpu.c b/target/i386/cpu.c
  25 index d2985144a3..a64aa8793e 100644
  26 --- a/target/i386/cpu.c
  27 +++ b/target/i386/cpu.c
  28 @@ -1141,6 +1141,27 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
  29          },
  30          .tcg_features = ~0U,
  31      },
  32 +    /*Below are MSR exposed features*/
  33 +    [FEAT_ARCH_CAPABILITIES] = {
  34 +        .type = MSR_FEATURE_WORD,
  35 +        .feat_names = {
  36 +            "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
  37 +            "ssb-no", NULL, NULL, NULL,
  38 +            NULL, NULL, NULL, NULL,
  39 +            NULL, NULL, NULL, NULL,
  40 +            NULL, NULL, NULL, NULL,
  41 +            NULL, NULL, NULL, NULL,
  42 +            NULL, NULL, NULL, NULL,
  43 +            NULL, NULL, NULL, NULL,
  44 +        },
  45 +        .msr = {
  46 +            .index = MSR_IA32_ARCH_CAPABILITIES,
  47 +            .cpuid_dep = {
  48 +                FEAT_7_0_EDX,
  49 +                CPUID_7_0_EDX_ARCH_CAPABILITIES
  50 +            }
  51 +        },
  52 +    },
  53  };
  54
  55  typedef struct X86RegisterInfo32 {
  56 @@ -3581,7 +3602,8 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,
  57                                                          wi->cpuid.reg);
  58              break;
  59          case MSR_FEATURE_WORD:
  60 -            r = kvm_arch_get_supported_msr_feature(kvm_state, wi->msr.index);
  61 +            r = kvm_arch_get_supported_msr_feature(kvm_state,
  62 +                        wi->msr.index);
  63              break;
  64          }
  65      } else if (hvf_enabled()) {
  66 diff --git a/target/i386/cpu.h b/target/i386/cpu.h
  67 index fb2f5f6ebc..ae54a98249 100644
  68 --- a/target/i386/cpu.h
  69 +++ b/target/i386/cpu.h
  70 @@ -502,6 +502,7 @@ typedef enum FeatureWord {
  71      FEAT_6_EAX,         /* CPUID[6].EAX */
  72      FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
  73      FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
  74 +    FEAT_ARCH_CAPABILITIES,
  75      FEATURE_WORDS,
  76  } FeatureWord;
  77
  78 @@ -727,6 +728,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
  79  #define CPUID_TOPOLOGY_LEVEL_SMT      (1U << 8)
  80  #define CPUID_TOPOLOGY_LEVEL_CORE     (2U << 8)
  81
  82 +/* MSR Feature Bits */
  83 +#define MSR_ARCH_CAP_RDCL_NO    (1U << 0)
  84 +#define MSR_ARCH_CAP_IBRS_ALL   (1U << 1)
  85 +#define MSR_ARCH_CAP_RSBA       (1U << 2)
  86 +#define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)
  87 +#define MSR_ARCH_CAP_SSB_NO     (1U << 4)
  88 +
  89  #ifndef HYPERV_SPINLOCK_NEVER_RETRY
  90  #define HYPERV_SPINLOCK_NEVER_RETRY             0xFFFFFFFF
  91  #endif
  92 diff --git a/target/i386/kvm.c b/target/i386/kvm.c
  93 index cd45c79169..0b7fcb4f7f 100644
  94 --- a/target/i386/kvm.c
  95 +++ b/target/i386/kvm.c
  96 @@ -1936,6 +1936,17 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
  97      }
  98  #endif
  99
 100 +    /* If host supports feature MSR, write down. */
 101 +    if (kvm_feature_msrs) {
 102 +        int i;
 103 +        for (i = 0; i < kvm_feature_msrs->nmsrs; i++)
 104 +            if (kvm_feature_msrs->indices[i] == MSR_IA32_ARCH_CAPABILITIES) {
 105 +                kvm_msr_entry_add(cpu, MSR_IA32_ARCH_CAPABILITIES,
 106 +                              env->features[FEAT_ARCH_CAPABILITIES]);
 107 +                break;
 108 +            }
 109 +    }
 110 +
 111      /*
 112       * The following MSRs have side effects on the guest or are too heavy
 113       * for normal writeback. Limit them to reset or full state updates.
 114 --
 115 2.11.0
 116