1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2 From: Paolo Bonzini <pbonzini@redhat.com>
3 Date: Tue, 9 Jan 2018 13:45:14 -0200
4 Subject: [PATCH] i386: Add support for SPEC_CTRL MSR
6 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
8 target/i386/cpu.h | 3 +++
9 target/i386/kvm.c | 15 +++++++++++++++
10 target/i386/machine.c | 20 ++++++++++++++++++++
11 3 files changed, 38 insertions(+)
13 diff --git a/target/i386/cpu.h b/target/i386/cpu.h
14 index c4602ca80d..cc322d6b39 100644
15 --- a/target/i386/cpu.h
16 +++ b/target/i386/cpu.h
18 #define MSR_IA32_APICBASE_BASE (0xfffffU<<12)
19 #define MSR_IA32_FEATURE_CONTROL 0x0000003a
20 #define MSR_TSC_ADJUST 0x0000003b
21 +#define MSR_IA32_SPEC_CTRL 0x48
22 #define MSR_IA32_TSCDEADLINE 0x6e0
24 #define FEATURE_CONTROL_LOCKED (1<<0)
25 @@ -1080,6 +1081,8 @@ typedef struct CPUX86State {
31 /* End of state preserved by INIT (dummy marker). */
32 struct {} end_init_save;
34 diff --git a/target/i386/kvm.c b/target/i386/kvm.c
35 index 55865dbee0..9f83c79338 100644
36 --- a/target/i386/kvm.c
37 +++ b/target/i386/kvm.c
38 @@ -89,6 +89,7 @@ static bool has_msr_hv_runtime;
39 static bool has_msr_hv_synic;
40 static bool has_msr_hv_stimer;
41 static bool has_msr_xss;
42 +static bool has_msr_spec_ctrl;
44 static bool has_msr_architectural_pmu;
45 static uint32_t num_architectural_pmu_counters;
46 @@ -1140,6 +1141,10 @@ static int kvm_get_supported_msrs(KVMState *s)
47 has_msr_hv_stimer = true;
50 + if (kvm_msr_list->indices[i] == MSR_IA32_SPEC_CTRL) {
51 + has_msr_spec_ctrl = true;
57 @@ -1667,6 +1672,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
59 kvm_msr_entry_add(cpu, MSR_IA32_XSS, env->xss);
61 + if (has_msr_spec_ctrl) {
62 + kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl);
65 if (lm_capable_kernel) {
66 kvm_msr_entry_add(cpu, MSR_CSTAR, env->cstar);
67 @@ -1675,6 +1683,7 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
68 kvm_msr_entry_add(cpu, MSR_LSTAR, env->lstar);
73 * The following MSRs have side effects on the guest or are too heavy
74 * for normal writeback. Limit them to reset or full state updates.
75 @@ -2081,6 +2090,9 @@ static int kvm_get_msrs(X86CPU *cpu)
77 kvm_msr_entry_add(cpu, MSR_IA32_XSS, 0);
79 + if (has_msr_spec_ctrl) {
80 + kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0);
84 if (!env->tsc_valid) {
85 @@ -2430,6 +2442,9 @@ static int kvm_get_msrs(X86CPU *cpu)
86 env->mtrr_var[MSR_MTRRphysIndex(index)].base = msrs[i].data;
89 + case MSR_IA32_SPEC_CTRL:
90 + env->spec_ctrl = msrs[i].data;
95 diff --git a/target/i386/machine.c b/target/i386/machine.c
96 index 78ae2f986b..8c0d5437fa 100644
97 --- a/target/i386/machine.c
98 +++ b/target/i386/machine.c
99 @@ -927,6 +927,25 @@ static const VMStateDescription vmstate_mcg_ext_ctl = {
103 +static bool spec_ctrl_needed(void *opaque)
105 + X86CPU *cpu = opaque;
106 + CPUX86State *env = &cpu->env;
108 + return env->spec_ctrl != 0;
111 +static const VMStateDescription vmstate_spec_ctrl = {
112 + .name = "cpu/spec_ctrl",
114 + .minimum_version_id = 1,
115 + .needed = spec_ctrl_needed,
116 + .fields = (VMStateField[]){
117 + VMSTATE_UINT64(env.spec_ctrl, X86CPU),
118 + VMSTATE_END_OF_LIST()
122 VMStateDescription vmstate_x86_cpu = {
125 @@ -1053,6 +1072,7 @@ VMStateDescription vmstate_x86_cpu = {
129 + &vmstate_spec_ctrl,
130 &vmstate_mcg_ext_ctl,