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5391d806 1/*
38cdea7c 2 * QEMU IDE disk and CD/DVD-ROM Emulator
5fafdf24 3 *
5391d806 4 * Copyright (c) 2003 Fabrice Bellard
201a51fc 5 * Copyright (c) 2006 Openedhand Ltd.
5fafdf24 6 *
5391d806
FB		 7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
59f2a787 25#include <hw/hw.h>
0d09e41a 26#include <hw/i386/pc.h>
a2cb15b0 27#include <hw/pci/pci.h>
0d09e41a 28#include <hw/isa/isa.h>
1de7afc9
PB		 29#include "qemu/error-report.h"
30#include "qemu/timer.h"
9c17d615
PB		 31#include "sysemu/sysemu.h"
32#include "sysemu/dma.h"
0d09e41a 33#include "hw/block/block.h"
9c17d615 34#include "sysemu/blockdev.h"
59f2a787
GH		 35
36#include <hw/ide/internal.h>
e8b54394 37
b93af93d
BW		 38/* These values were based on a Seagate ST3500418AS but have been modified
39 to make more sense in QEMU */
40static const int smart_attributes[][12] = {
41 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
42 /* raw read error rate*/
43 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
44 /* spin up */
45 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
46 /* start stop count */
47 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
48 /* remapped sectors */
49 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
50 /* power on hours */
51 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* power cycle count */
53 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
54 /* airflow-temperature-celsius */
55 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
e8b54394
BW		 56};
57
ce4b6522 58static int ide_handle_rw_error(IDEState *s, int error, int op);
40c4ed3f 59static void ide_dummy_transfer_stop(IDEState *s);
98087450 60
5391d806
FB		 61static void padstr(char *str, const char *src, int len)
62{
63 int i, v;
64 for(i = 0; i < len; i++) {
65 if (*src)
66 v = *src++;
67 else
68 v = ' ';
69b34976 69 str[i^1] = v;
5391d806
FB		 70 }
71}
72
67b915a5
FB		 73static void put_le16(uint16_t *p, unsigned int v)
74{
0c4ad8dc 75 *p = cpu_to_le16(v);
67b915a5
FB		 76}
77
5391d806
FB		 78static void ide_identify(IDEState *s)
79{
80 uint16_t *p;
81 unsigned int oldsize;
d353fb72 82 IDEDevice *dev = s->unit ? s->bus->slave : s->bus->master;
5391d806 83
94458802
FB		 84 if (s->identify_set) {
85 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
86 return;
87 }
88
5391d806
FB		 89 memset(s->io_buffer, 0, 512);
90 p = (uint16_t *)s->io_buffer;
67b915a5 91 put_le16(p + 0, 0x0040);
5fafdf24 92 put_le16(p + 1, s->cylinders);
67b915a5
FB		 93 put_le16(p + 3, s->heads);
94 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
95 put_le16(p + 5, 512); /* XXX: retired, remove ? */
5fafdf24 96 put_le16(p + 6, s->sectors);
fa879c64 97 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 98 put_le16(p + 20, 3); /* XXX: retired, remove ? */
99 put_le16(p + 21, 512); /* cache size in sectors */
100 put_le16(p + 22, 4); /* ecc bytes */
47c06340 101 padstr((char *)(p + 23), s->version, 8); /* firmware version */
27e0c9a1 102 padstr((char *)(p + 27), s->drive_model_str, 40); /* model */
3b46e624 103#if MAX_MULT_SECTORS > 1
67b915a5 104 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
5391d806 105#endif
67b915a5 106 put_le16(p + 48, 1); /* dword I/O */
94458802 107 put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
67b915a5
FB		 108 put_le16(p + 51, 0x200); /* PIO transfer cycle */
109 put_le16(p + 52, 0x200); /* DMA transfer cycle */
94458802 110 put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
67b915a5
FB		 111 put_le16(p + 54, s->cylinders);
112 put_le16(p + 55, s->heads);
113 put_le16(p + 56, s->sectors);
5391d806 114 oldsize = s->cylinders * s->heads * s->sectors;
67b915a5
FB		 115 put_le16(p + 57, oldsize);
116 put_le16(p + 58, oldsize >> 16);
5391d806 117 if (s->mult_sectors)
67b915a5
FB		 118 put_le16(p + 59, 0x100 | s->mult_sectors);
119 put_le16(p + 60, s->nb_sectors);
120 put_le16(p + 61, s->nb_sectors >> 16);
d1b5c20d 121 put_le16(p + 62, 0x07); /* single word dma0-2 supported */
94458802 122 put_le16(p + 63, 0x07); /* mdma0-2 supported */
79d1d331 123 put_le16(p + 64, 0x03); /* pio3-4 supported */
94458802
FB		 124 put_le16(p + 65, 120);
125 put_le16(p + 66, 120);
126 put_le16(p + 67, 120);
127 put_le16(p + 68, 120);
d353fb72
CH		 128 if (dev && dev->conf.discard_granularity) {
129 put_le16(p + 69, (1 << 14)); /* determinate TRIM behavior */
130 }
ccf0fd8b
RE		 131
132 if (s->ncq_queues) {
133 put_le16(p + 75, s->ncq_queues - 1);
134 /* NCQ supported */
135 put_le16(p + 76, (1 << 8));
136 }
137
94458802
FB		 138 put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
139 put_le16(p + 81, 0x16); /* conforms to ata5 */
a58b8d54
CH		 140 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
141 put_le16(p + 82, (1 << 14) | (1 << 5) | 1);
c2ff060f
FB		 142 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
143 put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
95ebda85
FB		 144 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
145 if (s->wwn) {
146 put_le16(p + 84, (1 << 14) | (1 << 8) | 0);
147 } else {
148 put_le16(p + 84, (1 << 14) | 0);
149 }
e900a7b7
CH		 150 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
151 if (bdrv_enable_write_cache(s->bs))
152 put_le16(p + 85, (1 << 14) | (1 << 5) | 1);
153 else
154 put_le16(p + 85, (1 << 14) | 1);
c2ff060f 155 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
2844bdd9 156 put_le16(p + 86, (1 << 13) | (1 <<12) | (1 << 10));
95ebda85
FB		 157 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
158 if (s->wwn) {
159 put_le16(p + 87, (1 << 14) | (1 << 8) | 0);
160 } else {
161 put_le16(p + 87, (1 << 14) | 0);
162 }
94458802
FB		 163 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
164 put_le16(p + 93, 1 | (1 << 14) | 0x2000);
c2ff060f
FB		 165 put_le16(p + 100, s->nb_sectors);
166 put_le16(p + 101, s->nb_sectors >> 16);
167 put_le16(p + 102, s->nb_sectors >> 32);
168 put_le16(p + 103, s->nb_sectors >> 48);
d353fb72 169
57dac7ef
MA		 170 if (dev && dev->conf.physical_block_size)
171 put_le16(p + 106, 0x6000 | get_physical_block_exp(&dev->conf));
95ebda85
FB		 172 if (s->wwn) {
173 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
174 put_le16(p + 108, s->wwn >> 48);
175 put_le16(p + 109, s->wwn >> 32);
176 put_le16(p + 110, s->wwn >> 16);
177 put_le16(p + 111, s->wwn);
178 }
d353fb72
CH		 179 if (dev && dev->conf.discard_granularity) {
180 put_le16(p + 169, 1); /* TRIM support */
181 }
94458802
FB		 182
183 memcpy(s->identify_data, p, sizeof(s->identify_data));
184 s->identify_set = 1;
5391d806
FB		 185}
186
187static void ide_atapi_identify(IDEState *s)
188{
189 uint16_t *p;
190
94458802
FB		 191 if (s->identify_set) {
192 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
193 return;
194 }
195
5391d806
FB		 196 memset(s->io_buffer, 0, 512);
197 p = (uint16_t *)s->io_buffer;
198 /* Removable CDROM, 50us response, 12 byte packets */
67b915a5 199 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
fa879c64 200 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 201 put_le16(p + 20, 3); /* buffer type */
202 put_le16(p + 21, 512); /* cache size in sectors */
203 put_le16(p + 22, 4); /* ecc bytes */
47c06340 204 padstr((char *)(p + 23), s->version, 8); /* firmware version */
27e0c9a1 205 padstr((char *)(p + 27), s->drive_model_str, 40); /* model */
67b915a5 206 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
8ccad811
FB		 207#ifdef USE_DMA_CDROM
208 put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
209 put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
d1b5c20d 210 put_le16(p + 62, 7); /* single word dma0-2 supported */
8ccad811 211 put_le16(p + 63, 7); /* mdma0-2 supported */
8ccad811 212#else
67b915a5
FB		 213 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
214 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
215 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
8ccad811 216#endif
79d1d331 217 put_le16(p + 64, 3); /* pio3-4 supported */
67b915a5
FB		 218 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
219 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
220 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
221 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
94458802 222
67b915a5
FB		 223 put_le16(p + 71, 30); /* in ns */
224 put_le16(p + 72, 30); /* in ns */
5391d806 225
1bdaa28d
AG		 226 if (s->ncq_queues) {
227 put_le16(p + 75, s->ncq_queues - 1);
228 /* NCQ supported */
229 put_le16(p + 76, (1 << 8));
230 }
231
67b915a5 232 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
8ccad811
FB		 233#ifdef USE_DMA_CDROM
234 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
235#endif
94458802
FB		 236 memcpy(s->identify_data, p, sizeof(s->identify_data));
237 s->identify_set = 1;
5391d806
FB		 238}
239
201a51fc
AZ		 240static void ide_cfata_identify(IDEState *s)
241{
242 uint16_t *p;
243 uint32_t cur_sec;
201a51fc
AZ		 244
245 p = (uint16_t *) s->identify_data;
246 if (s->identify_set)
247 goto fill_buffer;
248
249 memset(p, 0, sizeof(s->identify_data));
250
251 cur_sec = s->cylinders * s->heads * s->sectors;
252
253 put_le16(p + 0, 0x848a); /* CF Storage Card signature */
254 put_le16(p + 1, s->cylinders); /* Default cylinders */
255 put_le16(p + 3, s->heads); /* Default heads */
256 put_le16(p + 6, s->sectors); /* Default sectors per track */
257 put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */
258 put_le16(p + 8, s->nb_sectors); /* Sectors per card */
fa879c64 259 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
201a51fc 260 put_le16(p + 22, 0x0004); /* ECC bytes */
47c06340 261 padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */
27e0c9a1 262 padstr((char *) (p + 27), s->drive_model_str, 40);/* Model number */
201a51fc
AZ		 263#if MAX_MULT_SECTORS > 1
264 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
265#else
266 put_le16(p + 47, 0x0000);
267#endif
268 put_le16(p + 49, 0x0f00); /* Capabilities */
269 put_le16(p + 51, 0x0002); /* PIO cycle timing mode */
270 put_le16(p + 52, 0x0001); /* DMA cycle timing mode */
271 put_le16(p + 53, 0x0003); /* Translation params valid */
272 put_le16(p + 54, s->cylinders); /* Current cylinders */
273 put_le16(p + 55, s->heads); /* Current heads */
274 put_le16(p + 56, s->sectors); /* Current sectors */
275 put_le16(p + 57, cur_sec); /* Current capacity */
276 put_le16(p + 58, cur_sec >> 16); /* Current capacity */
277 if (s->mult_sectors) /* Multiple sector setting */
278 put_le16(p + 59, 0x100 | s->mult_sectors);
279 put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */
280 put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */
281 put_le16(p + 63, 0x0203); /* Multiword DMA capability */
282 put_le16(p + 64, 0x0001); /* Flow Control PIO support */
283 put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */
284 put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */
285 put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */
286 put_le16(p + 82, 0x400c); /* Command Set supported */
287 put_le16(p + 83, 0x7068); /* Command Set supported */
288 put_le16(p + 84, 0x4000); /* Features supported */
289 put_le16(p + 85, 0x000c); /* Command Set enabled */
290 put_le16(p + 86, 0x7044); /* Command Set enabled */
291 put_le16(p + 87, 0x4000); /* Features enabled */
292 put_le16(p + 91, 0x4060); /* Current APM level */
293 put_le16(p + 129, 0x0002); /* Current features option */
294 put_le16(p + 130, 0x0005); /* Reassigned sectors */
295 put_le16(p + 131, 0x0001); /* Initial power mode */
296 put_le16(p + 132, 0x0000); /* User signature */
297 put_le16(p + 160, 0x8100); /* Power requirement */
298 put_le16(p + 161, 0x8001); /* CF command set */
299
300 s->identify_set = 1;
301
302fill_buffer:
303 memcpy(s->io_buffer, p, sizeof(s->identify_data));
304}
305
5391d806
FB		 306static void ide_set_signature(IDEState *s)
307{
308 s->select &= 0xf0; /* clear head */
309 /* put signature */
310 s->nsector = 1;
311 s->sector = 1;
cd8722bb 312 if (s->drive_kind == IDE_CD) {
5391d806
FB		 313 s->lcyl = 0x14;
314 s->hcyl = 0xeb;
315 } else if (s->bs) {
316 s->lcyl = 0;
317 s->hcyl = 0;
318 } else {
319 s->lcyl = 0xff;
320 s->hcyl = 0xff;
321 }
322}
323
d353fb72
CH		 324typedef struct TrimAIOCB {
325 BlockDriverAIOCB common;
326 QEMUBH *bh;
327 int ret;
501378c3
PB		 328 QEMUIOVector *qiov;
329 BlockDriverAIOCB *aiocb;
330 int i, j;
d353fb72
CH		 331} TrimAIOCB;
332
333static void trim_aio_cancel(BlockDriverAIOCB *acb)
334{
335 TrimAIOCB *iocb = container_of(acb, TrimAIOCB, common);
336
501378c3
PB		 337 /* Exit the loop in case bdrv_aio_cancel calls ide_issue_trim_cb again. */
338 iocb->j = iocb->qiov->niov - 1;
339 iocb->i = (iocb->qiov->iov[iocb->j].iov_len / 8) - 1;
340
341 /* Tell ide_issue_trim_cb not to trigger the completion, too. */
d353fb72
CH		 342 qemu_bh_delete(iocb->bh);
343 iocb->bh = NULL;
501378c3
PB		 344
345 if (iocb->aiocb) {
346 bdrv_aio_cancel(iocb->aiocb);
347 }
d353fb72
CH		 348 qemu_aio_release(iocb);
349}
350
d7331bed 351static const AIOCBInfo trim_aiocb_info = {
d353fb72
CH		 352 .aiocb_size = sizeof(TrimAIOCB),
353 .cancel = trim_aio_cancel,
354};
355
356static void ide_trim_bh_cb(void *opaque)
357{
358 TrimAIOCB *iocb = opaque;
359
360 iocb->common.cb(iocb->common.opaque, iocb->ret);
361
362 qemu_bh_delete(iocb->bh);
363 iocb->bh = NULL;
d353fb72
CH		 364 qemu_aio_release(iocb);
365}
366
501378c3
PB		 367static void ide_issue_trim_cb(void *opaque, int ret)
368{
369 TrimAIOCB *iocb = opaque;
370 if (ret >= 0) {
371 while (iocb->j < iocb->qiov->niov) {
372 int j = iocb->j;
373 while (++iocb->i < iocb->qiov->iov[j].iov_len / 8) {
374 int i = iocb->i;
375 uint64_t *buffer = iocb->qiov->iov[j].iov_base;
376
377 /* 6-byte LBA + 2-byte range per entry */
378 uint64_t entry = le64_to_cpu(buffer[i]);
379 uint64_t sector = entry & 0x0000ffffffffffffULL;
380 uint16_t count = entry >> 48;
381
382 if (count == 0) {
383 continue;
384 }
385
386 /* Got an entry! Submit and exit. */
387 iocb->aiocb = bdrv_aio_discard(iocb->common.bs, sector, count,
388 ide_issue_trim_cb, opaque);
389 return;
390 }
391
392 iocb->j++;
393 iocb->i = -1;
394 }
395 } else {
396 iocb->ret = ret;
397 }
398
399 iocb->aiocb = NULL;
400 if (iocb->bh) {
401 qemu_bh_schedule(iocb->bh);
402 }
403}
404
d353fb72
CH		 405BlockDriverAIOCB *ide_issue_trim(BlockDriverState *bs,
406 int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
407 BlockDriverCompletionFunc *cb, void *opaque)
408{
409 TrimAIOCB *iocb;
d353fb72 410
d7331bed 411 iocb = qemu_aio_get(&trim_aiocb_info, bs, cb, opaque);
d353fb72
CH		 412 iocb->bh = qemu_bh_new(ide_trim_bh_cb, iocb);
413 iocb->ret = 0;
501378c3
PB		 414 iocb->qiov = qiov;
415 iocb->i = -1;
416 iocb->j = 0;
417 ide_issue_trim_cb(iocb, 0);
d353fb72
CH		 418 return &iocb->common;
419}
420
5391d806
FB		 421static inline void ide_abort_command(IDEState *s)
422{
423 s->status = READY_STAT | ERR_STAT;
424 s->error = ABRT_ERR;
425}
426
5391d806 427/* prepare data transfer and tell what to do after */
33231e0e
KW		 428void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
429 EndTransferFunc *end_transfer_func)
5391d806
FB		 430{
431 s->end_transfer_func = end_transfer_func;
432 s->data_ptr = buf;
433 s->data_end = buf + size;
40a6238a 434 if (!(s->status & ERR_STAT)) {
7603d156 435 s->status |= DRQ_STAT;
40a6238a
AG		 436 }
437 s->bus->dma->ops->start_transfer(s->bus->dma);
5391d806
FB		 438}
439
33231e0e 440void ide_transfer_stop(IDEState *s)
5391d806
FB		 441{
442 s->end_transfer_func = ide_transfer_stop;
443 s->data_ptr = s->io_buffer;
444 s->data_end = s->io_buffer;
445 s->status &= ~DRQ_STAT;
446}
447
356721ae 448int64_t ide_get_sector(IDEState *s)
5391d806
FB		 449{
450 int64_t sector_num;
451 if (s->select & 0x40) {
452 /* lba */
c2ff060f
FB		 453 if (!s->lba48) {
454 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
455 (s->lcyl << 8) | s->sector;
456 } else {
457 sector_num = ((int64_t)s->hob_hcyl << 40) |
458 ((int64_t) s->hob_lcyl << 32) |
459 ((int64_t) s->hob_sector << 24) |
460 ((int64_t) s->hcyl << 16) |
461 ((int64_t) s->lcyl << 8) | s->sector;
462 }
5391d806
FB		 463 } else {
464 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
c2ff060f 465 (s->select & 0x0f) * s->sectors + (s->sector - 1);
5391d806
FB		 466 }
467 return sector_num;
468}
469
356721ae 470void ide_set_sector(IDEState *s, int64_t sector_num)
5391d806
FB		 471{
472 unsigned int cyl, r;
473 if (s->select & 0x40) {
c2ff060f
FB		 474 if (!s->lba48) {
475 s->select = (s->select & 0xf0) | (sector_num >> 24);
476 s->hcyl = (sector_num >> 16);
477 s->lcyl = (sector_num >> 8);
478 s->sector = (sector_num);
479 } else {
480 s->sector = sector_num;
481 s->lcyl = sector_num >> 8;
482 s->hcyl = sector_num >> 16;
483 s->hob_sector = sector_num >> 24;
484 s->hob_lcyl = sector_num >> 32;
485 s->hob_hcyl = sector_num >> 40;
486 }
5391d806
FB		 487 } else {
488 cyl = sector_num / (s->heads * s->sectors);
489 r = sector_num % (s->heads * s->sectors);
490 s->hcyl = cyl >> 8;
491 s->lcyl = cyl;
1b8eb456 492 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
5391d806
FB		 493 s->sector = (r % s->sectors) + 1;
494 }
495}
496
e162cfb0
AZ		 497static void ide_rw_error(IDEState *s) {
498 ide_abort_command(s);
9cdd03a7 499 ide_set_irq(s->bus);
e162cfb0
AZ		 500}
501
bef0fd59
SH		 502static void ide_sector_read_cb(void *opaque, int ret)
503{
504 IDEState *s = opaque;
505 int n;
506
507 s->pio_aiocb = NULL;
508 s->status &= ~BUSY_STAT;
509
510 bdrv_acct_done(s->bs, &s->acct);
511 if (ret != 0) {
512 if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY |
513 BM_STATUS_RETRY_READ)) {
514 return;
515 }
516 }
517
518 n = s->nsector;
519 if (n > s->req_nb_sectors) {
520 n = s->req_nb_sectors;
521 }
522
523 /* Allow the guest to read the io_buffer */
524 ide_transfer_start(s, s->io_buffer, n * BDRV_SECTOR_SIZE, ide_sector_read);
525
526 ide_set_irq(s->bus);
527
528 ide_set_sector(s, ide_get_sector(s) + n);
529 s->nsector -= n;
530}
531
40a6238a 532void ide_sector_read(IDEState *s)
5391d806
FB		 533{
534 int64_t sector_num;
bef0fd59 535 int n;
5391d806
FB		 536
537 s->status = READY_STAT | SEEK_STAT;
a136e5a8 538 s->error = 0; /* not needed by IDE spec, but needed by Windows */
5391d806
FB		 539 sector_num = ide_get_sector(s);
540 n = s->nsector;
bef0fd59 541
5391d806 542 if (n == 0) {
5391d806 543 ide_transfer_stop(s);
bef0fd59
SH		 544 return;
545 }
546
547 s->status |= BUSY_STAT;
548
549 if (n > s->req_nb_sectors) {
550 n = s->req_nb_sectors;
551 }
552
5391d806 553#if defined(DEBUG_IDE)
bef0fd59 554 printf("sector=%" PRId64 "\n", sector_num);
5391d806 555#endif
a597e79c 556
bef0fd59
SH		 557 s->iov.iov_base = s->io_buffer;
558 s->iov.iov_len = n * BDRV_SECTOR_SIZE;
559 qemu_iovec_init_external(&s->qiov, &s->iov, 1);
560
561 bdrv_acct_start(s->bs, &s->acct, n * BDRV_SECTOR_SIZE, BDRV_ACCT_READ);
562 s->pio_aiocb = bdrv_aio_readv(s->bs, sector_num, &s->qiov, n,
563 ide_sector_read_cb, s);
5391d806
FB		 564}
565
b61744b3 566static void dma_buf_commit(IDEState *s)
7aea4412 567{
1fb8648d 568 qemu_sglist_destroy(&s->sg);
7aea4412
AL		 569}
570
33231e0e 571void ide_set_inactive(IDEState *s)
8337606d 572{
40a6238a
AG		 573 s->bus->dma->aiocb = NULL;
574 s->bus->dma->ops->set_inactive(s->bus->dma);
8337606d
KW		 575}
576
356721ae 577void ide_dma_error(IDEState *s)
e162cfb0
AZ		 578{
579 ide_transfer_stop(s);
580 s->error = ABRT_ERR;
581 s->status = READY_STAT | ERR_STAT;
40a6238a 582 ide_set_inactive(s);
9cdd03a7 583 ide_set_irq(s->bus);
e162cfb0
AZ		 584}
585
ce4b6522 586static int ide_handle_rw_error(IDEState *s, int error, int op)
428c5705 587{
1ceee0d5 588 bool is_read = (op & BM_STATUS_RETRY_READ) != 0;
3e1caa5f 589 BlockErrorAction action = bdrv_get_error_action(s->bs, is_read, error);
428c5705 590
3e1caa5f 591 if (action == BDRV_ACTION_STOP) {
40a6238a 592 s->bus->dma->ops->set_unit(s->bus->dma, s->unit);
def93791 593 s->bus->error_status = op;
3e1caa5f 594 } else if (action == BDRV_ACTION_REPORT) {
ce4b6522 595 if (op & BM_STATUS_DMA_RETRY) {
b61744b3 596 dma_buf_commit(s);
428c5705 597 ide_dma_error(s);
7aea4412 598 } else {
428c5705 599 ide_rw_error(s);
7aea4412 600 }
428c5705 601 }
3e1caa5f
PB		 602 bdrv_error_action(s->bs, action, is_read, error);
603 return action != BDRV_ACTION_IGNORE;
428c5705
AL		 604}
605
cd369c46 606void ide_dma_cb(void *opaque, int ret)
98087450 607{
40a6238a 608 IDEState *s = opaque;
8ccad811
FB		 609 int n;
610 int64_t sector_num;
038268e2 611 bool stay_active = false;
8ccad811 612
e162cfb0 613 if (ret < 0) {
cd369c46
CH		 614 int op = BM_STATUS_DMA_RETRY;
615
4e1e0051 616 if (s->dma_cmd == IDE_DMA_READ)
cd369c46 617 op |= BM_STATUS_RETRY_READ;
d353fb72
CH		 618 else if (s->dma_cmd == IDE_DMA_TRIM)
619 op |= BM_STATUS_RETRY_TRIM;
620
cd369c46 621 if (ide_handle_rw_error(s, -ret, op)) {
ce4b6522
KW		 622 return;
623 }
e162cfb0
AZ		 624 }
625
8ccad811 626 n = s->io_buffer_size >> 9;
038268e2
KW		 627 if (n > s->nsector) {
628 /* The PRDs were longer than needed for this request. Shorten them so
629 * we don't get a negative remainder. The Active bit must remain set
630 * after the request completes. */
631 n = s->nsector;
632 stay_active = true;
633 }
634
8ccad811
FB		 635 sector_num = ide_get_sector(s);
636 if (n > 0) {
b61744b3 637 dma_buf_commit(s);
8ccad811
FB		 638 sector_num += n;
639 ide_set_sector(s, sector_num);
640 s->nsector -= n;
8ccad811
FB		 641 }
642
643 /* end of transfer ? */
644 if (s->nsector == 0) {
98087450 645 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 646 ide_set_irq(s->bus);
cd369c46 647 goto eot;
98087450 648 }
8ccad811
FB		 649
650 /* launch next transfer */
651 n = s->nsector;
596bb44d 652 s->io_buffer_index = 0;
8ccad811 653 s->io_buffer_size = n * 512;
4e1e0051 654 if (s->bus->dma->ops->prepare_buf(s->bus->dma, ide_cmd_is_read(s)) == 0) {
69c38b8f
KW		 655 /* The PRDs were too short. Reset the Active bit, but don't raise an
656 * interrupt. */
72bcca73 657 s->status = READY_STAT | SEEK_STAT;
7aea4412 658 goto eot;
69c38b8f 659 }
cd369c46 660
8ccad811 661#ifdef DEBUG_AIO
4e1e0051
CH		 662 printf("ide_dma_cb: sector_num=%" PRId64 " n=%d, cmd_cmd=%d\n",
663 sector_num, n, s->dma_cmd);
8ccad811 664#endif
cd369c46 665
4e1e0051
CH		 666 switch (s->dma_cmd) {
667 case IDE_DMA_READ:
cd369c46
CH		 668 s->bus->dma->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num,
669 ide_dma_cb, s);
4e1e0051
CH		 670 break;
671 case IDE_DMA_WRITE:
cd369c46
CH		 672 s->bus->dma->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num,
673 ide_dma_cb, s);
4e1e0051 674 break;
d353fb72
CH		 675 case IDE_DMA_TRIM:
676 s->bus->dma->aiocb = dma_bdrv_io(s->bs, &s->sg, sector_num,
43cf8ae6
DG		 677 ide_issue_trim, ide_dma_cb, s,
678 DMA_DIRECTION_TO_DEVICE);
d353fb72 679 break;
cd369c46 680 }
cd369c46
CH		 681 return;
682
683eot:
a597e79c
CH		 684 if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) {
685 bdrv_acct_done(s->bs, &s->acct);
686 }
687 ide_set_inactive(s);
038268e2
KW		 688 if (stay_active) {
689 s->bus->dma->ops->add_status(s->bus->dma, BM_STATUS_DMAING);
690 }
98087450
FB		 691}
692
4e1e0051 693static void ide_sector_start_dma(IDEState *s, enum ide_dma_cmd dma_cmd)
98087450 694{
8ccad811 695 s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
98087450
FB		 696 s->io_buffer_index = 0;
697 s->io_buffer_size = 0;
4e1e0051 698 s->dma_cmd = dma_cmd;
a597e79c
CH		 699
700 switch (dma_cmd) {
701 case IDE_DMA_READ:
702 bdrv_acct_start(s->bs, &s->acct, s->nsector * BDRV_SECTOR_SIZE,
703 BDRV_ACCT_READ);
704 break;
705 case IDE_DMA_WRITE:
706 bdrv_acct_start(s->bs, &s->acct, s->nsector * BDRV_SECTOR_SIZE,
707 BDRV_ACCT_WRITE);
708 break;
709 default:
710 break;
711 }
712
cd369c46 713 s->bus->dma->ops->start_dma(s->bus->dma, s, ide_dma_cb);
98087450
FB		 714}
715
a09db21f
FB		 716static void ide_sector_write_timer_cb(void *opaque)
717{
718 IDEState *s = opaque;
9cdd03a7 719 ide_set_irq(s->bus);
a09db21f
FB		 720}
721
e82dabd8 722static void ide_sector_write_cb(void *opaque, int ret)
5391d806 723{
e82dabd8
SH		 724 IDEState *s = opaque;
725 int n;
a597e79c 726
a597e79c 727 bdrv_acct_done(s->bs, &s->acct);
428c5705 728
e82dabd8
SH		 729 s->pio_aiocb = NULL;
730 s->status &= ~BUSY_STAT;
731
e162cfb0 732 if (ret != 0) {
e82dabd8 733 if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY)) {
428c5705 734 return;
e82dabd8 735 }
e162cfb0
AZ		 736 }
737
e82dabd8
SH		 738 n = s->nsector;
739 if (n > s->req_nb_sectors) {
740 n = s->req_nb_sectors;
741 }
5391d806
FB		 742 s->nsector -= n;
743 if (s->nsector == 0) {
292eef5a 744 /* no more sectors to write */
5391d806
FB		 745 ide_transfer_stop(s);
746 } else {
e82dabd8
SH		 747 int n1 = s->nsector;
748 if (n1 > s->req_nb_sectors) {
5391d806 749 n1 = s->req_nb_sectors;
e82dabd8
SH		 750 }
751 ide_transfer_start(s, s->io_buffer, n1 * BDRV_SECTOR_SIZE,
752 ide_sector_write);
5391d806 753 }
e82dabd8 754 ide_set_sector(s, ide_get_sector(s) + n);
3b46e624 755
31c2a146
TS		 756 if (win2k_install_hack && ((++s->irq_count % 16) == 0)) {
757 /* It seems there is a bug in the Windows 2000 installer HDD
758 IDE driver which fills the disk with empty logs when the
759 IDE write IRQ comes too early. This hack tries to correct
760 that at the expense of slower write performances. Use this
761 option _only_ to install Windows 2000. You must disable it
762 for normal use. */
f7736b91 763 qemu_mod_timer(s->sector_write_timer,
74475455 764 qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000));
f7736b91 765 } else {
9cdd03a7 766 ide_set_irq(s->bus);
31c2a146 767 }
5391d806
FB		 768}
769
e82dabd8
SH		 770void ide_sector_write(IDEState *s)
771{
772 int64_t sector_num;
773 int n;
774
775 s->status = READY_STAT | SEEK_STAT | BUSY_STAT;
776 sector_num = ide_get_sector(s);
777#if defined(DEBUG_IDE)
778 printf("sector=%" PRId64 "\n", sector_num);
779#endif
780 n = s->nsector;
781 if (n > s->req_nb_sectors) {
782 n = s->req_nb_sectors;
783 }
784
785 s->iov.iov_base = s->io_buffer;
786 s->iov.iov_len = n * BDRV_SECTOR_SIZE;
787 qemu_iovec_init_external(&s->qiov, &s->iov, 1);
788
789 bdrv_acct_start(s->bs, &s->acct, n * BDRV_SECTOR_SIZE, BDRV_ACCT_READ);
790 s->pio_aiocb = bdrv_aio_writev(s->bs, sector_num, &s->qiov, n,
791 ide_sector_write_cb, s);
792}
793
b0484ae4
CH		 794static void ide_flush_cb(void *opaque, int ret)
795{
796 IDEState *s = opaque;
797
e2bcadad
KW		 798 if (ret < 0) {
799 /* XXX: What sector number to set here? */
800 if (ide_handle_rw_error(s, -ret, BM_STATUS_RETRY_FLUSH)) {
801 return;
802 }
803 }
b0484ae4 804
a597e79c 805 bdrv_acct_done(s->bs, &s->acct);
b0484ae4
CH		 806 s->status = READY_STAT | SEEK_STAT;
807 ide_set_irq(s->bus);
808}
809
40a6238a 810void ide_flush_cache(IDEState *s)
6bcb1a79 811{
b2df7531 812 if (s->bs == NULL) {
6bcb1a79 813 ide_flush_cb(s, 0);
b2df7531
KW		 814 return;
815 }
816
0565700d 817 s->status |= BUSY_STAT;
a597e79c 818 bdrv_acct_start(s->bs, &s->acct, 0, BDRV_ACCT_FLUSH);
ad54ae80 819 bdrv_aio_flush(s->bs, ide_flush_cb, s);
6bcb1a79
KW		 820}
821
201a51fc
AZ		 822static void ide_cfata_metadata_inquiry(IDEState *s)
823{
824 uint16_t *p;
825 uint32_t spd;
826
827 p = (uint16_t *) s->io_buffer;
828 memset(p, 0, 0x200);
829 spd = ((s->mdata_size - 1) >> 9) + 1;
830
831 put_le16(p + 0, 0x0001); /* Data format revision */
832 put_le16(p + 1, 0x0000); /* Media property: silicon */
833 put_le16(p + 2, s->media_changed); /* Media status */
834 put_le16(p + 3, s->mdata_size & 0xffff); /* Capacity in bytes (low) */
835 put_le16(p + 4, s->mdata_size >> 16); /* Capacity in bytes (high) */
836 put_le16(p + 5, spd & 0xffff); /* Sectors per device (low) */
837 put_le16(p + 6, spd >> 16); /* Sectors per device (high) */
838}
839
840static void ide_cfata_metadata_read(IDEState *s)
841{
842 uint16_t *p;
843
844 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
845 s->status = ERR_STAT;
846 s->error = ABRT_ERR;
847 return;
848 }
849
850 p = (uint16_t *) s->io_buffer;
851 memset(p, 0, 0x200);
852
853 put_le16(p + 0, s->media_changed); /* Media status */
854 memcpy(p + 1, s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
855 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
856 s->nsector << 9), 0x200 - 2));
857}
858
859static void ide_cfata_metadata_write(IDEState *s)
860{
861 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
862 s->status = ERR_STAT;
863 s->error = ABRT_ERR;
864 return;
865 }
866
867 s->media_changed = 0;
868
869 memcpy(s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
870 s->io_buffer + 2,
871 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
872 s->nsector << 9), 0x200 - 2));
873}
874
bd491d6a 875/* called when the inserted state of the media has changed */
7d4b4ba5 876static void ide_cd_change_cb(void *opaque, bool load)
bd491d6a
TS		 877{
878 IDEState *s = opaque;
96b8f136 879 uint64_t nb_sectors;
bd491d6a 880
25ad22bc 881 s->tray_open = !load;
bd491d6a
TS		 882 bdrv_get_geometry(s->bs, &nb_sectors);
883 s->nb_sectors = nb_sectors;
9118e7f0 884
4b9b7092
AS		 885 /*
886 * First indicate to the guest that a CD has been removed. That's
887 * done on the next command the guest sends us.
888 *
67cc61e4 889 * Then we set UNIT_ATTENTION, by which the guest will
4b9b7092
AS		 890 * detect a new CD in the drive. See ide_atapi_cmd() for details.
891 */
93c8cfd9 892 s->cdrom_changed = 1;
996faf1a 893 s->events.new_media = true;
2df0a3a3
PB		 894 s->events.eject_request = false;
895 ide_set_irq(s->bus);
896}
897
898static void ide_cd_eject_request_cb(void *opaque, bool force)
899{
900 IDEState *s = opaque;
901
902 s->events.eject_request = true;
903 if (force) {
904 s->tray_locked = false;
905 }
9cdd03a7 906 ide_set_irq(s->bus);
bd491d6a
TS		 907}
908
c2ff060f
FB		 909static void ide_cmd_lba48_transform(IDEState *s, int lba48)
910{
911 s->lba48 = lba48;
912
913 /* handle the 'magic' 0 nsector count conversion here. to avoid
914 * fiddling with the rest of the read logic, we just store the
915 * full sector count in ->nsector and ignore ->hob_nsector from now
916 */
917 if (!s->lba48) {
918 if (!s->nsector)
919 s->nsector = 256;
920 } else {
921 if (!s->nsector && !s->hob_nsector)
922 s->nsector = 65536;
923 else {
924 int lo = s->nsector;
925 int hi = s->hob_nsector;
926
927 s->nsector = (hi << 8) | lo;
928 }
929 }
930}
931
bcbdc4d3 932static void ide_clear_hob(IDEBus *bus)
c2ff060f
FB		 933{
934 /* any write clears HOB high bit of device control register */
bcbdc4d3
GH		 935 bus->ifs[0].select &= ~(1 << 7);
936 bus->ifs[1].select &= ~(1 << 7);
c2ff060f
FB		 937}
938
356721ae 939void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
caed8802 940{
bcbdc4d3 941 IDEBus *bus = opaque;
5391d806
FB		 942
943#ifdef DEBUG_IDE
944 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
945#endif
c2ff060f 946
5391d806 947 addr &= 7;
fcdd25ab
AL		 948
949 /* ignore writes to command block while busy with previous command */
bcbdc4d3 950 if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT)))
fcdd25ab
AL		 951 return;
952
5391d806
FB		 953 switch(addr) {
954 case 0:
955 break;
956 case 1:
bcbdc4d3 957 ide_clear_hob(bus);
c45c3d00 958 /* NOTE: data is written to the two drives */
bcbdc4d3
GH		 959 bus->ifs[0].hob_feature = bus->ifs[0].feature;
960 bus->ifs[1].hob_feature = bus->ifs[1].feature;
961 bus->ifs[0].feature = val;
962 bus->ifs[1].feature = val;
5391d806
FB		 963 break;
964 case 2:
bcbdc4d3
GH		 965 ide_clear_hob(bus);
966 bus->ifs[0].hob_nsector = bus->ifs[0].nsector;
967 bus->ifs[1].hob_nsector = bus->ifs[1].nsector;
968 bus->ifs[0].nsector = val;
969 bus->ifs[1].nsector = val;
5391d806
FB		 970 break;
971 case 3:
bcbdc4d3
GH		 972 ide_clear_hob(bus);
973 bus->ifs[0].hob_sector = bus->ifs[0].sector;
974 bus->ifs[1].hob_sector = bus->ifs[1].sector;
975 bus->ifs[0].sector = val;
976 bus->ifs[1].sector = val;
5391d806
FB		 977 break;
978 case 4:
bcbdc4d3
GH		 979 ide_clear_hob(bus);
980 bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl;
981 bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl;
982 bus->ifs[0].lcyl = val;
983 bus->ifs[1].lcyl = val;
5391d806
FB		 984 break;
985 case 5:
bcbdc4d3
GH		 986 ide_clear_hob(bus);
987 bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl;
988 bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl;
989 bus->ifs[0].hcyl = val;
990 bus->ifs[1].hcyl = val;
5391d806
FB		 991 break;
992 case 6:
c2ff060f 993 /* FIXME: HOB readback uses bit 7 */
bcbdc4d3
GH		 994 bus->ifs[0].select = (val & ~0x10) | 0xa0;
995 bus->ifs[1].select = (val | 0x10) | 0xa0;
5391d806 996 /* select drive */
bcbdc4d3 997 bus->unit = (val >> 4) & 1;
5391d806
FB		 998 break;
999 default:
1000 case 7:
1001 /* command */
7cff87ff
AG		 1002 ide_exec_cmd(bus, val);
1003 break;
1004 }
1005}
1006
844505b1
MA		 1007#define HD_OK (1u << IDE_HD)
1008#define CD_OK (1u << IDE_CD)
1009#define CFA_OK (1u << IDE_CFATA)
1010#define HD_CFA_OK (HD_OK | CFA_OK)
1011#define ALL_OK (HD_OK | CD_OK | CFA_OK)
1012
1013/* See ACS-2 T13/2015-D Table B.2 Command codes */
1014static const uint8_t ide_cmd_table[0x100] = {
1015 /* NOP not implemented, mandatory for CD */
1016 [CFA_REQ_EXT_ERROR_CODE] = CFA_OK,
1017 [WIN_DSM] = ALL_OK,
1018 [WIN_DEVICE_RESET] = CD_OK,
3cfc2269 1019 [WIN_RECAL] = HD_CFA_OK,
844505b1
MA		 1020 [WIN_READ] = ALL_OK,
1021 [WIN_READ_ONCE] = ALL_OK,
3cfc2269
MA		 1022 [WIN_READ_EXT] = HD_CFA_OK,
1023 [WIN_READDMA_EXT] = HD_CFA_OK,
1024 [WIN_READ_NATIVE_MAX_EXT] = HD_CFA_OK,
1025 [WIN_MULTREAD_EXT] = HD_CFA_OK,
1026 [WIN_WRITE] = HD_CFA_OK,
1027 [WIN_WRITE_ONCE] = HD_CFA_OK,
1028 [WIN_WRITE_EXT] = HD_CFA_OK,
1029 [WIN_WRITEDMA_EXT] = HD_CFA_OK,
1030 [CFA_WRITE_SECT_WO_ERASE] = CFA_OK,
1031 [WIN_MULTWRITE_EXT] = HD_CFA_OK,
1032 [WIN_WRITE_VERIFY] = HD_CFA_OK,
1033 [WIN_VERIFY] = HD_CFA_OK,
1034 [WIN_VERIFY_ONCE] = HD_CFA_OK,
1035 [WIN_VERIFY_EXT] = HD_CFA_OK,
844505b1
MA		 1036 [WIN_SEEK] = HD_CFA_OK,
1037 [CFA_TRANSLATE_SECTOR] = CFA_OK,
1038 [WIN_DIAGNOSE] = ALL_OK,
3cfc2269 1039 [WIN_SPECIFY] = HD_CFA_OK,
844505b1
MA		 1040 [WIN_STANDBYNOW2] = ALL_OK,
1041 [WIN_IDLEIMMEDIATE2] = ALL_OK,
1042 [WIN_STANDBY2] = ALL_OK,
1043 [WIN_SETIDLE2] = ALL_OK,
1044 [WIN_CHECKPOWERMODE2] = ALL_OK,
1045 [WIN_SLEEPNOW2] = ALL_OK,
1046 [WIN_PACKETCMD] = CD_OK,
1047 [WIN_PIDENTIFY] = CD_OK,
1048 [WIN_SMART] = HD_CFA_OK,
1049 [CFA_ACCESS_METADATA_STORAGE] = CFA_OK,
1050 [CFA_ERASE_SECTORS] = CFA_OK,
3cfc2269
MA		 1051 [WIN_MULTREAD] = HD_CFA_OK,
1052 [WIN_MULTWRITE] = HD_CFA_OK,
1053 [WIN_SETMULT] = HD_CFA_OK,
1054 [WIN_READDMA] = HD_CFA_OK,
1055 [WIN_READDMA_ONCE] = HD_CFA_OK,
1056 [WIN_WRITEDMA] = HD_CFA_OK,
1057 [WIN_WRITEDMA_ONCE] = HD_CFA_OK,
1058 [CFA_WRITE_MULTI_WO_ERASE] = CFA_OK,
844505b1
MA		 1059 [WIN_STANDBYNOW1] = ALL_OK,
1060 [WIN_IDLEIMMEDIATE] = ALL_OK,
1061 [WIN_STANDBY] = ALL_OK,
1062 [WIN_SETIDLE1] = ALL_OK,
1063 [WIN_CHECKPOWERMODE1] = ALL_OK,
1064 [WIN_SLEEPNOW1] = ALL_OK,
1065 [WIN_FLUSH_CACHE] = ALL_OK,
3cfc2269 1066 [WIN_FLUSH_CACHE_EXT] = HD_CFA_OK,
844505b1
MA		 1067 [WIN_IDENTIFY] = ALL_OK,
1068 [WIN_SETFEATURES] = ALL_OK,
1069 [IBM_SENSE_CONDITION] = CFA_OK,
d5b406d9 1070 [CFA_WEAR_LEVEL] = HD_CFA_OK,
844505b1
MA		 1071 [WIN_READ_NATIVE_MAX] = ALL_OK,
1072};
1073
1074static bool ide_cmd_permitted(IDEState *s, uint32_t cmd)
1075{
1076 return cmd < ARRAY_SIZE(ide_cmd_table)
1077 && (ide_cmd_table[cmd] & (1u << s->drive_kind));
1078}
7cff87ff
AG		 1079
1080void ide_exec_cmd(IDEBus *bus, uint32_t val)
1081{
7cdd481c 1082 uint16_t *identify_data;
7cff87ff
AG		 1083 IDEState *s;
1084 int n;
1085 int lba48 = 0;
1086
5391d806 1087#if defined(DEBUG_IDE)
6ef2ba5e 1088 printf("ide: CMD=%02x\n", val);
5391d806 1089#endif
6ef2ba5e 1090 s = idebus_active_if(bus);
66a0a2cb 1091 /* ignore commands to non existent slave */
6ef2ba5e
AG		 1092 if (s != bus->ifs && !s->bs)
1093 return;
c2ff060f 1094
6ef2ba5e
AG		 1095 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
1096 if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET)
1097 return;
fcdd25ab 1098
844505b1
MA		 1099 if (!ide_cmd_permitted(s, val)) {
1100 goto abort_cmd;
1101 }
1102
6ef2ba5e 1103 switch(val) {
d353fb72
CH		 1104 case WIN_DSM:
1105 switch (s->feature) {
1106 case DSM_TRIM:
1107 if (!s->bs) {
1108 goto abort_cmd;
1109 }
1110 ide_sector_start_dma(s, IDE_DMA_TRIM);
1111 break;
1112 default:
1113 goto abort_cmd;
1114 }
1115 break;
6ef2ba5e
AG		 1116 case WIN_IDENTIFY:
1117 if (s->bs && s->drive_kind != IDE_CD) {
1118 if (s->drive_kind != IDE_CFATA)
1119 ide_identify(s);
1120 else
1121 ide_cfata_identify(s);
769bec72 1122 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1123 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1124 } else {
1125 if (s->drive_kind == IDE_CD) {
1126 ide_set_signature(s);
5391d806 1127 }
6ef2ba5e
AG		 1128 ide_abort_command(s);
1129 }
1130 ide_set_irq(s->bus);
1131 break;
1132 case WIN_SPECIFY:
1133 case WIN_RECAL:
1134 s->error = 0;
1135 s->status = READY_STAT | SEEK_STAT;
1136 ide_set_irq(s->bus);
1137 break;
1138 case WIN_SETMULT:
1139 if (s->drive_kind == IDE_CFATA && s->nsector == 0) {
1140 /* Disable Read and Write Multiple */
1141 s->mult_sectors = 0;
41a2b959 1142 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1143 } else if ((s->nsector & 0xff) != 0 &&
1144 ((s->nsector & 0xff) > MAX_MULT_SECTORS ||
1145 (s->nsector & (s->nsector - 1)) != 0)) {
1146 ide_abort_command(s);
1147 } else {
1148 s->mult_sectors = s->nsector & 0xff;
1149 s->status = READY_STAT | SEEK_STAT;
1150 }
1151 ide_set_irq(s->bus);
1152 break;
67bec53d 1153
6ef2ba5e 1154 case WIN_VERIFY_EXT:
67bec53d
KW		 1155 lba48 = 1;
1156 /* fall through */
6ef2ba5e
AG		 1157 case WIN_VERIFY:
1158 case WIN_VERIFY_ONCE:
1159 /* do sector number check ? */
1160 ide_cmd_lba48_transform(s, lba48);
1161 s->status = READY_STAT | SEEK_STAT;
1162 ide_set_irq(s->bus);
1163 break;
67bec53d 1164
814839c0 1165 case WIN_READ_EXT:
67bec53d
KW		 1166 lba48 = 1;
1167 /* fall through */
6ef2ba5e
AG		 1168 case WIN_READ:
1169 case WIN_READ_ONCE:
3f76a7c3
MA		 1170 if (s->drive_kind == IDE_CD) {
1171 ide_set_signature(s); /* odd, but ATA4 8.27.5.2 requires it */
6ef2ba5e 1172 goto abort_cmd;
3f76a7c3 1173 }
d53cdb30
PB		 1174 if (!s->bs) {
1175 goto abort_cmd;
1176 }
6ef2ba5e
AG		 1177 ide_cmd_lba48_transform(s, lba48);
1178 s->req_nb_sectors = 1;
1179 ide_sector_read(s);
1180 break;
67bec53d 1181
814839c0 1182 case WIN_WRITE_EXT:
67bec53d
KW		 1183 lba48 = 1;
1184 /* fall through */
6ef2ba5e
AG		 1185 case WIN_WRITE:
1186 case WIN_WRITE_ONCE:
1187 case CFA_WRITE_SECT_WO_ERASE:
1188 case WIN_WRITE_VERIFY:
d53cdb30
PB		 1189 if (!s->bs) {
1190 goto abort_cmd;
1191 }
6ef2ba5e
AG		 1192 ide_cmd_lba48_transform(s, lba48);
1193 s->error = 0;
1194 s->status = SEEK_STAT | READY_STAT;
1195 s->req_nb_sectors = 1;
1196 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1197 s->media_changed = 1;
1198 break;
67bec53d 1199
814839c0 1200 case WIN_MULTREAD_EXT:
67bec53d
KW		 1201 lba48 = 1;
1202 /* fall through */
6ef2ba5e 1203 case WIN_MULTREAD:
d53cdb30
PB		 1204 if (!s->bs) {
1205 goto abort_cmd;
1206 }
1207 if (!s->mult_sectors) {
6ef2ba5e 1208 goto abort_cmd;
d53cdb30 1209 }
6ef2ba5e
AG		 1210 ide_cmd_lba48_transform(s, lba48);
1211 s->req_nb_sectors = s->mult_sectors;
1212 ide_sector_read(s);
1213 break;
67bec53d 1214
6ef2ba5e 1215 case WIN_MULTWRITE_EXT:
67bec53d
KW		 1216 lba48 = 1;
1217 /* fall through */
6ef2ba5e
AG		 1218 case WIN_MULTWRITE:
1219 case CFA_WRITE_MULTI_WO_ERASE:
d53cdb30
PB		 1220 if (!s->bs) {
1221 goto abort_cmd;
1222 }
1223 if (!s->mult_sectors) {
6ef2ba5e 1224 goto abort_cmd;
d53cdb30 1225 }
6ef2ba5e
AG		 1226 ide_cmd_lba48_transform(s, lba48);
1227 s->error = 0;
1228 s->status = SEEK_STAT | READY_STAT;
1229 s->req_nb_sectors = s->mult_sectors;
1230 n = s->nsector;
1231 if (n > s->req_nb_sectors)
1232 n = s->req_nb_sectors;
1233 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1234 s->media_changed = 1;
1235 break;
67bec53d 1236
814839c0 1237 case WIN_READDMA_EXT:
67bec53d
KW		 1238 lba48 = 1;
1239 /* fall through */
6ef2ba5e
AG		 1240 case WIN_READDMA:
1241 case WIN_READDMA_ONCE:
d53cdb30 1242 if (!s->bs) {
6ef2ba5e 1243 goto abort_cmd;
d53cdb30 1244 }
6ef2ba5e 1245 ide_cmd_lba48_transform(s, lba48);
4e1e0051 1246 ide_sector_start_dma(s, IDE_DMA_READ);
6ef2ba5e 1247 break;
67bec53d 1248
814839c0 1249 case WIN_WRITEDMA_EXT:
67bec53d
KW		 1250 lba48 = 1;
1251 /* fall through */
6ef2ba5e
AG		 1252 case WIN_WRITEDMA:
1253 case WIN_WRITEDMA_ONCE:
d53cdb30 1254 if (!s->bs) {
6ef2ba5e 1255 goto abort_cmd;
d53cdb30 1256 }
6ef2ba5e 1257 ide_cmd_lba48_transform(s, lba48);
4e1e0051 1258 ide_sector_start_dma(s, IDE_DMA_WRITE);
6ef2ba5e
AG		 1259 s->media_changed = 1;
1260 break;
67bec53d 1261
6ef2ba5e 1262 case WIN_READ_NATIVE_MAX_EXT:
67bec53d
KW		 1263 lba48 = 1;
1264 /* fall through */
6ef2ba5e 1265 case WIN_READ_NATIVE_MAX:
aad64f31
SH		 1266 /* Refuse if no sectors are addressable (e.g. medium not inserted) */
1267 if (s->nb_sectors == 0) {
1268 goto abort_cmd;
1269 }
6ef2ba5e
AG		 1270 ide_cmd_lba48_transform(s, lba48);
1271 ide_set_sector(s, s->nb_sectors - 1);
1272 s->status = READY_STAT | SEEK_STAT;
1273 ide_set_irq(s->bus);
1274 break;
67bec53d 1275
6ef2ba5e
AG		 1276 case WIN_CHECKPOWERMODE1:
1277 case WIN_CHECKPOWERMODE2:
b93af93d 1278 s->error = 0;
6ef2ba5e
AG		 1279 s->nsector = 0xff; /* device active or idle */
1280 s->status = READY_STAT | SEEK_STAT;
1281 ide_set_irq(s->bus);
1282 break;
1283 case WIN_SETFEATURES:
1284 if (!s->bs)
1285 goto abort_cmd;
1286 /* XXX: valid for CDROM ? */
1287 switch(s->feature) {
6ef2ba5e 1288 case 0x02: /* write cache enable */
7cdd481c
PB		 1289 bdrv_set_enable_write_cache(s->bs, true);
1290 identify_data = (uint16_t *)s->identify_data;
1291 put_le16(identify_data + 85, (1 << 14) | (1 << 5) | 1);
1292 s->status = READY_STAT | SEEK_STAT;
1293 ide_set_irq(s->bus);
1294 break;
6ef2ba5e 1295 case 0x82: /* write cache disable */
7cdd481c
PB		 1296 bdrv_set_enable_write_cache(s->bs, false);
1297 identify_data = (uint16_t *)s->identify_data;
1298 put_le16(identify_data + 85, (1 << 14) | 1);
1299 ide_flush_cache(s);
1300 break;
1301 case 0xcc: /* reverting to power-on defaults enable */
1302 case 0x66: /* reverting to power-on defaults disable */
6ef2ba5e
AG		 1303 case 0xaa: /* read look-ahead enable */
1304 case 0x55: /* read look-ahead disable */
1305 case 0x05: /* set advanced power management mode */
1306 case 0x85: /* disable advanced power management mode */
1307 case 0x69: /* NOP */
1308 case 0x67: /* NOP */
1309 case 0x96: /* NOP */
1310 case 0x9a: /* NOP */
1311 case 0x42: /* enable Automatic Acoustic Mode */
1312 case 0xc2: /* disable Automatic Acoustic Mode */
41a2b959 1313 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1314 ide_set_irq(s->bus);
a136e5a8 1315 break;
6ef2ba5e 1316 case 0x03: { /* set transfer mode */
94458802 1317 uint8_t val = s->nsector & 0x07;
7cdd481c 1318 identify_data = (uint16_t *)s->identify_data;
94458802
FB		 1319
1320 switch (s->nsector >> 3) {
6ef2ba5e
AG		 1321 case 0x00: /* pio default */
1322 case 0x01: /* pio mode */
96c35ceb
JQ		 1323 put_le16(identify_data + 62,0x07);
1324 put_le16(identify_data + 63,0x07);
1325 put_le16(identify_data + 88,0x3f);
d1b5c20d 1326 break;
6ef2ba5e 1327 case 0x02: /* sigle word dma mode*/
96c35ceb
JQ		 1328 put_le16(identify_data + 62,0x07 | (1 << (val + 8)));
1329 put_le16(identify_data + 63,0x07);
1330 put_le16(identify_data + 88,0x3f);
94458802 1331 break;
6ef2ba5e 1332 case 0x04: /* mdma mode */
96c35ceb
JQ		 1333 put_le16(identify_data + 62,0x07);
1334 put_le16(identify_data + 63,0x07 | (1 << (val + 8)));
1335 put_le16(identify_data + 88,0x3f);
94458802 1336 break;
6ef2ba5e 1337 case 0x08: /* udma mode */
96c35ceb
JQ		 1338 put_le16(identify_data + 62,0x07);
1339 put_le16(identify_data + 63,0x07);
1340 put_le16(identify_data + 88,0x3f | (1 << (val + 8)));
94458802 1341 break;
6ef2ba5e 1342 default:
94458802
FB		 1343 goto abort_cmd;
1344 }
4fbfcd6d 1345 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1346 ide_set_irq(s->bus);
4fbfcd6d 1347 break;
6ef2ba5e
AG		 1348 }
1349 default:
1350 goto abort_cmd;
1351 }
1352 break;
1353 case WIN_FLUSH_CACHE:
1354 case WIN_FLUSH_CACHE_EXT:
1355 ide_flush_cache(s);
1356 break;
1357 case WIN_STANDBY:
1358 case WIN_STANDBY2:
1359 case WIN_STANDBYNOW1:
1360 case WIN_STANDBYNOW2:
1361 case WIN_IDLEIMMEDIATE:
1d4316d3 1362 case WIN_IDLEIMMEDIATE2:
6ef2ba5e
AG		 1363 case WIN_SETIDLE1:
1364 case WIN_SETIDLE2:
1365 case WIN_SLEEPNOW1:
1366 case WIN_SLEEPNOW2:
1367 s->status = READY_STAT;
1368 ide_set_irq(s->bus);
1369 break;
1370 case WIN_SEEK:
6ef2ba5e
AG		 1371 /* XXX: Check that seek is within bounds */
1372 s->status = READY_STAT | SEEK_STAT;
1373 ide_set_irq(s->bus);
1374 break;
1375 /* ATAPI commands */
1376 case WIN_PIDENTIFY:
844505b1
MA		 1377 ide_atapi_identify(s);
1378 s->status = READY_STAT | SEEK_STAT;
1379 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
6ef2ba5e
AG		 1380 ide_set_irq(s->bus);
1381 break;
1382 case WIN_DIAGNOSE:
1383 ide_set_signature(s);
1384 if (s->drive_kind == IDE_CD)
1385 s->status = 0; /* ATAPI spec (v6) section 9.10 defines packet
1386 * devices to return a clear status register
1387 * with READY_STAT *not* set. */
1388 else
41a2b959 1389 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1390 s->error = 0x01; /* Device 0 passed, Device 1 passed or not
1391 * present.
1392 */
1393 ide_set_irq(s->bus);
1394 break;
1d4316d3 1395 case WIN_DEVICE_RESET:
6ef2ba5e
AG		 1396 ide_set_signature(s);
1397 s->status = 0x00; /* NOTE: READY is _not_ set */
1398 s->error = 0x01;
1399 break;
1400 case WIN_PACKETCMD:
6ef2ba5e
AG		 1401 /* overlapping commands not supported */
1402 if (s->feature & 0x02)
1403 goto abort_cmd;
1404 s->status = READY_STAT | SEEK_STAT;
1405 s->atapi_dma = s->feature & 1;
1406 s->nsector = 1;
1407 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
1408 ide_atapi_cmd);
1409 break;
1410 /* CF-ATA commands */
1411 case CFA_REQ_EXT_ERROR_CODE:
6ef2ba5e
AG		 1412 s->error = 0x09; /* miscellaneous error */
1413 s->status = READY_STAT | SEEK_STAT;
1414 ide_set_irq(s->bus);
1415 break;
1416 case CFA_ERASE_SECTORS:
1417 case CFA_WEAR_LEVEL:
d5b406d9
AG		 1418#if 0
1419 /* This one has the same ID as CFA_WEAR_LEVEL and is required for
1420 Windows 8 to work with AHCI */
1421 case WIN_SECURITY_FREEZE_LOCK:
1422#endif
6ef2ba5e
AG		 1423 if (val == CFA_WEAR_LEVEL)
1424 s->nsector = 0;
1425 if (val == CFA_ERASE_SECTORS)
1426 s->media_changed = 1;
1427 s->error = 0x00;
1428 s->status = READY_STAT | SEEK_STAT;
1429 ide_set_irq(s->bus);
1430 break;
1431 case CFA_TRANSLATE_SECTOR:
6ef2ba5e
AG		 1432 s->error = 0x00;
1433 s->status = READY_STAT | SEEK_STAT;
1434 memset(s->io_buffer, 0, 0x200);
1435 s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */
1436 s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */
1437 s->io_buffer[0x02] = s->select; /* Head */
1438 s->io_buffer[0x03] = s->sector; /* Sector */
1439 s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */
1440 s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */
1441 s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */
1442 s->io_buffer[0x13] = 0x00; /* Erase flag */
1443 s->io_buffer[0x18] = 0x00; /* Hot count */
1444 s->io_buffer[0x19] = 0x00; /* Hot count */
1445 s->io_buffer[0x1a] = 0x01; /* Hot count */
1446 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1447 ide_set_irq(s->bus);
1448 break;
1449 case CFA_ACCESS_METADATA_STORAGE:
6ef2ba5e
AG		 1450 switch (s->feature) {
1451 case 0x02: /* Inquiry Metadata Storage */
1452 ide_cfata_metadata_inquiry(s);
201a51fc 1453 break;
6ef2ba5e
AG		 1454 case 0x03: /* Read Metadata Storage */
1455 ide_cfata_metadata_read(s);
201a51fc 1456 break;
6ef2ba5e
AG		 1457 case 0x04: /* Write Metadata Storage */
1458 ide_cfata_metadata_write(s);
201a51fc 1459 break;
6ef2ba5e
AG		 1460 default:
1461 goto abort_cmd;
1462 }
1463 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1464 s->status = 0x00; /* NOTE: READY is _not_ set */
1465 ide_set_irq(s->bus);
1466 break;
1467 case IBM_SENSE_CONDITION:
6ef2ba5e
AG		 1468 switch (s->feature) {
1469 case 0x01: /* sense temperature in device */
1470 s->nsector = 0x50; /* +20 C */
201a51fc 1471 break;
6ef2ba5e
AG		 1472 default:
1473 goto abort_cmd;
1474 }
1475 s->status = READY_STAT | SEEK_STAT;
1476 ide_set_irq(s->bus);
1477 break;
e8b54394 1478
814839c0 1479 case WIN_SMART:
6ef2ba5e 1480 if (s->hcyl != 0xc2 || s->lcyl != 0x4f)
e8b54394 1481 goto abort_cmd;
6ef2ba5e 1482 if (!s->smart_enabled && s->feature != SMART_ENABLE)
e8b54394 1483 goto abort_cmd;
6ef2ba5e
AG		 1484 switch (s->feature) {
1485 case SMART_DISABLE:
e8b54394
BW		 1486 s->smart_enabled = 0;
1487 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1488 ide_set_irq(s->bus);
e8b54394 1489 break;
6ef2ba5e 1490 case SMART_ENABLE:
e8b54394
BW		 1491 s->smart_enabled = 1;
1492 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1493 ide_set_irq(s->bus);
e8b54394 1494 break;
6ef2ba5e 1495 case SMART_ATTR_AUTOSAVE:
e8b54394
BW		 1496 switch (s->sector) {
1497 case 0x00:
6ef2ba5e
AG		 1498 s->smart_autosave = 0;
1499 break;
e8b54394 1500 case 0xf1:
6ef2ba5e
AG		 1501 s->smart_autosave = 1;
1502 break;
e8b54394 1503 default:
6ef2ba5e 1504 goto abort_cmd;
e8b54394
BW		 1505 }
1506 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1507 ide_set_irq(s->bus);
e8b54394 1508 break;
6ef2ba5e 1509 case SMART_STATUS:
e8b54394 1510 if (!s->smart_errors) {
6ef2ba5e
AG		 1511 s->hcyl = 0xc2;
1512 s->lcyl = 0x4f;
e8b54394 1513 } else {
6ef2ba5e
AG		 1514 s->hcyl = 0x2c;
1515 s->lcyl = 0xf4;
e8b54394
BW		 1516 }
1517 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1518 ide_set_irq(s->bus);
e8b54394 1519 break;
6ef2ba5e 1520 case SMART_READ_THRESH:
e8b54394
BW		 1521 memset(s->io_buffer, 0, 0x200);
1522 s->io_buffer[0] = 0x01; /* smart struct version */
1e53537f 1523 for (n = 0; n < ARRAY_SIZE(smart_attributes); n++) {
6ef2ba5e 1524 s->io_buffer[2+0+(n*12)] = smart_attributes[n][0];
b93af93d 1525 s->io_buffer[2+1+(n*12)] = smart_attributes[n][11];
e8b54394
BW		 1526 }
1527 for (n=0; n<511; n++) /* checksum */
6ef2ba5e 1528 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1529 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1530 s->status = READY_STAT | SEEK_STAT;
1531 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1532 ide_set_irq(s->bus);
e8b54394 1533 break;
6ef2ba5e 1534 case SMART_READ_DATA:
e8b54394
BW		 1535 memset(s->io_buffer, 0, 0x200);
1536 s->io_buffer[0] = 0x01; /* smart struct version */
1e53537f 1537 for (n = 0; n < ARRAY_SIZE(smart_attributes); n++) {
b93af93d
BW		 1538 int i;
1539 for(i = 0; i < 11; i++) {
1540 s->io_buffer[2+i+(n*12)] = smart_attributes[n][i];
1541 }
e8b54394
BW		 1542 }
1543 s->io_buffer[362] = 0x02 | (s->smart_autosave?0x80:0x00);
1544 if (s->smart_selftest_count == 0) {
6ef2ba5e 1545 s->io_buffer[363] = 0;
e8b54394 1546 } else {
6ef2ba5e 1547 s->io_buffer[363] =
e8b54394 1548 s->smart_selftest_data[3 +
6ef2ba5e
AG		 1549 (s->smart_selftest_count - 1) *
1550 24];
e8b54394
BW		 1551 }
1552 s->io_buffer[364] = 0x20;
1553 s->io_buffer[365] = 0x01;
1554 /* offline data collection capacity: execute + self-test*/
1555 s->io_buffer[367] = (1<<4 | 1<<3 | 1);
1556 s->io_buffer[368] = 0x03; /* smart capability (1) */
1557 s->io_buffer[369] = 0x00; /* smart capability (2) */
1558 s->io_buffer[370] = 0x01; /* error logging supported */
1559 s->io_buffer[372] = 0x02; /* minutes for poll short test */
1560 s->io_buffer[373] = 0x36; /* minutes for poll ext test */
1561 s->io_buffer[374] = 0x01; /* minutes for poll conveyance */
1562
1563 for (n=0; n<511; n++)
6ef2ba5e 1564 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1565 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1566 s->status = READY_STAT | SEEK_STAT;
1567 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1568 ide_set_irq(s->bus);
e8b54394 1569 break;
6ef2ba5e 1570 case SMART_READ_LOG:
e8b54394
BW		 1571 switch (s->sector) {
1572 case 0x01: /* summary smart error log */
6ef2ba5e
AG		 1573 memset(s->io_buffer, 0, 0x200);
1574 s->io_buffer[0] = 0x01;
1575 s->io_buffer[1] = 0x00; /* no error entries */
1576 s->io_buffer[452] = s->smart_errors & 0xff;
1577 s->io_buffer[453] = (s->smart_errors & 0xff00) >> 8;
e8b54394 1578
6ef2ba5e 1579 for (n=0; n<511; n++)
e8b54394 1580 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1581 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1582 break;
e8b54394 1583 case 0x06: /* smart self test log */
6ef2ba5e
AG		 1584 memset(s->io_buffer, 0, 0x200);
1585 s->io_buffer[0] = 0x01;
1586 if (s->smart_selftest_count == 0) {
e8b54394 1587 s->io_buffer[508] = 0;
6ef2ba5e 1588 } else {
e8b54394
BW		 1589 s->io_buffer[508] = s->smart_selftest_count;
1590 for (n=2; n<506; n++)
6ef2ba5e
AG		 1591 s->io_buffer[n] = s->smart_selftest_data[n];
1592 }
1593 for (n=0; n<511; n++)
e8b54394 1594 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1595 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1596 break;
e8b54394 1597 default:
6ef2ba5e 1598 goto abort_cmd;
e8b54394
BW		 1599 }
1600 s->status = READY_STAT | SEEK_STAT;
1601 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1602 ide_set_irq(s->bus);
e8b54394 1603 break;
6ef2ba5e 1604 case SMART_EXECUTE_OFFLINE:
e8b54394
BW		 1605 switch (s->sector) {
1606 case 0: /* off-line routine */
1607 case 1: /* short self test */
1608 case 2: /* extended self test */
6ef2ba5e
AG		 1609 s->smart_selftest_count++;
1610 if(s->smart_selftest_count > 21)
e8b54394 1611 s->smart_selftest_count = 0;
6ef2ba5e
AG		 1612 n = 2 + (s->smart_selftest_count - 1) * 24;
1613 s->smart_selftest_data[n] = s->sector;
1614 s->smart_selftest_data[n+1] = 0x00; /* OK and finished */
1615 s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */
1616 s->smart_selftest_data[n+3] = 0x12; /* hour count msb */
1617 s->status = READY_STAT | SEEK_STAT;
1618 ide_set_irq(s->bus);
1619 break;
e8b54394 1620 default:
6ef2ba5e 1621 goto abort_cmd;
e8b54394
BW		 1622 }
1623 break;
6ef2ba5e 1624 default:
e8b54394 1625 goto abort_cmd;
6ef2ba5e
AG		 1626 }
1627 break;
1628 default:
844505b1 1629 /* should not be reachable */
6ef2ba5e
AG		 1630 abort_cmd:
1631 ide_abort_command(s);
1632 ide_set_irq(s->bus);
1633 break;
1634 }
5391d806
FB		 1635}
1636
356721ae 1637uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
5391d806 1638{
bcbdc4d3
GH		 1639 IDEBus *bus = opaque;
1640 IDEState *s = idebus_active_if(bus);
5391d806 1641 uint32_t addr;
c2ff060f 1642 int ret, hob;
5391d806
FB		 1643
1644 addr = addr1 & 7;
c2ff060f
FB		 1645 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1646 //hob = s->select & (1 << 7);
1647 hob = 0;
5391d806
FB		 1648 switch(addr) {
1649 case 0:
1650 ret = 0xff;
1651 break;
1652 case 1:
bcbdc4d3
GH		 1653 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1654 (s != bus->ifs && !s->bs))
c45c3d00 1655 ret = 0;
c2ff060f 1656 else if (!hob)
c45c3d00 1657 ret = s->error;
c2ff060f
FB		 1658 else
1659 ret = s->hob_feature;
5391d806
FB		 1660 break;
1661 case 2:
bcbdc4d3 1662 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1663 ret = 0;
c2ff060f 1664 else if (!hob)
c45c3d00 1665 ret = s->nsector & 0xff;
c2ff060f
FB		 1666 else
1667 ret = s->hob_nsector;
5391d806
FB		 1668 break;
1669 case 3:
bcbdc4d3 1670 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1671 ret = 0;
c2ff060f 1672 else if (!hob)
c45c3d00 1673 ret = s->sector;
c2ff060f
FB		 1674 else
1675 ret = s->hob_sector;
5391d806
FB		 1676 break;
1677 case 4:
bcbdc4d3 1678 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1679 ret = 0;
c2ff060f 1680 else if (!hob)
c45c3d00 1681 ret = s->lcyl;
c2ff060f
FB		 1682 else
1683 ret = s->hob_lcyl;
5391d806
FB		 1684 break;
1685 case 5:
bcbdc4d3 1686 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1687 ret = 0;
c2ff060f 1688 else if (!hob)
c45c3d00 1689 ret = s->hcyl;
c2ff060f
FB		 1690 else
1691 ret = s->hob_hcyl;
5391d806
FB		 1692 break;
1693 case 6:
bcbdc4d3 1694 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00
FB		 1695 ret = 0;
1696 else
7ae98627 1697 ret = s->select;
5391d806
FB		 1698 break;
1699 default:
1700 case 7:
bcbdc4d3
GH		 1701 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1702 (s != bus->ifs && !s->bs))
c45c3d00
FB		 1703 ret = 0;
1704 else
1705 ret = s->status;
9cdd03a7 1706 qemu_irq_lower(bus->irq);
5391d806
FB		 1707 break;
1708 }
1709#ifdef DEBUG_IDE
1710 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1711#endif
1712 return ret;
1713}
1714
356721ae 1715uint32_t ide_status_read(void *opaque, uint32_t addr)
5391d806 1716{
bcbdc4d3
GH		 1717 IDEBus *bus = opaque;
1718 IDEState *s = idebus_active_if(bus);
5391d806 1719 int ret;
7ae98627 1720
bcbdc4d3
GH		 1721 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1722 (s != bus->ifs && !s->bs))
7ae98627
FB		 1723 ret = 0;
1724 else
1725 ret = s->status;
5391d806
FB		 1726#ifdef DEBUG_IDE
1727 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1728#endif
1729 return ret;
1730}
1731
356721ae 1732void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
5391d806 1733{
bcbdc4d3 1734 IDEBus *bus = opaque;
5391d806
FB		 1735 IDEState *s;
1736 int i;
1737
1738#ifdef DEBUG_IDE
1739 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1740#endif
1741 /* common for both drives */
9cdd03a7 1742 if (!(bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1743 (val & IDE_CMD_RESET)) {
1744 /* reset low to high */
1745 for(i = 0;i < 2; i++) {
bcbdc4d3 1746 s = &bus->ifs[i];
5391d806
FB		 1747 s->status = BUSY_STAT | SEEK_STAT;
1748 s->error = 0x01;
1749 }
9cdd03a7 1750 } else if ((bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1751 !(val & IDE_CMD_RESET)) {
1752 /* high to low */
1753 for(i = 0;i < 2; i++) {
bcbdc4d3 1754 s = &bus->ifs[i];
cd8722bb 1755 if (s->drive_kind == IDE_CD)
6b136f9e
FB		 1756 s->status = 0x00; /* NOTE: READY is _not_ set */
1757 else
56bf1d37 1758 s->status = READY_STAT | SEEK_STAT;
5391d806
FB		 1759 ide_set_signature(s);
1760 }
1761 }
1762
9cdd03a7 1763 bus->cmd = val;
5391d806
FB		 1764}
1765
40c4ed3f
KW		 1766/*
1767 * Returns true if the running PIO transfer is a PIO out (i.e. data is
1768 * transferred from the device to the guest), false if it's a PIO in
1769 */
1770static bool ide_is_pio_out(IDEState *s)
1771{
1772 if (s->end_transfer_func == ide_sector_write ||
1773 s->end_transfer_func == ide_atapi_cmd) {
1774 return false;
1775 } else if (s->end_transfer_func == ide_sector_read ||
1776 s->end_transfer_func == ide_transfer_stop ||
1777 s->end_transfer_func == ide_atapi_cmd_reply_end ||
1778 s->end_transfer_func == ide_dummy_transfer_stop) {
1779 return true;
1780 }
1781
1782 abort();
1783}
1784
356721ae 1785void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
5391d806 1786{
bcbdc4d3
GH		 1787 IDEBus *bus = opaque;
1788 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1789 uint8_t *p;
1790
40c4ed3f
KW		 1791 /* PIO data access allowed only when DRQ bit is set. The result of a write
1792 * during PIO out is indeterminate, just ignore it. */
1793 if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
fcdd25ab 1794 return;
40c4ed3f 1795 }
fcdd25ab 1796
5391d806 1797 p = s->data_ptr;
0c4ad8dc 1798 *(uint16_t *)p = le16_to_cpu(val);
5391d806
FB		 1799 p += 2;
1800 s->data_ptr = p;
1801 if (p >= s->data_end)
1802 s->end_transfer_func(s);
1803}
1804
356721ae 1805uint32_t ide_data_readw(void *opaque, uint32_t addr)
5391d806 1806{
bcbdc4d3
GH		 1807 IDEBus *bus = opaque;
1808 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1809 uint8_t *p;
1810 int ret;
fcdd25ab 1811
40c4ed3f
KW		 1812 /* PIO data access allowed only when DRQ bit is set. The result of a read
1813 * during PIO in is indeterminate, return 0 and don't move forward. */
1814 if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
fcdd25ab 1815 return 0;
40c4ed3f 1816 }
fcdd25ab 1817
5391d806 1818 p = s->data_ptr;
0c4ad8dc 1819 ret = cpu_to_le16(*(uint16_t *)p);
5391d806
FB		 1820 p += 2;
1821 s->data_ptr = p;
1822 if (p >= s->data_end)
1823 s->end_transfer_func(s);
1824 return ret;
1825}
1826
356721ae 1827void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
5391d806 1828{
bcbdc4d3
GH		 1829 IDEBus *bus = opaque;
1830 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1831 uint8_t *p;
1832
40c4ed3f
KW		 1833 /* PIO data access allowed only when DRQ bit is set. The result of a write
1834 * during PIO out is indeterminate, just ignore it. */
1835 if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
fcdd25ab 1836 return;
40c4ed3f 1837 }
fcdd25ab 1838
5391d806 1839 p = s->data_ptr;
0c4ad8dc 1840 *(uint32_t *)p = le32_to_cpu(val);
5391d806
FB		 1841 p += 4;
1842 s->data_ptr = p;
1843 if (p >= s->data_end)
1844 s->end_transfer_func(s);
1845}
1846
356721ae 1847uint32_t ide_data_readl(void *opaque, uint32_t addr)
5391d806 1848{
bcbdc4d3
GH		 1849 IDEBus *bus = opaque;
1850 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1851 uint8_t *p;
1852 int ret;
3b46e624 1853
40c4ed3f
KW		 1854 /* PIO data access allowed only when DRQ bit is set. The result of a read
1855 * during PIO in is indeterminate, return 0 and don't move forward. */
1856 if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
fcdd25ab 1857 return 0;
40c4ed3f 1858 }
fcdd25ab 1859
5391d806 1860 p = s->data_ptr;
0c4ad8dc 1861 ret = cpu_to_le32(*(uint32_t *)p);
5391d806
FB		 1862 p += 4;
1863 s->data_ptr = p;
1864 if (p >= s->data_end)
1865 s->end_transfer_func(s);
1866 return ret;
1867}
1868
a7dfe172
FB		 1869static void ide_dummy_transfer_stop(IDEState *s)
1870{
1871 s->data_ptr = s->io_buffer;
1872 s->data_end = s->io_buffer;
1873 s->io_buffer[0] = 0xff;
1874 s->io_buffer[1] = 0xff;
1875 s->io_buffer[2] = 0xff;
1876 s->io_buffer[3] = 0xff;
1877}
1878
4a643563 1879static void ide_reset(IDEState *s)
5391d806 1880{
4a643563
BS		 1881#ifdef DEBUG_IDE
1882 printf("ide: reset\n");
1883#endif
bef0fd59
SH		 1884
1885 if (s->pio_aiocb) {
1886 bdrv_aio_cancel(s->pio_aiocb);
1887 s->pio_aiocb = NULL;
1888 }
1889
cd8722bb 1890 if (s->drive_kind == IDE_CFATA)
201a51fc
AZ		 1891 s->mult_sectors = 0;
1892 else
1893 s->mult_sectors = MAX_MULT_SECTORS;
4a643563
BS		 1894 /* ide regs */
1895 s->feature = 0;
1896 s->error = 0;
1897 s->nsector = 0;
1898 s->sector = 0;
1899 s->lcyl = 0;
1900 s->hcyl = 0;
1901
1902 /* lba48 */
1903 s->hob_feature = 0;
1904 s->hob_sector = 0;
1905 s->hob_nsector = 0;
1906 s->hob_lcyl = 0;
1907 s->hob_hcyl = 0;
1908
5391d806 1909 s->select = 0xa0;
41a2b959 1910 s->status = READY_STAT | SEEK_STAT;
4a643563
BS		 1911
1912 s->lba48 = 0;
1913
1914 /* ATAPI specific */
1915 s->sense_key = 0;
1916 s->asc = 0;
1917 s->cdrom_changed = 0;
1918 s->packet_transfer_size = 0;
1919 s->elementary_transfer_size = 0;
1920 s->io_buffer_index = 0;
1921 s->cd_sector_size = 0;
1922 s->atapi_dma = 0;
a7f3d65b
PH		 1923 s->tray_locked = 0;
1924 s->tray_open = 0;
4a643563
BS		 1925 /* ATA DMA state */
1926 s->io_buffer_size = 0;
1927 s->req_nb_sectors = 0;
1928
5391d806 1929 ide_set_signature(s);
a7dfe172
FB		 1930 /* init the transfer handler so that 0xffff is returned on data
1931 accesses */
1932 s->end_transfer_func = ide_dummy_transfer_stop;
1933 ide_dummy_transfer_stop(s);
201a51fc 1934 s->media_changed = 0;
5391d806
FB		 1935}
1936
4a643563
BS		 1937void ide_bus_reset(IDEBus *bus)
1938{
1939 bus->unit = 0;
1940 bus->cmd = 0;
1941 ide_reset(&bus->ifs[0]);
1942 ide_reset(&bus->ifs[1]);
1943 ide_clear_hob(bus);
40a6238a
AG		 1944
1945 /* pending async DMA */
1946 if (bus->dma->aiocb) {
1947#ifdef DEBUG_AIO
1948 printf("aio_cancel\n");
1949#endif
1950 bdrv_aio_cancel(bus->dma->aiocb);
1951 bus->dma->aiocb = NULL;
1952 }
1953
1954 /* reset dma provider too */
1955 bus->dma->ops->reset(bus->dma);
4a643563
BS		 1956}
1957
e4def80b
MA		 1958static bool ide_cd_is_tray_open(void *opaque)
1959{
1960 return ((IDEState *)opaque)->tray_open;
1961}
1962
f107639a
MA		 1963static bool ide_cd_is_medium_locked(void *opaque)
1964{
1965 return ((IDEState *)opaque)->tray_locked;
1966}
1967
0e49de52 1968static const BlockDevOps ide_cd_block_ops = {
145feb17 1969 .change_media_cb = ide_cd_change_cb,
2df0a3a3 1970 .eject_request_cb = ide_cd_eject_request_cb,
e4def80b 1971 .is_tray_open = ide_cd_is_tray_open,
f107639a 1972 .is_medium_locked = ide_cd_is_medium_locked,
0e49de52
MA		 1973};
1974
1f56e32a 1975int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind,
95ebda85 1976 const char *version, const char *serial, const char *model,
ba801960
MA		 1977 uint64_t wwn,
1978 uint32_t cylinders, uint32_t heads, uint32_t secs,
1979 int chs_trans)
88804180 1980{
88804180
GH		 1981 uint64_t nb_sectors;
1982
f8b6cc00 1983 s->bs = bs;
1f56e32a
MA		 1984 s->drive_kind = kind;
1985
f8b6cc00 1986 bdrv_get_geometry(bs, &nb_sectors);
870111c8
MA		 1987 s->cylinders = cylinders;
1988 s->heads = heads;
1989 s->sectors = secs;
ba801960 1990 s->chs_trans = chs_trans;
870111c8 1991 s->nb_sectors = nb_sectors;
95ebda85 1992 s->wwn = wwn;
870111c8
MA		 1993 /* The SMART values should be preserved across power cycles
1994 but they aren't. */
1995 s->smart_enabled = 1;
1996 s->smart_autosave = 1;
1997 s->smart_errors = 0;
1998 s->smart_selftest_count = 0;
1f56e32a 1999 if (kind == IDE_CD) {
0e49de52 2000 bdrv_set_dev_ops(bs, &ide_cd_block_ops, s);
7b6f9300 2001 bdrv_set_buffer_alignment(bs, 2048);
7aa9c811 2002 } else {
98f28ad7
MA		 2003 if (!bdrv_is_inserted(s->bs)) {
2004 error_report("Device needs media, but drive is empty");
2005 return -1;
2006 }
7aa9c811
MA		 2007 if (bdrv_is_read_only(bs)) {
2008 error_report("Can't use a read-only drive");
2009 return -1;
2010 }
88804180 2011 }
f8b6cc00 2012 if (serial) {
aa2c91bd 2013 pstrcpy(s->drive_serial_str, sizeof(s->drive_serial_str), serial);
6ced55a5 2014 } else {
88804180
GH		 2015 snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
2016 "QM%05d", s->drive_serial);
870111c8 2017 }
27e0c9a1
FB		 2018 if (model) {
2019 pstrcpy(s->drive_model_str, sizeof(s->drive_model_str), model);
2020 } else {
2021 switch (kind) {
2022 case IDE_CD:
2023 strcpy(s->drive_model_str, "QEMU DVD-ROM");
2024 break;
2025 case IDE_CFATA:
2026 strcpy(s->drive_model_str, "QEMU MICRODRIVE");
2027 break;
2028 default:
2029 strcpy(s->drive_model_str, "QEMU HARDDISK");
2030 break;
2031 }
2032 }
2033
47c06340
GH		 2034 if (version) {
2035 pstrcpy(s->version, sizeof(s->version), version);
2036 } else {
93bfef4c 2037 pstrcpy(s->version, sizeof(s->version), qemu_get_version());
47c06340 2038 }
40a6238a 2039
88804180 2040 ide_reset(s);
50fb1900 2041 bdrv_iostatus_enable(bs);
c4d74df7 2042 return 0;
88804180
GH		 2043}
2044
57234ee4 2045static void ide_init1(IDEBus *bus, int unit)
d459da0e
MA		 2046{
2047 static int drive_serial = 1;
2048 IDEState *s = &bus->ifs[unit];
2049
2050 s->bus = bus;
2051 s->unit = unit;
2052 s->drive_serial = drive_serial++;
1b2adf28 2053 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
50641c5c 2054 s->io_buffer_total_len = IDE_DMA_BUF_SECTORS*512 + 4;
c925400b
KW		 2055 s->io_buffer = qemu_memalign(2048, s->io_buffer_total_len);
2056 memset(s->io_buffer, 0, s->io_buffer_total_len);
2057
d459da0e 2058 s->smart_selftest_data = qemu_blockalign(s->bs, 512);
c925400b
KW		 2059 memset(s->smart_selftest_data, 0, 512);
2060
74475455 2061 s->sector_write_timer = qemu_new_timer_ns(vm_clock,
d459da0e 2062 ide_sector_write_timer_cb, s);
57234ee4
MA		 2063}
2064
40a6238a
AG		 2065static void ide_nop_start(IDEDMA *dma, IDEState *s,
2066 BlockDriverCompletionFunc *cb)
2067{
2068}
2069
2070static int ide_nop(IDEDMA *dma)
2071{
2072 return 0;
2073}
2074
2075static int ide_nop_int(IDEDMA *dma, int x)
2076{
2077 return 0;
2078}
2079
1dfb4dd9 2080static void ide_nop_restart(void *opaque, int x, RunState y)
40a6238a
AG		 2081{
2082}
2083
2084static const IDEDMAOps ide_dma_nop_ops = {
2085 .start_dma = ide_nop_start,
2086 .start_transfer = ide_nop,
2087 .prepare_buf = ide_nop_int,
2088 .rw_buf = ide_nop_int,
2089 .set_unit = ide_nop_int,
2090 .add_status = ide_nop_int,
2091 .set_inactive = ide_nop,
2092 .restart_cb = ide_nop_restart,
2093 .reset = ide_nop,
2094};
2095
2096static IDEDMA ide_dma_nop = {
2097 .ops = &ide_dma_nop_ops,
2098 .aiocb = NULL,
2099};
2100
57234ee4
MA		 2101void ide_init2(IDEBus *bus, qemu_irq irq)
2102{
2103 int i;
2104
2105 for(i = 0; i < 2; i++) {
2106 ide_init1(bus, i);
2107 ide_reset(&bus->ifs[i]);
870111c8 2108 }
57234ee4 2109 bus->irq = irq;
40a6238a 2110 bus->dma = &ide_dma_nop;
d459da0e
MA		 2111}
2112
57234ee4
MA		 2113/* TODO convert users to qdev and remove */
2114void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
2115 DriveInfo *hd1, qemu_irq irq)
5391d806 2116{
ba801960 2117 int i, trans;
57234ee4 2118 DriveInfo *dinfo;
ba801960 2119 uint32_t cyls, heads, secs;
5391d806 2120
caed8802 2121 for(i = 0; i < 2; i++) {
57234ee4
MA		 2122 dinfo = i == 0 ? hd0 : hd1;
2123 ide_init1(bus, i);
2124 if (dinfo) {
ba801960
MA		 2125 cyls = dinfo->cyls;
2126 heads = dinfo->heads;
2127 secs = dinfo->secs;
2128 trans = dinfo->trans;
2129 if (!cyls && !heads && !secs) {
2130 hd_geometry_guess(dinfo->bdrv, &cyls, &heads, &secs, &trans);
2adc99b2
MA		 2131 } else if (trans == BIOS_ATA_TRANSLATION_AUTO) {
2132 trans = hd_bios_chs_auto_trans(cyls, heads, secs);
ba801960 2133 }
b7eb0c9f
MA		 2134 if (cyls < 1 || cyls > 65535) {
2135 error_report("cyls must be between 1 and 65535");
2136 exit(1);
2137 }
2138 if (heads < 1 || heads > 16) {
2139 error_report("heads must be between 1 and 16");
2140 exit(1);
2141 }
2142 if (secs < 1 || secs > 255) {
2143 error_report("secs must be between 1 and 255");
2144 exit(1);
2145 }
1f56e32a 2146 if (ide_init_drive(&bus->ifs[i], dinfo->bdrv,
577d0a38
MA		 2147 dinfo->media_cd ? IDE_CD : IDE_HD,
2148 NULL, dinfo->serial, NULL, 0,
2149 cyls, heads, secs, trans) < 0) {
c4d74df7
MA		 2150 error_report("Can't set up IDE drive %s", dinfo->id);
2151 exit(1);
2152 }
fa879d62 2153 bdrv_attach_dev_nofail(dinfo->bdrv, &bus->ifs[i]);
57234ee4
MA		 2154 } else {
2155 ide_reset(&bus->ifs[i]);
2156 }
5391d806 2157 }
9cdd03a7 2158 bus->irq = irq;
40a6238a 2159 bus->dma = &ide_dma_nop;
69b91039
FB		 2160}
2161
4a91d3b3
RH		 2162static const MemoryRegionPortio ide_portio_list[] = {
2163 { 0, 8, 1, .read = ide_ioport_read, .write = ide_ioport_write },
2164 { 0, 2, 2, .read = ide_data_readw, .write = ide_data_writew },
2165 { 0, 4, 4, .read = ide_data_readl, .write = ide_data_writel },
2166 PORTIO_END_OF_LIST(),
2167};
2168
2169static const MemoryRegionPortio ide_portio2_list[] = {
2170 { 0, 1, 1, .read = ide_status_read, .write = ide_cmd_write },
2171 PORTIO_END_OF_LIST(),
2172};
2173
2174void ide_init_ioport(IDEBus *bus, ISADevice *dev, int iobase, int iobase2)
69b91039 2175{
4a91d3b3
RH		 2176 /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA
2177 bridge has been setup properly to always register with ISA. */
2178 isa_register_portio_list(dev, iobase, ide_portio_list, bus, "ide");
2179
caed8802 2180 if (iobase2) {
4a91d3b3 2181 isa_register_portio_list(dev, iobase2, ide_portio2_list, bus, "ide");
5391d806 2182 }
5391d806 2183}
69b91039 2184
37159f13 2185static bool is_identify_set(void *opaque, int version_id)
aa941b94 2186{
37159f13
JQ		 2187 IDEState *s = opaque;
2188
2189 return s->identify_set != 0;
2190}
2191
50641c5c
JQ		 2192static EndTransferFunc* transfer_end_table[] = {
2193 ide_sector_read,
2194 ide_sector_write,
2195 ide_transfer_stop,
2196 ide_atapi_cmd_reply_end,
2197 ide_atapi_cmd,
2198 ide_dummy_transfer_stop,
2199};
2200
2201static int transfer_end_table_idx(EndTransferFunc *fn)
2202{
2203 int i;
2204
2205 for (i = 0; i < ARRAY_SIZE(transfer_end_table); i++)
2206 if (transfer_end_table[i] == fn)
2207 return i;
2208
2209 return -1;
2210}
2211
37159f13 2212static int ide_drive_post_load(void *opaque, int version_id)
aa941b94 2213{
37159f13
JQ		 2214 IDEState *s = opaque;
2215
7cdd481c
PB		 2216 if (s->identify_set) {
2217 bdrv_set_enable_write_cache(s->bs, !!(s->identify_data[85] & (1 << 5)));
2218 }
37159f13 2219 return 0;
aa941b94
AZ		 2220}
2221
50641c5c
JQ		 2222static int ide_drive_pio_post_load(void *opaque, int version_id)
2223{
2224 IDEState *s = opaque;
2225
fb60105d 2226 if (s->end_transfer_fn_idx >= ARRAY_SIZE(transfer_end_table)) {
50641c5c
JQ		 2227 return -EINVAL;
2228 }
2229 s->end_transfer_func = transfer_end_table[s->end_transfer_fn_idx];
2230 s->data_ptr = s->io_buffer + s->cur_io_buffer_offset;
2231 s->data_end = s->data_ptr + s->cur_io_buffer_len;
2232
2233 return 0;
2234}
2235
2236static void ide_drive_pio_pre_save(void *opaque)
2237{
2238 IDEState *s = opaque;
2239 int idx;
2240
2241 s->cur_io_buffer_offset = s->data_ptr - s->io_buffer;
2242 s->cur_io_buffer_len = s->data_end - s->data_ptr;
2243
2244 idx = transfer_end_table_idx(s->end_transfer_func);
2245 if (idx == -1) {
2246 fprintf(stderr, "%s: invalid end_transfer_func for DRQ_STAT\n",
2247 __func__);
2248 s->end_transfer_fn_idx = 2;
2249 } else {
2250 s->end_transfer_fn_idx = idx;
2251 }
2252}
2253
2254static bool ide_drive_pio_state_needed(void *opaque)
2255{
2256 IDEState *s = opaque;
2257
fdc650d7
KW		 2258 return ((s->status & DRQ_STAT) != 0)
2259 || (s->bus->error_status & BM_STATUS_PIO_RETRY);
50641c5c
JQ		 2260}
2261
db118fe7
MA		 2262static bool ide_tray_state_needed(void *opaque)
2263{
2264 IDEState *s = opaque;
2265
2266 return s->tray_open || s->tray_locked;
2267}
2268
996faf1a
AS		 2269static bool ide_atapi_gesn_needed(void *opaque)
2270{
2271 IDEState *s = opaque;
2272
2273 return s->events.new_media || s->events.eject_request;
2274}
2275
def93791
KW		 2276static bool ide_error_needed(void *opaque)
2277{
2278 IDEBus *bus = opaque;
2279
2280 return (bus->error_status != 0);
2281}
2282
996faf1a 2283/* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
656fbeff 2284static const VMStateDescription vmstate_ide_atapi_gesn_state = {
996faf1a
AS		 2285 .name ="ide_drive/atapi/gesn_state",
2286 .version_id = 1,
2287 .minimum_version_id = 1,
2288 .minimum_version_id_old = 1,
2289 .fields = (VMStateField []) {
2290 VMSTATE_BOOL(events.new_media, IDEState),
2291 VMSTATE_BOOL(events.eject_request, IDEState),
0754f9ec 2292 VMSTATE_END_OF_LIST()
996faf1a
AS		 2293 }
2294};
2295
db118fe7
MA		 2296static const VMStateDescription vmstate_ide_tray_state = {
2297 .name = "ide_drive/tray_state",
2298 .version_id = 1,
2299 .minimum_version_id = 1,
2300 .minimum_version_id_old = 1,
db118fe7
MA		 2301 .fields = (VMStateField[]) {
2302 VMSTATE_BOOL(tray_open, IDEState),
2303 VMSTATE_BOOL(tray_locked, IDEState),
2304 VMSTATE_END_OF_LIST()
2305 }
2306};
2307
656fbeff 2308static const VMStateDescription vmstate_ide_drive_pio_state = {
50641c5c
JQ		 2309 .name = "ide_drive/pio_state",
2310 .version_id = 1,
2311 .minimum_version_id = 1,
2312 .minimum_version_id_old = 1,
2313 .pre_save = ide_drive_pio_pre_save,
2314 .post_load = ide_drive_pio_post_load,
2315 .fields = (VMStateField []) {
2316 VMSTATE_INT32(req_nb_sectors, IDEState),
2317 VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1,
2318 vmstate_info_uint8, uint8_t),
2319 VMSTATE_INT32(cur_io_buffer_offset, IDEState),
2320 VMSTATE_INT32(cur_io_buffer_len, IDEState),
2321 VMSTATE_UINT8(end_transfer_fn_idx, IDEState),
2322 VMSTATE_INT32(elementary_transfer_size, IDEState),
2323 VMSTATE_INT32(packet_transfer_size, IDEState),
2324 VMSTATE_END_OF_LIST()
2325 }
2326};
2327
37159f13
JQ		 2328const VMStateDescription vmstate_ide_drive = {
2329 .name = "ide_drive",
3abb6260 2330 .version_id = 3,
37159f13
JQ		 2331 .minimum_version_id = 0,
2332 .minimum_version_id_old = 0,
2333 .post_load = ide_drive_post_load,
2334 .fields = (VMStateField []) {
2335 VMSTATE_INT32(mult_sectors, IDEState),
2336 VMSTATE_INT32(identify_set, IDEState),
2337 VMSTATE_BUFFER_TEST(identify_data, IDEState, is_identify_set),
2338 VMSTATE_UINT8(feature, IDEState),
2339 VMSTATE_UINT8(error, IDEState),
2340 VMSTATE_UINT32(nsector, IDEState),
2341 VMSTATE_UINT8(sector, IDEState),
2342 VMSTATE_UINT8(lcyl, IDEState),
2343 VMSTATE_UINT8(hcyl, IDEState),
2344 VMSTATE_UINT8(hob_feature, IDEState),
2345 VMSTATE_UINT8(hob_sector, IDEState),
2346 VMSTATE_UINT8(hob_nsector, IDEState),
2347 VMSTATE_UINT8(hob_lcyl, IDEState),
2348 VMSTATE_UINT8(hob_hcyl, IDEState),
2349 VMSTATE_UINT8(select, IDEState),
2350 VMSTATE_UINT8(status, IDEState),
2351 VMSTATE_UINT8(lba48, IDEState),
2352 VMSTATE_UINT8(sense_key, IDEState),
2353 VMSTATE_UINT8(asc, IDEState),
2354 VMSTATE_UINT8_V(cdrom_changed, IDEState, 3),
37159f13 2355 VMSTATE_END_OF_LIST()
50641c5c
JQ		 2356 },
2357 .subsections = (VMStateSubsection []) {
2358 {
2359 .vmsd = &vmstate_ide_drive_pio_state,
2360 .needed = ide_drive_pio_state_needed,
db118fe7
MA		 2361 }, {
2362 .vmsd = &vmstate_ide_tray_state,
2363 .needed = ide_tray_state_needed,
996faf1a
AS		 2364 }, {
2365 .vmsd = &vmstate_ide_atapi_gesn_state,
2366 .needed = ide_atapi_gesn_needed,
50641c5c
JQ		 2367 }, {
2368 /* empty */
2369 }
37159f13
JQ		 2370 }
2371};
2372
656fbeff 2373static const VMStateDescription vmstate_ide_error_status = {
def93791
KW		 2374 .name ="ide_bus/error",
2375 .version_id = 1,
2376 .minimum_version_id = 1,
2377 .minimum_version_id_old = 1,
2378 .fields = (VMStateField []) {
2379 VMSTATE_INT32(error_status, IDEBus),
2380 VMSTATE_END_OF_LIST()
2381 }
2382};
2383
6521dc62
JQ		 2384const VMStateDescription vmstate_ide_bus = {
2385 .name = "ide_bus",
2386 .version_id = 1,
2387 .minimum_version_id = 1,
2388 .minimum_version_id_old = 1,
2389 .fields = (VMStateField []) {
2390 VMSTATE_UINT8(cmd, IDEBus),
2391 VMSTATE_UINT8(unit, IDEBus),
2392 VMSTATE_END_OF_LIST()
def93791
KW		 2393 },
2394 .subsections = (VMStateSubsection []) {
2395 {
2396 .vmsd = &vmstate_ide_error_status,
2397 .needed = ide_error_needed,
2398 }, {
2399 /* empty */
2400 }
6521dc62
JQ		 2401 }
2402};
75717903
IY		 2403
2404void ide_drive_get(DriveInfo **hd, int max_bus)
2405{
2406 int i;
2407
2408 if (drive_get_max_bus(IF_IDE) >= max_bus) {
2409 fprintf(stderr, "qemu: too many IDE bus: %d\n", max_bus);
2410 exit(1);
2411 }
2412
2413 for(i = 0; i < max_bus * MAX_IDE_DEVS; i++) {
2414 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
2415 }
2416}
Qemu copy for testing