]> git.proxmox.com Git - qemu.git/blame - trace-events
qapi schema: add Netdev types
[qemu.git] / trace-events
CommitLineData
94a420b1
SH
1# Trace events for debugging and performance instrumentation
2#
3# This file is processed by the tracetool script during the build.
4#
5# To add a new trace event:
6#
7# 1. Choose a name for the trace event. Declare its arguments and format
8# string.
9#
10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11# trace_multiwrite_cb(). The source file must #include "trace.h".
12#
13# Format of a trace event:
14#
1e2cf2bc 15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
94a420b1 16#
a74cd8cc 17# Example: g_malloc(size_t size) "size %zu"
94a420b1 18#
1e2cf2bc 19# The "disable" keyword will build without the trace event.
1e2cf2bc 20#
94a420b1
SH
21# The <name> must be a valid as a C function name.
22#
23# Types should be standard C types. Use void * for pointers because the trace
24# system may not have the necessary headers included.
25#
26# The <format-string> should be a sprintf()-compatible format string.
cd245a19
SH
27
28# qemu-malloc.c
a74cd8cc
FZ
29g_malloc(size_t size, void *ptr) "size %zu ptr %p"
30g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
31g_free(void *ptr) "ptr %p"
cd245a19
SH
32
33# osdep.c
47f08d7a
L
34qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
35qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
36qemu_vfree(void *ptr) "ptr %p"
6d519a5f 37
64979a4d 38# hw/virtio.c
47f08d7a
L
39virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
40virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
41virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
42virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
43virtio_irq(void *vq) "vq %p"
44virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
4e1837f8 45virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
64979a4d 46
49e3fdd7 47# hw/virtio-serial-bus.c
47f08d7a
L
48virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
49virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
50virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
51virtio_serial_handle_control_message_port(unsigned int port) "port %u"
49e3fdd7 52
d02e4fa4 53# hw/virtio-console.c
47f08d7a
L
54virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
55virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
56virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
d02e4fa4 57
6d519a5f 58# block.c
28dcee10 59bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\""
47f08d7a
L
60multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
61bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
4265d620 62bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
47f08d7a
L
63bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
64bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
65bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
025e849a 66bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d"
47f08d7a 67bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
470c0504 68bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
47f08d7a 69bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
f08f2dda 70bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
59370aaa 71bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p"
470c0504 72bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d"
6d519a5f 73
4f1043b4
SH
74# block/stream.c
75stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
76stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
77
12bd451f 78# blockdev.c
370521a1 79qmp_block_job_cancel(void *job) "job %p"
12bd451f
SH
80block_stream_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
81qmp_block_stream(void *bs, void *job) "bs %p job %p"
82
6d519a5f 83# hw/virtio-blk.c
47f08d7a
L
84virtio_blk_req_complete(void *req, int status) "req %p status %d"
85virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
86virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
81b6b9fa 87virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
6d519a5f
SH
88
89# posix-aio-compat.c
47f08d7a
L
90paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
91paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
92paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
bd3c9aa5
PS
93
94# ioport.c
47f08d7a
L
95cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
96cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
62dd89de
PS
97
98# balloon.c
99# Since requests are raised via monitor, not many tracepoints are needed.
47f08d7a 100balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
d8023f31
BS
101
102# hw/apic.c
47f08d7a
L
103apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
104apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
689d7e2f
SH
105cpu_set_apic_base(uint64_t val) "%016"PRIx64
106cpu_get_apic_base(uint64_t val) "%016"PRIx64
47f08d7a
L
107apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
108apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
d8023f31 109# coalescing
343270ea 110apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
47f08d7a
L
111apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
112apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
97bf4851
BS
113
114# hw/cs4231.c
47f08d7a
L
115cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
116cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
117cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
118cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
97bf4851 119
d43ed9ec 120# hw/ds1225y.c
47f08d7a
L
121nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
122nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
d43ed9ec 123
97bf4851 124# hw/eccmemctl.c
47f08d7a
L
125ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
126ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
127ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
128ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
129ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
130ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
131ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
132ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
133ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
134ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
135ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
136ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
137ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
138ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
139ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
140ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
141ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
142ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
97bf4851 143
31f7eedf
MA
144# hw/hd-geometry.c
145hd_geometry_lchs_guess(void *bs, int cyls, int heads, int secs) "bs %p LCHS %d %d %d"
1f24d7b4 146hd_geometry_guess(void *bs, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "bs %p CHS %u %u %u trans %d"
31f7eedf 147
63b9932d
HP
148# hw/jazz-led.c
149jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
150jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
151
97bf4851 152# hw/lance.c
47f08d7a
L
153lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
154lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
97bf4851
BS
155
156# hw/slavio_intctl.c
47f08d7a
L
157slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
158slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
159slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
160slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
161slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
162slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
163slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
164slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
165slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
166slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
167slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
168slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
97bf4851
BS
169
170# hw/slavio_misc.c
47f08d7a
L
171slavio_misc_update_irq_raise(void) "Raise IRQ"
172slavio_misc_update_irq_lower(void) "Lower IRQ"
173slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
174slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
175slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
176slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
177slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
178slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
179slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
180slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
181slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
182slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
183slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
184apc_mem_writeb(uint32_t val) "Write power management %02x"
185apc_mem_readb(uint32_t ret) "Read power management %02x"
186slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
187slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
188slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
189slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
97bf4851
BS
190
191# hw/slavio_timer.c
47f08d7a
L
192slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
193slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
689d7e2f 194slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
47f08d7a
L
195slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
196slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
689d7e2f 197slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
47f08d7a
L
198slavio_timer_mem_writel_counter_invalid(void) "not user timer"
199slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
200slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
201slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
202slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
203slavio_timer_mem_writel_mode_invalid(void) "not system timer"
689d7e2f 204slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
97bf4851
BS
205
206# hw/sparc32_dma.c
689d7e2f
SH
207ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
208ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
47f08d7a
L
209sparc32_dma_set_irq_raise(void) "Raise IRQ"
210sparc32_dma_set_irq_lower(void) "Lower IRQ"
211espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
212espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
213sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
214sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
215sparc32_dma_enable_raise(void) "Raise DMA enable"
216sparc32_dma_enable_lower(void) "Lower DMA enable"
97bf4851
BS
217
218# hw/sun4m.c
47f08d7a
L
219sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
220sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
221sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
222sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
97bf4851
BS
223
224# hw/sun4m_iommu.c
47f08d7a
L
225sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
226sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
689d7e2f 227sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
47f08d7a
L
228sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
229sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
230sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
231sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
689d7e2f 232sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
94b0b5ff 233
f1ae32a1 234# hw/usb/core.c
808aeb98 235usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s"
5ac2731c 236usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s"
808aeb98 237
f1ae32a1 238# hw/usb/bus.c
891fb2cd
GH
239usb_port_claim(int bus, const char *port) "bus %d, port %s"
240usb_port_attach(int bus, const char *port) "bus %d, port %s"
241usb_port_detach(int bus, const char *port) "bus %d, port %s"
242usb_port_release(int bus, const char *port) "bus %d, port %s"
243
f1ae32a1 244# hw/usb/hcd-ehci.c
47f08d7a
L
245usb_ehci_reset(void) "=== RESET ==="
246usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
247usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
248usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
249usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
250usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
251usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
252usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
253usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
254usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
255usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
256usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
257usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
2fe80192 258usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
30e9d412
GH
259usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s"
260usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s"
47f08d7a
L
261usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
262usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
263usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
eb36a88e 264usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s"
7efc17af 265usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x"
439a97cc 266
50dcc0f8
GH
267# hw/usb/hcd-uhci.c
268usb_uhci_reset(void) "=== RESET ==="
269usb_uhci_schedule_start(void) ""
270usb_uhci_schedule_stop(void) ""
271usb_uhci_frame_start(uint32_t num) "nr %d"
4aed20e2 272usb_uhci_frame_stop_bandwidth(void) ""
50dcc0f8 273usb_uhci_frame_loop_stop_idle(void) ""
50dcc0f8 274usb_uhci_frame_loop_continue(void) ""
7dd0dfd7
GH
275usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x"
276usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x"
277usb_uhci_mmio_readl(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%08x"
278usb_uhci_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%08x"
50dcc0f8
GH
279usb_uhci_queue_add(uint32_t token) "token 0x%x"
280usb_uhci_queue_del(uint32_t token) "token 0x%x"
281usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
282usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
283usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
284usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d"
285usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
286usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
287usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
288usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
289usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
290usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
291usb_uhci_qh_load(uint32_t qh) "qh 0x%x"
292usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x"
293usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x"
294usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
295usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
296usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
297
2d754a10
GH
298# hw/usb/hcd-xhci.c
299usb_xhci_reset(void) "=== RESET ==="
fc0ddaca
GH
300usb_xhci_run(void) ""
301usb_xhci_stop(void) ""
2d754a10
GH
302usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
303usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
304usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x"
305usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
306usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
307usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
308usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x"
309usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
310usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
7acd279f
GH
311usb_xhci_irq_intx(uint32_t level) "level %d"
312usb_xhci_irq_msi(uint32_t nr) "nr %d"
313usb_xhci_queue_event(uint32_t idx, const char *name, uint64_t param, uint32_t status, uint32_t control) "idx %d, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
0703a4a7 314usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
348f1037
GH
315usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
316usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
317usb_xhci_slot_address(uint32_t slotid) "slotid %d"
318usb_xhci_slot_configure(uint32_t slotid) "slotid %d"
319usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d"
320usb_xhci_slot_reset(uint32_t slotid) "slotid %d"
c1f6b493
GH
321usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
322usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
323usb_xhci_ep_kick(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
324usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
325usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
97df650b
GH
326usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t length) "%p: slotid %d, epid %d, length %d"
327usb_xhci_xfer_async(void *xfer) "%p"
328usb_xhci_xfer_nak(void *xfer) "%p"
329usb_xhci_xfer_retry(void *xfer) "%p"
330usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d"
331usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d"
2d754a10 332
529f8f9f 333# hw/usb/desc.c
47f08d7a
L
334usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
335usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
336usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
337usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
338usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
339usb_set_addr(int addr) "dev %d"
340usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
1de14d43 341usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d"
47f08d7a
L
342usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
343usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
37fb59d3 344
529f8f9f
GH
345# hw/usb/dev-hub.c
346usb_hub_reset(int addr) "dev %d"
347usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d"
348usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x"
349usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
350usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
351usb_hub_attach(int addr, int nr) "dev %d, port %d"
352usb_hub_detach(int addr, int nr) "dev %d, port %d"
353
0f58f68b
GH
354# hw/usb/dev-uas.c
355usb_uas_reset(int addr) "dev %d"
356usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x"
357usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x"
358usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x"
359usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
360usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
361usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d"
362usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d"
363usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d"
364usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x"
365usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d"
366usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
367
f1ae32a1 368# hw/usb/host-linux.c
e6a2f500
GH
369usb_host_open_started(int bus, int addr) "dev %d:%d"
370usb_host_open_success(int bus, int addr) "dev %d:%d"
371usb_host_open_failure(int bus, int addr) "dev %d:%d"
372usb_host_disconnect(int bus, int addr) "dev %d:%d"
373usb_host_close(int bus, int addr) "dev %d:%d"
374usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
375usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
376usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
377usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d"
378usb_host_release_interfaces(int bus, int addr) "dev %d:%d"
19b89252
GH
379usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d"
380usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
381usb_host_req_complete(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
382usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
383usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p"
e6a2f500
GH
384usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d"
385usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d"
6aebe407 386usb_host_urb_canceled(int bus, int addr, void *aurb) "dev %d:%d, aurb %p"
e6a2f500
GH
387usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
388usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
c32da151
GH
389usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d"
390usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d"
391usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d"
392usb_host_iso_many_urbs(int bus, int addr, int count) "dev %d:%d, count %d"
e6a2f500
GH
393usb_host_reset(int bus, int addr) "dev %d:%d"
394usb_host_auto_scan_enabled(void)
395usb_host_auto_scan_disabled(void)
9516bb47 396usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d"
96dd9aac
GH
397usb_host_parse_device(int bus, int addr, int vendor, int product) "dev %d:%d, id %04x:%04x"
398usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d"
399usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d"
400usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d"
401usb_host_parse_unknown(int bus, int addr, int len, int type) "dev %d:%d, len %d, type %d"
402usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
e6a2f500 403
5138efec 404# hw/scsi-bus.c
47f08d7a
L
405scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
406scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
e88c591d 407scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
47f08d7a
L
408scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
409scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
410scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
689d7e2f 411scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
47f08d7a
L
412scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
413scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
414scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
415scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
416scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
417scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
5138efec 418
94b0b5ff 419# vl.c
47f08d7a 420vm_state_notify(int running, int reason) "running %d reason %d"
298800ca 421
3cce16f4
KW
422# block/qcow2.c
423qcow2_writev_start_req(void *co, int64_t sector, int nb_sectors) "co %p sector %" PRIx64 " nb_sectors %d"
424qcow2_writev_done_req(void *co, int ret) "co %p ret %d"
425qcow2_writev_start_part(void *co) "co %p"
426qcow2_writev_done_part(void *co, int cur_nr_sectors) "co %p cur_nr_sectors %d"
427qcow2_writev_data(void *co, uint64_t offset) "co %p offset %" PRIx64
428
429qcow2_alloc_clusters_offset(void *co, uint64_t offset, int n_start, int n_end) "co %p offet %" PRIx64 " n_start %d n_end %d"
250196f1 430qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offet %" PRIx64 " host_offset %" PRIx64 " nb_clusters %d"
3cce16f4
KW
431qcow2_cluster_alloc_phys(void *co) "co %p"
432qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d"
433
434qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d"
435qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d"
436qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d"
437qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d"
438qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d"
439
440qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset %" PRIx64 " read_from_disk %d"
441qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d"
442qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d"
443qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d"
444qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d"
445qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d"
446
298800ca 447# block/qed-l2-cache.c
47f08d7a
L
448qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
449qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
450qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
298800ca
SH
451
452# block/qed-table.c
47f08d7a
L
453qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
454qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
455qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
456qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
eabba580
SH
457
458# block/qed.c
47f08d7a
L
459qed_need_check_timer_cb(void *s) "s %p"
460qed_start_need_check_timer(void *s) "s %p"
461qed_cancel_need_check_timer(void *s) "s %p"
462qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
6e4f59bd 463qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x"
689d7e2f 464qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64
47f08d7a
L
465qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
466qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
689d7e2f
SH
467qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
468qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64
47f08d7a 469qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
0f3a4a01 470
b213b370 471# hw/g364fb.c
47f08d7a
L
472g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
473g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
b213b370 474
0f3a4a01 475# hw/grlib_gptimer.c
47f08d7a
L
476grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
477grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
478grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
479grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
480grlib_gptimer_hit(int id) "timer:%d HIT"
481grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
482grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
3f10bcbb
FC
483
484# hw/grlib_irqmp.c
2f4a725b 485grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
47f08d7a
L
486grlib_irqmp_ack(int intno) "interrupt:%d"
487grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
689d7e2f 488grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
47f08d7a 489grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
8b1e1320
FC
490
491# hw/grlib_apbuart.c
47f08d7a
L
492grlib_apbuart_event(int event) "event:%d"
493grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
0c685d28 494grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
b04d9890
FC
495
496# hw/leon3.c
47f08d7a
L
497leon3_set_irq(int intno) "Set CPU IRQ %d"
498leon3_reset_irq(int intno) "Reset CPU IRQ %d"
9363ee31 499
cbcc6336 500# spice-qemu-char.c
47f08d7a
L
501spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
502spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
503spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
504spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
4ef66fa7
MW
505
506# hw/lm32_pic.c
47f08d7a
L
507lm32_pic_raise_irq(void) "Raise CPU interrupt"
508lm32_pic_lower_irq(void) "Lower CPU interrupt"
509lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
510lm32_pic_set_im(uint32_t im) "im 0x%08x"
511lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
512lm32_pic_get_im(uint32_t im) "im 0x%08x"
513lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
15d7dc4f
MW
514
515# hw/lm32_juart.c
47f08d7a
L
516lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
517lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
518lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
519lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
ea7924dc
MW
520
521# hw/lm32_timer.c
47f08d7a
L
522lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
523lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
524lm32_timer_hit(void) "timer hit"
525lm32_timer_irq_state(int level) "irq state %d"
770ae571
MW
526
527# hw/lm32_uart.c
47f08d7a
L
528lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
529lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
530lm32_uart_irq_state(int level) "irq state %d"
f19410ca
MW
531
532# hw/lm32_sys.c
47f08d7a 533lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
25a8bb96 534
e8f943c3
HR
535# hw/megasas.c
536megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
537megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
538megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
539megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
540megasas_qf_found(unsigned int index, uint64_t pa) "found mapped frame %x pa %" PRIx64 ""
541megasas_qf_new(unsigned int index, void *cmd) "return new frame %x cmd %p"
542megasas_qf_failed(unsigned long pa) "all frames busy for frame %lx"
543megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int tail, int busy) "enqueue frame %x count %d context %" PRIx64 " tail %x busy %d"
544megasas_qf_update(unsigned int head, unsigned int busy) "update reply queue head %x busy %d"
545megasas_qf_dequeue(unsigned int index) "dequeue frame %x"
546megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
547megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
548megasas_qf_complete(uint64_t context, unsigned int tail, unsigned int offset, int busy, unsigned int doorbell) "context %" PRIx64 " tail %x offset %d busy %d doorbell %x"
549megasas_handle_frame(const char *cmd, uint64_t addr, uint64_t context, uint32_t count) "MFI cmd %s addr %" PRIx64 " context %" PRIx64 " count %d"
550megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
551megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: Unhandled MFI cmd %x"
552megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
553megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x target not present"
554megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d"
555megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
556megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
557megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
558megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
559megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x req allocation failed"
560megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
561megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
562megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred"
563megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: finished with status %x, len %u/%u"
564megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: command completed, status %x, residual %d"
565megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu"
566megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present"
567megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
568megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
569megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes completed"
570megasas_io_read(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu"
571megasas_io_write(int cmd, int bytes, int len, unsigned long offset) "scmd %d: %d/%d bytes, iov offset %lu"
572megasas_io_continue(int cmd, int bytes) "scmd %d: %d bytes left"
573megasas_iovec_map_failed(int cmd, int index, unsigned long iov_size) "scmd %d: iovec %d size %lu"
574megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d"
575megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d"
576megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u"
577megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
578megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
579megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x"
580megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes"
581megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s alloc failed"
582megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d"
583megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: DCMD finish internal cmd %x lun %d"
584megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: Invalid internal DCMD %x"
585megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d"
586megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count"
587megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: invalid DCMD sge count %d"
588megasas_dcmd_map_failed(int cmd) "scmd %d: Failed to map DCMD buffer"
589megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: invalid xfer len %ld, max %ld"
590megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d"
591megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: DCMD dummy xfer len %ld"
592megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx"
593megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d"
594megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs"
595megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: DCMD LD get info for dev %d"
596megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: DCMD PD get info for dev %d"
597megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: DCMD PD list query flags %x"
598megasas_dcmd_dump_frame(int offset, char f0, char f1, char f2, char f3, char f4, char f5, char f6, char f7) "0x%x: %02x %02x %02x %02x %02x %02x %02x %02x"
599megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: aborting frame %x"
600megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64 ""
601megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x"
602megasas_reset(void) "Reset"
603megasas_init(int sges, int cmds, const char *intr, const char *mode) "Using %d sges, %d cmds, %s, %s mode"
604megasas_msix_raise(int vector) "vector %d"
605megasas_irq_lower(void) "INTx"
606megasas_irq_raise(void) "INTx"
607megasas_intr_enabled(void) "Interrupts enabled"
608megasas_intr_disabled(void) "Interrupts disabled"
609megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x"
610megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
611megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
612megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
613
25a8bb96 614# hw/milkymist-ac97.c
47f08d7a
L
615milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
616milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
617milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
618milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
619milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
620milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
621milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
622milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
623milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
624milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
e4dc6d2c
MW
625
626# hw/milkymist-hpdmc.c
47f08d7a
L
627milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
628milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
b4e37d98
MW
629
630# hw/milkymist-memcard.c
47f08d7a
L
631milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
632milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
07424544 633
57aa265d 634# hw/milkymist-minimac2.c
47f08d7a
L
635milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
636milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
637milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
638milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
639milkymist_minimac2_tx_frame(uint32_t length) "length %u"
640milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
641milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
642milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
643milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
644milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
645milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
5ee18b9c
MW
646
647# hw/milkymist-pfpu.c
47f08d7a
L
648milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
649milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
650milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
651milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
87a381ec
MW
652
653# hw/milkymist-softusb.c
47f08d7a
L
654milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
655milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
656milkymist_softusb_mevt(uint8_t m) "m %d"
657milkymist_softusb_kevt(uint8_t m) "m %d"
658milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
659milkymist_softusb_pulse_irq(void) "Pulse IRQ"
96832424
MW
660
661# hw/milkymist-sysctl.c
47f08d7a
L
662milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
663milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
664milkymist_sysctl_icap_write(uint32_t value) "value %08x"
665milkymist_sysctl_start_timer0(void) "Start timer0"
666milkymist_sysctl_stop_timer0(void) "Stop timer0"
667milkymist_sysctl_start_timer1(void) "Start timer1"
668milkymist_sysctl_stop_timer1(void) "Stop timer1"
669milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
670milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
0670dadd
MW
671
672# hw/milkymist-tmu2.c
47f08d7a
L
673milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
674milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
675milkymist_tmu2_start(void) "Start TMU"
676milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
883de16b
MW
677
678# hw/milkymist-uart.c
47f08d7a
L
679milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
680milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
fcfa3397
MW
681milkymist_uart_raise_irq(void) "Raise IRQ"
682milkymist_uart_lower_irq(void) "Lower IRQ"
d23948b1
MW
683
684# hw/milkymist-vgafb.c
47f08d7a
L
685milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
686milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
432d268c 687
83818f7c
HP
688# hw/mipsnet.c
689mipsnet_send(uint32_t size) "sending len=%u"
690mipsnet_receive(uint32_t size) "receiving len=%u"
691mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
903ec8ea 692mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
83818f7c
HP
693mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
694
432d268c 695# xen-all.c
47f08d7a 696xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
20581d20 697xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
432d268c
JN
698
699# xen-mapcache.c
689d7e2f
SH
700xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
701xen_remap_bucket(uint64_t index) "index %#"PRIx64
47f08d7a 702xen_map_cache_return(void* ptr) "%p"
689d7e2f 703xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64
47f08d7a 704xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
050a0ddf
AP
705
706# exec.c
47f08d7a 707qemu_put_ram_ptr(void* addr) "%p"
01195b73
SS
708
709# hw/xen_platform.c
47f08d7a 710xen_platform_log(char *s) "xen platform: %s"
00dccaf1
KW
711
712# qemu-coroutine.c
47f08d7a
L
713qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
714qemu_coroutine_yield(void *from, void *to) "from %p to %p"
715qemu_coroutine_terminate(void *co) "self %p"
b96e9247
KW
716
717# qemu-coroutine-lock.c
47f08d7a 718qemu_co_queue_next_bh(void) ""
bfe24e1a 719qemu_co_queue_next(void *nxt) "next %p"
47f08d7a
L
720qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
721qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
722qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
723qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
30c2f238
BS
724
725# hw/escc.c
47f08d7a
L
726escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
727escc_get_queue(char channel, int val) "channel %c get 0x%02x"
728escc_update_irq(int irq) "IRQ = %d"
729escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
730escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
731escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
732escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
733escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
734escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
735escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
736escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
737escc_kbd_command(int val) "Command %d"
738escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
bf4b9889 739
c589b249 740# block/iscsi.c
f4dfa67f 741iscsi_aio_write16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
c589b249 742iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
f4dfa67f 743iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d"
c589b249
RS
744iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
745
bf4b9889 746# hw/esp.c
3af4e9aa
HP
747esp_error_fifo_overrun(void) "FIFO overrun"
748esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
749esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
bf4b9889
BS
750esp_raise_irq(void) "Raise IRQ"
751esp_lower_irq(void) "Lower IRQ"
752esp_dma_enable(void) "Raise enable"
753esp_dma_disable(void) "Lower enable"
754esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
755esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
756esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
757esp_write_response(uint32_t status) "Transfer status (status=%d)"
758esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
759esp_command_complete(void) "SCSI Command complete"
760esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
761esp_command_complete_fail(void) "Command failed"
762esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
763esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
764esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
765esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
766esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
767esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
768esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
769esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
770esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
771esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
772esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
773esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
774esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
6915bff1 775esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)"
bf4b9889
BS
776esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
777esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
778esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
779esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
6fe84c18 780esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
fabaaf1d
HP
781esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
782esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
783esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
784esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
785esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x"
786esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x"
787esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)"
788esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)"
789esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)"
790esp_pci_dma_start(uint32_t val) "START (%.8x)"
791esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x"
792esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
89bd820a
SH
793
794# monitor.c
795handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
796monitor_protocol_emitter(void *mon) "mon %p"
afeecec2
DB
797monitor_protocol_event(uint32_t event, const char *evname, void *data) "event=%d name \"%s\" data %p"
798monitor_protocol_event_handler(uint32_t event, void *data, uint64_t last, uint64_t now) "event=%d data=%p last=%" PRId64 " now=%" PRId64
799monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
800monitor_protocol_event_queue(uint32_t event, void *data, uint64_t rate, uint64_t last, uint64_t now) "event=%d data=%p rate=%" PRId64 " last=%" PRId64 " now=%" PRId64
801monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
342407fd
MF
802
803# hw/opencores_eth.c
804open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
805open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
806open_eth_update_irq(uint32_t v) "IRQ <- %x"
807open_eth_receive(unsigned len) "RX: len: %u"
808open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
809open_eth_receive_reject(void) "RX: rejected"
810open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
811open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
812open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
813open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
814open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
815open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
1f99b949 816
c572f23a 817# hw/9pfs/virtio-9p.c
7999f7e1 818v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
c572f23a
HPB
819v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
820v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
c76eaf13 821v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
c572f23a
HPB
822v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64""
823v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
824v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
825v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64""
826v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
827v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
828v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
829v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
830v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
831v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
832v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
833v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
834v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
2f008a8c 835v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
c572f23a 836v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
2f008a8c
AK
837v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
838v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
839v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
c572f23a
HPB
840v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
841v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
842v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
843v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
844v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
845v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
846v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
847v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
c76eaf13 848v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
c572f23a
HPB
849v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
850v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
851v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
852v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
853v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64""
854v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
c76eaf13
SW
855v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
856v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
c572f23a
HPB
857v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
858v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64""
859v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
860v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
861v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
ec0ceb17
BS
862
863# target-sparc/mmu_helper.c
864mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
865mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
866mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64""
867mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64""
868mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64""
869mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
870mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
871mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
11e66bca
BS
872
873# target-sparc/int_helper.c
874int_helper_set_softint(uint32_t softint) "new %08x"
875int_helper_clear_softint(uint32_t softint) "new %08x"
876int_helper_write_softint(uint32_t softint) "new %08x"
877int_helper_icache_freeze(void) "Instruction cache: freeze"
878int_helper_dcache_freeze(void) "Data cache: freeze"
870be6ad
BS
879
880# target-sparc/win_helper.c
881win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
882win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
883win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
884win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
885win_helper_done(uint32_t tl) "tl=%d"
886win_helper_retry(uint32_t tl) "tl=%d"
c57c4658
KW
887
888# dma-helpers.c
889dma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d"
890dma_aio_cancel(void *dbs) "dbs=%p"
891dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
892dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d"
893dma_map_wait(void *dbs) "dbs=%p"
cdbc19dd
AL
894
895# console.h
896displaysurface_free(void *display_state, void *display_surface) "state=%p surface=%p"
897displaysurface_resize(void *display_state, void *display_surface, int width, int height) "state=%p surface=%p %dx%d"
72750018
AL
898
899# vga.c
900ppm_save(const char *filename, void *display_surface) "%s surface=%p"
c480bb7d 901
517a13c9
JQ
902# savevm.c
903
904savevm_section_start(void) ""
905savevm_section_end(unsigned int section_id) "section_id %u"
906
c480bb7d
AL
907# hw/qxl.c
908disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
909disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
95b752bc 910qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
c480bb7d
AL
911qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
912qxl_destroy_primary(int qid) "%d"
913qxl_enter_vga_mode(int qid) "%d"
914qxl_exit_vga_mode(int qid) "%d"
915qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64""
916qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
917qxl_interface_attach_worker(int qid) "%d"
918qxl_interface_get_init_info(int qid) "%d"
919qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
920qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
921qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
922qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
923qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
924qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
925qxl_io_read_unexpected(int qid) "%d"
926qxl_io_unexpected_vga_mode(int qid, uint32_t io_port, const char *desc) "%d 0x%x (%s)"
927qxl_io_write(int qid, const char *mode, uint64_t addr, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " val=%"PRIu64" size=%u async=%d"
928qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
929qxl_post_load(int qid, const char *mode) "%d %s"
930qxl_pre_load(int qid) "%d"
931qxl_pre_save(int qid) "%d"
932qxl_reset_surfaces(int qid) "%d"
933qxl_ring_command_check(int qid, const char *mode) "%d %s"
934qxl_ring_command_get(int qid, const char *mode) "%d %s"
935qxl_ring_command_req_notification(int qid) "%d"
936qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
937qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
938qxl_ring_cursor_req_notification(int qid) "%d"
939qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
940qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
941qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
942qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
943qxl_soft_reset(int qid) "%d"
944qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
945qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
946qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
947qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
948qemu_spice_wakeup(uint32_t qid) "%d"
949qemu_spice_start(uint32_t qid) "%d"
950qemu_spice_stop(uint32_t qid) "%d"
951qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
952qxl_spice_destroy_surfaces_complete(int qid) "%d"
953qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
954qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
955qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
956qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
957qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
958qxl_spice_oom(int qid) "%d"
959qxl_spice_reset_cursor(int qid) "%d"
960qxl_spice_reset_image_cache(int qid) "%d"
961qxl_spice_reset_memslots(int qid) "%d"
962qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
963qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
964qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
d53291cf
AL
965
966# hw/qxl-render.c
967qxl_render_blit_guest_primary_initialized(void) ""
968qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
969qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
970qxl_render_update_area_done(void *cookie) "%p"