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1 short term:
2 ----------
3 - handle fast timers + add explicit clocks
4 - OS/2 install bug
5 - handle Self Modifying Code even if modifying current TB (BE OS 5 install)
6 - physical memory cache (reduce qemu-fast address space size to about 32 MB)
7 - better code fetch
8 - XP security bug
9 - cycle counter for all archs
10 - TLB code protection support for PPC
11 - add sysenter/sysexit and fxsr for L4 pistachio 686
12 - basic VGA optimizations
13 - disable SMC handling for ARM/SPARC/PPC
14 - see undefined flags for BTx insn
15 - user/kernel PUSHL/POPL in helper.c
16 - keyboard output buffer filling timing emulation
17 - return UD exception if LOCK prefix incorrectly used
18 - cmos clock update and timers
19 - test ldt limit < 7 ?
20 - tests for each target CPU
21 - fix CCOP optimisation
22 - fix all remaining thread lock issues (must put TBs in a specific invalid
23 state, find a solution for tb_flush()).
24 - fix arm fpu rounding (at least for float->integer conversions)
25 - SMP support
26
27 lower priority:
28 --------------
29 - suppress shift_mem ops
30 - fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
31 - sysenter/sysexit emulation
32 - optimize FPU operations (evaluate x87 stack pointer statically)
33 - add IPC syscalls
34 - use -msoft-float on ARM
35 - use kernel traps for unaligned accesses on ARM ?
36 - handle rare page fault cases (in particular if page fault in heplers or
37 in syscall emulation code).
38 - fix thread stack freeing (use kernel 2.5.x CLONE_CHILD_CLEARTID)
39 - more syscalls (in particular all 64 bit ones, IPCs, fix 64 bit
40 issues, fix 16 bit uid issues)
41 - use page_unprotect_range in every suitable syscall to handle all
42 cases of self modifying code.
43 - use gcc as a backend to generate better code (easy to do by using
44 op-i386.c operations as local inline functions).
45 - add SSE2/MMX operations