dis-asm.h

   1 /* Interface between the opcode library and its callers.
   2    Written by Cygnus Support, 1993.
   3
   4    The opcode library (libopcodes.a) provides instruction decoders for
   5    a large variety of instruction sets, callable with an identical
   6    interface, for making instruction-processing programs more independent
   7    of the instruction set being processed.  */
   8
   9 #ifndef DIS_ASM_H
  10 #define DIS_ASM_H
  11
  12 #include <stdlib.h>
  13 #include <stdio.h>
  14 #include <string.h>
  15 #include <inttypes.h>
  16
  17 #define PARAMS(x) x
  18 typedef void *PTR;
  19 typedef uint64_t bfd_vma;
  20 typedef int64_t bfd_signed_vma;
  21 typedef uint8_t bfd_byte;
  22 #define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
  23
  24 #define BFD64
  25
  26 enum bfd_flavour {
  27   bfd_target_unknown_flavour,
  28   bfd_target_aout_flavour,
  29   bfd_target_coff_flavour,
  30   bfd_target_ecoff_flavour,
  31   bfd_target_elf_flavour,
  32   bfd_target_ieee_flavour,
  33   bfd_target_nlm_flavour,
  34   bfd_target_oasys_flavour,
  35   bfd_target_tekhex_flavour,
  36   bfd_target_srec_flavour,
  37   bfd_target_ihex_flavour,
  38   bfd_target_som_flavour,
  39   bfd_target_os9k_flavour,
  40   bfd_target_versados_flavour,
  41   bfd_target_msdos_flavour,
  42   bfd_target_evax_flavour
  43 };
  44
  45 enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
  46
  47 enum bfd_architecture
  48 {
  49   bfd_arch_unknown,    /* File arch not known */
  50   bfd_arch_obscure,    /* Arch known, not one of these */
  51   bfd_arch_m68k,       /* Motorola 68xxx */
  52 #define bfd_mach_m68000 1
  53 #define bfd_mach_m68008 2
  54 #define bfd_mach_m68010 3
  55 #define bfd_mach_m68020 4
  56 #define bfd_mach_m68030 5
  57 #define bfd_mach_m68040 6
  58 #define bfd_mach_m68060 7
  59   bfd_arch_vax,        /* DEC Vax */
  60   bfd_arch_i960,       /* Intel 960 */
  61      /* The order of the following is important.
  62        lower number indicates a machine type that
  63        only accepts a subset of the instructions
  64        available to machines with higher numbers.
  65        The exception is the "ca", which is
  66        incompatible with all other machines except
  67        "core". */
  68
  69 #define bfd_mach_i960_core      1
  70 #define bfd_mach_i960_ka_sa     2
  71 #define bfd_mach_i960_kb_sb     3
  72 #define bfd_mach_i960_mc        4
  73 #define bfd_mach_i960_xa        5
  74 #define bfd_mach_i960_ca        6
  75 #define bfd_mach_i960_jx        7
  76 #define bfd_mach_i960_hx        8
  77
  78   bfd_arch_a29k,       /* AMD 29000 */
  79   bfd_arch_sparc,      /* SPARC */
  80 #define bfd_mach_sparc                 1
  81 /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
  82 #define bfd_mach_sparc_sparclet        2
  83 #define bfd_mach_sparc_sparclite       3
  84 #define bfd_mach_sparc_v8plus          4
  85 #define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
  86 #define bfd_mach_sparc_sparclite_le    6
  87 #define bfd_mach_sparc_v9              7
  88 #define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
  89 #define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
  90 #define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
  91 /* Nonzero if MACH has the v9 instruction set.  */
  92 #define bfd_mach_sparc_v9_p(mach) \
  93   ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
  94    && (mach) != bfd_mach_sparc_sparclite_le)
  95   bfd_arch_mips,       /* MIPS Rxxxx */
  96 #define bfd_mach_mips3000              3000
  97 #define bfd_mach_mips3900              3900
  98 #define bfd_mach_mips4000              4000
  99 #define bfd_mach_mips4010              4010
 100 #define bfd_mach_mips4100              4100
 101 #define bfd_mach_mips4300              4300
 102 #define bfd_mach_mips4400              4400
 103 #define bfd_mach_mips4600              4600
 104 #define bfd_mach_mips4650              4650
 105 #define bfd_mach_mips5000              5000
 106 #define bfd_mach_mips6000              6000
 107 #define bfd_mach_mips8000              8000
 108 #define bfd_mach_mips10000             10000
 109 #define bfd_mach_mips16                16
 110   bfd_arch_i386,       /* Intel 386 */
 111 #define bfd_mach_i386_i386 0
 112 #define bfd_mach_i386_i8086 1
 113 #define bfd_mach_i386_i386_intel_syntax 2
 114 #define bfd_mach_x86_64 3
 115 #define bfd_mach_x86_64_intel_syntax 4
 116   bfd_arch_we32k,      /* AT&T WE32xxx */
 117   bfd_arch_tahoe,      /* CCI/Harris Tahoe */
 118   bfd_arch_i860,       /* Intel 860 */
 119   bfd_arch_romp,       /* IBM ROMP PC/RT */
 120   bfd_arch_alliant,    /* Alliant */
 121   bfd_arch_convex,     /* Convex */
 122   bfd_arch_m88k,       /* Motorola 88xxx */
 123   bfd_arch_pyramid,    /* Pyramid Technology */
 124   bfd_arch_h8300,      /* Hitachi H8/300 */
 125 #define bfd_mach_h8300   1
 126 #define bfd_mach_h8300h  2
 127 #define bfd_mach_h8300s  3
 128   bfd_arch_powerpc,    /* PowerPC */
 129 #define bfd_mach_ppc           0
 130 #define bfd_mach_ppc64         1
 131 #define bfd_mach_ppc_403       403
 132 #define bfd_mach_ppc_403gc     4030
 133 #define bfd_mach_ppc_505       505
 134 #define bfd_mach_ppc_601       601
 135 #define bfd_mach_ppc_602       602
 136 #define bfd_mach_ppc_603       603
 137 #define bfd_mach_ppc_ec603e    6031
 138 #define bfd_mach_ppc_604       604
 139 #define bfd_mach_ppc_620       620
 140 #define bfd_mach_ppc_630       630
 141 #define bfd_mach_ppc_750       750
 142 #define bfd_mach_ppc_860       860
 143 #define bfd_mach_ppc_a35       35
 144 #define bfd_mach_ppc_rs64ii    642
 145 #define bfd_mach_ppc_rs64iii   643
 146 #define bfd_mach_ppc_7400      7400
 147   bfd_arch_rs6000,     /* IBM RS/6000 */
 148   bfd_arch_hppa,       /* HP PA RISC */
 149   bfd_arch_d10v,       /* Mitsubishi D10V */
 150   bfd_arch_z8k,        /* Zilog Z8000 */
 151 #define bfd_mach_z8001         1
 152 #define bfd_mach_z8002         2
 153   bfd_arch_h8500,      /* Hitachi H8/500 */
 154   bfd_arch_sh,         /* Hitachi SH */
 155 #define bfd_mach_sh            0
 156 #define bfd_mach_sh3        0x30
 157 #define bfd_mach_sh3e       0x3e
 158 #define bfd_mach_sh4        0x40
 159   bfd_arch_alpha,      /* Dec Alpha */
 160   bfd_arch_arm,        /* Advanced Risc Machines ARM */
 161 #define bfd_mach_arm_2         1
 162 #define bfd_mach_arm_2a                2
 163 #define bfd_mach_arm_3         3
 164 #define bfd_mach_arm_3M        4
 165 #define bfd_mach_arm_4                 5
 166 #define bfd_mach_arm_4T        6
 167   bfd_arch_ns32k,      /* National Semiconductors ns32000 */
 168   bfd_arch_w65,        /* WDC 65816 */
 169   bfd_arch_tic30,      /* Texas Instruments TMS320C30 */
 170   bfd_arch_v850,       /* NEC V850 */
 171 #define bfd_mach_v850          0
 172   bfd_arch_arc,        /* Argonaut RISC Core */
 173 #define bfd_mach_arc_base 0
 174   bfd_arch_m32r,       /* Mitsubishi M32R/D */
 175 #define bfd_mach_m32r          0  /* backwards compatibility */
 176   bfd_arch_mn10200,    /* Matsushita MN10200 */
 177   bfd_arch_mn10300,    /* Matsushita MN10300 */
 178   bfd_arch_last
 179   };
 180
 181 typedef struct symbol_cache_entry
 182 {
 183     const char *name;
 184     union
 185     {
 186         PTR p;
 187         bfd_vma i;
 188     } udata;
 189 } asymbol;
 190
 191 typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...));
 192
 193 enum dis_insn_type {
 194   dis_noninsn,                  /* Not a valid instruction */
 195   dis_nonbranch,                /* Not a branch instruction */
 196   dis_branch,                   /* Unconditional branch */
 197   dis_condbranch,               /* Conditional branch */
 198   dis_jsr,                      /* Jump to subroutine */
 199   dis_condjsr,                  /* Conditional jump to subroutine */
 200   dis_dref,                     /* Data reference instruction */
 201   dis_dref2                     /* Two data references in instruction */
 202 };
 203
 204 /* This struct is passed into the instruction decoding routine,
 205    and is passed back out into each callback.  The various fields are used
 206    for conveying information from your main routine into your callbacks,
 207    for passing information into the instruction decoders (such as the
 208    addresses of the callback functions), or for passing information
 209    back from the instruction decoders to their callers.
 210
 211    It must be initialized before it is first passed; this can be done
 212    by hand, or using one of the initialization macros below.  */
 213
 214 typedef struct disassemble_info {
 215   fprintf_ftype fprintf_func;
 216   FILE *stream;
 217   PTR application_data;
 218
 219   /* Target description.  We could replace this with a pointer to the bfd,
 220      but that would require one.  There currently isn't any such requirement
 221      so to avoid introducing one we record these explicitly.  */
 222   /* The bfd_flavour.  This can be bfd_target_unknown_flavour.  */
 223   enum bfd_flavour flavour;
 224   /* The bfd_arch value.  */
 225   enum bfd_architecture arch;
 226   /* The bfd_mach value.  */
 227   unsigned long mach;
 228   /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
 229   enum bfd_endian endian;
 230
 231   /* An array of pointers to symbols either at the location being disassembled
 232      or at the start of the function being disassembled.  The array is sorted
 233      so that the first symbol is intended to be the one used.  The others are
 234      present for any misc. purposes.  This is not set reliably, but if it is
 235      not NULL, it is correct.  */
 236   asymbol **symbols;
 237   /* Number of symbols in array.  */
 238   int num_symbols;
 239
 240   /* For use by the disassembler.
 241      The top 16 bits are reserved for public use (and are documented here).
 242      The bottom 16 bits are for the internal use of the disassembler.  */
 243   unsigned long flags;
 244 #define INSN_HAS_RELOC  0x80000000
 245   PTR private_data;
 246
 247   /* Function used to get bytes to disassemble.  MEMADDR is the
 248      address of the stuff to be disassembled, MYADDR is the address to
 249      put the bytes in, and LENGTH is the number of bytes to read.
 250      INFO is a pointer to this struct.
 251      Returns an errno value or 0 for success.  */
 252   int (*read_memory_func)
 253     PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
 254              struct disassemble_info *info));
 255
 256   /* Function which should be called if we get an error that we can't
 257      recover from.  STATUS is the errno value from read_memory_func and
 258      MEMADDR is the address that we were trying to read.  INFO is a
 259      pointer to this struct.  */
 260   void (*memory_error_func)
 261     PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
 262
 263   /* Function called to print ADDR.  */
 264   void (*print_address_func)
 265     PARAMS ((bfd_vma addr, struct disassemble_info *info));
 266
 267   /* Function called to determine if there is a symbol at the given ADDR.
 268      If there is, the function returns 1, otherwise it returns 0.
 269      This is used by ports which support an overlay manager where
 270      the overlay number is held in the top part of an address.  In
 271      some circumstances we want to include the overlay number in the
 272      address, (normally because there is a symbol associated with
 273      that address), but sometimes we want to mask out the overlay bits.  */
 274   int (* symbol_at_address_func)
 275     PARAMS ((bfd_vma addr, struct disassemble_info * info));
 276
 277   /* These are for buffer_read_memory.  */
 278   bfd_byte *buffer;
 279   bfd_vma buffer_vma;
 280   int buffer_length;
 281
 282   /* This variable may be set by the instruction decoder.  It suggests
 283       the number of bytes objdump should display on a single line.  If
 284       the instruction decoder sets this, it should always set it to
 285       the same value in order to get reasonable looking output.  */
 286   int bytes_per_line;
 287
 288   /* the next two variables control the way objdump displays the raw data */
 289   /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
 290   /* output will look like this:
 291      00:   00000000 00000000
 292      with the chunks displayed according to "display_endian". */
 293   int bytes_per_chunk;
 294   enum bfd_endian display_endian;
 295
 296   /* Results from instruction decoders.  Not all decoders yet support
 297      this information.  This info is set each time an instruction is
 298      decoded, and is only valid for the last such instruction.
 299
 300      To determine whether this decoder supports this information, set
 301      insn_info_valid to 0, decode an instruction, then check it.  */
 302
 303   char insn_info_valid;         /* Branch info has been set. */
 304   char branch_delay_insns;      /* How many sequential insn's will run before
 305                                    a branch takes effect.  (0 = normal) */
 306   char data_size;               /* Size of data reference in insn, in bytes */
 307   enum dis_insn_type insn_type; /* Type of instruction */
 308   bfd_vma target;               /* Target address of branch or dref, if known;
 309                                    zero if unknown.  */
 310   bfd_vma target2;              /* Second target address for dref2 */
 311
 312   /* Command line options specific to the target disassembler.  */
 313   char * disassembler_options;
 314
 315 } disassemble_info;
 316
 317 \f
 318 /* Standard disassemblers.  Disassemble one instruction at the given
 319    target address.  Return number of bytes processed.  */
 320 typedef int (*disassembler_ftype)
 321      PARAMS((bfd_vma, disassemble_info *));
 322
 323 extern int print_insn_big_mips          PARAMS ((bfd_vma, disassemble_info*));
 324 extern int print_insn_little_mips       PARAMS ((bfd_vma, disassemble_info*));
 325 extern int print_insn_i386              PARAMS ((bfd_vma, disassemble_info*));
 326 extern int print_insn_m68k              PARAMS ((bfd_vma, disassemble_info*));
 327 extern int print_insn_z8001             PARAMS ((bfd_vma, disassemble_info*));
 328 extern int print_insn_z8002             PARAMS ((bfd_vma, disassemble_info*));
 329 extern int print_insn_h8300             PARAMS ((bfd_vma, disassemble_info*));
 330 extern int print_insn_h8300h            PARAMS ((bfd_vma, disassemble_info*));
 331 extern int print_insn_h8300s            PARAMS ((bfd_vma, disassemble_info*));
 332 extern int print_insn_h8500             PARAMS ((bfd_vma, disassemble_info*));
 333 extern int print_insn_alpha             PARAMS ((bfd_vma, disassemble_info*));
 334 extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
 335 extern int print_insn_arm               PARAMS ((bfd_vma, disassemble_info*));
 336 extern int print_insn_sparc             PARAMS ((bfd_vma, disassemble_info*));
 337 extern int print_insn_big_a29k          PARAMS ((bfd_vma, disassemble_info*));
 338 extern int print_insn_little_a29k       PARAMS ((bfd_vma, disassemble_info*));
 339 extern int print_insn_i960              PARAMS ((bfd_vma, disassemble_info*));
 340 extern int print_insn_sh                PARAMS ((bfd_vma, disassemble_info*));
 341 extern int print_insn_shl               PARAMS ((bfd_vma, disassemble_info*));
 342 extern int print_insn_hppa              PARAMS ((bfd_vma, disassemble_info*));
 343 extern int print_insn_m32r              PARAMS ((bfd_vma, disassemble_info*));
 344 extern int print_insn_m88k              PARAMS ((bfd_vma, disassemble_info*));
 345 extern int print_insn_mn10200           PARAMS ((bfd_vma, disassemble_info*));
 346 extern int print_insn_mn10300           PARAMS ((bfd_vma, disassemble_info*));
 347 extern int print_insn_ns32k             PARAMS ((bfd_vma, disassemble_info*));
 348 extern int print_insn_big_powerpc       PARAMS ((bfd_vma, disassemble_info*));
 349 extern int print_insn_little_powerpc    PARAMS ((bfd_vma, disassemble_info*));
 350 extern int print_insn_rs6000            PARAMS ((bfd_vma, disassemble_info*));
 351 extern int print_insn_w65               PARAMS ((bfd_vma, disassemble_info*));
 352 extern int print_insn_d10v              PARAMS ((bfd_vma, disassemble_info*));
 353 extern int print_insn_v850              PARAMS ((bfd_vma, disassemble_info*));
 354 extern int print_insn_tic30             PARAMS ((bfd_vma, disassemble_info*));
 355 extern int print_insn_ppc               PARAMS ((bfd_vma, disassemble_info*));
 356
 357 #if 0
 358 /* Fetch the disassembler for a given BFD, if that support is available.  */
 359 extern disassembler_ftype disassembler  PARAMS ((bfd *));
 360 #endif
 361
 362 \f
 363 /* This block of definitions is for particular callers who read instructions
 364    into a buffer before calling the instruction decoder.  */
 365
 366 /* Here is a function which callers may wish to use for read_memory_func.
 367    It gets bytes from a buffer.  */
 368 extern int buffer_read_memory
 369   PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
 370
 371 /* This function goes with buffer_read_memory.
 372    It prints a message using info->fprintf_func and info->stream.  */
 373 extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
 374
 375
 376 /* Just print the address in hex.  This is included for completeness even
 377    though both GDB and objdump provide their own (to print symbolic
 378    addresses).  */
 379 extern void generic_print_address
 380   PARAMS ((bfd_vma, struct disassemble_info *));
 381
 382 /* Always true.  */
 383 extern int generic_symbol_at_address
 384   PARAMS ((bfd_vma, struct disassemble_info *));
 385
 386 /* Macro to initialize a disassemble_info struct.  This should be called
 387    by all applications creating such a struct.  */
 388 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
 389   (INFO).flavour = bfd_target_unknown_flavour, \
 390   (INFO).arch = bfd_arch_unknown, \
 391   (INFO).mach = 0, \
 392   (INFO).endian = BFD_ENDIAN_UNKNOWN, \
 393   INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
 394
 395 /* Call this macro to initialize only the internal variables for the
 396    disassembler.  Architecture dependent things such as byte order, or machine
 397    variant are not touched by this macro.  This makes things much easier for
 398    GDB which must initialize these things seperatly.  */
 399
 400 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
 401   (INFO).fprintf_func = (FPRINTF_FUNC), \
 402   (INFO).stream = (STREAM), \
 403   (INFO).symbols = NULL, \
 404   (INFO).num_symbols = 0, \
 405   (INFO).buffer = NULL, \
 406   (INFO).buffer_vma = 0, \
 407   (INFO).buffer_length = 0, \
 408   (INFO).read_memory_func = buffer_read_memory, \
 409   (INFO).memory_error_func = perror_memory, \
 410   (INFO).print_address_func = generic_print_address, \
 411   (INFO).symbol_at_address_func = generic_symbol_at_address, \
 412   (INFO).flags = 0, \
 413   (INFO).bytes_per_line = 0, \
 414   (INFO).bytes_per_chunk = 0, \
 415   (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
 416   (INFO).disassembler_options = NULL, \
 417   (INFO).insn_info_valid = 0
 418
 419 #define _(x) x
 420
 421 /* from libbfd */
 422
 423 bfd_vma bfd_getl32 (const bfd_byte *addr);
 424 bfd_vma bfd_getb32 (const bfd_byte *addr);
 425 bfd_vma bfd_getl16 (const bfd_byte *addr);
 426 bfd_vma bfd_getb16 (const bfd_byte *addr);
 427 typedef enum bfd_boolean {false, true} boolean;
 428
 429 #endif /* ! defined (DIS_ASM_H) */