dyngen.h

   1 /*
   2  * dyngen helpers
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 int __op_param1, __op_param2, __op_param3;
  22 int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
  23
  24 #ifdef __i386__
  25 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  26 {
  27 }
  28 #endif
  29
  30 #ifdef __x86_64__
  31 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  32 {
  33 }
  34 #endif
  35
  36 #ifdef __s390__
  37 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  38 {
  39 }
  40 #endif
  41
  42 #ifdef __ia64__
  43 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  44 {
  45 }
  46 #endif
  47
  48 #ifdef __powerpc__
  49
  50 #define MIN_CACHE_LINE_SIZE 8 /* conservative value */
  51
  52 static void inline flush_icache_range(unsigned long start, unsigned long stop)
  53 {
  54     unsigned long p;
  55
  56     p = start & ~(MIN_CACHE_LINE_SIZE - 1);
  57     stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
  58
  59     for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
  60         asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
  61     }
  62     asm volatile ("sync" : : : "memory");
  63     for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
  64         asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
  65     }
  66     asm volatile ("sync" : : : "memory");
  67     asm volatile ("isync" : : : "memory");
  68 }
  69 #endif
  70
  71 #ifdef __alpha__
  72 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  73 {
  74     asm ("imb");
  75 }
  76 #endif
  77
  78 #ifdef __sparc__
  79
  80 static void inline flush_icache_range(unsigned long start, unsigned long stop)
  81 {
  82         unsigned long p;
  83
  84         p = start & ~(8UL - 1UL);
  85         stop = (stop + (8UL - 1UL)) & ~(8UL - 1UL);
  86
  87         for (; p < stop; p += 8)
  88                 __asm__ __volatile__("flush\t%0" : : "r" (p));
  89 }
  90
  91 #endif
  92
  93 #ifdef __arm__
  94 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  95 {
  96     register unsigned long _beg __asm ("a1") = start;
  97     register unsigned long _end __asm ("a2") = stop;
  98     register unsigned long _flg __asm ("a3") = 0;
  99     __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
 100 }
 101 #endif
 102
 103 #ifdef __mc68000
 104 #include <asm/cachectl.h>
 105 static inline void flush_icache_range(unsigned long start, unsigned long stop)
 106 {
 107     cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
 108 }
 109 #endif
 110
 111 #ifdef __alpha__
 112
 113 register int gp asm("$29");
 114
 115 static inline void immediate_ldah(void *p, int val) {
 116     uint32_t *dest = p;
 117     long high = ((val >> 16) + ((val >> 15) & 1)) & 0xffff;
 118
 119     *dest &= ~0xffff;
 120     *dest |= high;
 121     *dest |= 31 << 16;
 122 }
 123 static inline void immediate_lda(void *dest, int val) {
 124     *(uint16_t *) dest = val;
 125 }
 126 void fix_bsr(void *p, int offset) {
 127     uint32_t *dest = p;
 128     *dest &= ~((1 << 21) - 1);
 129     *dest |= (offset >> 2) & ((1 << 21) - 1);
 130 }
 131
 132 #endif /* __alpha__ */
 133
 134 #ifdef __arm__
 135
 136 #define MAX_OP_SIZE    (128 * 4) /* in bytes */
 137 /* max size of the code that can be generated without calling arm_flush_ldr */
 138 #define MAX_FRAG_SIZE  (1024 * 4)
 139 //#define MAX_FRAG_SIZE  (135 * 4) /* for testing */
 140
 141 typedef struct LDREntry {
 142     uint8_t *ptr;
 143     uint32_t *data_ptr;
 144 } LDREntry;
 145
 146 static LDREntry arm_ldr_table[1024];
 147 static uint32_t arm_data_table[1024];
 148
 149 extern char exec_loop;
 150
 151 static inline void arm_reloc_pc24(uint32_t *ptr, uint32_t insn, int val)
 152 {
 153     *ptr = (insn & ~0xffffff) | ((insn + ((val - (int)ptr) >> 2)) & 0xffffff);
 154 }
 155
 156 static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr,
 157                               LDREntry *ldr_start, LDREntry *ldr_end,
 158                               uint32_t *data_start, uint32_t *data_end,
 159                               int gen_jmp)
 160 {
 161     LDREntry *le;
 162     uint32_t *ptr;
 163     int offset, data_size, target;
 164     uint8_t *data_ptr;
 165     uint32_t insn;
 166
 167     data_size = (uint8_t *)data_end - (uint8_t *)data_start;
 168
 169     if (gen_jmp) {
 170         /* generate branch to skip the data */
 171         if (data_size == 0)
 172             return gen_code_ptr;
 173         target = (long)gen_code_ptr + data_size + 4;
 174         arm_reloc_pc24((uint32_t *)gen_code_ptr, 0xeafffffe, target);
 175         gen_code_ptr += 4;
 176     }
 177
 178     /* copy the data */
 179     data_ptr = gen_code_ptr;
 180     memcpy(gen_code_ptr, data_start, data_size);
 181     gen_code_ptr += data_size;
 182
 183     /* patch the ldr to point to the data */
 184     for(le = ldr_start; le < ldr_end; le++) {
 185         ptr = (uint32_t *)le->ptr;
 186         offset = ((unsigned long)(le->data_ptr) - (unsigned long)data_start) +
 187             (unsigned long)data_ptr -
 188             (unsigned long)ptr - 8;
 189         insn = *ptr & ~(0xfff | 0x00800000);
 190         if (offset < 0) {
 191             offset = - offset;
 192         } else {
 193             insn |= 0x00800000;
 194         }
 195         if (offset > 0xfff) {
 196             fprintf(stderr, "Error ldr offset\n");
 197             abort();
 198         }
 199         insn |= offset;
 200         *ptr = insn;
 201     }
 202     return gen_code_ptr;
 203 }
 204
 205 #endif /* __arm__ */
 206
 207
 208