hw/ac97.c

   1 /*
   2  * Copyright (C) 2006 InnoTek Systemberatung GmbH
   3  *
   4  * This file is part of VirtualBox Open Source Edition (OSE), as
   5  * available from http://www.virtualbox.org. This file is free software;
   6  * you can redistribute it and/or modify it under the terms of the GNU
   7  * General Public License as published by the Free Software Foundation,
   8  * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
   9  * distribution. VirtualBox OSE is distributed in the hope that it will
  10  * be useful, but WITHOUT ANY WARRANTY of any kind.
  11  *
  12  * If you received this file as part of a commercial VirtualBox
  13  * distribution, then only the terms of your commercial VirtualBox
  14  * license agreement apply instead of the previous paragraph.
  15  *
  16  * Contributions after 2012-01-13 are licensed under the terms of the
  17  * GNU GPL, version 2 or (at your option) any later version.
  18  */
  19
  20 #include "hw.h"
  21 #include "audiodev.h"
  22 #include "audio/audio.h"
  23 #include "pci.h"
  24 #include "dma.h"
  25
  26 enum {
  27     AC97_Reset                     = 0x00,
  28     AC97_Master_Volume_Mute        = 0x02,
  29     AC97_Headphone_Volume_Mute     = 0x04,
  30     AC97_Master_Volume_Mono_Mute   = 0x06,
  31     AC97_Master_Tone_RL            = 0x08,
  32     AC97_PC_BEEP_Volume_Mute       = 0x0A,
  33     AC97_Phone_Volume_Mute         = 0x0C,
  34     AC97_Mic_Volume_Mute           = 0x0E,
  35     AC97_Line_In_Volume_Mute       = 0x10,
  36     AC97_CD_Volume_Mute            = 0x12,
  37     AC97_Video_Volume_Mute         = 0x14,
  38     AC97_Aux_Volume_Mute           = 0x16,
  39     AC97_PCM_Out_Volume_Mute       = 0x18,
  40     AC97_Record_Select             = 0x1A,
  41     AC97_Record_Gain_Mute          = 0x1C,
  42     AC97_Record_Gain_Mic_Mute      = 0x1E,
  43     AC97_General_Purpose           = 0x20,
  44     AC97_3D_Control                = 0x22,
  45     AC97_AC_97_RESERVED            = 0x24,
  46     AC97_Powerdown_Ctrl_Stat       = 0x26,
  47     AC97_Extended_Audio_ID         = 0x28,
  48     AC97_Extended_Audio_Ctrl_Stat  = 0x2A,
  49     AC97_PCM_Front_DAC_Rate        = 0x2C,
  50     AC97_PCM_Surround_DAC_Rate     = 0x2E,
  51     AC97_PCM_LFE_DAC_Rate          = 0x30,
  52     AC97_PCM_LR_ADC_Rate           = 0x32,
  53     AC97_MIC_ADC_Rate              = 0x34,
  54     AC97_6Ch_Vol_C_LFE_Mute        = 0x36,
  55     AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
  56     AC97_Vendor_Reserved           = 0x58,
  57     AC97_Vendor_ID1                = 0x7c,
  58     AC97_Vendor_ID2                = 0x7e
  59 };
  60
  61 #define SOFT_VOLUME
  62 #define SR_FIFOE 16             /* rwc */
  63 #define SR_BCIS  8              /* rwc */
  64 #define SR_LVBCI 4              /* rwc */
  65 #define SR_CELV  2              /* ro */
  66 #define SR_DCH   1              /* ro */
  67 #define SR_VALID_MASK ((1 << 5) - 1)
  68 #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
  69 #define SR_RO_MASK (SR_DCH | SR_CELV)
  70 #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
  71
  72 #define CR_IOCE  16             /* rw */
  73 #define CR_FEIE  8              /* rw */
  74 #define CR_LVBIE 4              /* rw */
  75 #define CR_RR    2              /* rw */
  76 #define CR_RPBM  1              /* rw */
  77 #define CR_VALID_MASK ((1 << 5) - 1)
  78 #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
  79
  80 #define GC_WR    4              /* rw */
  81 #define GC_CR    2              /* rw */
  82 #define GC_VALID_MASK ((1 << 6) - 1)
  83
  84 #define GS_MD3   (1<<17)        /* rw */
  85 #define GS_AD3   (1<<16)        /* rw */
  86 #define GS_RCS   (1<<15)        /* rwc */
  87 #define GS_B3S12 (1<<14)        /* ro */
  88 #define GS_B2S12 (1<<13)        /* ro */
  89 #define GS_B1S12 (1<<12)        /* ro */
  90 #define GS_S1R1  (1<<11)        /* rwc */
  91 #define GS_S0R1  (1<<10)        /* rwc */
  92 #define GS_S1CR  (1<<9)         /* ro */
  93 #define GS_S0CR  (1<<8)         /* ro */
  94 #define GS_MINT  (1<<7)         /* ro */
  95 #define GS_POINT (1<<6)         /* ro */
  96 #define GS_PIINT (1<<5)         /* ro */
  97 #define GS_RSRVD ((1<<4)|(1<<3))
  98 #define GS_MOINT (1<<2)         /* ro */
  99 #define GS_MIINT (1<<1)         /* ro */
 100 #define GS_GSCI  1              /* rwc */
 101 #define GS_RO_MASK (GS_B3S12|                   \
 102                     GS_B2S12|                   \
 103                     GS_B1S12|                   \
 104                     GS_S1CR|                    \
 105                     GS_S0CR|                    \
 106                     GS_MINT|                    \
 107                     GS_POINT|                   \
 108                     GS_PIINT|                   \
 109                     GS_RSRVD|                   \
 110                     GS_MOINT|                   \
 111                     GS_MIINT)
 112 #define GS_VALID_MASK ((1 << 18) - 1)
 113 #define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
 114
 115 #define BD_IOC (1<<31)
 116 #define BD_BUP (1<<30)
 117
 118 #define EACS_VRA 1
 119 #define EACS_VRM 8
 120
 121 #define VOL_MASK 0x1f
 122 #define MUTE_SHIFT 15
 123
 124 #define REC_MASK 7
 125 enum {
 126     REC_MIC = 0,
 127     REC_CD,
 128     REC_VIDEO,
 129     REC_AUX,
 130     REC_LINE_IN,
 131     REC_STEREO_MIX,
 132     REC_MONO_MIX,
 133     REC_PHONE
 134 };
 135
 136 typedef struct BD {
 137     uint32_t addr;
 138     uint32_t ctl_len;
 139 } BD;
 140
 141 typedef struct AC97BusMasterRegs {
 142     uint32_t bdbar;             /* rw 0 */
 143     uint8_t civ;                /* ro 0 */
 144     uint8_t lvi;                /* rw 0 */
 145     uint16_t sr;                /* rw 1 */
 146     uint16_t picb;              /* ro 0 */
 147     uint8_t piv;                /* ro 0 */
 148     uint8_t cr;                 /* rw 0 */
 149     unsigned int bd_valid;
 150     BD bd;
 151 } AC97BusMasterRegs;
 152
 153 typedef struct AC97LinkState {
 154     PCIDevice dev;
 155     QEMUSoundCard card;
 156     uint32_t use_broken_id;
 157     uint32_t glob_cnt;
 158     uint32_t glob_sta;
 159     uint32_t cas;
 160     uint32_t last_samp;
 161     AC97BusMasterRegs bm_regs[3];
 162     uint8_t mixer_data[256];
 163     SWVoiceIn *voice_pi;
 164     SWVoiceOut *voice_po;
 165     SWVoiceIn *voice_mc;
 166     int invalid_freq[3];
 167     uint8_t silence[128];
 168     int bup_flag;
 169     MemoryRegion io_nam;
 170     MemoryRegion io_nabm;
 171 } AC97LinkState;
 172
 173 enum {
 174     BUP_SET = 1,
 175     BUP_LAST = 2
 176 };
 177
 178 #ifdef DEBUG_AC97
 179 #define dolog(...) AUD_log ("ac97", __VA_ARGS__)
 180 #else
 181 #define dolog(...)
 182 #endif
 183
 184 #define MKREGS(prefix, start)                   \
 185 enum {                                          \
 186     prefix ## _BDBAR = start,                   \
 187     prefix ## _CIV = start + 4,                 \
 188     prefix ## _LVI = start + 5,                 \
 189     prefix ## _SR = start + 6,                  \
 190     prefix ## _PICB = start + 8,                \
 191     prefix ## _PIV = start + 10,                \
 192     prefix ## _CR = start + 11                  \
 193 }
 194
 195 enum {
 196     PI_INDEX = 0,
 197     PO_INDEX,
 198     MC_INDEX,
 199     LAST_INDEX
 200 };
 201
 202 MKREGS (PI, PI_INDEX * 16);
 203 MKREGS (PO, PO_INDEX * 16);
 204 MKREGS (MC, MC_INDEX * 16);
 205
 206 enum {
 207     GLOB_CNT = 0x2c,
 208     GLOB_STA = 0x30,
 209     CAS      = 0x34
 210 };
 211
 212 #define GET_BM(index) (((index) >> 4) & 3)
 213
 214 static void po_callback (void *opaque, int free);
 215 static void pi_callback (void *opaque, int avail);
 216 static void mc_callback (void *opaque, int avail);
 217
 218 static void warm_reset (AC97LinkState *s)
 219 {
 220     (void) s;
 221 }
 222
 223 static void cold_reset (AC97LinkState * s)
 224 {
 225     (void) s;
 226 }
 227
 228 static void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
 229 {
 230     uint8_t b[8];
 231
 232     pci_dma_read (&s->dev, r->bdbar + r->civ * 8, b, 8);
 233     r->bd_valid = 1;
 234     r->bd.addr = le32_to_cpu (*(uint32_t *) &b[0]) & ~3;
 235     r->bd.ctl_len = le32_to_cpu (*(uint32_t *) &b[4]);
 236     r->picb = r->bd.ctl_len & 0xffff;
 237     dolog ("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
 238            r->civ, r->bd.addr, r->bd.ctl_len >> 16,
 239            r->bd.ctl_len & 0xffff,
 240            (r->bd.ctl_len & 0xffff) << 1);
 241 }
 242
 243 static void update_sr (AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
 244 {
 245     int event = 0;
 246     int level = 0;
 247     uint32_t new_mask = new_sr & SR_INT_MASK;
 248     uint32_t old_mask = r->sr & SR_INT_MASK;
 249     uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT};
 250
 251     if (new_mask ^ old_mask) {
 252         /** @todo is IRQ deasserted when only one of status bits is cleared? */
 253         if (!new_mask) {
 254             event = 1;
 255             level = 0;
 256         }
 257         else {
 258             if ((new_mask & SR_LVBCI) && (r->cr & CR_LVBIE)) {
 259                 event = 1;
 260                 level = 1;
 261             }
 262             if ((new_mask & SR_BCIS) && (r->cr & CR_IOCE)) {
 263                 event = 1;
 264                 level = 1;
 265             }
 266         }
 267     }
 268
 269     r->sr = new_sr;
 270
 271     dolog ("IOC%d LVB%d sr=%#x event=%d level=%d\n",
 272            r->sr & SR_BCIS, r->sr & SR_LVBCI,
 273            r->sr,
 274            event, level);
 275
 276     if (!event)
 277         return;
 278
 279     if (level) {
 280         s->glob_sta |= masks[r - s->bm_regs];
 281         dolog ("set irq level=1\n");
 282         qemu_set_irq (s->dev.irq[0], 1);
 283     }
 284     else {
 285         s->glob_sta &= ~masks[r - s->bm_regs];
 286         dolog ("set irq level=0\n");
 287         qemu_set_irq (s->dev.irq[0], 0);
 288     }
 289 }
 290
 291 static void voice_set_active (AC97LinkState *s, int bm_index, int on)
 292 {
 293     switch (bm_index) {
 294     case PI_INDEX:
 295         AUD_set_active_in (s->voice_pi, on);
 296         break;
 297
 298     case PO_INDEX:
 299         AUD_set_active_out (s->voice_po, on);
 300         break;
 301
 302     case MC_INDEX:
 303         AUD_set_active_in (s->voice_mc, on);
 304         break;
 305
 306     default:
 307         AUD_log ("ac97", "invalid bm_index(%d) in voice_set_active", bm_index);
 308         break;
 309     }
 310 }
 311
 312 static void reset_bm_regs (AC97LinkState *s, AC97BusMasterRegs *r)
 313 {
 314     dolog ("reset_bm_regs\n");
 315     r->bdbar = 0;
 316     r->civ = 0;
 317     r->lvi = 0;
 318     /** todo do we need to do that? */
 319     update_sr (s, r, SR_DCH);
 320     r->picb = 0;
 321     r->piv = 0;
 322     r->cr = r->cr & CR_DONT_CLEAR_MASK;
 323     r->bd_valid = 0;
 324
 325     voice_set_active (s, r - s->bm_regs, 0);
 326     memset (s->silence, 0, sizeof (s->silence));
 327 }
 328
 329 static void mixer_store (AC97LinkState *s, uint32_t i, uint16_t v)
 330 {
 331     if (i + 2 > sizeof (s->mixer_data)) {
 332         dolog ("mixer_store: index %d out of bounds %zd\n",
 333                i, sizeof (s->mixer_data));
 334         return;
 335     }
 336
 337     s->mixer_data[i + 0] = v & 0xff;
 338     s->mixer_data[i + 1] = v >> 8;
 339 }
 340
 341 static uint16_t mixer_load (AC97LinkState *s, uint32_t i)
 342 {
 343     uint16_t val = 0xffff;
 344
 345     if (i + 2 > sizeof (s->mixer_data)) {
 346         dolog ("mixer_store: index %d out of bounds %zd\n",
 347                i, sizeof (s->mixer_data));
 348     }
 349     else {
 350         val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
 351     }
 352
 353     return val;
 354 }
 355
 356 static void open_voice (AC97LinkState *s, int index, int freq)
 357 {
 358     struct audsettings as;
 359
 360     as.freq = freq;
 361     as.nchannels = 2;
 362     as.fmt = AUD_FMT_S16;
 363     as.endianness = 0;
 364
 365     if (freq > 0) {
 366         s->invalid_freq[index] = 0;
 367         switch (index) {
 368         case PI_INDEX:
 369             s->voice_pi = AUD_open_in (
 370                 &s->card,
 371                 s->voice_pi,
 372                 "ac97.pi",
 373                 s,
 374                 pi_callback,
 375                 &as
 376                 );
 377             break;
 378
 379         case PO_INDEX:
 380             s->voice_po = AUD_open_out (
 381                 &s->card,
 382                 s->voice_po,
 383                 "ac97.po",
 384                 s,
 385                 po_callback,
 386                 &as
 387                 );
 388             break;
 389
 390         case MC_INDEX:
 391             s->voice_mc = AUD_open_in (
 392                 &s->card,
 393                 s->voice_mc,
 394                 "ac97.mc",
 395                 s,
 396                 mc_callback,
 397                 &as
 398                 );
 399             break;
 400         }
 401     }
 402     else {
 403         s->invalid_freq[index] = freq;
 404         switch (index) {
 405         case PI_INDEX:
 406             AUD_close_in (&s->card, s->voice_pi);
 407             s->voice_pi = NULL;
 408             break;
 409
 410         case PO_INDEX:
 411             AUD_close_out (&s->card, s->voice_po);
 412             s->voice_po = NULL;
 413             break;
 414
 415         case MC_INDEX:
 416             AUD_close_in (&s->card, s->voice_mc);
 417             s->voice_mc = NULL;
 418             break;
 419         }
 420     }
 421 }
 422
 423 static void reset_voices (AC97LinkState *s, uint8_t active[LAST_INDEX])
 424 {
 425     uint16_t freq;
 426
 427     freq = mixer_load (s, AC97_PCM_LR_ADC_Rate);
 428     open_voice (s, PI_INDEX, freq);
 429     AUD_set_active_in (s->voice_pi, active[PI_INDEX]);
 430
 431     freq = mixer_load (s, AC97_PCM_Front_DAC_Rate);
 432     open_voice (s, PO_INDEX, freq);
 433     AUD_set_active_out (s->voice_po, active[PO_INDEX]);
 434
 435     freq = mixer_load (s, AC97_MIC_ADC_Rate);
 436     open_voice (s, MC_INDEX, freq);
 437     AUD_set_active_in (s->voice_mc, active[MC_INDEX]);
 438 }
 439
 440 #ifdef USE_MIXER
 441 static void set_volume (AC97LinkState *s, int index,
 442                         audmixerctl_t mt, uint32_t val)
 443 {
 444     int mute = (val >> MUTE_SHIFT) & 1;
 445     uint8_t rvol = VOL_MASK - (val & VOL_MASK);
 446     uint8_t lvol = VOL_MASK - ((val >> 8) & VOL_MASK);
 447     rvol = 255 * rvol / VOL_MASK;
 448     lvol = 255 * lvol / VOL_MASK;
 449
 450 #ifdef SOFT_VOLUME
 451     if (index == AC97_Master_Volume_Mute) {
 452         AUD_set_volume_out (s->voice_po, mute, lvol, rvol);
 453     }
 454     else {
 455         AUD_set_volume (mt, &mute, &lvol, &rvol);
 456     }
 457 #else
 458     AUD_set_volume (mt, &mute, &lvol, &rvol);
 459 #endif
 460
 461     rvol = VOL_MASK - ((VOL_MASK * rvol) / 255);
 462     lvol = VOL_MASK - ((VOL_MASK * lvol) / 255);
 463     mixer_store (s, index, val);
 464 }
 465
 466 static audrecsource_t ac97_to_aud_record_source (uint8_t i)
 467 {
 468     switch (i) {
 469     case REC_MIC:
 470         return AUD_REC_MIC;
 471
 472     case REC_CD:
 473         return AUD_REC_CD;
 474
 475     case REC_VIDEO:
 476         return AUD_REC_VIDEO;
 477
 478     case REC_AUX:
 479         return AUD_REC_AUX;
 480
 481     case REC_LINE_IN:
 482         return AUD_REC_LINE_IN;
 483
 484     case REC_PHONE:
 485         return AUD_REC_PHONE;
 486
 487     default:
 488         dolog ("Unknown record source %d, using MIC\n", i);
 489         return AUD_REC_MIC;
 490     }
 491 }
 492
 493 static uint8_t aud_to_ac97_record_source (audrecsource_t rs)
 494 {
 495     switch (rs) {
 496     case AUD_REC_MIC:
 497         return REC_MIC;
 498
 499     case AUD_REC_CD:
 500         return REC_CD;
 501
 502     case AUD_REC_VIDEO:
 503         return REC_VIDEO;
 504
 505     case AUD_REC_AUX:
 506         return REC_AUX;
 507
 508     case AUD_REC_LINE_IN:
 509         return REC_LINE_IN;
 510
 511     case AUD_REC_PHONE:
 512         return REC_PHONE;
 513
 514     default:
 515         dolog ("Unknown audio recording source %d using MIC\n", rs);
 516         return REC_MIC;
 517     }
 518 }
 519
 520 static void record_select (AC97LinkState *s, uint32_t val)
 521 {
 522     uint8_t rs = val & REC_MASK;
 523     uint8_t ls = (val >> 8) & REC_MASK;
 524     audrecsource_t ars = ac97_to_aud_record_source (rs);
 525     audrecsource_t als = ac97_to_aud_record_source (ls);
 526     AUD_set_record_source (&als, &ars);
 527     rs = aud_to_ac97_record_source (ars);
 528     ls = aud_to_ac97_record_source (als);
 529     mixer_store (s, AC97_Record_Select, rs | (ls << 8));
 530 }
 531 #endif
 532
 533 static void mixer_reset (AC97LinkState *s)
 534 {
 535     uint8_t active[LAST_INDEX];
 536
 537     dolog ("mixer_reset\n");
 538     memset (s->mixer_data, 0, sizeof (s->mixer_data));
 539     memset (active, 0, sizeof (active));
 540     mixer_store (s, AC97_Reset                   , 0x0000); /* 6940 */
 541     mixer_store (s, AC97_Master_Volume_Mono_Mute , 0x8000);
 542     mixer_store (s, AC97_PC_BEEP_Volume_Mute     , 0x0000);
 543
 544     mixer_store (s, AC97_Phone_Volume_Mute       , 0x8008);
 545     mixer_store (s, AC97_Mic_Volume_Mute         , 0x8008);
 546     mixer_store (s, AC97_CD_Volume_Mute          , 0x8808);
 547     mixer_store (s, AC97_Aux_Volume_Mute         , 0x8808);
 548     mixer_store (s, AC97_Record_Gain_Mic_Mute    , 0x8000);
 549     mixer_store (s, AC97_General_Purpose         , 0x0000);
 550     mixer_store (s, AC97_3D_Control              , 0x0000);
 551     mixer_store (s, AC97_Powerdown_Ctrl_Stat     , 0x000f);
 552
 553     /*
 554      * Sigmatel 9700 (STAC9700)
 555      */
 556     mixer_store (s, AC97_Vendor_ID1              , 0x8384);
 557     mixer_store (s, AC97_Vendor_ID2              , 0x7600); /* 7608 */
 558
 559     mixer_store (s, AC97_Extended_Audio_ID       , 0x0809);
 560     mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
 561     mixer_store (s, AC97_PCM_Front_DAC_Rate      , 0xbb80);
 562     mixer_store (s, AC97_PCM_Surround_DAC_Rate   , 0xbb80);
 563     mixer_store (s, AC97_PCM_LFE_DAC_Rate        , 0xbb80);
 564     mixer_store (s, AC97_PCM_LR_ADC_Rate         , 0xbb80);
 565     mixer_store (s, AC97_MIC_ADC_Rate            , 0xbb80);
 566
 567 #ifdef USE_MIXER
 568     record_select (s, 0);
 569     set_volume (s, AC97_Master_Volume_Mute, AUD_MIXER_VOLUME  , 0x8000);
 570     set_volume (s, AC97_PCM_Out_Volume_Mute, AUD_MIXER_PCM    , 0x8808);
 571     set_volume (s, AC97_Line_In_Volume_Mute, AUD_MIXER_LINE_IN, 0x8808);
 572 #endif
 573     reset_voices (s, active);
 574 }
 575
 576 /**
 577  * Native audio mixer
 578  * I/O Reads
 579  */
 580 static uint32_t nam_readb (void *opaque, uint32_t addr)
 581 {
 582     AC97LinkState *s = opaque;
 583     dolog ("U nam readb %#x\n", addr);
 584     s->cas = 0;
 585     return ~0U;
 586 }
 587
 588 static uint32_t nam_readw (void *opaque, uint32_t addr)
 589 {
 590     AC97LinkState *s = opaque;
 591     uint32_t val = ~0U;
 592     uint32_t index = addr;
 593     s->cas = 0;
 594     val = mixer_load (s, index);
 595     return val;
 596 }
 597
 598 static uint32_t nam_readl (void *opaque, uint32_t addr)
 599 {
 600     AC97LinkState *s = opaque;
 601     dolog ("U nam readl %#x\n", addr);
 602     s->cas = 0;
 603     return ~0U;
 604 }
 605
 606 /**
 607  * Native audio mixer
 608  * I/O Writes
 609  */
 610 static void nam_writeb (void *opaque, uint32_t addr, uint32_t val)
 611 {
 612     AC97LinkState *s = opaque;
 613     dolog ("U nam writeb %#x <- %#x\n", addr, val);
 614     s->cas = 0;
 615 }
 616
 617 static void nam_writew (void *opaque, uint32_t addr, uint32_t val)
 618 {
 619     AC97LinkState *s = opaque;
 620     uint32_t index = addr;
 621     s->cas = 0;
 622     switch (index) {
 623     case AC97_Reset:
 624         mixer_reset (s);
 625         break;
 626     case AC97_Powerdown_Ctrl_Stat:
 627         val &= ~0xf;
 628         val |= mixer_load (s, index) & 0xf;
 629         mixer_store (s, index, val);
 630         break;
 631 #ifdef USE_MIXER
 632     case AC97_Master_Volume_Mute:
 633         set_volume (s, index, AUD_MIXER_VOLUME, val);
 634         break;
 635     case AC97_PCM_Out_Volume_Mute:
 636         set_volume (s, index, AUD_MIXER_PCM, val);
 637         break;
 638     case AC97_Line_In_Volume_Mute:
 639         set_volume (s, index, AUD_MIXER_LINE_IN, val);
 640         break;
 641     case AC97_Record_Select:
 642         record_select (s, val);
 643         break;
 644 #endif
 645     case AC97_Vendor_ID1:
 646     case AC97_Vendor_ID2:
 647         dolog ("Attempt to write vendor ID to %#x\n", val);
 648         break;
 649     case AC97_Extended_Audio_ID:
 650         dolog ("Attempt to write extended audio ID to %#x\n", val);
 651         break;
 652     case AC97_Extended_Audio_Ctrl_Stat:
 653         if (!(val & EACS_VRA)) {
 654             mixer_store (s, AC97_PCM_Front_DAC_Rate, 0xbb80);
 655             mixer_store (s, AC97_PCM_LR_ADC_Rate,    0xbb80);
 656             open_voice (s, PI_INDEX, 48000);
 657             open_voice (s, PO_INDEX, 48000);
 658         }
 659         if (!(val & EACS_VRM)) {
 660             mixer_store (s, AC97_MIC_ADC_Rate, 0xbb80);
 661             open_voice (s, MC_INDEX, 48000);
 662         }
 663         dolog ("Setting extended audio control to %#x\n", val);
 664         mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, val);
 665         break;
 666     case AC97_PCM_Front_DAC_Rate:
 667         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
 668             mixer_store (s, index, val);
 669             dolog ("Set front DAC rate to %d\n", val);
 670             open_voice (s, PO_INDEX, val);
 671         }
 672         else {
 673             dolog ("Attempt to set front DAC rate to %d, "
 674                    "but VRA is not set\n",
 675                    val);
 676         }
 677         break;
 678     case AC97_MIC_ADC_Rate:
 679         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
 680             mixer_store (s, index, val);
 681             dolog ("Set MIC ADC rate to %d\n", val);
 682             open_voice (s, MC_INDEX, val);
 683         }
 684         else {
 685             dolog ("Attempt to set MIC ADC rate to %d, "
 686                    "but VRM is not set\n",
 687                    val);
 688         }
 689         break;
 690     case AC97_PCM_LR_ADC_Rate:
 691         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
 692             mixer_store (s, index, val);
 693             dolog ("Set front LR ADC rate to %d\n", val);
 694             open_voice (s, PI_INDEX, val);
 695         }
 696         else {
 697             dolog ("Attempt to set LR ADC rate to %d, but VRA is not set\n",
 698                     val);
 699         }
 700         break;
 701     default:
 702         dolog ("U nam writew %#x <- %#x\n", addr, val);
 703         mixer_store (s, index, val);
 704         break;
 705     }
 706 }
 707
 708 static void nam_writel (void *opaque, uint32_t addr, uint32_t val)
 709 {
 710     AC97LinkState *s = opaque;
 711     dolog ("U nam writel %#x <- %#x\n", addr, val);
 712     s->cas = 0;
 713 }
 714
 715 /**
 716  * Native audio bus master
 717  * I/O Reads
 718  */
 719 static uint32_t nabm_readb (void *opaque, uint32_t addr)
 720 {
 721     AC97LinkState *s = opaque;
 722     AC97BusMasterRegs *r = NULL;
 723     uint32_t index = addr;
 724     uint32_t val = ~0U;
 725
 726     switch (index) {
 727     case CAS:
 728         dolog ("CAS %d\n", s->cas);
 729         val = s->cas;
 730         s->cas = 1;
 731         break;
 732     case PI_CIV:
 733     case PO_CIV:
 734     case MC_CIV:
 735         r = &s->bm_regs[GET_BM (index)];
 736         val = r->civ;
 737         dolog ("CIV[%d] -> %#x\n", GET_BM (index), val);
 738         break;
 739     case PI_LVI:
 740     case PO_LVI:
 741     case MC_LVI:
 742         r = &s->bm_regs[GET_BM (index)];
 743         val = r->lvi;
 744         dolog ("LVI[%d] -> %#x\n", GET_BM (index), val);
 745         break;
 746     case PI_PIV:
 747     case PO_PIV:
 748     case MC_PIV:
 749         r = &s->bm_regs[GET_BM (index)];
 750         val = r->piv;
 751         dolog ("PIV[%d] -> %#x\n", GET_BM (index), val);
 752         break;
 753     case PI_CR:
 754     case PO_CR:
 755     case MC_CR:
 756         r = &s->bm_regs[GET_BM (index)];
 757         val = r->cr;
 758         dolog ("CR[%d] -> %#x\n", GET_BM (index), val);
 759         break;
 760     case PI_SR:
 761     case PO_SR:
 762     case MC_SR:
 763         r = &s->bm_regs[GET_BM (index)];
 764         val = r->sr & 0xff;
 765         dolog ("SRb[%d] -> %#x\n", GET_BM (index), val);
 766         break;
 767     default:
 768         dolog ("U nabm readb %#x -> %#x\n", addr, val);
 769         break;
 770     }
 771     return val;
 772 }
 773
 774 static uint32_t nabm_readw (void *opaque, uint32_t addr)
 775 {
 776     AC97LinkState *s = opaque;
 777     AC97BusMasterRegs *r = NULL;
 778     uint32_t index = addr;
 779     uint32_t val = ~0U;
 780
 781     switch (index) {
 782     case PI_SR:
 783     case PO_SR:
 784     case MC_SR:
 785         r = &s->bm_regs[GET_BM (index)];
 786         val = r->sr;
 787         dolog ("SR[%d] -> %#x\n", GET_BM (index), val);
 788         break;
 789     case PI_PICB:
 790     case PO_PICB:
 791     case MC_PICB:
 792         r = &s->bm_regs[GET_BM (index)];
 793         val = r->picb;
 794         dolog ("PICB[%d] -> %#x\n", GET_BM (index), val);
 795         break;
 796     default:
 797         dolog ("U nabm readw %#x -> %#x\n", addr, val);
 798         break;
 799     }
 800     return val;
 801 }
 802
 803 static uint32_t nabm_readl (void *opaque, uint32_t addr)
 804 {
 805     AC97LinkState *s = opaque;
 806     AC97BusMasterRegs *r = NULL;
 807     uint32_t index = addr;
 808     uint32_t val = ~0U;
 809
 810     switch (index) {
 811     case PI_BDBAR:
 812     case PO_BDBAR:
 813     case MC_BDBAR:
 814         r = &s->bm_regs[GET_BM (index)];
 815         val = r->bdbar;
 816         dolog ("BMADDR[%d] -> %#x\n", GET_BM (index), val);
 817         break;
 818     case PI_CIV:
 819     case PO_CIV:
 820     case MC_CIV:
 821         r = &s->bm_regs[GET_BM (index)];
 822         val = r->civ | (r->lvi << 8) | (r->sr << 16);
 823         dolog ("CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index),
 824                r->civ, r->lvi, r->sr);
 825         break;
 826     case PI_PICB:
 827     case PO_PICB:
 828     case MC_PICB:
 829         r = &s->bm_regs[GET_BM (index)];
 830         val = r->picb | (r->piv << 16) | (r->cr << 24);
 831         dolog ("PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index),
 832                val, r->picb, r->piv, r->cr);
 833         break;
 834     case GLOB_CNT:
 835         val = s->glob_cnt;
 836         dolog ("glob_cnt -> %#x\n", val);
 837         break;
 838     case GLOB_STA:
 839         val = s->glob_sta | GS_S0CR;
 840         dolog ("glob_sta -> %#x\n", val);
 841         break;
 842     default:
 843         dolog ("U nabm readl %#x -> %#x\n", addr, val);
 844         break;
 845     }
 846     return val;
 847 }
 848
 849 /**
 850  * Native audio bus master
 851  * I/O Writes
 852  */
 853 static void nabm_writeb (void *opaque, uint32_t addr, uint32_t val)
 854 {
 855     AC97LinkState *s = opaque;
 856     AC97BusMasterRegs *r = NULL;
 857     uint32_t index = addr;
 858     switch (index) {
 859     case PI_LVI:
 860     case PO_LVI:
 861     case MC_LVI:
 862         r = &s->bm_regs[GET_BM (index)];
 863         if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
 864             r->sr &= ~(SR_DCH | SR_CELV);
 865             r->civ = r->piv;
 866             r->piv = (r->piv + 1) % 32;
 867             fetch_bd (s, r);
 868         }
 869         r->lvi = val % 32;
 870         dolog ("LVI[%d] <- %#x\n", GET_BM (index), val);
 871         break;
 872     case PI_CR:
 873     case PO_CR:
 874     case MC_CR:
 875         r = &s->bm_regs[GET_BM (index)];
 876         if (val & CR_RR) {
 877             reset_bm_regs (s, r);
 878         }
 879         else {
 880             r->cr = val & CR_VALID_MASK;
 881             if (!(r->cr & CR_RPBM)) {
 882                 voice_set_active (s, r - s->bm_regs, 0);
 883                 r->sr |= SR_DCH;
 884             }
 885             else {
 886                 r->civ = r->piv;
 887                 r->piv = (r->piv + 1) % 32;
 888                 fetch_bd (s, r);
 889                 r->sr &= ~SR_DCH;
 890                 voice_set_active (s, r - s->bm_regs, 1);
 891             }
 892         }
 893         dolog ("CR[%d] <- %#x (cr %#x)\n", GET_BM (index), val, r->cr);
 894         break;
 895     case PI_SR:
 896     case PO_SR:
 897     case MC_SR:
 898         r = &s->bm_regs[GET_BM (index)];
 899         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
 900         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
 901         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
 902         break;
 903     default:
 904         dolog ("U nabm writeb %#x <- %#x\n", addr, val);
 905         break;
 906     }
 907 }
 908
 909 static void nabm_writew (void *opaque, uint32_t addr, uint32_t val)
 910 {
 911     AC97LinkState *s = opaque;
 912     AC97BusMasterRegs *r = NULL;
 913     uint32_t index = addr;
 914     switch (index) {
 915     case PI_SR:
 916     case PO_SR:
 917     case MC_SR:
 918         r = &s->bm_regs[GET_BM (index)];
 919         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
 920         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
 921         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
 922         break;
 923     default:
 924         dolog ("U nabm writew %#x <- %#x\n", addr, val);
 925         break;
 926     }
 927 }
 928
 929 static void nabm_writel (void *opaque, uint32_t addr, uint32_t val)
 930 {
 931     AC97LinkState *s = opaque;
 932     AC97BusMasterRegs *r = NULL;
 933     uint32_t index = addr;
 934     switch (index) {
 935     case PI_BDBAR:
 936     case PO_BDBAR:
 937     case MC_BDBAR:
 938         r = &s->bm_regs[GET_BM (index)];
 939         r->bdbar = val & ~3;
 940         dolog ("BDBAR[%d] <- %#x (bdbar %#x)\n",
 941                GET_BM (index), val, r->bdbar);
 942         break;
 943     case GLOB_CNT:
 944         if (val & GC_WR)
 945             warm_reset (s);
 946         if (val & GC_CR)
 947             cold_reset (s);
 948         if (!(val & (GC_WR | GC_CR)))
 949             s->glob_cnt = val & GC_VALID_MASK;
 950         dolog ("glob_cnt <- %#x (glob_cnt %#x)\n", val, s->glob_cnt);
 951         break;
 952     case GLOB_STA:
 953         s->glob_sta &= ~(val & GS_WCLEAR_MASK);
 954         s->glob_sta |= (val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
 955         dolog ("glob_sta <- %#x (glob_sta %#x)\n", val, s->glob_sta);
 956         break;
 957     default:
 958         dolog ("U nabm writel %#x <- %#x\n", addr, val);
 959         break;
 960     }
 961 }
 962
 963 static int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
 964                         int max, int *stop)
 965 {
 966     uint8_t tmpbuf[4096];
 967     uint32_t addr = r->bd.addr;
 968     uint32_t temp = r->picb << 1;
 969     uint32_t written = 0;
 970     int to_copy = 0;
 971     temp = audio_MIN (temp, max);
 972
 973     if (!temp) {
 974         *stop = 1;
 975         return 0;
 976     }
 977
 978     while (temp) {
 979         int copied;
 980         to_copy = audio_MIN (temp, sizeof (tmpbuf));
 981         pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
 982         copied = AUD_write (s->voice_po, tmpbuf, to_copy);
 983         dolog ("write_audio max=%x to_copy=%x copied=%x\n",
 984                max, to_copy, copied);
 985         if (!copied) {
 986             *stop = 1;
 987             break;
 988         }
 989         temp -= copied;
 990         addr += copied;
 991         written += copied;
 992     }
 993
 994     if (!temp) {
 995         if (to_copy < 4) {
 996             dolog ("whoops\n");
 997             s->last_samp = 0;
 998         }
 999         else {
1000             s->last_samp = *(uint32_t *) &tmpbuf[to_copy - 4];
1001         }
1002     }
1003
1004     r->bd.addr = addr;
1005     return written;
1006 }
1007
1008 static void write_bup (AC97LinkState *s, int elapsed)
1009 {
1010     dolog ("write_bup\n");
1011     if (!(s->bup_flag & BUP_SET)) {
1012         if (s->bup_flag & BUP_LAST) {
1013             int i;
1014             uint8_t *p = s->silence;
1015             for (i = 0; i < sizeof (s->silence) / 4; i++, p += 4) {
1016                 *(uint32_t *) p = s->last_samp;
1017             }
1018         }
1019         else {
1020             memset (s->silence, 0, sizeof (s->silence));
1021         }
1022         s->bup_flag |= BUP_SET;
1023     }
1024
1025     while (elapsed) {
1026         int temp = audio_MIN (elapsed, sizeof (s->silence));
1027         while (temp) {
1028             int copied = AUD_write (s->voice_po, s->silence, temp);
1029             if (!copied)
1030                 return;
1031             temp -= copied;
1032             elapsed -= copied;
1033         }
1034     }
1035 }
1036
1037 static int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
1038                        int max, int *stop)
1039 {
1040     uint8_t tmpbuf[4096];
1041     uint32_t addr = r->bd.addr;
1042     uint32_t temp = r->picb << 1;
1043     uint32_t nread = 0;
1044     int to_copy = 0;
1045     SWVoiceIn *voice = (r - s->bm_regs) == MC_INDEX ? s->voice_mc : s->voice_pi;
1046
1047     temp = audio_MIN (temp, max);
1048
1049     if (!temp) {
1050         *stop = 1;
1051         return 0;
1052     }
1053
1054     while (temp) {
1055         int acquired;
1056         to_copy = audio_MIN (temp, sizeof (tmpbuf));
1057         acquired = AUD_read (voice, tmpbuf, to_copy);
1058         if (!acquired) {
1059             *stop = 1;
1060             break;
1061         }
1062         pci_dma_write (&s->dev, addr, tmpbuf, acquired);
1063         temp -= acquired;
1064         addr += acquired;
1065         nread += acquired;
1066     }
1067
1068     r->bd.addr = addr;
1069     return nread;
1070 }
1071
1072 static void transfer_audio (AC97LinkState *s, int index, int elapsed)
1073 {
1074     AC97BusMasterRegs *r = &s->bm_regs[index];
1075     int stop = 0;
1076
1077     if (s->invalid_freq[index]) {
1078         AUD_log ("ac97", "attempt to use voice %d with invalid frequency %d\n",
1079                  index, s->invalid_freq[index]);
1080         return;
1081     }
1082
1083     if (r->sr & SR_DCH) {
1084         if (r->cr & CR_RPBM) {
1085             switch (index) {
1086             case PO_INDEX:
1087                 write_bup (s, elapsed);
1088                 break;
1089             }
1090         }
1091         return;
1092     }
1093
1094     while ((elapsed >> 1) && !stop) {
1095         int temp;
1096
1097         if (!r->bd_valid) {
1098             dolog ("invalid bd\n");
1099             fetch_bd (s, r);
1100         }
1101
1102         if (!r->picb) {
1103             dolog ("fresh bd %d is empty %#x %#x\n",
1104                    r->civ, r->bd.addr, r->bd.ctl_len);
1105             if (r->civ == r->lvi) {
1106                 r->sr |= SR_DCH; /* CELV? */
1107                 s->bup_flag = 0;
1108                 break;
1109             }
1110             r->sr &= ~SR_CELV;
1111             r->civ = r->piv;
1112             r->piv = (r->piv + 1) % 32;
1113             fetch_bd (s, r);
1114             return;
1115         }
1116
1117         switch (index) {
1118         case PO_INDEX:
1119             temp = write_audio (s, r, elapsed, &stop);
1120             elapsed -= temp;
1121             r->picb -= (temp >> 1);
1122             break;
1123
1124         case PI_INDEX:
1125         case MC_INDEX:
1126             temp = read_audio (s, r, elapsed, &stop);
1127             elapsed -= temp;
1128             r->picb -= (temp >> 1);
1129             break;
1130         }
1131
1132         if (!r->picb) {
1133             uint32_t new_sr = r->sr & ~SR_CELV;
1134
1135             if (r->bd.ctl_len & BD_IOC) {
1136                 new_sr |= SR_BCIS;
1137             }
1138
1139             if (r->civ == r->lvi) {
1140                 dolog ("Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi);
1141
1142                 new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
1143                 stop = 1;
1144                 s->bup_flag = (r->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1145             }
1146             else {
1147                 r->civ = r->piv;
1148                 r->piv = (r->piv + 1) % 32;
1149                 fetch_bd (s, r);
1150             }
1151
1152             update_sr (s, r, new_sr);
1153         }
1154     }
1155 }
1156
1157 static void pi_callback (void *opaque, int avail)
1158 {
1159     transfer_audio (opaque, PI_INDEX, avail);
1160 }
1161
1162 static void mc_callback (void *opaque, int avail)
1163 {
1164     transfer_audio (opaque, MC_INDEX, avail);
1165 }
1166
1167 static void po_callback (void *opaque, int free)
1168 {
1169     transfer_audio (opaque, PO_INDEX, free);
1170 }
1171
1172 static const VMStateDescription vmstate_ac97_bm_regs = {
1173     .name = "ac97_bm_regs",
1174     .version_id = 1,
1175     .minimum_version_id = 1,
1176     .minimum_version_id_old = 1,
1177     .fields      = (VMStateField []) {
1178         VMSTATE_UINT32(bdbar, AC97BusMasterRegs),
1179         VMSTATE_UINT8(civ, AC97BusMasterRegs),
1180         VMSTATE_UINT8(lvi, AC97BusMasterRegs),
1181         VMSTATE_UINT16(sr, AC97BusMasterRegs),
1182         VMSTATE_UINT16(picb, AC97BusMasterRegs),
1183         VMSTATE_UINT8(piv, AC97BusMasterRegs),
1184         VMSTATE_UINT8(cr, AC97BusMasterRegs),
1185         VMSTATE_UINT32(bd_valid, AC97BusMasterRegs),
1186         VMSTATE_UINT32(bd.addr, AC97BusMasterRegs),
1187         VMSTATE_UINT32(bd.ctl_len, AC97BusMasterRegs),
1188         VMSTATE_END_OF_LIST()
1189     }
1190 };
1191
1192 static int ac97_post_load (void *opaque, int version_id)
1193 {
1194     uint8_t active[LAST_INDEX];
1195     AC97LinkState *s = opaque;
1196
1197 #ifdef USE_MIXER
1198     record_select (s, mixer_load (s, AC97_Record_Select));
1199 #define V_(a, b) set_volume (s, a, b, mixer_load (s, a))
1200     V_ (AC97_Master_Volume_Mute, AUD_MIXER_VOLUME);
1201     V_ (AC97_PCM_Out_Volume_Mute, AUD_MIXER_PCM);
1202     V_ (AC97_Line_In_Volume_Mute, AUD_MIXER_LINE_IN);
1203 #undef V_
1204 #endif
1205     active[PI_INDEX] = !!(s->bm_regs[PI_INDEX].cr & CR_RPBM);
1206     active[PO_INDEX] = !!(s->bm_regs[PO_INDEX].cr & CR_RPBM);
1207     active[MC_INDEX] = !!(s->bm_regs[MC_INDEX].cr & CR_RPBM);
1208     reset_voices (s, active);
1209
1210     s->bup_flag = 0;
1211     s->last_samp = 0;
1212     return 0;
1213 }
1214
1215 static bool is_version_2 (void *opaque, int version_id)
1216 {
1217     return version_id == 2;
1218 }
1219
1220 static const VMStateDescription vmstate_ac97 = {
1221     .name = "ac97",
1222     .version_id = 3,
1223     .minimum_version_id = 2,
1224     .minimum_version_id_old = 2,
1225     .post_load = ac97_post_load,
1226     .fields      = (VMStateField []) {
1227         VMSTATE_PCI_DEVICE(dev, AC97LinkState),
1228         VMSTATE_UINT32(glob_cnt, AC97LinkState),
1229         VMSTATE_UINT32(glob_sta, AC97LinkState),
1230         VMSTATE_UINT32(cas, AC97LinkState),
1231         VMSTATE_STRUCT_ARRAY(bm_regs, AC97LinkState, 3, 1,
1232                              vmstate_ac97_bm_regs, AC97BusMasterRegs),
1233         VMSTATE_BUFFER(mixer_data, AC97LinkState),
1234         VMSTATE_UNUSED_TEST(is_version_2, 3),
1235         VMSTATE_END_OF_LIST()
1236     }
1237 };
1238
1239 static const MemoryRegionPortio nam_portio[] = {
1240     { 0, 256 * 1, 1, .read = nam_readb, },
1241     { 0, 256 * 2, 2, .read = nam_readw, },
1242     { 0, 256 * 4, 4, .read = nam_readl, },
1243     { 0, 256 * 1, 1, .write = nam_writeb, },
1244     { 0, 256 * 2, 2, .write = nam_writew, },
1245     { 0, 256 * 4, 4, .write = nam_writel, },
1246     PORTIO_END_OF_LIST(),
1247 };
1248
1249 static const MemoryRegionOps ac97_io_nam_ops = {
1250     .old_portio = nam_portio,
1251 };
1252
1253 static const MemoryRegionPortio nabm_portio[] = {
1254     { 0, 64 * 1, 1, .read = nabm_readb, },
1255     { 0, 64 * 2, 2, .read = nabm_readw, },
1256     { 0, 64 * 4, 4, .read = nabm_readl, },
1257     { 0, 64 * 1, 1, .write = nabm_writeb, },
1258     { 0, 64 * 2, 2, .write = nabm_writew, },
1259     { 0, 64 * 4, 4, .write = nabm_writel, },
1260     PORTIO_END_OF_LIST()
1261 };
1262
1263 static const MemoryRegionOps ac97_io_nabm_ops = {
1264     .old_portio = nabm_portio,
1265 };
1266
1267 static void ac97_on_reset (void *opaque)
1268 {
1269     AC97LinkState *s = opaque;
1270
1271     reset_bm_regs (s, &s->bm_regs[0]);
1272     reset_bm_regs (s, &s->bm_regs[1]);
1273     reset_bm_regs (s, &s->bm_regs[2]);
1274
1275     /*
1276      * Reset the mixer too. The Windows XP driver seems to rely on
1277      * this. At least it wants to read the vendor id before it resets
1278      * the codec manually.
1279      */
1280     mixer_reset (s);
1281 }
1282
1283 static int ac97_initfn (PCIDevice *dev)
1284 {
1285     AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1286     uint8_t *c = s->dev.config;
1287
1288     /* TODO: no need to override */
1289     c[PCI_COMMAND] = 0x00;      /* pcicmd pci command rw, ro */
1290     c[PCI_COMMAND + 1] = 0x00;
1291
1292     /* TODO: */
1293     c[PCI_STATUS] = PCI_STATUS_FAST_BACK;      /* pcists pci status rwc, ro */
1294     c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8;
1295
1296     c[PCI_CLASS_PROG] = 0x00;      /* pi programming interface ro */
1297
1298     /* TODO set when bar is registered. no need to override. */
1299     /* nabmar native audio mixer base address rw */
1300     c[PCI_BASE_ADDRESS_0] = PCI_BASE_ADDRESS_SPACE_IO;
1301     c[PCI_BASE_ADDRESS_0 + 1] = 0x00;
1302     c[PCI_BASE_ADDRESS_0 + 2] = 0x00;
1303     c[PCI_BASE_ADDRESS_0 + 3] = 0x00;
1304
1305     /* TODO set when bar is registered. no need to override. */
1306       /* nabmbar native audio bus mastering base address rw */
1307     c[PCI_BASE_ADDRESS_0 + 4] = PCI_BASE_ADDRESS_SPACE_IO;
1308     c[PCI_BASE_ADDRESS_0 + 5] = 0x00;
1309     c[PCI_BASE_ADDRESS_0 + 6] = 0x00;
1310     c[PCI_BASE_ADDRESS_0 + 7] = 0x00;
1311
1312     if (s->use_broken_id) {
1313         c[PCI_SUBSYSTEM_VENDOR_ID] = 0x86;
1314         c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x80;
1315         c[PCI_SUBSYSTEM_ID] = 0x00;
1316         c[PCI_SUBSYSTEM_ID + 1] = 0x00;
1317     }
1318
1319     c[PCI_INTERRUPT_LINE] = 0x00;      /* intr_ln interrupt line rw */
1320     c[PCI_INTERRUPT_PIN] = 0x01;      /* intr_pn interrupt pin ro */
1321
1322     memory_region_init_io (&s->io_nam, &ac97_io_nam_ops, s, "ac97-nam", 1024);
1323     memory_region_init_io (&s->io_nabm, &ac97_io_nabm_ops, s, "ac97-nabm", 256);
1324     pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
1325     pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
1326     qemu_register_reset (ac97_on_reset, s);
1327     AUD_register_card ("ac97", &s->card);
1328     ac97_on_reset (s);
1329     return 0;
1330 }
1331
1332 static int ac97_exitfn (PCIDevice *dev)
1333 {
1334     AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1335
1336     memory_region_destroy (&s->io_nam);
1337     memory_region_destroy (&s->io_nabm);
1338     return 0;
1339 }
1340
1341 int ac97_init (PCIBus *bus)
1342 {
1343     pci_create_simple (bus, -1, "AC97");
1344     return 0;
1345 }
1346
1347 static PCIDeviceInfo ac97_info = {
1348     .qdev.name    = "AC97",
1349     .qdev.desc    = "Intel 82801AA AC97 Audio",
1350     .qdev.size    = sizeof (AC97LinkState),
1351     .qdev.vmsd    = &vmstate_ac97,
1352     .init         = ac97_initfn,
1353     .exit         = ac97_exitfn,
1354     .vendor_id    = PCI_VENDOR_ID_INTEL,
1355     .device_id    = PCI_DEVICE_ID_INTEL_82801AA_5,
1356     .revision     = 0x01,
1357     .class_id     = PCI_CLASS_MULTIMEDIA_AUDIO,
1358     .qdev.props   = (Property[]) {
1359         DEFINE_PROP_UINT32("use_broken_id", AC97LinkState, use_broken_id, 0),
1360         DEFINE_PROP_END_OF_LIST(),
1361     }
1362 };
1363
1364 static void ac97_register (void)
1365 {
1366     pci_qdev_register (&ac97_info);
1367 }
1368 device_init (ac97_register);
1369