hw/display/milkymist-vgafb.c

   1
   2 /*
   3  *  QEMU model of the Milkymist VGA framebuffer.
   4  *
   5  *  Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  *
  20  *
  21  * Specification available at:
  22  *   http://www.milkymist.org/socdoc/vgafb.pdf
  23  */
  24
  25 #include "hw/hw.h"
  26 #include "hw/sysbus.h"
  27 #include "trace.h"
  28 #include "ui/console.h"
  29 #include "hw/framebuffer.h"
  30 #include "ui/pixel_ops.h"
  31 #include "qemu/error-report.h"
  32
  33 #define BITS 8
  34 #include "hw/milkymist-vgafb_template.h"
  35 #define BITS 15
  36 #include "hw/milkymist-vgafb_template.h"
  37 #define BITS 16
  38 #include "hw/milkymist-vgafb_template.h"
  39 #define BITS 24
  40 #include "hw/milkymist-vgafb_template.h"
  41 #define BITS 32
  42 #include "hw/milkymist-vgafb_template.h"
  43
  44 enum {
  45     R_CTRL = 0,
  46     R_HRES,
  47     R_HSYNC_START,
  48     R_HSYNC_END,
  49     R_HSCAN,
  50     R_VRES,
  51     R_VSYNC_START,
  52     R_VSYNC_END,
  53     R_VSCAN,
  54     R_BASEADDRESS,
  55     R_BASEADDRESS_ACT,
  56     R_BURST_COUNT,
  57     R_DDC,
  58     R_SOURCE_CLOCK,
  59     R_MAX
  60 };
  61
  62 enum {
  63     CTRL_RESET = (1<<0),
  64 };
  65
  66 struct MilkymistVgafbState {
  67     SysBusDevice busdev;
  68     MemoryRegion regs_region;
  69     QemuConsole *con;
  70
  71     int invalidate;
  72     uint32_t fb_offset;
  73     uint32_t fb_mask;
  74
  75     uint32_t regs[R_MAX];
  76 };
  77 typedef struct MilkymistVgafbState MilkymistVgafbState;
  78
  79 static int vgafb_enabled(MilkymistVgafbState *s)
  80 {
  81     return !(s->regs[R_CTRL] & CTRL_RESET);
  82 }
  83
  84 static void vgafb_update_display(void *opaque)
  85 {
  86     MilkymistVgafbState *s = opaque;
  87     DisplaySurface *surface = qemu_console_surface(s->con);
  88     int first = 0;
  89     int last = 0;
  90     drawfn fn;
  91
  92     if (!vgafb_enabled(s)) {
  93         return;
  94     }
  95
  96     int dest_width = s->regs[R_HRES];
  97
  98     switch (surface_bits_per_pixel(surface)) {
  99     case 0:
 100         return;
 101     case 8:
 102         fn = draw_line_8;
 103         break;
 104     case 15:
 105         fn = draw_line_15;
 106         dest_width *= 2;
 107         break;
 108     case 16:
 109         fn = draw_line_16;
 110         dest_width *= 2;
 111         break;
 112     case 24:
 113         fn = draw_line_24;
 114         dest_width *= 3;
 115         break;
 116     case 32:
 117         fn = draw_line_32;
 118         dest_width *= 4;
 119         break;
 120     default:
 121         hw_error("milkymist_vgafb: bad color depth\n");
 122         break;
 123     }
 124
 125     framebuffer_update_display(surface, sysbus_address_space(&s->busdev),
 126                                s->regs[R_BASEADDRESS] + s->fb_offset,
 127                                s->regs[R_HRES],
 128                                s->regs[R_VRES],
 129                                s->regs[R_HRES] * 2,
 130                                dest_width,
 131                                0,
 132                                s->invalidate,
 133                                fn,
 134                                NULL,
 135                                &first, &last);
 136
 137     if (first >= 0) {
 138         dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
 139     }
 140     s->invalidate = 0;
 141 }
 142
 143 static void vgafb_invalidate_display(void *opaque)
 144 {
 145     MilkymistVgafbState *s = opaque;
 146     s->invalidate = 1;
 147 }
 148
 149 static void vgafb_resize(MilkymistVgafbState *s)
 150 {
 151     if (!vgafb_enabled(s)) {
 152         return;
 153     }
 154
 155     qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
 156     s->invalidate = 1;
 157 }
 158
 159 static uint64_t vgafb_read(void *opaque, hwaddr addr,
 160                            unsigned size)
 161 {
 162     MilkymistVgafbState *s = opaque;
 163     uint32_t r = 0;
 164
 165     addr >>= 2;
 166     switch (addr) {
 167     case R_CTRL:
 168     case R_HRES:
 169     case R_HSYNC_START:
 170     case R_HSYNC_END:
 171     case R_HSCAN:
 172     case R_VRES:
 173     case R_VSYNC_START:
 174     case R_VSYNC_END:
 175     case R_VSCAN:
 176     case R_BASEADDRESS:
 177     case R_BURST_COUNT:
 178     case R_DDC:
 179     case R_SOURCE_CLOCK:
 180         r = s->regs[addr];
 181     break;
 182     case R_BASEADDRESS_ACT:
 183         r = s->regs[R_BASEADDRESS];
 184     break;
 185
 186     default:
 187         error_report("milkymist_vgafb: read access to unknown register 0x"
 188                 TARGET_FMT_plx, addr << 2);
 189         break;
 190     }
 191
 192     trace_milkymist_vgafb_memory_read(addr << 2, r);
 193
 194     return r;
 195 }
 196
 197 static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
 198                         unsigned size)
 199 {
 200     MilkymistVgafbState *s = opaque;
 201
 202     trace_milkymist_vgafb_memory_write(addr, value);
 203
 204     addr >>= 2;
 205     switch (addr) {
 206     case R_CTRL:
 207         s->regs[addr] = value;
 208         vgafb_resize(s);
 209         break;
 210     case R_HSYNC_START:
 211     case R_HSYNC_END:
 212     case R_HSCAN:
 213     case R_VSYNC_START:
 214     case R_VSYNC_END:
 215     case R_VSCAN:
 216     case R_BURST_COUNT:
 217     case R_DDC:
 218     case R_SOURCE_CLOCK:
 219         s->regs[addr] = value;
 220         break;
 221     case R_BASEADDRESS:
 222         if (value & 0x1f) {
 223             error_report("milkymist_vgafb: framebuffer base address have to "
 224                      "be 32 byte aligned");
 225             break;
 226         }
 227         s->regs[addr] = value & s->fb_mask;
 228         s->invalidate = 1;
 229         break;
 230     case R_HRES:
 231     case R_VRES:
 232         s->regs[addr] = value;
 233         vgafb_resize(s);
 234         break;
 235     case R_BASEADDRESS_ACT:
 236         error_report("milkymist_vgafb: write to read-only register 0x"
 237                 TARGET_FMT_plx, addr << 2);
 238         break;
 239
 240     default:
 241         error_report("milkymist_vgafb: write access to unknown register 0x"
 242                 TARGET_FMT_plx, addr << 2);
 243         break;
 244     }
 245 }
 246
 247 static const MemoryRegionOps vgafb_mmio_ops = {
 248     .read = vgafb_read,
 249     .write = vgafb_write,
 250     .valid = {
 251         .min_access_size = 4,
 252         .max_access_size = 4,
 253     },
 254     .endianness = DEVICE_NATIVE_ENDIAN,
 255 };
 256
 257 static void milkymist_vgafb_reset(DeviceState *d)
 258 {
 259     MilkymistVgafbState *s = container_of(d, MilkymistVgafbState, busdev.qdev);
 260     int i;
 261
 262     for (i = 0; i < R_MAX; i++) {
 263         s->regs[i] = 0;
 264     }
 265
 266     /* defaults */
 267     s->regs[R_CTRL] = CTRL_RESET;
 268     s->regs[R_HRES] = 640;
 269     s->regs[R_VRES] = 480;
 270     s->regs[R_BASEADDRESS] = 0;
 271 }
 272
 273 static int milkymist_vgafb_init(SysBusDevice *dev)
 274 {
 275     MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev);
 276
 277     memory_region_init_io(&s->regs_region, &vgafb_mmio_ops, s,
 278             "milkymist-vgafb", R_MAX * 4);
 279     sysbus_init_mmio(dev, &s->regs_region);
 280
 281     s->con = graphic_console_init(vgafb_update_display,
 282                                   vgafb_invalidate_display,
 283                                   NULL, NULL, s);
 284
 285     return 0;
 286 }
 287
 288 static int vgafb_post_load(void *opaque, int version_id)
 289 {
 290     vgafb_invalidate_display(opaque);
 291     return 0;
 292 }
 293
 294 static const VMStateDescription vmstate_milkymist_vgafb = {
 295     .name = "milkymist-vgafb",
 296     .version_id = 1,
 297     .minimum_version_id = 1,
 298     .minimum_version_id_old = 1,
 299     .post_load = vgafb_post_load,
 300     .fields      = (VMStateField[]) {
 301         VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
 302         VMSTATE_END_OF_LIST()
 303     }
 304 };
 305
 306 static Property milkymist_vgafb_properties[] = {
 307     DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
 308     DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
 309     DEFINE_PROP_END_OF_LIST(),
 310 };
 311
 312 static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
 313 {
 314     DeviceClass *dc = DEVICE_CLASS(klass);
 315     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 316
 317     k->init = milkymist_vgafb_init;
 318     dc->reset = milkymist_vgafb_reset;
 319     dc->vmsd = &vmstate_milkymist_vgafb;
 320     dc->props = milkymist_vgafb_properties;
 321 }
 322
 323 static const TypeInfo milkymist_vgafb_info = {
 324     .name          = "milkymist-vgafb",
 325     .parent        = TYPE_SYS_BUS_DEVICE,
 326     .instance_size = sizeof(MilkymistVgafbState),
 327     .class_init    = milkymist_vgafb_class_init,
 328 };
 329
 330 static void milkymist_vgafb_register_types(void)
 331 {
 332     type_register_static(&milkymist_vgafb_info);
 333 }
 334
 335 type_init(milkymist_vgafb_register_types)