hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu/sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net/net.h"
  31 #include "sysemu/blockdev.h"
  32 #include "sysemu/cpus.h"
  33 #include "sysemu/kvm.h"
  34 #include "kvm_ppc.h"
  35
  36 #include "hw/boards.h"
  37 #include "hw/ppc.h"
  38 #include "hw/loader.h"
  39
  40 #include "hw/spapr.h"
  41 #include "hw/spapr_vio.h"
  42 #include "hw/spapr_pci.h"
  43 #include "hw/xics.h"
  44 #include "hw/pci/msi.h"
  45
  46 #include "sysemu/kvm.h"
  47 #include "kvm_ppc.h"
  48 #include "pci/pci.h"
  49
  50 #include "exec/address-spaces.h"
  51 #include "hw/usb.h"
  52 #include "qemu/config-file.h"
  53
  54 #include <libfdt.h>
  55
  56 /* SLOF memory layout:
  57  *
  58  * SLOF raw image loaded at 0, copies its romfs right below the flat
  59  * device-tree, then position SLOF itself 31M below that
  60  *
  61  * So we set FW_OVERHEAD to 40MB which should account for all of that
  62  * and more
  63  *
  64  * We load our kernel at 4M, leaving space for SLOF initial image
  65  */
  66 #define FDT_MAX_SIZE            0x10000
  67 #define RTAS_MAX_SIZE           0x10000
  68 #define FW_MAX_SIZE             0x400000
  69 #define FW_FILE_NAME            "slof.bin"
  70 #define FW_OVERHEAD             0x2800000
  71 #define KERNEL_LOAD_ADDR        FW_MAX_SIZE
  72
  73 #define MIN_RMA_SLOF            128UL
  74
  75 #define TIMEBASE_FREQ           512000000ULL
  76
  77 #define MAX_CPUS                256
  78 #define XICS_IRQS               1024
  79
  80 #define SPAPR_PCI_BUID          0x800000020000001ULL
  81 #define SPAPR_PCI_MEM_WIN_ADDR  (0x10000000000ULL + 0xA0000000)
  82 #define SPAPR_PCI_MEM_WIN_SIZE  0x20000000
  83 #define SPAPR_PCI_IO_WIN_ADDR   (0x10000000000ULL + 0x80000000)
  84 #define SPAPR_PCI_MSI_WIN_ADDR  (0x10000000000ULL + 0x90000000)
  85
  86 #define PHANDLE_XICP            0x00001111
  87
  88 #define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))
  89
  90 sPAPREnvironment *spapr;
  91
  92 int spapr_allocate_irq(int hint, bool lsi)
  93 {
  94     int irq;
  95
  96     if (hint) {
  97         irq = hint;
  98         /* FIXME: we should probably check for collisions somehow */
  99     } else {
 100         irq = spapr->next_irq++;
 101     }
 102
 103     /* Configure irq type */
 104     if (!xics_get_qirq(spapr->icp, irq)) {
 105         return 0;
 106     }
 107
 108     xics_set_irq_type(spapr->icp, irq, lsi);
 109
 110     return irq;
 111 }
 112
 113 /* Allocate block of consequtive IRQs, returns a number of the first */
 114 int spapr_allocate_irq_block(int num, bool lsi)
 115 {
 116     int first = -1;
 117     int i;
 118
 119     for (i = 0; i < num; ++i) {
 120         int irq;
 121
 122         irq = spapr_allocate_irq(0, lsi);
 123         if (!irq) {
 124             return -1;
 125         }
 126
 127         if (0 == i) {
 128             first = irq;
 129         }
 130
 131         /* If the above doesn't create a consecutive block then that's
 132          * an internal bug */
 133         assert(irq == (first + i));
 134     }
 135
 136     return first;
 137 }
 138
 139 static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
 140 {
 141     int ret = 0, offset;
 142     CPUPPCState *env;
 143     char cpu_model[32];
 144     int smt = kvmppc_smt_threads();
 145     uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
 146
 147     assert(spapr->cpu_model);
 148
 149     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 150         uint32_t associativity[] = {cpu_to_be32(0x5),
 151                                     cpu_to_be32(0x0),
 152                                     cpu_to_be32(0x0),
 153                                     cpu_to_be32(0x0),
 154                                     cpu_to_be32(env->numa_node),
 155                                     cpu_to_be32(env->cpu_index)};
 156
 157         if ((env->cpu_index % smt) != 0) {
 158             continue;
 159         }
 160
 161         snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
 162                  env->cpu_index);
 163
 164         offset = fdt_path_offset(fdt, cpu_model);
 165         if (offset < 0) {
 166             return offset;
 167         }
 168
 169         if (nb_numa_nodes > 1) {
 170             ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
 171                               sizeof(associativity));
 172             if (ret < 0) {
 173                 return ret;
 174             }
 175         }
 176
 177         ret = fdt_setprop(fdt, offset, "ibm,pft-size",
 178                           pft_size_prop, sizeof(pft_size_prop));
 179         if (ret < 0) {
 180             return ret;
 181         }
 182     }
 183     return ret;
 184 }
 185
 186
 187 static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
 188                                      size_t maxsize)
 189 {
 190     size_t maxcells = maxsize / sizeof(uint32_t);
 191     int i, j, count;
 192     uint32_t *p = prop;
 193
 194     for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
 195         struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
 196
 197         if (!sps->page_shift) {
 198             break;
 199         }
 200         for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
 201             if (sps->enc[count].page_shift == 0) {
 202                 break;
 203             }
 204         }
 205         if ((p - prop) >= (maxcells - 3 - count * 2)) {
 206             break;
 207         }
 208         *(p++) = cpu_to_be32(sps->page_shift);
 209         *(p++) = cpu_to_be32(sps->slb_enc);
 210         *(p++) = cpu_to_be32(count);
 211         for (j = 0; j < count; j++) {
 212             *(p++) = cpu_to_be32(sps->enc[j].page_shift);
 213             *(p++) = cpu_to_be32(sps->enc[j].pte_enc);
 214         }
 215     }
 216
 217     return (p - prop) * sizeof(uint32_t);
 218 }
 219
 220 #define _FDT(exp) \
 221     do { \
 222         int ret = (exp);                                           \
 223         if (ret < 0) {                                             \
 224             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 225                     #exp, fdt_strerror(ret));                      \
 226             exit(1);                                               \
 227         }                                                          \
 228     } while (0)
 229
 230
 231 static void *spapr_create_fdt_skel(const char *cpu_model,
 232                                    hwaddr initrd_base,
 233                                    hwaddr initrd_size,
 234                                    hwaddr kernel_size,
 235                                    const char *boot_device,
 236                                    const char *kernel_cmdline,
 237                                    uint32_t epow_irq)
 238 {
 239     void *fdt;
 240     CPUPPCState *env;
 241     uint32_t start_prop = cpu_to_be32(initrd_base);
 242     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 243     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 244         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 245     char qemu_hypertas_prop[] = "hcall-memop1";
 246     uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
 247     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 248     char *modelname;
 249     int i, smt = kvmppc_smt_threads();
 250     unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
 251
 252     fdt = g_malloc0(FDT_MAX_SIZE);
 253     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 254
 255     if (kernel_size) {
 256         _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
 257     }
 258     if (initrd_size) {
 259         _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
 260     }
 261     _FDT((fdt_finish_reservemap(fdt)));
 262
 263     /* Root node */
 264     _FDT((fdt_begin_node(fdt, "")));
 265     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 266     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 267
 268     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 269     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 270
 271     /* /chosen */
 272     _FDT((fdt_begin_node(fdt, "chosen")));
 273
 274     /* Set Form1_affinity */
 275     _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
 276
 277     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 278     _FDT((fdt_property(fdt, "linux,initrd-start",
 279                        &start_prop, sizeof(start_prop))));
 280     _FDT((fdt_property(fdt, "linux,initrd-end",
 281                        &end_prop, sizeof(end_prop))));
 282     if (kernel_size) {
 283         uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
 284                               cpu_to_be64(kernel_size) };
 285
 286         _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
 287     }
 288     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 289     _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
 290     _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
 291     _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
 292
 293     _FDT((fdt_end_node(fdt)));
 294
 295     /* cpus */
 296     _FDT((fdt_begin_node(fdt, "cpus")));
 297
 298     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 299     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 300
 301     modelname = g_strdup(cpu_model);
 302
 303     for (i = 0; i < strlen(modelname); i++) {
 304         modelname[i] = toupper(modelname[i]);
 305     }
 306
 307     /* This is needed during FDT finalization */
 308     spapr->cpu_model = g_strdup(modelname);
 309
 310     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 311         int index = env->cpu_index;
 312         uint32_t servers_prop[smp_threads];
 313         uint32_t gservers_prop[smp_threads * 2];
 314         char *nodename;
 315         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 316                            0xffffffff, 0xffffffff};
 317         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 318         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 319         uint32_t page_sizes_prop[64];
 320         size_t page_sizes_prop_size;
 321
 322         if ((index % smt) != 0) {
 323             continue;
 324         }
 325
 326         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 327             fprintf(stderr, "Allocation failure\n");
 328             exit(1);
 329         }
 330
 331         _FDT((fdt_begin_node(fdt, nodename)));
 332
 333         free(nodename);
 334
 335         _FDT((fdt_property_cell(fdt, "reg", index)));
 336         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 337
 338         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 339         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 340                                 env->dcache_line_size)));
 341         _FDT((fdt_property_cell(fdt, "icache-block-size",
 342                                 env->icache_line_size)));
 343         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 344         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 345         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 346         _FDT((fdt_property_string(fdt, "status", "okay")));
 347         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 348
 349         /* Build interrupt servers and gservers properties */
 350         for (i = 0; i < smp_threads; i++) {
 351             servers_prop[i] = cpu_to_be32(index + i);
 352             /* Hack, direct the group queues back to cpu 0 */
 353             gservers_prop[i*2] = cpu_to_be32(index + i);
 354             gservers_prop[i*2 + 1] = 0;
 355         }
 356         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
 357                            servers_prop, sizeof(servers_prop))));
 358         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 359                            gservers_prop, sizeof(gservers_prop))));
 360
 361         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 362             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 363                                segs, sizeof(segs))));
 364         }
 365
 366         /* Advertise VMX/VSX (vector extensions) if available
 367          *   0 / no property == no vector extensions
 368          *   1               == VMX / Altivec available
 369          *   2               == VSX available */
 370         if (env->insns_flags & PPC_ALTIVEC) {
 371             uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
 372
 373             _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
 374         }
 375
 376         /* Advertise DFP (Decimal Floating Point) if available
 377          *   0 / no property == no DFP
 378          *   1               == DFP available */
 379         if (env->insns_flags2 & PPC2_DFP) {
 380             _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
 381         }
 382
 383         page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
 384                                                       sizeof(page_sizes_prop));
 385         if (page_sizes_prop_size) {
 386             _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
 387                                page_sizes_prop, page_sizes_prop_size)));
 388         }
 389
 390         _FDT((fdt_end_node(fdt)));
 391     }
 392
 393     g_free(modelname);
 394
 395     _FDT((fdt_end_node(fdt)));
 396
 397     /* RTAS */
 398     _FDT((fdt_begin_node(fdt, "rtas")));
 399
 400     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 401                        sizeof(hypertas_prop))));
 402     _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
 403                        sizeof(qemu_hypertas_prop))));
 404
 405     _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
 406         refpoints, sizeof(refpoints))));
 407
 408     _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));
 409
 410     _FDT((fdt_end_node(fdt)));
 411
 412     /* interrupt controller */
 413     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 414
 415     _FDT((fdt_property_string(fdt, "device_type",
 416                               "PowerPC-External-Interrupt-Presentation")));
 417     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 418     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 419     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 420                        interrupt_server_ranges_prop,
 421                        sizeof(interrupt_server_ranges_prop))));
 422     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 423     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 424     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 425
 426     _FDT((fdt_end_node(fdt)));
 427
 428     /* vdevice */
 429     _FDT((fdt_begin_node(fdt, "vdevice")));
 430
 431     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 432     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 433     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 434     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 435     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 436     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 437
 438     _FDT((fdt_end_node(fdt)));
 439
 440     /* event-sources */
 441     spapr_events_fdt_skel(fdt, epow_irq);
 442
 443     _FDT((fdt_end_node(fdt))); /* close root node */
 444     _FDT((fdt_finish(fdt)));
 445
 446     return fdt;
 447 }
 448
 449 static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt)
 450 {
 451     uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
 452                                 cpu_to_be32(0x0), cpu_to_be32(0x0),
 453                                 cpu_to_be32(0x0)};
 454     char mem_name[32];
 455     hwaddr node0_size, mem_start;
 456     uint64_t mem_reg_property[2];
 457     int i, off;
 458
 459     /* memory node(s) */
 460     node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
 461     if (spapr->rma_size > node0_size) {
 462         spapr->rma_size = node0_size;
 463     }
 464
 465     /* RMA */
 466     mem_reg_property[0] = 0;
 467     mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
 468     off = fdt_add_subnode(fdt, 0, "memory@0");
 469     _FDT(off);
 470     _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
 471     _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
 472                       sizeof(mem_reg_property))));
 473     _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
 474                       sizeof(associativity))));
 475
 476     /* RAM: Node 0 */
 477     if (node0_size > spapr->rma_size) {
 478         mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
 479         mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);
 480
 481         sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
 482         off = fdt_add_subnode(fdt, 0, mem_name);
 483         _FDT(off);
 484         _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
 485         _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
 486                           sizeof(mem_reg_property))));
 487         _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
 488                           sizeof(associativity))));
 489     }
 490
 491     /* RAM: Node 1 and beyond */
 492     mem_start = node0_size;
 493     for (i = 1; i < nb_numa_nodes; i++) {
 494         mem_reg_property[0] = cpu_to_be64(mem_start);
 495         mem_reg_property[1] = cpu_to_be64(node_mem[i]);
 496         associativity[3] = associativity[4] = cpu_to_be32(i);
 497         sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
 498         off = fdt_add_subnode(fdt, 0, mem_name);
 499         _FDT(off);
 500         _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
 501         _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
 502                           sizeof(mem_reg_property))));
 503         _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
 504                           sizeof(associativity))));
 505         mem_start += node_mem[i];
 506     }
 507
 508     return 0;
 509 }
 510
 511 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 512                                hwaddr fdt_addr,
 513                                hwaddr rtas_addr,
 514                                hwaddr rtas_size)
 515 {
 516     int ret;
 517     void *fdt;
 518     sPAPRPHBState *phb;
 519
 520     fdt = g_malloc(FDT_MAX_SIZE);
 521
 522     /* open out the base tree into a temp buffer for the final tweaks */
 523     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 524
 525     ret = spapr_populate_memory(spapr, fdt);
 526     if (ret < 0) {
 527         fprintf(stderr, "couldn't setup memory nodes in fdt\n");
 528         exit(1);
 529     }
 530
 531     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 532     if (ret < 0) {
 533         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 534         exit(1);
 535     }
 536
 537     QLIST_FOREACH(phb, &spapr->phbs, list) {
 538         ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
 539     }
 540
 541     if (ret < 0) {
 542         fprintf(stderr, "couldn't setup PCI devices in fdt\n");
 543         exit(1);
 544     }
 545
 546     /* RTAS */
 547     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 548     if (ret < 0) {
 549         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 550     }
 551
 552     /* Advertise NUMA via ibm,associativity */
 553     ret = spapr_fixup_cpu_dt(fdt, spapr);
 554     if (ret < 0) {
 555         fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
 556     }
 557
 558     if (!spapr->has_graphics) {
 559         spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
 560     }
 561
 562     _FDT((fdt_pack(fdt)));
 563
 564     if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
 565         hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
 566                  fdt_totalsize(fdt), FDT_MAX_SIZE);
 567         exit(1);
 568     }
 569
 570     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 571
 572     g_free(fdt);
 573 }
 574
 575 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 576 {
 577     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 578 }
 579
 580 static void emulate_spapr_hypercall(PowerPCCPU *cpu)
 581 {
 582     CPUPPCState *env = &cpu->env;
 583
 584     if (msr_pr) {
 585         hcall_dprintf("Hypercall made with MSR[PR]=1\n");
 586         env->gpr[3] = H_PRIVILEGE;
 587     } else {
 588         env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
 589     }
 590 }
 591
 592 static void spapr_reset_htab(sPAPREnvironment *spapr)
 593 {
 594     long shift;
 595
 596     /* allocate hash page table.  For now we always make this 16mb,
 597      * later we should probably make it scale to the size of guest
 598      * RAM */
 599
 600     shift = kvmppc_reset_htab(spapr->htab_shift);
 601
 602     if (shift > 0) {
 603         /* Kernel handles htab, we don't need to allocate one */
 604         spapr->htab_shift = shift;
 605     } else {
 606         if (!spapr->htab) {
 607             /* Allocate an htab if we don't yet have one */
 608             spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr));
 609         }
 610
 611         /* And clear it */
 612         memset(spapr->htab, 0, HTAB_SIZE(spapr));
 613     }
 614
 615     /* Update the RMA size if necessary */
 616     if (spapr->vrma_adjust) {
 617         spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift);
 618     }
 619 }
 620
 621 static void ppc_spapr_reset(void)
 622 {
 623     /* Reset the hash table & recalc the RMA */
 624     spapr_reset_htab(spapr);
 625
 626     qemu_devices_reset();
 627
 628     /* Load the fdt */
 629     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 630                        spapr->rtas_size);
 631
 632     /* Set up the entry state */
 633     first_cpu->gpr[3] = spapr->fdt_addr;
 634     first_cpu->gpr[5] = 0;
 635     first_cpu->halted = 0;
 636     first_cpu->nip = spapr->entry_point;
 637
 638 }
 639
 640 static void spapr_cpu_reset(void *opaque)
 641 {
 642     PowerPCCPU *cpu = opaque;
 643     CPUPPCState *env = &cpu->env;
 644
 645     cpu_reset(CPU(cpu));
 646
 647     /* All CPUs start halted.  CPU0 is unhalted from the machine level
 648      * reset code and the rest are explicitly started up by the guest
 649      * using an RTAS call */
 650     env->halted = 1;
 651
 652     env->spr[SPR_HIOR] = 0;
 653
 654     env->external_htab = spapr->htab;
 655     env->htab_base = -1;
 656     env->htab_mask = HTAB_SIZE(spapr) - 1;
 657     env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 658         (spapr->htab_shift - 18);
 659 }
 660
 661 static void spapr_create_nvram(sPAPREnvironment *spapr)
 662 {
 663     QemuOpts *machine_opts;
 664     DeviceState *dev;
 665
 666     dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
 667
 668     machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
 669     if (machine_opts) {
 670         const char *drivename;
 671
 672         drivename = qemu_opt_get(machine_opts, "nvram");
 673         if (drivename) {
 674             BlockDriverState *bs;
 675
 676             bs = bdrv_find(drivename);
 677             if (!bs) {
 678                 fprintf(stderr, "No such block device \"%s\" for nvram\n",
 679                         drivename);
 680                 exit(1);
 681             }
 682             qdev_prop_set_drive_nofail(dev, "drive", bs);
 683         }
 684     }
 685
 686     qdev_init_nofail(dev);
 687
 688     spapr->nvram = (struct sPAPRNVRAM *)dev;
 689 }
 690
 691 /* Returns whether we want to use VGA or not */
 692 static int spapr_vga_init(PCIBus *pci_bus)
 693 {
 694     switch (vga_interface_type) {
 695     case VGA_NONE:
 696     case VGA_STD:
 697         return pci_vga_init(pci_bus) != NULL;
 698     default:
 699         fprintf(stderr, "This vga model is not supported,"
 700                 "currently it only supports -vga std\n");
 701         exit(0);
 702         break;
 703     }
 704 }
 705
 706 /* pSeries LPAR / sPAPR hardware init */
 707 static void ppc_spapr_init(QEMUMachineInitArgs *args)
 708 {
 709     ram_addr_t ram_size = args->ram_size;
 710     const char *cpu_model = args->cpu_model;
 711     const char *kernel_filename = args->kernel_filename;
 712     const char *kernel_cmdline = args->kernel_cmdline;
 713     const char *initrd_filename = args->initrd_filename;
 714     const char *boot_device = args->boot_device;
 715     PowerPCCPU *cpu;
 716     CPUPPCState *env;
 717     PCIHostState *phb;
 718     int i;
 719     MemoryRegion *sysmem = get_system_memory();
 720     MemoryRegion *ram = g_new(MemoryRegion, 1);
 721     hwaddr rma_alloc_size;
 722     uint32_t initrd_base = 0;
 723     long kernel_size = 0, initrd_size = 0;
 724     long load_limit, rtas_limit, fw_size;
 725     char *filename;
 726
 727     msi_supported = true;
 728
 729     spapr = g_malloc0(sizeof(*spapr));
 730     QLIST_INIT(&spapr->phbs);
 731
 732     cpu_ppc_hypercall = emulate_spapr_hypercall;
 733
 734     /* Allocate RMA if necessary */
 735     rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
 736
 737     if (rma_alloc_size == -1) {
 738         hw_error("qemu: Unable to create RMA\n");
 739         exit(1);
 740     }
 741
 742     if (rma_alloc_size && (rma_alloc_size < ram_size)) {
 743         spapr->rma_size = rma_alloc_size;
 744     } else {
 745         spapr->rma_size = ram_size;
 746
 747         /* With KVM, we don't actually know whether KVM supports an
 748          * unbounded RMA (PR KVM) or is limited by the hash table size
 749          * (HV KVM using VRMA), so we always assume the latter
 750          *
 751          * In that case, we also limit the initial allocations for RTAS
 752          * etc... to 256M since we have no way to know what the VRMA size
 753          * is going to be as it depends on the size of the hash table
 754          * isn't determined yet.
 755          */
 756         if (kvm_enabled()) {
 757             spapr->vrma_adjust = 1;
 758             spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
 759         }
 760     }
 761
 762     /* We place the device tree and RTAS just below either the top of the RMA,
 763      * or just below 2GB, whichever is lowere, so that it can be
 764      * processed with 32-bit real mode code if necessary */
 765     rtas_limit = MIN(spapr->rma_size, 0x80000000);
 766     spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
 767     spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
 768     load_limit = spapr->fdt_addr - FW_OVERHEAD;
 769
 770     /* We aim for a hash table of size 1/128 the size of RAM.  The
 771      * normal rule of thumb is 1/64 the size of RAM, but that's much
 772      * more than needed for the Linux guests we support. */
 773     spapr->htab_shift = 18; /* Minimum architected size */
 774     while (spapr->htab_shift <= 46) {
 775         if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) {
 776             break;
 777         }
 778         spapr->htab_shift++;
 779     }
 780
 781     /* init CPUs */
 782     if (cpu_model == NULL) {
 783         cpu_model = kvm_enabled() ? "host" : "POWER7";
 784     }
 785     for (i = 0; i < smp_cpus; i++) {
 786         cpu = cpu_ppc_init(cpu_model);
 787         if (cpu == NULL) {
 788             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 789             exit(1);
 790         }
 791         env = &cpu->env;
 792
 793         /* Set time-base frequency to 512 MHz */
 794         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 795
 796         /* PAPR always has exception vectors in RAM not ROM */
 797         env->hreset_excp_prefix = 0;
 798
 799         /* Tell KVM that we're in PAPR mode */
 800         if (kvm_enabled()) {
 801             kvmppc_set_papr(env);
 802         }
 803
 804         qemu_register_reset(spapr_cpu_reset, cpu);
 805     }
 806
 807     /* allocate RAM */
 808     spapr->ram_limit = ram_size;
 809     if (spapr->ram_limit > rma_alloc_size) {
 810         ram_addr_t nonrma_base = rma_alloc_size;
 811         ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
 812
 813         memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
 814         vmstate_register_ram_global(ram);
 815         memory_region_add_subregion(sysmem, nonrma_base, ram);
 816     }
 817
 818     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 819     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 820                                            rtas_limit - spapr->rtas_addr);
 821     if (spapr->rtas_size < 0) {
 822         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 823         exit(1);
 824     }
 825     if (spapr->rtas_size > RTAS_MAX_SIZE) {
 826         hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
 827                  spapr->rtas_size, RTAS_MAX_SIZE);
 828         exit(1);
 829     }
 830     g_free(filename);
 831
 832
 833     /* Set up Interrupt Controller */
 834     spapr->icp = xics_system_init(XICS_IRQS);
 835     spapr->next_irq = XICS_IRQ_BASE;
 836
 837     /* Set up EPOW events infrastructure */
 838     spapr_events_init(spapr);
 839
 840     /* Set up IOMMU */
 841     spapr_iommu_init();
 842
 843     /* Set up VIO bus */
 844     spapr->vio_bus = spapr_vio_bus_init();
 845
 846     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 847         if (serial_hds[i]) {
 848             spapr_vty_create(spapr->vio_bus, serial_hds[i]);
 849         }
 850     }
 851
 852     /* We always have at least the nvram device on VIO */
 853     spapr_create_nvram(spapr);
 854
 855     /* Set up PCI */
 856     spapr_pci_rtas_init();
 857
 858     spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
 859                      SPAPR_PCI_MEM_WIN_ADDR,
 860                      SPAPR_PCI_MEM_WIN_SIZE,
 861                      SPAPR_PCI_IO_WIN_ADDR,
 862                      SPAPR_PCI_MSI_WIN_ADDR);
 863     phb = PCI_HOST_BRIDGE(QLIST_FIRST(&spapr->phbs));
 864
 865     for (i = 0; i < nb_nics; i++) {
 866         NICInfo *nd = &nd_table[i];
 867
 868         if (!nd->model) {
 869             nd->model = g_strdup("ibmveth");
 870         }
 871
 872         if (strcmp(nd->model, "ibmveth") == 0) {
 873             spapr_vlan_create(spapr->vio_bus, nd);
 874         } else {
 875             pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
 876         }
 877     }
 878
 879     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 880         spapr_vscsi_create(spapr->vio_bus);
 881     }
 882
 883     /* Graphics */
 884     if (spapr_vga_init(phb->bus)) {
 885         spapr->has_graphics = true;
 886     }
 887
 888     if (usb_enabled(spapr->has_graphics)) {
 889         pci_create_simple(phb->bus, -1, "pci-ohci");
 890         if (spapr->has_graphics) {
 891             usbdevice_create("keyboard");
 892             usbdevice_create("mouse");
 893         }
 894     }
 895
 896     if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
 897         fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 898                 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
 899         exit(1);
 900     }
 901
 902     if (kernel_filename) {
 903         uint64_t lowaddr = 0;
 904
 905         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 906                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 907         if (kernel_size < 0) {
 908             kernel_size = load_image_targphys(kernel_filename,
 909                                               KERNEL_LOAD_ADDR,
 910                                               load_limit - KERNEL_LOAD_ADDR);
 911         }
 912         if (kernel_size < 0) {
 913             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 914                     kernel_filename);
 915             exit(1);
 916         }
 917
 918         /* load initrd */
 919         if (initrd_filename) {
 920             /* Try to locate the initrd in the gap between the kernel
 921              * and the firmware. Add a bit of space just in case
 922              */
 923             initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
 924             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 925                                               load_limit - initrd_base);
 926             if (initrd_size < 0) {
 927                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 928                         initrd_filename);
 929                 exit(1);
 930             }
 931         } else {
 932             initrd_base = 0;
 933             initrd_size = 0;
 934         }
 935     }
 936
 937     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 938     fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 939     if (fw_size < 0) {
 940         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 941         exit(1);
 942     }
 943     g_free(filename);
 944
 945     spapr->entry_point = 0x100;
 946
 947     /* Prepare the device tree */
 948     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model,
 949                                             initrd_base, initrd_size,
 950                                             kernel_size,
 951                                             boot_device, kernel_cmdline,
 952                                             spapr->epow_irq);
 953     assert(spapr->fdt_skel != NULL);
 954 }
 955
 956 static QEMUMachine spapr_machine = {
 957     .name = "pseries",
 958     .desc = "pSeries Logical Partition (PAPR compliant)",
 959     .init = ppc_spapr_init,
 960     .reset = ppc_spapr_reset,
 961     .block_default_type = IF_SCSI,
 962     .max_cpus = MAX_CPUS,
 963     .no_parallel = 1,
 964 };
 965
 966 static void spapr_machine_init(void)
 967 {
 968     qemu_register_machine(&spapr_machine);
 969 }
 970
 971 machine_init(spapr_machine_init);