]> git.proxmox.com Git - qemu.git/blob - hw/xilinx.h
xilinx.h: Error check when setting links
[qemu.git] / hw / xilinx.h
1 #include "stream.h"
2 #include "qemu-common.h"
3 #include "net.h"
4
5 static inline DeviceState *
6 xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
7 {
8 DeviceState *dev;
9
10 dev = qdev_create(NULL, "xlnx.xps-intc");
11 qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
12 qdev_init_nofail(dev);
13 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
14 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
15 return dev;
16 }
17
18 /* OPB Timer/Counter. */
19 static inline DeviceState *
20 xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int oto, int freq)
21 {
22 DeviceState *dev;
23
24 dev = qdev_create(NULL, "xlnx.xps-timer");
25 qdev_prop_set_uint32(dev, "one-timer-only", oto);
26 qdev_prop_set_uint32(dev, "frequency", freq);
27 qdev_init_nofail(dev);
28 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
29 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
30 return dev;
31 }
32
33 /* XPS Ethernet Lite MAC. */
34 static inline DeviceState *
35 xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
36 int txpingpong, int rxpingpong)
37 {
38 DeviceState *dev;
39
40 qemu_check_nic_model(nd, "xlnx.xps-ethernetlite");
41
42 dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
43 qdev_set_nic_properties(dev, nd);
44 qdev_prop_set_uint32(dev, "tx-ping-pong", txpingpong);
45 qdev_prop_set_uint32(dev, "rx-ping-pong", rxpingpong);
46 qdev_init_nofail(dev);
47 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
48 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
49 return dev;
50 }
51
52 static inline DeviceState *
53 xilinx_axiethernet_create(NICInfo *nd, StreamSlave *peer,
54 target_phys_addr_t base, qemu_irq irq,
55 int txmem, int rxmem)
56 {
57 DeviceState *dev;
58 Error *errp = NULL;
59
60 qemu_check_nic_model(nd, "xlnx.axi-ethernet");
61
62 dev = qdev_create(NULL, "xlnx.axi-ethernet");
63 qdev_set_nic_properties(dev, nd);
64 qdev_prop_set_uint32(dev, "rxmem", rxmem);
65 qdev_prop_set_uint32(dev, "txmem", txmem);
66 object_property_set_link(OBJECT(dev), OBJECT(peer), "tx_dev", &errp);
67 assert_no_error(errp);
68 qdev_init_nofail(dev);
69 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
70 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
71
72 return dev;
73 }
74
75 static inline void
76 xilinx_axiethernetdma_init(DeviceState *dev, StreamSlave *peer,
77 target_phys_addr_t base, qemu_irq irq,
78 qemu_irq irq2, int freqhz)
79 {
80 Error *errp = NULL;
81
82 qdev_prop_set_uint32(dev, "freqhz", freqhz);
83 object_property_set_link(OBJECT(dev), OBJECT(peer), "tx_dev", &errp);
84 assert_no_error(errp);
85 qdev_init_nofail(dev);
86
87 sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
88 sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
89 sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq2);
90 }