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1 /*
2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include "sysemu.h"
29 #include "boards.h"
30 #include "loader.h"
31 #include "elf.h"
32 #include "memory.h"
33 #include "exec-memory.h"
34 #include "serial.h"
35 #include "net.h"
36 #include "sysbus.h"
37 #include "flash.h"
38 #include "blockdev.h"
39 #include "qemu-char.h"
40 #include "xtensa_bootparam.h"
41
42 typedef struct LxBoardDesc {
43 size_t flash_size;
44 size_t flash_sector_size;
45 size_t sram_size;
46 } LxBoardDesc;
47
48 typedef struct Lx60FpgaState {
49 MemoryRegion iomem;
50 uint32_t leds;
51 uint32_t switches;
52 } Lx60FpgaState;
53
54 static void lx60_fpga_reset(void *opaque)
55 {
56 Lx60FpgaState *s = opaque;
57
58 s->leds = 0;
59 s->switches = 0;
60 }
61
62 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr,
63 unsigned size)
64 {
65 Lx60FpgaState *s = opaque;
66
67 switch (addr) {
68 case 0x0: /*build date code*/
69 return 0x09272011;
70
71 case 0x4: /*processor clock frequency, Hz*/
72 return 10000000;
73
74 case 0x8: /*LEDs (off = 0, on = 1)*/
75 return s->leds;
76
77 case 0xc: /*DIP switches (off = 0, on = 1)*/
78 return s->switches;
79 }
80 return 0;
81 }
82
83 static void lx60_fpga_write(void *opaque, hwaddr addr,
84 uint64_t val, unsigned size)
85 {
86 Lx60FpgaState *s = opaque;
87
88 switch (addr) {
89 case 0x8: /*LEDs (off = 0, on = 1)*/
90 s->leds = val;
91 break;
92
93 case 0x10: /*board reset*/
94 if (val == 0xdead) {
95 qemu_system_reset_request();
96 }
97 break;
98 }
99 }
100
101 static const MemoryRegionOps lx60_fpga_ops = {
102 .read = lx60_fpga_read,
103 .write = lx60_fpga_write,
104 .endianness = DEVICE_NATIVE_ENDIAN,
105 };
106
107 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
108 hwaddr base)
109 {
110 Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
111
112 memory_region_init_io(&s->iomem, &lx60_fpga_ops, s,
113 "lx60.fpga", 0x10000);
114 memory_region_add_subregion(address_space, base, &s->iomem);
115 lx60_fpga_reset(s);
116 qemu_register_reset(lx60_fpga_reset, s);
117 return s;
118 }
119
120 static void lx60_net_init(MemoryRegion *address_space,
121 hwaddr base,
122 hwaddr descriptors,
123 hwaddr buffers,
124 qemu_irq irq, NICInfo *nd)
125 {
126 DeviceState *dev;
127 SysBusDevice *s;
128 MemoryRegion *ram;
129
130 dev = qdev_create(NULL, "open_eth");
131 qdev_set_nic_properties(dev, nd);
132 qdev_init_nofail(dev);
133
134 s = sysbus_from_qdev(dev);
135 sysbus_connect_irq(s, 0, irq);
136 memory_region_add_subregion(address_space, base,
137 sysbus_mmio_get_region(s, 0));
138 memory_region_add_subregion(address_space, descriptors,
139 sysbus_mmio_get_region(s, 1));
140
141 ram = g_malloc(sizeof(*ram));
142 memory_region_init_ram(ram, "open_eth.ram", 16384);
143 vmstate_register_ram_global(ram);
144 memory_region_add_subregion(address_space, buffers, ram);
145 }
146
147 static uint64_t translate_phys_addr(void *env, uint64_t addr)
148 {
149 return cpu_get_phys_page_debug(env, addr);
150 }
151
152 static void lx60_reset(void *opaque)
153 {
154 XtensaCPU *cpu = opaque;
155
156 cpu_reset(CPU(cpu));
157 }
158
159 static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args)
160 {
161 #ifdef TARGET_WORDS_BIGENDIAN
162 int be = 1;
163 #else
164 int be = 0;
165 #endif
166 MemoryRegion *system_memory = get_system_memory();
167 XtensaCPU *cpu = NULL;
168 CPUXtensaState *env = NULL;
169 MemoryRegion *ram, *rom, *system_io;
170 DriveInfo *dinfo;
171 pflash_t *flash = NULL;
172 const char *cpu_model = args->cpu_model;
173 const char *kernel_filename = args->kernel_filename;
174 const char *kernel_cmdline = args->kernel_cmdline;
175 int n;
176
177 if (!cpu_model) {
178 cpu_model = XTENSA_DEFAULT_CPU_MODEL;
179 }
180
181 for (n = 0; n < smp_cpus; n++) {
182 cpu = cpu_xtensa_init(cpu_model);
183 if (cpu == NULL) {
184 fprintf(stderr, "Unable to find CPU definition\n");
185 exit(1);
186 }
187 env = &cpu->env;
188
189 env->sregs[PRID] = n;
190 qemu_register_reset(lx60_reset, cpu);
191 /* Need MMU initialized prior to ELF loading,
192 * so that ELF gets loaded into virtual addresses
193 */
194 cpu_reset(CPU(cpu));
195 }
196
197 ram = g_malloc(sizeof(*ram));
198 memory_region_init_ram(ram, "lx60.dram", args->ram_size);
199 vmstate_register_ram_global(ram);
200 memory_region_add_subregion(system_memory, 0, ram);
201
202 system_io = g_malloc(sizeof(*system_io));
203 memory_region_init(system_io, "lx60.io", 224 * 1024 * 1024);
204 memory_region_add_subregion(system_memory, 0xf0000000, system_io);
205 lx60_fpga_init(system_io, 0x0d020000);
206 if (nd_table[0].used) {
207 lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
208 xtensa_get_extint(env, 1), nd_table);
209 }
210
211 if (!serial_hds[0]) {
212 serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
213 }
214
215 serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
216 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
217
218 dinfo = drive_get(IF_PFLASH, 0, 0);
219 if (dinfo) {
220 flash = pflash_cfi01_register(0xf8000000,
221 NULL, "lx60.io.flash", board->flash_size,
222 dinfo->bdrv, board->flash_sector_size,
223 board->flash_size / board->flash_sector_size,
224 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
225 if (flash == NULL) {
226 fprintf(stderr, "Unable to mount pflash\n");
227 exit(1);
228 }
229 }
230
231 /* Use presence of kernel file name as 'boot from SRAM' switch. */
232 if (kernel_filename) {
233 rom = g_malloc(sizeof(*rom));
234 memory_region_init_ram(rom, "lx60.sram", board->sram_size);
235 vmstate_register_ram_global(rom);
236 memory_region_add_subregion(system_memory, 0xfe000000, rom);
237
238 /* Put kernel bootparameters to the end of that SRAM */
239 if (kernel_cmdline) {
240 size_t cmdline_size = strlen(kernel_cmdline) + 1;
241 size_t bp_size = sizeof(BpTag[4]) + cmdline_size;
242 uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff;
243
244 env->regs[2] = tagptr;
245
246 tagptr = put_tag(tagptr, 0x7b0b, 0, NULL);
247 if (cmdline_size > 1) {
248 tagptr = put_tag(tagptr, 0x1001,
249 cmdline_size, kernel_cmdline);
250 }
251 tagptr = put_tag(tagptr, 0x7e0b, 0, NULL);
252 }
253 uint64_t elf_entry;
254 uint64_t elf_lowaddr;
255 int success = load_elf(kernel_filename, translate_phys_addr, env,
256 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
257 if (success > 0) {
258 env->pc = elf_entry;
259 }
260 } else {
261 if (flash) {
262 MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
263 MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
264
265 memory_region_init_alias(flash_io, "lx60.flash",
266 flash_mr, 0, board->flash_size);
267 memory_region_add_subregion(system_memory, 0xfe000000,
268 flash_io);
269 }
270 }
271 }
272
273 static void xtensa_lx60_init(QEMUMachineInitArgs *args)
274 {
275 static const LxBoardDesc lx60_board = {
276 .flash_size = 0x400000,
277 .flash_sector_size = 0x10000,
278 .sram_size = 0x20000,
279 };
280 lx_init(&lx60_board, args);
281 }
282
283 static void xtensa_lx200_init(QEMUMachineInitArgs *args)
284 {
285 static const LxBoardDesc lx200_board = {
286 .flash_size = 0x1000000,
287 .flash_sector_size = 0x20000,
288 .sram_size = 0x2000000,
289 };
290 lx_init(&lx200_board, args);
291 }
292
293 static QEMUMachine xtensa_lx60_machine = {
294 .name = "lx60",
295 .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
296 .init = xtensa_lx60_init,
297 .max_cpus = 4,
298 };
299
300 static QEMUMachine xtensa_lx200_machine = {
301 .name = "lx200",
302 .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
303 .init = xtensa_lx200_init,
304 .max_cpus = 4,
305 };
306
307 static void xtensa_lx_machines_init(void)
308 {
309 qemu_register_machine(&xtensa_lx60_machine);
310 qemu_register_machine(&xtensa_lx200_machine);
311 }
312
313 machine_init(xtensa_lx_machines_init);