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Merge remote-tracking branch 'sstabellini/compile-xs' into staging
[qemu.git] / linux-user / main.c
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <stdarg.h>
22 #include <string.h>
23 #include <errno.h>
24 #include <unistd.h>
25 #include <sys/mman.h>
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
28
29 #include "qemu.h"
30 #include "qemu-common.h"
31 #include "cache-utils.h"
32 #include "cpu.h"
33 #include "tcg.h"
34 #include "qemu-timer.h"
35 #include "envlist.h"
36 #include "elf.h"
37
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
39
40 char *exec_path;
41
42 int singlestep;
43 const char *filename;
44 const char *argv0;
45 int gdbstub_port;
46 envlist_t *envlist;
47 const char *cpu_model;
48 unsigned long mmap_min_addr;
49 #if defined(CONFIG_USE_GUEST_BASE)
50 unsigned long guest_base;
51 int have_guest_base;
52 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
53 /*
54 * When running 32-on-64 we should make sure we can fit all of the possible
55 * guest address space into a contiguous chunk of virtual host memory.
56 *
57 * This way we will never overlap with our own libraries or binaries or stack
58 * or anything else that QEMU maps.
59 */
60 unsigned long reserved_va = 0xf7000000;
61 #else
62 unsigned long reserved_va;
63 #endif
64 #endif
65
66 static void usage(void);
67
68 static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
69 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
70
71 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
72 we allocate a bigger stack. Need a better solution, for example
73 by remapping the process stack directly at the right place */
74 unsigned long guest_stack_size = 8 * 1024 * 1024UL;
75
76 void gemu_log(const char *fmt, ...)
77 {
78 va_list ap;
79
80 va_start(ap, fmt);
81 vfprintf(stderr, fmt, ap);
82 va_end(ap);
83 }
84
85 #if defined(TARGET_I386)
86 int cpu_get_pic_interrupt(CPUX86State *env)
87 {
88 return -1;
89 }
90 #endif
91
92 /* timers for rdtsc */
93
94 #if 0
95
96 static uint64_t emu_time;
97
98 int64_t cpu_get_real_ticks(void)
99 {
100 return emu_time++;
101 }
102
103 #endif
104
105 #if defined(CONFIG_USE_NPTL)
106 /***********************************************************/
107 /* Helper routines for implementing atomic operations. */
108
109 /* To implement exclusive operations we force all cpus to syncronise.
110 We don't require a full sync, only that no cpus are executing guest code.
111 The alternative is to map target atomic ops onto host equivalents,
112 which requires quite a lot of per host/target work. */
113 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
114 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
115 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
116 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
117 static int pending_cpus;
118
119 /* Make sure everything is in a consistent state for calling fork(). */
120 void fork_start(void)
121 {
122 pthread_mutex_lock(&tb_lock);
123 pthread_mutex_lock(&exclusive_lock);
124 mmap_fork_start();
125 }
126
127 void fork_end(int child)
128 {
129 mmap_fork_end(child);
130 if (child) {
131 /* Child processes created by fork() only have a single thread.
132 Discard information about the parent threads. */
133 first_cpu = thread_env;
134 thread_env->next_cpu = NULL;
135 pending_cpus = 0;
136 pthread_mutex_init(&exclusive_lock, NULL);
137 pthread_mutex_init(&cpu_list_mutex, NULL);
138 pthread_cond_init(&exclusive_cond, NULL);
139 pthread_cond_init(&exclusive_resume, NULL);
140 pthread_mutex_init(&tb_lock, NULL);
141 gdbserver_fork(thread_env);
142 } else {
143 pthread_mutex_unlock(&exclusive_lock);
144 pthread_mutex_unlock(&tb_lock);
145 }
146 }
147
148 /* Wait for pending exclusive operations to complete. The exclusive lock
149 must be held. */
150 static inline void exclusive_idle(void)
151 {
152 while (pending_cpus) {
153 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
154 }
155 }
156
157 /* Start an exclusive operation.
158 Must only be called from outside cpu_arm_exec. */
159 static inline void start_exclusive(void)
160 {
161 CPUArchState *other;
162 pthread_mutex_lock(&exclusive_lock);
163 exclusive_idle();
164
165 pending_cpus = 1;
166 /* Make all other cpus stop executing. */
167 for (other = first_cpu; other; other = other->next_cpu) {
168 if (other->running) {
169 pending_cpus++;
170 cpu_exit(other);
171 }
172 }
173 if (pending_cpus > 1) {
174 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
175 }
176 }
177
178 /* Finish an exclusive operation. */
179 static inline void end_exclusive(void)
180 {
181 pending_cpus = 0;
182 pthread_cond_broadcast(&exclusive_resume);
183 pthread_mutex_unlock(&exclusive_lock);
184 }
185
186 /* Wait for exclusive ops to finish, and begin cpu execution. */
187 static inline void cpu_exec_start(CPUArchState *env)
188 {
189 pthread_mutex_lock(&exclusive_lock);
190 exclusive_idle();
191 env->running = 1;
192 pthread_mutex_unlock(&exclusive_lock);
193 }
194
195 /* Mark cpu as not executing, and release pending exclusive ops. */
196 static inline void cpu_exec_end(CPUArchState *env)
197 {
198 pthread_mutex_lock(&exclusive_lock);
199 env->running = 0;
200 if (pending_cpus > 1) {
201 pending_cpus--;
202 if (pending_cpus == 1) {
203 pthread_cond_signal(&exclusive_cond);
204 }
205 }
206 exclusive_idle();
207 pthread_mutex_unlock(&exclusive_lock);
208 }
209
210 void cpu_list_lock(void)
211 {
212 pthread_mutex_lock(&cpu_list_mutex);
213 }
214
215 void cpu_list_unlock(void)
216 {
217 pthread_mutex_unlock(&cpu_list_mutex);
218 }
219 #else /* if !CONFIG_USE_NPTL */
220 /* These are no-ops because we are not threadsafe. */
221 static inline void cpu_exec_start(CPUArchState *env)
222 {
223 }
224
225 static inline void cpu_exec_end(CPUArchState *env)
226 {
227 }
228
229 static inline void start_exclusive(void)
230 {
231 }
232
233 static inline void end_exclusive(void)
234 {
235 }
236
237 void fork_start(void)
238 {
239 }
240
241 void fork_end(int child)
242 {
243 if (child) {
244 gdbserver_fork(thread_env);
245 }
246 }
247
248 void cpu_list_lock(void)
249 {
250 }
251
252 void cpu_list_unlock(void)
253 {
254 }
255 #endif
256
257
258 #ifdef TARGET_I386
259 /***********************************************************/
260 /* CPUX86 core interface */
261
262 void cpu_smm_update(CPUX86State *env)
263 {
264 }
265
266 uint64_t cpu_get_tsc(CPUX86State *env)
267 {
268 return cpu_get_real_ticks();
269 }
270
271 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
272 int flags)
273 {
274 unsigned int e1, e2;
275 uint32_t *p;
276 e1 = (addr << 16) | (limit & 0xffff);
277 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
278 e2 |= flags;
279 p = ptr;
280 p[0] = tswap32(e1);
281 p[1] = tswap32(e2);
282 }
283
284 static uint64_t *idt_table;
285 #ifdef TARGET_X86_64
286 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
287 uint64_t addr, unsigned int sel)
288 {
289 uint32_t *p, e1, e2;
290 e1 = (addr & 0xffff) | (sel << 16);
291 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
292 p = ptr;
293 p[0] = tswap32(e1);
294 p[1] = tswap32(e2);
295 p[2] = tswap32(addr >> 32);
296 p[3] = 0;
297 }
298 /* only dpl matters as we do only user space emulation */
299 static void set_idt(int n, unsigned int dpl)
300 {
301 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
302 }
303 #else
304 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
305 uint32_t addr, unsigned int sel)
306 {
307 uint32_t *p, e1, e2;
308 e1 = (addr & 0xffff) | (sel << 16);
309 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
310 p = ptr;
311 p[0] = tswap32(e1);
312 p[1] = tswap32(e2);
313 }
314
315 /* only dpl matters as we do only user space emulation */
316 static void set_idt(int n, unsigned int dpl)
317 {
318 set_gate(idt_table + n, 0, dpl, 0, 0);
319 }
320 #endif
321
322 void cpu_loop(CPUX86State *env)
323 {
324 int trapnr;
325 abi_ulong pc;
326 target_siginfo_t info;
327
328 for(;;) {
329 trapnr = cpu_x86_exec(env);
330 switch(trapnr) {
331 case 0x80:
332 /* linux syscall from int $0x80 */
333 env->regs[R_EAX] = do_syscall(env,
334 env->regs[R_EAX],
335 env->regs[R_EBX],
336 env->regs[R_ECX],
337 env->regs[R_EDX],
338 env->regs[R_ESI],
339 env->regs[R_EDI],
340 env->regs[R_EBP],
341 0, 0);
342 break;
343 #ifndef TARGET_ABI32
344 case EXCP_SYSCALL:
345 /* linux syscall from syscall instruction */
346 env->regs[R_EAX] = do_syscall(env,
347 env->regs[R_EAX],
348 env->regs[R_EDI],
349 env->regs[R_ESI],
350 env->regs[R_EDX],
351 env->regs[10],
352 env->regs[8],
353 env->regs[9],
354 0, 0);
355 env->eip = env->exception_next_eip;
356 break;
357 #endif
358 case EXCP0B_NOSEG:
359 case EXCP0C_STACK:
360 info.si_signo = SIGBUS;
361 info.si_errno = 0;
362 info.si_code = TARGET_SI_KERNEL;
363 info._sifields._sigfault._addr = 0;
364 queue_signal(env, info.si_signo, &info);
365 break;
366 case EXCP0D_GPF:
367 /* XXX: potential problem if ABI32 */
368 #ifndef TARGET_X86_64
369 if (env->eflags & VM_MASK) {
370 handle_vm86_fault(env);
371 } else
372 #endif
373 {
374 info.si_signo = SIGSEGV;
375 info.si_errno = 0;
376 info.si_code = TARGET_SI_KERNEL;
377 info._sifields._sigfault._addr = 0;
378 queue_signal(env, info.si_signo, &info);
379 }
380 break;
381 case EXCP0E_PAGE:
382 info.si_signo = SIGSEGV;
383 info.si_errno = 0;
384 if (!(env->error_code & 1))
385 info.si_code = TARGET_SEGV_MAPERR;
386 else
387 info.si_code = TARGET_SEGV_ACCERR;
388 info._sifields._sigfault._addr = env->cr[2];
389 queue_signal(env, info.si_signo, &info);
390 break;
391 case EXCP00_DIVZ:
392 #ifndef TARGET_X86_64
393 if (env->eflags & VM_MASK) {
394 handle_vm86_trap(env, trapnr);
395 } else
396 #endif
397 {
398 /* division by zero */
399 info.si_signo = SIGFPE;
400 info.si_errno = 0;
401 info.si_code = TARGET_FPE_INTDIV;
402 info._sifields._sigfault._addr = env->eip;
403 queue_signal(env, info.si_signo, &info);
404 }
405 break;
406 case EXCP01_DB:
407 case EXCP03_INT3:
408 #ifndef TARGET_X86_64
409 if (env->eflags & VM_MASK) {
410 handle_vm86_trap(env, trapnr);
411 } else
412 #endif
413 {
414 info.si_signo = SIGTRAP;
415 info.si_errno = 0;
416 if (trapnr == EXCP01_DB) {
417 info.si_code = TARGET_TRAP_BRKPT;
418 info._sifields._sigfault._addr = env->eip;
419 } else {
420 info.si_code = TARGET_SI_KERNEL;
421 info._sifields._sigfault._addr = 0;
422 }
423 queue_signal(env, info.si_signo, &info);
424 }
425 break;
426 case EXCP04_INTO:
427 case EXCP05_BOUND:
428 #ifndef TARGET_X86_64
429 if (env->eflags & VM_MASK) {
430 handle_vm86_trap(env, trapnr);
431 } else
432 #endif
433 {
434 info.si_signo = SIGSEGV;
435 info.si_errno = 0;
436 info.si_code = TARGET_SI_KERNEL;
437 info._sifields._sigfault._addr = 0;
438 queue_signal(env, info.si_signo, &info);
439 }
440 break;
441 case EXCP06_ILLOP:
442 info.si_signo = SIGILL;
443 info.si_errno = 0;
444 info.si_code = TARGET_ILL_ILLOPN;
445 info._sifields._sigfault._addr = env->eip;
446 queue_signal(env, info.si_signo, &info);
447 break;
448 case EXCP_INTERRUPT:
449 /* just indicate that signals should be handled asap */
450 break;
451 case EXCP_DEBUG:
452 {
453 int sig;
454
455 sig = gdb_handlesig (env, TARGET_SIGTRAP);
456 if (sig)
457 {
458 info.si_signo = sig;
459 info.si_errno = 0;
460 info.si_code = TARGET_TRAP_BRKPT;
461 queue_signal(env, info.si_signo, &info);
462 }
463 }
464 break;
465 default:
466 pc = env->segs[R_CS].base + env->eip;
467 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
468 (long)pc, trapnr);
469 abort();
470 }
471 process_pending_signals(env);
472 }
473 }
474 #endif
475
476 #ifdef TARGET_ARM
477
478 #define get_user_code_u32(x, gaddr, doswap) \
479 ({ abi_long __r = get_user_u32((x), (gaddr)); \
480 if (!__r && (doswap)) { \
481 (x) = bswap32(x); \
482 } \
483 __r; \
484 })
485
486 #define get_user_code_u16(x, gaddr, doswap) \
487 ({ abi_long __r = get_user_u16((x), (gaddr)); \
488 if (!__r && (doswap)) { \
489 (x) = bswap16(x); \
490 } \
491 __r; \
492 })
493
494 /*
495 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
496 * Input:
497 * r0 = pointer to oldval
498 * r1 = pointer to newval
499 * r2 = pointer to target value
500 *
501 * Output:
502 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
503 * C set if *ptr was changed, clear if no exchange happened
504 *
505 * Note segv's in kernel helpers are a bit tricky, we can set the
506 * data address sensibly but the PC address is just the entry point.
507 */
508 static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
509 {
510 uint64_t oldval, newval, val;
511 uint32_t addr, cpsr;
512 target_siginfo_t info;
513
514 /* Based on the 32 bit code in do_kernel_trap */
515
516 /* XXX: This only works between threads, not between processes.
517 It's probably possible to implement this with native host
518 operations. However things like ldrex/strex are much harder so
519 there's not much point trying. */
520 start_exclusive();
521 cpsr = cpsr_read(env);
522 addr = env->regs[2];
523
524 if (get_user_u64(oldval, env->regs[0])) {
525 env->cp15.c6_data = env->regs[0];
526 goto segv;
527 };
528
529 if (get_user_u64(newval, env->regs[1])) {
530 env->cp15.c6_data = env->regs[1];
531 goto segv;
532 };
533
534 if (get_user_u64(val, addr)) {
535 env->cp15.c6_data = addr;
536 goto segv;
537 }
538
539 if (val == oldval) {
540 val = newval;
541
542 if (put_user_u64(val, addr)) {
543 env->cp15.c6_data = addr;
544 goto segv;
545 };
546
547 env->regs[0] = 0;
548 cpsr |= CPSR_C;
549 } else {
550 env->regs[0] = -1;
551 cpsr &= ~CPSR_C;
552 }
553 cpsr_write(env, cpsr, CPSR_C);
554 end_exclusive();
555 return;
556
557 segv:
558 end_exclusive();
559 /* We get the PC of the entry address - which is as good as anything,
560 on a real kernel what you get depends on which mode it uses. */
561 info.si_signo = SIGSEGV;
562 info.si_errno = 0;
563 /* XXX: check env->error_code */
564 info.si_code = TARGET_SEGV_MAPERR;
565 info._sifields._sigfault._addr = env->cp15.c6_data;
566 queue_signal(env, info.si_signo, &info);
567
568 end_exclusive();
569 }
570
571 /* Handle a jump to the kernel code page. */
572 static int
573 do_kernel_trap(CPUARMState *env)
574 {
575 uint32_t addr;
576 uint32_t cpsr;
577 uint32_t val;
578
579 switch (env->regs[15]) {
580 case 0xffff0fa0: /* __kernel_memory_barrier */
581 /* ??? No-op. Will need to do better for SMP. */
582 break;
583 case 0xffff0fc0: /* __kernel_cmpxchg */
584 /* XXX: This only works between threads, not between processes.
585 It's probably possible to implement this with native host
586 operations. However things like ldrex/strex are much harder so
587 there's not much point trying. */
588 start_exclusive();
589 cpsr = cpsr_read(env);
590 addr = env->regs[2];
591 /* FIXME: This should SEGV if the access fails. */
592 if (get_user_u32(val, addr))
593 val = ~env->regs[0];
594 if (val == env->regs[0]) {
595 val = env->regs[1];
596 /* FIXME: Check for segfaults. */
597 put_user_u32(val, addr);
598 env->regs[0] = 0;
599 cpsr |= CPSR_C;
600 } else {
601 env->regs[0] = -1;
602 cpsr &= ~CPSR_C;
603 }
604 cpsr_write(env, cpsr, CPSR_C);
605 end_exclusive();
606 break;
607 case 0xffff0fe0: /* __kernel_get_tls */
608 env->regs[0] = env->cp15.c13_tls2;
609 break;
610 case 0xffff0f60: /* __kernel_cmpxchg64 */
611 arm_kernel_cmpxchg64_helper(env);
612 break;
613
614 default:
615 return 1;
616 }
617 /* Jump back to the caller. */
618 addr = env->regs[14];
619 if (addr & 1) {
620 env->thumb = 1;
621 addr &= ~1;
622 }
623 env->regs[15] = addr;
624
625 return 0;
626 }
627
628 static int do_strex(CPUARMState *env)
629 {
630 uint32_t val;
631 int size;
632 int rc = 1;
633 int segv = 0;
634 uint32_t addr;
635 start_exclusive();
636 addr = env->exclusive_addr;
637 if (addr != env->exclusive_test) {
638 goto fail;
639 }
640 size = env->exclusive_info & 0xf;
641 switch (size) {
642 case 0:
643 segv = get_user_u8(val, addr);
644 break;
645 case 1:
646 segv = get_user_u16(val, addr);
647 break;
648 case 2:
649 case 3:
650 segv = get_user_u32(val, addr);
651 break;
652 default:
653 abort();
654 }
655 if (segv) {
656 env->cp15.c6_data = addr;
657 goto done;
658 }
659 if (val != env->exclusive_val) {
660 goto fail;
661 }
662 if (size == 3) {
663 segv = get_user_u32(val, addr + 4);
664 if (segv) {
665 env->cp15.c6_data = addr + 4;
666 goto done;
667 }
668 if (val != env->exclusive_high) {
669 goto fail;
670 }
671 }
672 val = env->regs[(env->exclusive_info >> 8) & 0xf];
673 switch (size) {
674 case 0:
675 segv = put_user_u8(val, addr);
676 break;
677 case 1:
678 segv = put_user_u16(val, addr);
679 break;
680 case 2:
681 case 3:
682 segv = put_user_u32(val, addr);
683 break;
684 }
685 if (segv) {
686 env->cp15.c6_data = addr;
687 goto done;
688 }
689 if (size == 3) {
690 val = env->regs[(env->exclusive_info >> 12) & 0xf];
691 segv = put_user_u32(val, addr + 4);
692 if (segv) {
693 env->cp15.c6_data = addr + 4;
694 goto done;
695 }
696 }
697 rc = 0;
698 fail:
699 env->regs[15] += 4;
700 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
701 done:
702 end_exclusive();
703 return segv;
704 }
705
706 void cpu_loop(CPUARMState *env)
707 {
708 int trapnr;
709 unsigned int n, insn;
710 target_siginfo_t info;
711 uint32_t addr;
712
713 for(;;) {
714 cpu_exec_start(env);
715 trapnr = cpu_arm_exec(env);
716 cpu_exec_end(env);
717 switch(trapnr) {
718 case EXCP_UDEF:
719 {
720 TaskState *ts = env->opaque;
721 uint32_t opcode;
722 int rc;
723
724 /* we handle the FPU emulation here, as Linux */
725 /* we get the opcode */
726 /* FIXME - what to do if get_user() fails? */
727 get_user_code_u32(opcode, env->regs[15], env->bswap_code);
728
729 rc = EmulateAll(opcode, &ts->fpa, env);
730 if (rc == 0) { /* illegal instruction */
731 info.si_signo = SIGILL;
732 info.si_errno = 0;
733 info.si_code = TARGET_ILL_ILLOPN;
734 info._sifields._sigfault._addr = env->regs[15];
735 queue_signal(env, info.si_signo, &info);
736 } else if (rc < 0) { /* FP exception */
737 int arm_fpe=0;
738
739 /* translate softfloat flags to FPSR flags */
740 if (-rc & float_flag_invalid)
741 arm_fpe |= BIT_IOC;
742 if (-rc & float_flag_divbyzero)
743 arm_fpe |= BIT_DZC;
744 if (-rc & float_flag_overflow)
745 arm_fpe |= BIT_OFC;
746 if (-rc & float_flag_underflow)
747 arm_fpe |= BIT_UFC;
748 if (-rc & float_flag_inexact)
749 arm_fpe |= BIT_IXC;
750
751 FPSR fpsr = ts->fpa.fpsr;
752 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
753
754 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
755 info.si_signo = SIGFPE;
756 info.si_errno = 0;
757
758 /* ordered by priority, least first */
759 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
760 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
761 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
762 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
763 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
764
765 info._sifields._sigfault._addr = env->regs[15];
766 queue_signal(env, info.si_signo, &info);
767 } else {
768 env->regs[15] += 4;
769 }
770
771 /* accumulate unenabled exceptions */
772 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
773 fpsr |= BIT_IXC;
774 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
775 fpsr |= BIT_UFC;
776 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
777 fpsr |= BIT_OFC;
778 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
779 fpsr |= BIT_DZC;
780 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
781 fpsr |= BIT_IOC;
782 ts->fpa.fpsr=fpsr;
783 } else { /* everything OK */
784 /* increment PC */
785 env->regs[15] += 4;
786 }
787 }
788 break;
789 case EXCP_SWI:
790 case EXCP_BKPT:
791 {
792 env->eabi = 1;
793 /* system call */
794 if (trapnr == EXCP_BKPT) {
795 if (env->thumb) {
796 /* FIXME - what to do if get_user() fails? */
797 get_user_code_u16(insn, env->regs[15], env->bswap_code);
798 n = insn & 0xff;
799 env->regs[15] += 2;
800 } else {
801 /* FIXME - what to do if get_user() fails? */
802 get_user_code_u32(insn, env->regs[15], env->bswap_code);
803 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
804 env->regs[15] += 4;
805 }
806 } else {
807 if (env->thumb) {
808 /* FIXME - what to do if get_user() fails? */
809 get_user_code_u16(insn, env->regs[15] - 2,
810 env->bswap_code);
811 n = insn & 0xff;
812 } else {
813 /* FIXME - what to do if get_user() fails? */
814 get_user_code_u32(insn, env->regs[15] - 4,
815 env->bswap_code);
816 n = insn & 0xffffff;
817 }
818 }
819
820 if (n == ARM_NR_cacheflush) {
821 /* nop */
822 } else if (n == ARM_NR_semihosting
823 || n == ARM_NR_thumb_semihosting) {
824 env->regs[0] = do_arm_semihosting (env);
825 } else if (n == 0 || n >= ARM_SYSCALL_BASE
826 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
827 /* linux syscall */
828 if (env->thumb || n == 0) {
829 n = env->regs[7];
830 } else {
831 n -= ARM_SYSCALL_BASE;
832 env->eabi = 0;
833 }
834 if ( n > ARM_NR_BASE) {
835 switch (n) {
836 case ARM_NR_cacheflush:
837 /* nop */
838 break;
839 case ARM_NR_set_tls:
840 cpu_set_tls(env, env->regs[0]);
841 env->regs[0] = 0;
842 break;
843 default:
844 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
845 n);
846 env->regs[0] = -TARGET_ENOSYS;
847 break;
848 }
849 } else {
850 env->regs[0] = do_syscall(env,
851 n,
852 env->regs[0],
853 env->regs[1],
854 env->regs[2],
855 env->regs[3],
856 env->regs[4],
857 env->regs[5],
858 0, 0);
859 }
860 } else {
861 goto error;
862 }
863 }
864 break;
865 case EXCP_INTERRUPT:
866 /* just indicate that signals should be handled asap */
867 break;
868 case EXCP_PREFETCH_ABORT:
869 addr = env->cp15.c6_insn;
870 goto do_segv;
871 case EXCP_DATA_ABORT:
872 addr = env->cp15.c6_data;
873 do_segv:
874 {
875 info.si_signo = SIGSEGV;
876 info.si_errno = 0;
877 /* XXX: check env->error_code */
878 info.si_code = TARGET_SEGV_MAPERR;
879 info._sifields._sigfault._addr = addr;
880 queue_signal(env, info.si_signo, &info);
881 }
882 break;
883 case EXCP_DEBUG:
884 {
885 int sig;
886
887 sig = gdb_handlesig (env, TARGET_SIGTRAP);
888 if (sig)
889 {
890 info.si_signo = sig;
891 info.si_errno = 0;
892 info.si_code = TARGET_TRAP_BRKPT;
893 queue_signal(env, info.si_signo, &info);
894 }
895 }
896 break;
897 case EXCP_KERNEL_TRAP:
898 if (do_kernel_trap(env))
899 goto error;
900 break;
901 case EXCP_STREX:
902 if (do_strex(env)) {
903 addr = env->cp15.c6_data;
904 goto do_segv;
905 }
906 break;
907 default:
908 error:
909 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
910 trapnr);
911 cpu_dump_state(env, stderr, fprintf, 0);
912 abort();
913 }
914 process_pending_signals(env);
915 }
916 }
917
918 #endif
919
920 #ifdef TARGET_UNICORE32
921
922 void cpu_loop(CPUUniCore32State *env)
923 {
924 int trapnr;
925 unsigned int n, insn;
926 target_siginfo_t info;
927
928 for (;;) {
929 cpu_exec_start(env);
930 trapnr = uc32_cpu_exec(env);
931 cpu_exec_end(env);
932 switch (trapnr) {
933 case UC32_EXCP_PRIV:
934 {
935 /* system call */
936 get_user_u32(insn, env->regs[31] - 4);
937 n = insn & 0xffffff;
938
939 if (n >= UC32_SYSCALL_BASE) {
940 /* linux syscall */
941 n -= UC32_SYSCALL_BASE;
942 if (n == UC32_SYSCALL_NR_set_tls) {
943 cpu_set_tls(env, env->regs[0]);
944 env->regs[0] = 0;
945 } else {
946 env->regs[0] = do_syscall(env,
947 n,
948 env->regs[0],
949 env->regs[1],
950 env->regs[2],
951 env->regs[3],
952 env->regs[4],
953 env->regs[5],
954 0, 0);
955 }
956 } else {
957 goto error;
958 }
959 }
960 break;
961 case UC32_EXCP_TRAP:
962 info.si_signo = SIGSEGV;
963 info.si_errno = 0;
964 /* XXX: check env->error_code */
965 info.si_code = TARGET_SEGV_MAPERR;
966 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
967 queue_signal(env, info.si_signo, &info);
968 break;
969 case EXCP_INTERRUPT:
970 /* just indicate that signals should be handled asap */
971 break;
972 case EXCP_DEBUG:
973 {
974 int sig;
975
976 sig = gdb_handlesig(env, TARGET_SIGTRAP);
977 if (sig) {
978 info.si_signo = sig;
979 info.si_errno = 0;
980 info.si_code = TARGET_TRAP_BRKPT;
981 queue_signal(env, info.si_signo, &info);
982 }
983 }
984 break;
985 default:
986 goto error;
987 }
988 process_pending_signals(env);
989 }
990
991 error:
992 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
993 cpu_dump_state(env, stderr, fprintf, 0);
994 abort();
995 }
996 #endif
997
998 #ifdef TARGET_SPARC
999 #define SPARC64_STACK_BIAS 2047
1000
1001 //#define DEBUG_WIN
1002
1003 /* WARNING: dealing with register windows _is_ complicated. More info
1004 can be found at http://www.sics.se/~psm/sparcstack.html */
1005 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
1006 {
1007 index = (index + cwp * 16) % (16 * env->nwindows);
1008 /* wrap handling : if cwp is on the last window, then we use the
1009 registers 'after' the end */
1010 if (index < 8 && env->cwp == env->nwindows - 1)
1011 index += 16 * env->nwindows;
1012 return index;
1013 }
1014
1015 /* save the register window 'cwp1' */
1016 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
1017 {
1018 unsigned int i;
1019 abi_ulong sp_ptr;
1020
1021 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1022 #ifdef TARGET_SPARC64
1023 if (sp_ptr & 3)
1024 sp_ptr += SPARC64_STACK_BIAS;
1025 #endif
1026 #if defined(DEBUG_WIN)
1027 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
1028 sp_ptr, cwp1);
1029 #endif
1030 for(i = 0; i < 16; i++) {
1031 /* FIXME - what to do if put_user() fails? */
1032 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1033 sp_ptr += sizeof(abi_ulong);
1034 }
1035 }
1036
1037 static void save_window(CPUSPARCState *env)
1038 {
1039 #ifndef TARGET_SPARC64
1040 unsigned int new_wim;
1041 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
1042 ((1LL << env->nwindows) - 1);
1043 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1044 env->wim = new_wim;
1045 #else
1046 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1047 env->cansave++;
1048 env->canrestore--;
1049 #endif
1050 }
1051
1052 static void restore_window(CPUSPARCState *env)
1053 {
1054 #ifndef TARGET_SPARC64
1055 unsigned int new_wim;
1056 #endif
1057 unsigned int i, cwp1;
1058 abi_ulong sp_ptr;
1059
1060 #ifndef TARGET_SPARC64
1061 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1062 ((1LL << env->nwindows) - 1);
1063 #endif
1064
1065 /* restore the invalid window */
1066 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1067 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1068 #ifdef TARGET_SPARC64
1069 if (sp_ptr & 3)
1070 sp_ptr += SPARC64_STACK_BIAS;
1071 #endif
1072 #if defined(DEBUG_WIN)
1073 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1074 sp_ptr, cwp1);
1075 #endif
1076 for(i = 0; i < 16; i++) {
1077 /* FIXME - what to do if get_user() fails? */
1078 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1079 sp_ptr += sizeof(abi_ulong);
1080 }
1081 #ifdef TARGET_SPARC64
1082 env->canrestore++;
1083 if (env->cleanwin < env->nwindows - 1)
1084 env->cleanwin++;
1085 env->cansave--;
1086 #else
1087 env->wim = new_wim;
1088 #endif
1089 }
1090
1091 static void flush_windows(CPUSPARCState *env)
1092 {
1093 int offset, cwp1;
1094
1095 offset = 1;
1096 for(;;) {
1097 /* if restore would invoke restore_window(), then we can stop */
1098 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
1099 #ifndef TARGET_SPARC64
1100 if (env->wim & (1 << cwp1))
1101 break;
1102 #else
1103 if (env->canrestore == 0)
1104 break;
1105 env->cansave++;
1106 env->canrestore--;
1107 #endif
1108 save_window_offset(env, cwp1);
1109 offset++;
1110 }
1111 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1112 #ifndef TARGET_SPARC64
1113 /* set wim so that restore will reload the registers */
1114 env->wim = 1 << cwp1;
1115 #endif
1116 #if defined(DEBUG_WIN)
1117 printf("flush_windows: nb=%d\n", offset - 1);
1118 #endif
1119 }
1120
1121 void cpu_loop (CPUSPARCState *env)
1122 {
1123 int trapnr;
1124 abi_long ret;
1125 target_siginfo_t info;
1126
1127 while (1) {
1128 trapnr = cpu_sparc_exec (env);
1129
1130 switch (trapnr) {
1131 #ifndef TARGET_SPARC64
1132 case 0x88:
1133 case 0x90:
1134 #else
1135 case 0x110:
1136 case 0x16d:
1137 #endif
1138 ret = do_syscall (env, env->gregs[1],
1139 env->regwptr[0], env->regwptr[1],
1140 env->regwptr[2], env->regwptr[3],
1141 env->regwptr[4], env->regwptr[5],
1142 0, 0);
1143 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
1144 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1145 env->xcc |= PSR_CARRY;
1146 #else
1147 env->psr |= PSR_CARRY;
1148 #endif
1149 ret = -ret;
1150 } else {
1151 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1152 env->xcc &= ~PSR_CARRY;
1153 #else
1154 env->psr &= ~PSR_CARRY;
1155 #endif
1156 }
1157 env->regwptr[0] = ret;
1158 /* next instruction */
1159 env->pc = env->npc;
1160 env->npc = env->npc + 4;
1161 break;
1162 case 0x83: /* flush windows */
1163 #ifdef TARGET_ABI32
1164 case 0x103:
1165 #endif
1166 flush_windows(env);
1167 /* next instruction */
1168 env->pc = env->npc;
1169 env->npc = env->npc + 4;
1170 break;
1171 #ifndef TARGET_SPARC64
1172 case TT_WIN_OVF: /* window overflow */
1173 save_window(env);
1174 break;
1175 case TT_WIN_UNF: /* window underflow */
1176 restore_window(env);
1177 break;
1178 case TT_TFAULT:
1179 case TT_DFAULT:
1180 {
1181 info.si_signo = TARGET_SIGSEGV;
1182 info.si_errno = 0;
1183 /* XXX: check env->error_code */
1184 info.si_code = TARGET_SEGV_MAPERR;
1185 info._sifields._sigfault._addr = env->mmuregs[4];
1186 queue_signal(env, info.si_signo, &info);
1187 }
1188 break;
1189 #else
1190 case TT_SPILL: /* window overflow */
1191 save_window(env);
1192 break;
1193 case TT_FILL: /* window underflow */
1194 restore_window(env);
1195 break;
1196 case TT_TFAULT:
1197 case TT_DFAULT:
1198 {
1199 info.si_signo = TARGET_SIGSEGV;
1200 info.si_errno = 0;
1201 /* XXX: check env->error_code */
1202 info.si_code = TARGET_SEGV_MAPERR;
1203 if (trapnr == TT_DFAULT)
1204 info._sifields._sigfault._addr = env->dmmuregs[4];
1205 else
1206 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
1207 queue_signal(env, info.si_signo, &info);
1208 }
1209 break;
1210 #ifndef TARGET_ABI32
1211 case 0x16e:
1212 flush_windows(env);
1213 sparc64_get_context(env);
1214 break;
1215 case 0x16f:
1216 flush_windows(env);
1217 sparc64_set_context(env);
1218 break;
1219 #endif
1220 #endif
1221 case EXCP_INTERRUPT:
1222 /* just indicate that signals should be handled asap */
1223 break;
1224 case TT_ILL_INSN:
1225 {
1226 info.si_signo = TARGET_SIGILL;
1227 info.si_errno = 0;
1228 info.si_code = TARGET_ILL_ILLOPC;
1229 info._sifields._sigfault._addr = env->pc;
1230 queue_signal(env, info.si_signo, &info);
1231 }
1232 break;
1233 case EXCP_DEBUG:
1234 {
1235 int sig;
1236
1237 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1238 if (sig)
1239 {
1240 info.si_signo = sig;
1241 info.si_errno = 0;
1242 info.si_code = TARGET_TRAP_BRKPT;
1243 queue_signal(env, info.si_signo, &info);
1244 }
1245 }
1246 break;
1247 default:
1248 printf ("Unhandled trap: 0x%x\n", trapnr);
1249 cpu_dump_state(env, stderr, fprintf, 0);
1250 exit (1);
1251 }
1252 process_pending_signals (env);
1253 }
1254 }
1255
1256 #endif
1257
1258 #ifdef TARGET_PPC
1259 static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
1260 {
1261 /* TO FIX */
1262 return 0;
1263 }
1264
1265 uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
1266 {
1267 return cpu_ppc_get_tb(env);
1268 }
1269
1270 uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
1271 {
1272 return cpu_ppc_get_tb(env) >> 32;
1273 }
1274
1275 uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
1276 {
1277 return cpu_ppc_get_tb(env);
1278 }
1279
1280 uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
1281 {
1282 return cpu_ppc_get_tb(env) >> 32;
1283 }
1284
1285 uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
1286 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1287
1288 uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
1289 {
1290 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1291 }
1292
1293 /* XXX: to be fixed */
1294 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
1295 {
1296 return -1;
1297 }
1298
1299 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
1300 {
1301 return -1;
1302 }
1303
1304 #define EXCP_DUMP(env, fmt, ...) \
1305 do { \
1306 fprintf(stderr, fmt , ## __VA_ARGS__); \
1307 cpu_dump_state(env, stderr, fprintf, 0); \
1308 qemu_log(fmt, ## __VA_ARGS__); \
1309 if (qemu_log_enabled()) { \
1310 log_cpu_state(env, 0); \
1311 } \
1312 } while (0)
1313
1314 static int do_store_exclusive(CPUPPCState *env)
1315 {
1316 target_ulong addr;
1317 target_ulong page_addr;
1318 target_ulong val;
1319 int flags;
1320 int segv = 0;
1321
1322 addr = env->reserve_ea;
1323 page_addr = addr & TARGET_PAGE_MASK;
1324 start_exclusive();
1325 mmap_lock();
1326 flags = page_get_flags(page_addr);
1327 if ((flags & PAGE_READ) == 0) {
1328 segv = 1;
1329 } else {
1330 int reg = env->reserve_info & 0x1f;
1331 int size = (env->reserve_info >> 5) & 0xf;
1332 int stored = 0;
1333
1334 if (addr == env->reserve_addr) {
1335 switch (size) {
1336 case 1: segv = get_user_u8(val, addr); break;
1337 case 2: segv = get_user_u16(val, addr); break;
1338 case 4: segv = get_user_u32(val, addr); break;
1339 #if defined(TARGET_PPC64)
1340 case 8: segv = get_user_u64(val, addr); break;
1341 #endif
1342 default: abort();
1343 }
1344 if (!segv && val == env->reserve_val) {
1345 val = env->gpr[reg];
1346 switch (size) {
1347 case 1: segv = put_user_u8(val, addr); break;
1348 case 2: segv = put_user_u16(val, addr); break;
1349 case 4: segv = put_user_u32(val, addr); break;
1350 #if defined(TARGET_PPC64)
1351 case 8: segv = put_user_u64(val, addr); break;
1352 #endif
1353 default: abort();
1354 }
1355 if (!segv) {
1356 stored = 1;
1357 }
1358 }
1359 }
1360 env->crf[0] = (stored << 1) | xer_so;
1361 env->reserve_addr = (target_ulong)-1;
1362 }
1363 if (!segv) {
1364 env->nip += 4;
1365 }
1366 mmap_unlock();
1367 end_exclusive();
1368 return segv;
1369 }
1370
1371 void cpu_loop(CPUPPCState *env)
1372 {
1373 target_siginfo_t info;
1374 int trapnr;
1375 target_ulong ret;
1376
1377 for(;;) {
1378 cpu_exec_start(env);
1379 trapnr = cpu_ppc_exec(env);
1380 cpu_exec_end(env);
1381 switch(trapnr) {
1382 case POWERPC_EXCP_NONE:
1383 /* Just go on */
1384 break;
1385 case POWERPC_EXCP_CRITICAL: /* Critical input */
1386 cpu_abort(env, "Critical interrupt while in user mode. "
1387 "Aborting\n");
1388 break;
1389 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1390 cpu_abort(env, "Machine check exception while in user mode. "
1391 "Aborting\n");
1392 break;
1393 case POWERPC_EXCP_DSI: /* Data storage exception */
1394 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
1395 env->spr[SPR_DAR]);
1396 /* XXX: check this. Seems bugged */
1397 switch (env->error_code & 0xFF000000) {
1398 case 0x40000000:
1399 info.si_signo = TARGET_SIGSEGV;
1400 info.si_errno = 0;
1401 info.si_code = TARGET_SEGV_MAPERR;
1402 break;
1403 case 0x04000000:
1404 info.si_signo = TARGET_SIGILL;
1405 info.si_errno = 0;
1406 info.si_code = TARGET_ILL_ILLADR;
1407 break;
1408 case 0x08000000:
1409 info.si_signo = TARGET_SIGSEGV;
1410 info.si_errno = 0;
1411 info.si_code = TARGET_SEGV_ACCERR;
1412 break;
1413 default:
1414 /* Let's send a regular segfault... */
1415 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1416 env->error_code);
1417 info.si_signo = TARGET_SIGSEGV;
1418 info.si_errno = 0;
1419 info.si_code = TARGET_SEGV_MAPERR;
1420 break;
1421 }
1422 info._sifields._sigfault._addr = env->nip;
1423 queue_signal(env, info.si_signo, &info);
1424 break;
1425 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1426 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1427 "\n", env->spr[SPR_SRR0]);
1428 /* XXX: check this */
1429 switch (env->error_code & 0xFF000000) {
1430 case 0x40000000:
1431 info.si_signo = TARGET_SIGSEGV;
1432 info.si_errno = 0;
1433 info.si_code = TARGET_SEGV_MAPERR;
1434 break;
1435 case 0x10000000:
1436 case 0x08000000:
1437 info.si_signo = TARGET_SIGSEGV;
1438 info.si_errno = 0;
1439 info.si_code = TARGET_SEGV_ACCERR;
1440 break;
1441 default:
1442 /* Let's send a regular segfault... */
1443 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1444 env->error_code);
1445 info.si_signo = TARGET_SIGSEGV;
1446 info.si_errno = 0;
1447 info.si_code = TARGET_SEGV_MAPERR;
1448 break;
1449 }
1450 info._sifields._sigfault._addr = env->nip - 4;
1451 queue_signal(env, info.si_signo, &info);
1452 break;
1453 case POWERPC_EXCP_EXTERNAL: /* External input */
1454 cpu_abort(env, "External interrupt while in user mode. "
1455 "Aborting\n");
1456 break;
1457 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1458 EXCP_DUMP(env, "Unaligned memory access\n");
1459 /* XXX: check this */
1460 info.si_signo = TARGET_SIGBUS;
1461 info.si_errno = 0;
1462 info.si_code = TARGET_BUS_ADRALN;
1463 info._sifields._sigfault._addr = env->nip - 4;
1464 queue_signal(env, info.si_signo, &info);
1465 break;
1466 case POWERPC_EXCP_PROGRAM: /* Program exception */
1467 /* XXX: check this */
1468 switch (env->error_code & ~0xF) {
1469 case POWERPC_EXCP_FP:
1470 EXCP_DUMP(env, "Floating point program exception\n");
1471 info.si_signo = TARGET_SIGFPE;
1472 info.si_errno = 0;
1473 switch (env->error_code & 0xF) {
1474 case POWERPC_EXCP_FP_OX:
1475 info.si_code = TARGET_FPE_FLTOVF;
1476 break;
1477 case POWERPC_EXCP_FP_UX:
1478 info.si_code = TARGET_FPE_FLTUND;
1479 break;
1480 case POWERPC_EXCP_FP_ZX:
1481 case POWERPC_EXCP_FP_VXZDZ:
1482 info.si_code = TARGET_FPE_FLTDIV;
1483 break;
1484 case POWERPC_EXCP_FP_XX:
1485 info.si_code = TARGET_FPE_FLTRES;
1486 break;
1487 case POWERPC_EXCP_FP_VXSOFT:
1488 info.si_code = TARGET_FPE_FLTINV;
1489 break;
1490 case POWERPC_EXCP_FP_VXSNAN:
1491 case POWERPC_EXCP_FP_VXISI:
1492 case POWERPC_EXCP_FP_VXIDI:
1493 case POWERPC_EXCP_FP_VXIMZ:
1494 case POWERPC_EXCP_FP_VXVC:
1495 case POWERPC_EXCP_FP_VXSQRT:
1496 case POWERPC_EXCP_FP_VXCVI:
1497 info.si_code = TARGET_FPE_FLTSUB;
1498 break;
1499 default:
1500 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1501 env->error_code);
1502 break;
1503 }
1504 break;
1505 case POWERPC_EXCP_INVAL:
1506 EXCP_DUMP(env, "Invalid instruction\n");
1507 info.si_signo = TARGET_SIGILL;
1508 info.si_errno = 0;
1509 switch (env->error_code & 0xF) {
1510 case POWERPC_EXCP_INVAL_INVAL:
1511 info.si_code = TARGET_ILL_ILLOPC;
1512 break;
1513 case POWERPC_EXCP_INVAL_LSWX:
1514 info.si_code = TARGET_ILL_ILLOPN;
1515 break;
1516 case POWERPC_EXCP_INVAL_SPR:
1517 info.si_code = TARGET_ILL_PRVREG;
1518 break;
1519 case POWERPC_EXCP_INVAL_FP:
1520 info.si_code = TARGET_ILL_COPROC;
1521 break;
1522 default:
1523 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1524 env->error_code & 0xF);
1525 info.si_code = TARGET_ILL_ILLADR;
1526 break;
1527 }
1528 break;
1529 case POWERPC_EXCP_PRIV:
1530 EXCP_DUMP(env, "Privilege violation\n");
1531 info.si_signo = TARGET_SIGILL;
1532 info.si_errno = 0;
1533 switch (env->error_code & 0xF) {
1534 case POWERPC_EXCP_PRIV_OPC:
1535 info.si_code = TARGET_ILL_PRVOPC;
1536 break;
1537 case POWERPC_EXCP_PRIV_REG:
1538 info.si_code = TARGET_ILL_PRVREG;
1539 break;
1540 default:
1541 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1542 env->error_code & 0xF);
1543 info.si_code = TARGET_ILL_PRVOPC;
1544 break;
1545 }
1546 break;
1547 case POWERPC_EXCP_TRAP:
1548 cpu_abort(env, "Tried to call a TRAP\n");
1549 break;
1550 default:
1551 /* Should not happen ! */
1552 cpu_abort(env, "Unknown program exception (%02x)\n",
1553 env->error_code);
1554 break;
1555 }
1556 info._sifields._sigfault._addr = env->nip - 4;
1557 queue_signal(env, info.si_signo, &info);
1558 break;
1559 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1560 EXCP_DUMP(env, "No floating point allowed\n");
1561 info.si_signo = TARGET_SIGILL;
1562 info.si_errno = 0;
1563 info.si_code = TARGET_ILL_COPROC;
1564 info._sifields._sigfault._addr = env->nip - 4;
1565 queue_signal(env, info.si_signo, &info);
1566 break;
1567 case POWERPC_EXCP_SYSCALL: /* System call exception */
1568 cpu_abort(env, "Syscall exception while in user mode. "
1569 "Aborting\n");
1570 break;
1571 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1572 EXCP_DUMP(env, "No APU instruction allowed\n");
1573 info.si_signo = TARGET_SIGILL;
1574 info.si_errno = 0;
1575 info.si_code = TARGET_ILL_COPROC;
1576 info._sifields._sigfault._addr = env->nip - 4;
1577 queue_signal(env, info.si_signo, &info);
1578 break;
1579 case POWERPC_EXCP_DECR: /* Decrementer exception */
1580 cpu_abort(env, "Decrementer interrupt while in user mode. "
1581 "Aborting\n");
1582 break;
1583 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1584 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1585 "Aborting\n");
1586 break;
1587 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1588 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1589 "Aborting\n");
1590 break;
1591 case POWERPC_EXCP_DTLB: /* Data TLB error */
1592 cpu_abort(env, "Data TLB exception while in user mode. "
1593 "Aborting\n");
1594 break;
1595 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1596 cpu_abort(env, "Instruction TLB exception while in user mode. "
1597 "Aborting\n");
1598 break;
1599 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1600 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1601 info.si_signo = TARGET_SIGILL;
1602 info.si_errno = 0;
1603 info.si_code = TARGET_ILL_COPROC;
1604 info._sifields._sigfault._addr = env->nip - 4;
1605 queue_signal(env, info.si_signo, &info);
1606 break;
1607 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1608 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1609 break;
1610 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1611 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1612 break;
1613 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1614 cpu_abort(env, "Performance monitor exception not handled\n");
1615 break;
1616 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1617 cpu_abort(env, "Doorbell interrupt while in user mode. "
1618 "Aborting\n");
1619 break;
1620 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1621 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1622 "Aborting\n");
1623 break;
1624 case POWERPC_EXCP_RESET: /* System reset exception */
1625 cpu_abort(env, "Reset interrupt while in user mode. "
1626 "Aborting\n");
1627 break;
1628 case POWERPC_EXCP_DSEG: /* Data segment exception */
1629 cpu_abort(env, "Data segment exception while in user mode. "
1630 "Aborting\n");
1631 break;
1632 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1633 cpu_abort(env, "Instruction segment exception "
1634 "while in user mode. Aborting\n");
1635 break;
1636 /* PowerPC 64 with hypervisor mode support */
1637 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1638 cpu_abort(env, "Hypervisor decrementer interrupt "
1639 "while in user mode. Aborting\n");
1640 break;
1641 case POWERPC_EXCP_TRACE: /* Trace exception */
1642 /* Nothing to do:
1643 * we use this exception to emulate step-by-step execution mode.
1644 */
1645 break;
1646 /* PowerPC 64 with hypervisor mode support */
1647 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1648 cpu_abort(env, "Hypervisor data storage exception "
1649 "while in user mode. Aborting\n");
1650 break;
1651 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1652 cpu_abort(env, "Hypervisor instruction storage exception "
1653 "while in user mode. Aborting\n");
1654 break;
1655 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1656 cpu_abort(env, "Hypervisor data segment exception "
1657 "while in user mode. Aborting\n");
1658 break;
1659 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1660 cpu_abort(env, "Hypervisor instruction segment exception "
1661 "while in user mode. Aborting\n");
1662 break;
1663 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1664 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1665 info.si_signo = TARGET_SIGILL;
1666 info.si_errno = 0;
1667 info.si_code = TARGET_ILL_COPROC;
1668 info._sifields._sigfault._addr = env->nip - 4;
1669 queue_signal(env, info.si_signo, &info);
1670 break;
1671 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1672 cpu_abort(env, "Programmable interval timer interrupt "
1673 "while in user mode. Aborting\n");
1674 break;
1675 case POWERPC_EXCP_IO: /* IO error exception */
1676 cpu_abort(env, "IO error exception while in user mode. "
1677 "Aborting\n");
1678 break;
1679 case POWERPC_EXCP_RUNM: /* Run mode exception */
1680 cpu_abort(env, "Run mode exception while in user mode. "
1681 "Aborting\n");
1682 break;
1683 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1684 cpu_abort(env, "Emulation trap exception not handled\n");
1685 break;
1686 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1687 cpu_abort(env, "Instruction fetch TLB exception "
1688 "while in user-mode. Aborting");
1689 break;
1690 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1691 cpu_abort(env, "Data load TLB exception while in user-mode. "
1692 "Aborting");
1693 break;
1694 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1695 cpu_abort(env, "Data store TLB exception while in user-mode. "
1696 "Aborting");
1697 break;
1698 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1699 cpu_abort(env, "Floating-point assist exception not handled\n");
1700 break;
1701 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1702 cpu_abort(env, "Instruction address breakpoint exception "
1703 "not handled\n");
1704 break;
1705 case POWERPC_EXCP_SMI: /* System management interrupt */
1706 cpu_abort(env, "System management interrupt while in user mode. "
1707 "Aborting\n");
1708 break;
1709 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1710 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1711 "Aborting\n");
1712 break;
1713 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1714 cpu_abort(env, "Performance monitor exception not handled\n");
1715 break;
1716 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1717 cpu_abort(env, "Vector assist exception not handled\n");
1718 break;
1719 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1720 cpu_abort(env, "Soft patch exception not handled\n");
1721 break;
1722 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1723 cpu_abort(env, "Maintenance exception while in user mode. "
1724 "Aborting\n");
1725 break;
1726 case POWERPC_EXCP_STOP: /* stop translation */
1727 /* We did invalidate the instruction cache. Go on */
1728 break;
1729 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1730 /* We just stopped because of a branch. Go on */
1731 break;
1732 case POWERPC_EXCP_SYSCALL_USER:
1733 /* system call in user-mode emulation */
1734 /* WARNING:
1735 * PPC ABI uses overflow flag in cr0 to signal an error
1736 * in syscalls.
1737 */
1738 env->crf[0] &= ~0x1;
1739 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1740 env->gpr[5], env->gpr[6], env->gpr[7],
1741 env->gpr[8], 0, 0);
1742 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
1743 /* Returning from a successful sigreturn syscall.
1744 Avoid corrupting register state. */
1745 break;
1746 }
1747 if (ret > (target_ulong)(-515)) {
1748 env->crf[0] |= 0x1;
1749 ret = -ret;
1750 }
1751 env->gpr[3] = ret;
1752 break;
1753 case POWERPC_EXCP_STCX:
1754 if (do_store_exclusive(env)) {
1755 info.si_signo = TARGET_SIGSEGV;
1756 info.si_errno = 0;
1757 info.si_code = TARGET_SEGV_MAPERR;
1758 info._sifields._sigfault._addr = env->nip;
1759 queue_signal(env, info.si_signo, &info);
1760 }
1761 break;
1762 case EXCP_DEBUG:
1763 {
1764 int sig;
1765
1766 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1767 if (sig) {
1768 info.si_signo = sig;
1769 info.si_errno = 0;
1770 info.si_code = TARGET_TRAP_BRKPT;
1771 queue_signal(env, info.si_signo, &info);
1772 }
1773 }
1774 break;
1775 case EXCP_INTERRUPT:
1776 /* just indicate that signals should be handled asap */
1777 break;
1778 default:
1779 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1780 break;
1781 }
1782 process_pending_signals(env);
1783 }
1784 }
1785 #endif
1786
1787 #ifdef TARGET_MIPS
1788
1789 #define MIPS_SYS(name, args) args,
1790
1791 static const uint8_t mips_syscall_args[] = {
1792 MIPS_SYS(sys_syscall , 8) /* 4000 */
1793 MIPS_SYS(sys_exit , 1)
1794 MIPS_SYS(sys_fork , 0)
1795 MIPS_SYS(sys_read , 3)
1796 MIPS_SYS(sys_write , 3)
1797 MIPS_SYS(sys_open , 3) /* 4005 */
1798 MIPS_SYS(sys_close , 1)
1799 MIPS_SYS(sys_waitpid , 3)
1800 MIPS_SYS(sys_creat , 2)
1801 MIPS_SYS(sys_link , 2)
1802 MIPS_SYS(sys_unlink , 1) /* 4010 */
1803 MIPS_SYS(sys_execve , 0)
1804 MIPS_SYS(sys_chdir , 1)
1805 MIPS_SYS(sys_time , 1)
1806 MIPS_SYS(sys_mknod , 3)
1807 MIPS_SYS(sys_chmod , 2) /* 4015 */
1808 MIPS_SYS(sys_lchown , 3)
1809 MIPS_SYS(sys_ni_syscall , 0)
1810 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1811 MIPS_SYS(sys_lseek , 3)
1812 MIPS_SYS(sys_getpid , 0) /* 4020 */
1813 MIPS_SYS(sys_mount , 5)
1814 MIPS_SYS(sys_oldumount , 1)
1815 MIPS_SYS(sys_setuid , 1)
1816 MIPS_SYS(sys_getuid , 0)
1817 MIPS_SYS(sys_stime , 1) /* 4025 */
1818 MIPS_SYS(sys_ptrace , 4)
1819 MIPS_SYS(sys_alarm , 1)
1820 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1821 MIPS_SYS(sys_pause , 0)
1822 MIPS_SYS(sys_utime , 2) /* 4030 */
1823 MIPS_SYS(sys_ni_syscall , 0)
1824 MIPS_SYS(sys_ni_syscall , 0)
1825 MIPS_SYS(sys_access , 2)
1826 MIPS_SYS(sys_nice , 1)
1827 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1828 MIPS_SYS(sys_sync , 0)
1829 MIPS_SYS(sys_kill , 2)
1830 MIPS_SYS(sys_rename , 2)
1831 MIPS_SYS(sys_mkdir , 2)
1832 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1833 MIPS_SYS(sys_dup , 1)
1834 MIPS_SYS(sys_pipe , 0)
1835 MIPS_SYS(sys_times , 1)
1836 MIPS_SYS(sys_ni_syscall , 0)
1837 MIPS_SYS(sys_brk , 1) /* 4045 */
1838 MIPS_SYS(sys_setgid , 1)
1839 MIPS_SYS(sys_getgid , 0)
1840 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1841 MIPS_SYS(sys_geteuid , 0)
1842 MIPS_SYS(sys_getegid , 0) /* 4050 */
1843 MIPS_SYS(sys_acct , 0)
1844 MIPS_SYS(sys_umount , 2)
1845 MIPS_SYS(sys_ni_syscall , 0)
1846 MIPS_SYS(sys_ioctl , 3)
1847 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1848 MIPS_SYS(sys_ni_syscall , 2)
1849 MIPS_SYS(sys_setpgid , 2)
1850 MIPS_SYS(sys_ni_syscall , 0)
1851 MIPS_SYS(sys_olduname , 1)
1852 MIPS_SYS(sys_umask , 1) /* 4060 */
1853 MIPS_SYS(sys_chroot , 1)
1854 MIPS_SYS(sys_ustat , 2)
1855 MIPS_SYS(sys_dup2 , 2)
1856 MIPS_SYS(sys_getppid , 0)
1857 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1858 MIPS_SYS(sys_setsid , 0)
1859 MIPS_SYS(sys_sigaction , 3)
1860 MIPS_SYS(sys_sgetmask , 0)
1861 MIPS_SYS(sys_ssetmask , 1)
1862 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1863 MIPS_SYS(sys_setregid , 2)
1864 MIPS_SYS(sys_sigsuspend , 0)
1865 MIPS_SYS(sys_sigpending , 1)
1866 MIPS_SYS(sys_sethostname , 2)
1867 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1868 MIPS_SYS(sys_getrlimit , 2)
1869 MIPS_SYS(sys_getrusage , 2)
1870 MIPS_SYS(sys_gettimeofday, 2)
1871 MIPS_SYS(sys_settimeofday, 2)
1872 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1873 MIPS_SYS(sys_setgroups , 2)
1874 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1875 MIPS_SYS(sys_symlink , 2)
1876 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1877 MIPS_SYS(sys_readlink , 3) /* 4085 */
1878 MIPS_SYS(sys_uselib , 1)
1879 MIPS_SYS(sys_swapon , 2)
1880 MIPS_SYS(sys_reboot , 3)
1881 MIPS_SYS(old_readdir , 3)
1882 MIPS_SYS(old_mmap , 6) /* 4090 */
1883 MIPS_SYS(sys_munmap , 2)
1884 MIPS_SYS(sys_truncate , 2)
1885 MIPS_SYS(sys_ftruncate , 2)
1886 MIPS_SYS(sys_fchmod , 2)
1887 MIPS_SYS(sys_fchown , 3) /* 4095 */
1888 MIPS_SYS(sys_getpriority , 2)
1889 MIPS_SYS(sys_setpriority , 3)
1890 MIPS_SYS(sys_ni_syscall , 0)
1891 MIPS_SYS(sys_statfs , 2)
1892 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1893 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1894 MIPS_SYS(sys_socketcall , 2)
1895 MIPS_SYS(sys_syslog , 3)
1896 MIPS_SYS(sys_setitimer , 3)
1897 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1898 MIPS_SYS(sys_newstat , 2)
1899 MIPS_SYS(sys_newlstat , 2)
1900 MIPS_SYS(sys_newfstat , 2)
1901 MIPS_SYS(sys_uname , 1)
1902 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1903 MIPS_SYS(sys_vhangup , 0)
1904 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1905 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1906 MIPS_SYS(sys_wait4 , 4)
1907 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1908 MIPS_SYS(sys_sysinfo , 1)
1909 MIPS_SYS(sys_ipc , 6)
1910 MIPS_SYS(sys_fsync , 1)
1911 MIPS_SYS(sys_sigreturn , 0)
1912 MIPS_SYS(sys_clone , 6) /* 4120 */
1913 MIPS_SYS(sys_setdomainname, 2)
1914 MIPS_SYS(sys_newuname , 1)
1915 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1916 MIPS_SYS(sys_adjtimex , 1)
1917 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1918 MIPS_SYS(sys_sigprocmask , 3)
1919 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1920 MIPS_SYS(sys_init_module , 5)
1921 MIPS_SYS(sys_delete_module, 1)
1922 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1923 MIPS_SYS(sys_quotactl , 0)
1924 MIPS_SYS(sys_getpgid , 1)
1925 MIPS_SYS(sys_fchdir , 1)
1926 MIPS_SYS(sys_bdflush , 2)
1927 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1928 MIPS_SYS(sys_personality , 1)
1929 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1930 MIPS_SYS(sys_setfsuid , 1)
1931 MIPS_SYS(sys_setfsgid , 1)
1932 MIPS_SYS(sys_llseek , 5) /* 4140 */
1933 MIPS_SYS(sys_getdents , 3)
1934 MIPS_SYS(sys_select , 5)
1935 MIPS_SYS(sys_flock , 2)
1936 MIPS_SYS(sys_msync , 3)
1937 MIPS_SYS(sys_readv , 3) /* 4145 */
1938 MIPS_SYS(sys_writev , 3)
1939 MIPS_SYS(sys_cacheflush , 3)
1940 MIPS_SYS(sys_cachectl , 3)
1941 MIPS_SYS(sys_sysmips , 4)
1942 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1943 MIPS_SYS(sys_getsid , 1)
1944 MIPS_SYS(sys_fdatasync , 0)
1945 MIPS_SYS(sys_sysctl , 1)
1946 MIPS_SYS(sys_mlock , 2)
1947 MIPS_SYS(sys_munlock , 2) /* 4155 */
1948 MIPS_SYS(sys_mlockall , 1)
1949 MIPS_SYS(sys_munlockall , 0)
1950 MIPS_SYS(sys_sched_setparam, 2)
1951 MIPS_SYS(sys_sched_getparam, 2)
1952 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1953 MIPS_SYS(sys_sched_getscheduler, 1)
1954 MIPS_SYS(sys_sched_yield , 0)
1955 MIPS_SYS(sys_sched_get_priority_max, 1)
1956 MIPS_SYS(sys_sched_get_priority_min, 1)
1957 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1958 MIPS_SYS(sys_nanosleep, 2)
1959 MIPS_SYS(sys_mremap , 4)
1960 MIPS_SYS(sys_accept , 3)
1961 MIPS_SYS(sys_bind , 3)
1962 MIPS_SYS(sys_connect , 3) /* 4170 */
1963 MIPS_SYS(sys_getpeername , 3)
1964 MIPS_SYS(sys_getsockname , 3)
1965 MIPS_SYS(sys_getsockopt , 5)
1966 MIPS_SYS(sys_listen , 2)
1967 MIPS_SYS(sys_recv , 4) /* 4175 */
1968 MIPS_SYS(sys_recvfrom , 6)
1969 MIPS_SYS(sys_recvmsg , 3)
1970 MIPS_SYS(sys_send , 4)
1971 MIPS_SYS(sys_sendmsg , 3)
1972 MIPS_SYS(sys_sendto , 6) /* 4180 */
1973 MIPS_SYS(sys_setsockopt , 5)
1974 MIPS_SYS(sys_shutdown , 2)
1975 MIPS_SYS(sys_socket , 3)
1976 MIPS_SYS(sys_socketpair , 4)
1977 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1978 MIPS_SYS(sys_getresuid , 3)
1979 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1980 MIPS_SYS(sys_poll , 3)
1981 MIPS_SYS(sys_nfsservctl , 3)
1982 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1983 MIPS_SYS(sys_getresgid , 3)
1984 MIPS_SYS(sys_prctl , 5)
1985 MIPS_SYS(sys_rt_sigreturn, 0)
1986 MIPS_SYS(sys_rt_sigaction, 4)
1987 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1988 MIPS_SYS(sys_rt_sigpending, 2)
1989 MIPS_SYS(sys_rt_sigtimedwait, 4)
1990 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1991 MIPS_SYS(sys_rt_sigsuspend, 0)
1992 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1993 MIPS_SYS(sys_pwrite64 , 6)
1994 MIPS_SYS(sys_chown , 3)
1995 MIPS_SYS(sys_getcwd , 2)
1996 MIPS_SYS(sys_capget , 2)
1997 MIPS_SYS(sys_capset , 2) /* 4205 */
1998 MIPS_SYS(sys_sigaltstack , 2)
1999 MIPS_SYS(sys_sendfile , 4)
2000 MIPS_SYS(sys_ni_syscall , 0)
2001 MIPS_SYS(sys_ni_syscall , 0)
2002 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
2003 MIPS_SYS(sys_truncate64 , 4)
2004 MIPS_SYS(sys_ftruncate64 , 4)
2005 MIPS_SYS(sys_stat64 , 2)
2006 MIPS_SYS(sys_lstat64 , 2)
2007 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
2008 MIPS_SYS(sys_pivot_root , 2)
2009 MIPS_SYS(sys_mincore , 3)
2010 MIPS_SYS(sys_madvise , 3)
2011 MIPS_SYS(sys_getdents64 , 3)
2012 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
2013 MIPS_SYS(sys_ni_syscall , 0)
2014 MIPS_SYS(sys_gettid , 0)
2015 MIPS_SYS(sys_readahead , 5)
2016 MIPS_SYS(sys_setxattr , 5)
2017 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
2018 MIPS_SYS(sys_fsetxattr , 5)
2019 MIPS_SYS(sys_getxattr , 4)
2020 MIPS_SYS(sys_lgetxattr , 4)
2021 MIPS_SYS(sys_fgetxattr , 4)
2022 MIPS_SYS(sys_listxattr , 3) /* 4230 */
2023 MIPS_SYS(sys_llistxattr , 3)
2024 MIPS_SYS(sys_flistxattr , 3)
2025 MIPS_SYS(sys_removexattr , 2)
2026 MIPS_SYS(sys_lremovexattr, 2)
2027 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
2028 MIPS_SYS(sys_tkill , 2)
2029 MIPS_SYS(sys_sendfile64 , 5)
2030 MIPS_SYS(sys_futex , 2)
2031 MIPS_SYS(sys_sched_setaffinity, 3)
2032 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
2033 MIPS_SYS(sys_io_setup , 2)
2034 MIPS_SYS(sys_io_destroy , 1)
2035 MIPS_SYS(sys_io_getevents, 5)
2036 MIPS_SYS(sys_io_submit , 3)
2037 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
2038 MIPS_SYS(sys_exit_group , 1)
2039 MIPS_SYS(sys_lookup_dcookie, 3)
2040 MIPS_SYS(sys_epoll_create, 1)
2041 MIPS_SYS(sys_epoll_ctl , 4)
2042 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2043 MIPS_SYS(sys_remap_file_pages, 5)
2044 MIPS_SYS(sys_set_tid_address, 1)
2045 MIPS_SYS(sys_restart_syscall, 0)
2046 MIPS_SYS(sys_fadvise64_64, 7)
2047 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2048 MIPS_SYS(sys_fstatfs64 , 2)
2049 MIPS_SYS(sys_timer_create, 3)
2050 MIPS_SYS(sys_timer_settime, 4)
2051 MIPS_SYS(sys_timer_gettime, 2)
2052 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2053 MIPS_SYS(sys_timer_delete, 1)
2054 MIPS_SYS(sys_clock_settime, 2)
2055 MIPS_SYS(sys_clock_gettime, 2)
2056 MIPS_SYS(sys_clock_getres, 2)
2057 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2058 MIPS_SYS(sys_tgkill , 3)
2059 MIPS_SYS(sys_utimes , 2)
2060 MIPS_SYS(sys_mbind , 4)
2061 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2062 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2063 MIPS_SYS(sys_mq_open , 4)
2064 MIPS_SYS(sys_mq_unlink , 1)
2065 MIPS_SYS(sys_mq_timedsend, 5)
2066 MIPS_SYS(sys_mq_timedreceive, 5)
2067 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2068 MIPS_SYS(sys_mq_getsetattr, 3)
2069 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2070 MIPS_SYS(sys_waitid , 4)
2071 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2072 MIPS_SYS(sys_add_key , 5)
2073 MIPS_SYS(sys_request_key, 4)
2074 MIPS_SYS(sys_keyctl , 5)
2075 MIPS_SYS(sys_set_thread_area, 1)
2076 MIPS_SYS(sys_inotify_init, 0)
2077 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2078 MIPS_SYS(sys_inotify_rm_watch, 2)
2079 MIPS_SYS(sys_migrate_pages, 4)
2080 MIPS_SYS(sys_openat, 4)
2081 MIPS_SYS(sys_mkdirat, 3)
2082 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2083 MIPS_SYS(sys_fchownat, 5)
2084 MIPS_SYS(sys_futimesat, 3)
2085 MIPS_SYS(sys_fstatat64, 4)
2086 MIPS_SYS(sys_unlinkat, 3)
2087 MIPS_SYS(sys_renameat, 4) /* 4295 */
2088 MIPS_SYS(sys_linkat, 5)
2089 MIPS_SYS(sys_symlinkat, 3)
2090 MIPS_SYS(sys_readlinkat, 4)
2091 MIPS_SYS(sys_fchmodat, 3)
2092 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2093 MIPS_SYS(sys_pselect6, 6)
2094 MIPS_SYS(sys_ppoll, 5)
2095 MIPS_SYS(sys_unshare, 1)
2096 MIPS_SYS(sys_splice, 4)
2097 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2098 MIPS_SYS(sys_tee, 4)
2099 MIPS_SYS(sys_vmsplice, 4)
2100 MIPS_SYS(sys_move_pages, 6)
2101 MIPS_SYS(sys_set_robust_list, 2)
2102 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2103 MIPS_SYS(sys_kexec_load, 4)
2104 MIPS_SYS(sys_getcpu, 3)
2105 MIPS_SYS(sys_epoll_pwait, 6)
2106 MIPS_SYS(sys_ioprio_set, 3)
2107 MIPS_SYS(sys_ioprio_get, 2)
2108 MIPS_SYS(sys_utimensat, 4)
2109 MIPS_SYS(sys_signalfd, 3)
2110 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2111 MIPS_SYS(sys_eventfd, 1)
2112 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2113 MIPS_SYS(sys_timerfd_create, 2)
2114 MIPS_SYS(sys_timerfd_gettime, 2)
2115 MIPS_SYS(sys_timerfd_settime, 4)
2116 MIPS_SYS(sys_signalfd4, 4)
2117 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2118 MIPS_SYS(sys_epoll_create1, 1)
2119 MIPS_SYS(sys_dup3, 3)
2120 MIPS_SYS(sys_pipe2, 2)
2121 MIPS_SYS(sys_inotify_init1, 1)
2122 MIPS_SYS(sys_preadv, 6) /* 4330 */
2123 MIPS_SYS(sys_pwritev, 6)
2124 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2125 MIPS_SYS(sys_perf_event_open, 5)
2126 MIPS_SYS(sys_accept4, 4)
2127 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2128 MIPS_SYS(sys_fanotify_init, 2)
2129 MIPS_SYS(sys_fanotify_mark, 6)
2130 MIPS_SYS(sys_prlimit64, 4)
2131 MIPS_SYS(sys_name_to_handle_at, 5)
2132 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2133 MIPS_SYS(sys_clock_adjtime, 2)
2134 MIPS_SYS(sys_syncfs, 1)
2135 };
2136
2137 #undef MIPS_SYS
2138
2139 static int do_store_exclusive(CPUMIPSState *env)
2140 {
2141 target_ulong addr;
2142 target_ulong page_addr;
2143 target_ulong val;
2144 int flags;
2145 int segv = 0;
2146 int reg;
2147 int d;
2148
2149 addr = env->lladdr;
2150 page_addr = addr & TARGET_PAGE_MASK;
2151 start_exclusive();
2152 mmap_lock();
2153 flags = page_get_flags(page_addr);
2154 if ((flags & PAGE_READ) == 0) {
2155 segv = 1;
2156 } else {
2157 reg = env->llreg & 0x1f;
2158 d = (env->llreg & 0x20) != 0;
2159 if (d) {
2160 segv = get_user_s64(val, addr);
2161 } else {
2162 segv = get_user_s32(val, addr);
2163 }
2164 if (!segv) {
2165 if (val != env->llval) {
2166 env->active_tc.gpr[reg] = 0;
2167 } else {
2168 if (d) {
2169 segv = put_user_u64(env->llnewval, addr);
2170 } else {
2171 segv = put_user_u32(env->llnewval, addr);
2172 }
2173 if (!segv) {
2174 env->active_tc.gpr[reg] = 1;
2175 }
2176 }
2177 }
2178 }
2179 env->lladdr = -1;
2180 if (!segv) {
2181 env->active_tc.PC += 4;
2182 }
2183 mmap_unlock();
2184 end_exclusive();
2185 return segv;
2186 }
2187
2188 void cpu_loop(CPUMIPSState *env)
2189 {
2190 target_siginfo_t info;
2191 int trapnr, ret;
2192 unsigned int syscall_num;
2193
2194 for(;;) {
2195 cpu_exec_start(env);
2196 trapnr = cpu_mips_exec(env);
2197 cpu_exec_end(env);
2198 switch(trapnr) {
2199 case EXCP_SYSCALL:
2200 syscall_num = env->active_tc.gpr[2] - 4000;
2201 env->active_tc.PC += 4;
2202 if (syscall_num >= sizeof(mips_syscall_args)) {
2203 ret = -TARGET_ENOSYS;
2204 } else {
2205 int nb_args;
2206 abi_ulong sp_reg;
2207 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
2208
2209 nb_args = mips_syscall_args[syscall_num];
2210 sp_reg = env->active_tc.gpr[29];
2211 switch (nb_args) {
2212 /* these arguments are taken from the stack */
2213 case 8:
2214 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2215 goto done_syscall;
2216 }
2217 case 7:
2218 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2219 goto done_syscall;
2220 }
2221 case 6:
2222 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2223 goto done_syscall;
2224 }
2225 case 5:
2226 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2227 goto done_syscall;
2228 }
2229 default:
2230 break;
2231 }
2232 ret = do_syscall(env, env->active_tc.gpr[2],
2233 env->active_tc.gpr[4],
2234 env->active_tc.gpr[5],
2235 env->active_tc.gpr[6],
2236 env->active_tc.gpr[7],
2237 arg5, arg6, arg7, arg8);
2238 }
2239 done_syscall:
2240 if (ret == -TARGET_QEMU_ESIGRETURN) {
2241 /* Returning from a successful sigreturn syscall.
2242 Avoid clobbering register state. */
2243 break;
2244 }
2245 if ((unsigned int)ret >= (unsigned int)(-1133)) {
2246 env->active_tc.gpr[7] = 1; /* error flag */
2247 ret = -ret;
2248 } else {
2249 env->active_tc.gpr[7] = 0; /* error flag */
2250 }
2251 env->active_tc.gpr[2] = ret;
2252 break;
2253 case EXCP_TLBL:
2254 case EXCP_TLBS:
2255 case EXCP_AdEL:
2256 case EXCP_AdES:
2257 info.si_signo = TARGET_SIGSEGV;
2258 info.si_errno = 0;
2259 /* XXX: check env->error_code */
2260 info.si_code = TARGET_SEGV_MAPERR;
2261 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2262 queue_signal(env, info.si_signo, &info);
2263 break;
2264 case EXCP_CpU:
2265 case EXCP_RI:
2266 info.si_signo = TARGET_SIGILL;
2267 info.si_errno = 0;
2268 info.si_code = 0;
2269 queue_signal(env, info.si_signo, &info);
2270 break;
2271 case EXCP_INTERRUPT:
2272 /* just indicate that signals should be handled asap */
2273 break;
2274 case EXCP_DEBUG:
2275 {
2276 int sig;
2277
2278 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2279 if (sig)
2280 {
2281 info.si_signo = sig;
2282 info.si_errno = 0;
2283 info.si_code = TARGET_TRAP_BRKPT;
2284 queue_signal(env, info.si_signo, &info);
2285 }
2286 }
2287 break;
2288 case EXCP_SC:
2289 if (do_store_exclusive(env)) {
2290 info.si_signo = TARGET_SIGSEGV;
2291 info.si_errno = 0;
2292 info.si_code = TARGET_SEGV_MAPERR;
2293 info._sifields._sigfault._addr = env->active_tc.PC;
2294 queue_signal(env, info.si_signo, &info);
2295 }
2296 break;
2297 default:
2298 // error:
2299 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2300 trapnr);
2301 cpu_dump_state(env, stderr, fprintf, 0);
2302 abort();
2303 }
2304 process_pending_signals(env);
2305 }
2306 }
2307 #endif
2308
2309 #ifdef TARGET_SH4
2310 void cpu_loop(CPUSH4State *env)
2311 {
2312 int trapnr, ret;
2313 target_siginfo_t info;
2314
2315 while (1) {
2316 trapnr = cpu_sh4_exec (env);
2317
2318 switch (trapnr) {
2319 case 0x160:
2320 env->pc += 2;
2321 ret = do_syscall(env,
2322 env->gregs[3],
2323 env->gregs[4],
2324 env->gregs[5],
2325 env->gregs[6],
2326 env->gregs[7],
2327 env->gregs[0],
2328 env->gregs[1],
2329 0, 0);
2330 env->gregs[0] = ret;
2331 break;
2332 case EXCP_INTERRUPT:
2333 /* just indicate that signals should be handled asap */
2334 break;
2335 case EXCP_DEBUG:
2336 {
2337 int sig;
2338
2339 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2340 if (sig)
2341 {
2342 info.si_signo = sig;
2343 info.si_errno = 0;
2344 info.si_code = TARGET_TRAP_BRKPT;
2345 queue_signal(env, info.si_signo, &info);
2346 }
2347 }
2348 break;
2349 case 0xa0:
2350 case 0xc0:
2351 info.si_signo = SIGSEGV;
2352 info.si_errno = 0;
2353 info.si_code = TARGET_SEGV_MAPERR;
2354 info._sifields._sigfault._addr = env->tea;
2355 queue_signal(env, info.si_signo, &info);
2356 break;
2357
2358 default:
2359 printf ("Unhandled trap: 0x%x\n", trapnr);
2360 cpu_dump_state(env, stderr, fprintf, 0);
2361 exit (1);
2362 }
2363 process_pending_signals (env);
2364 }
2365 }
2366 #endif
2367
2368 #ifdef TARGET_CRIS
2369 void cpu_loop(CPUCRISState *env)
2370 {
2371 int trapnr, ret;
2372 target_siginfo_t info;
2373
2374 while (1) {
2375 trapnr = cpu_cris_exec (env);
2376 switch (trapnr) {
2377 case 0xaa:
2378 {
2379 info.si_signo = SIGSEGV;
2380 info.si_errno = 0;
2381 /* XXX: check env->error_code */
2382 info.si_code = TARGET_SEGV_MAPERR;
2383 info._sifields._sigfault._addr = env->pregs[PR_EDA];
2384 queue_signal(env, info.si_signo, &info);
2385 }
2386 break;
2387 case EXCP_INTERRUPT:
2388 /* just indicate that signals should be handled asap */
2389 break;
2390 case EXCP_BREAK:
2391 ret = do_syscall(env,
2392 env->regs[9],
2393 env->regs[10],
2394 env->regs[11],
2395 env->regs[12],
2396 env->regs[13],
2397 env->pregs[7],
2398 env->pregs[11],
2399 0, 0);
2400 env->regs[10] = ret;
2401 break;
2402 case EXCP_DEBUG:
2403 {
2404 int sig;
2405
2406 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2407 if (sig)
2408 {
2409 info.si_signo = sig;
2410 info.si_errno = 0;
2411 info.si_code = TARGET_TRAP_BRKPT;
2412 queue_signal(env, info.si_signo, &info);
2413 }
2414 }
2415 break;
2416 default:
2417 printf ("Unhandled trap: 0x%x\n", trapnr);
2418 cpu_dump_state(env, stderr, fprintf, 0);
2419 exit (1);
2420 }
2421 process_pending_signals (env);
2422 }
2423 }
2424 #endif
2425
2426 #ifdef TARGET_MICROBLAZE
2427 void cpu_loop(CPUMBState *env)
2428 {
2429 int trapnr, ret;
2430 target_siginfo_t info;
2431
2432 while (1) {
2433 trapnr = cpu_mb_exec (env);
2434 switch (trapnr) {
2435 case 0xaa:
2436 {
2437 info.si_signo = SIGSEGV;
2438 info.si_errno = 0;
2439 /* XXX: check env->error_code */
2440 info.si_code = TARGET_SEGV_MAPERR;
2441 info._sifields._sigfault._addr = 0;
2442 queue_signal(env, info.si_signo, &info);
2443 }
2444 break;
2445 case EXCP_INTERRUPT:
2446 /* just indicate that signals should be handled asap */
2447 break;
2448 case EXCP_BREAK:
2449 /* Return address is 4 bytes after the call. */
2450 env->regs[14] += 4;
2451 ret = do_syscall(env,
2452 env->regs[12],
2453 env->regs[5],
2454 env->regs[6],
2455 env->regs[7],
2456 env->regs[8],
2457 env->regs[9],
2458 env->regs[10],
2459 0, 0);
2460 env->regs[3] = ret;
2461 env->sregs[SR_PC] = env->regs[14];
2462 break;
2463 case EXCP_HW_EXCP:
2464 env->regs[17] = env->sregs[SR_PC] + 4;
2465 if (env->iflags & D_FLAG) {
2466 env->sregs[SR_ESR] |= 1 << 12;
2467 env->sregs[SR_PC] -= 4;
2468 /* FIXME: if branch was immed, replay the imm as well. */
2469 }
2470
2471 env->iflags &= ~(IMM_FLAG | D_FLAG);
2472
2473 switch (env->sregs[SR_ESR] & 31) {
2474 case ESR_EC_DIVZERO:
2475 info.si_signo = SIGFPE;
2476 info.si_errno = 0;
2477 info.si_code = TARGET_FPE_FLTDIV;
2478 info._sifields._sigfault._addr = 0;
2479 queue_signal(env, info.si_signo, &info);
2480 break;
2481 case ESR_EC_FPU:
2482 info.si_signo = SIGFPE;
2483 info.si_errno = 0;
2484 if (env->sregs[SR_FSR] & FSR_IO) {
2485 info.si_code = TARGET_FPE_FLTINV;
2486 }
2487 if (env->sregs[SR_FSR] & FSR_DZ) {
2488 info.si_code = TARGET_FPE_FLTDIV;
2489 }
2490 info._sifields._sigfault._addr = 0;
2491 queue_signal(env, info.si_signo, &info);
2492 break;
2493 default:
2494 printf ("Unhandled hw-exception: 0x%x\n",
2495 env->sregs[SR_ESR] & ESR_EC_MASK);
2496 cpu_dump_state(env, stderr, fprintf, 0);
2497 exit (1);
2498 break;
2499 }
2500 break;
2501 case EXCP_DEBUG:
2502 {
2503 int sig;
2504
2505 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2506 if (sig)
2507 {
2508 info.si_signo = sig;
2509 info.si_errno = 0;
2510 info.si_code = TARGET_TRAP_BRKPT;
2511 queue_signal(env, info.si_signo, &info);
2512 }
2513 }
2514 break;
2515 default:
2516 printf ("Unhandled trap: 0x%x\n", trapnr);
2517 cpu_dump_state(env, stderr, fprintf, 0);
2518 exit (1);
2519 }
2520 process_pending_signals (env);
2521 }
2522 }
2523 #endif
2524
2525 #ifdef TARGET_M68K
2526
2527 void cpu_loop(CPUM68KState *env)
2528 {
2529 int trapnr;
2530 unsigned int n;
2531 target_siginfo_t info;
2532 TaskState *ts = env->opaque;
2533
2534 for(;;) {
2535 trapnr = cpu_m68k_exec(env);
2536 switch(trapnr) {
2537 case EXCP_ILLEGAL:
2538 {
2539 if (ts->sim_syscalls) {
2540 uint16_t nr;
2541 nr = lduw(env->pc + 2);
2542 env->pc += 4;
2543 do_m68k_simcall(env, nr);
2544 } else {
2545 goto do_sigill;
2546 }
2547 }
2548 break;
2549 case EXCP_HALT_INSN:
2550 /* Semihosing syscall. */
2551 env->pc += 4;
2552 do_m68k_semihosting(env, env->dregs[0]);
2553 break;
2554 case EXCP_LINEA:
2555 case EXCP_LINEF:
2556 case EXCP_UNSUPPORTED:
2557 do_sigill:
2558 info.si_signo = SIGILL;
2559 info.si_errno = 0;
2560 info.si_code = TARGET_ILL_ILLOPN;
2561 info._sifields._sigfault._addr = env->pc;
2562 queue_signal(env, info.si_signo, &info);
2563 break;
2564 case EXCP_TRAP0:
2565 {
2566 ts->sim_syscalls = 0;
2567 n = env->dregs[0];
2568 env->pc += 2;
2569 env->dregs[0] = do_syscall(env,
2570 n,
2571 env->dregs[1],
2572 env->dregs[2],
2573 env->dregs[3],
2574 env->dregs[4],
2575 env->dregs[5],
2576 env->aregs[0],
2577 0, 0);
2578 }
2579 break;
2580 case EXCP_INTERRUPT:
2581 /* just indicate that signals should be handled asap */
2582 break;
2583 case EXCP_ACCESS:
2584 {
2585 info.si_signo = SIGSEGV;
2586 info.si_errno = 0;
2587 /* XXX: check env->error_code */
2588 info.si_code = TARGET_SEGV_MAPERR;
2589 info._sifields._sigfault._addr = env->mmu.ar;
2590 queue_signal(env, info.si_signo, &info);
2591 }
2592 break;
2593 case EXCP_DEBUG:
2594 {
2595 int sig;
2596
2597 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2598 if (sig)
2599 {
2600 info.si_signo = sig;
2601 info.si_errno = 0;
2602 info.si_code = TARGET_TRAP_BRKPT;
2603 queue_signal(env, info.si_signo, &info);
2604 }
2605 }
2606 break;
2607 default:
2608 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2609 trapnr);
2610 cpu_dump_state(env, stderr, fprintf, 0);
2611 abort();
2612 }
2613 process_pending_signals(env);
2614 }
2615 }
2616 #endif /* TARGET_M68K */
2617
2618 #ifdef TARGET_ALPHA
2619 static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2620 {
2621 target_ulong addr, val, tmp;
2622 target_siginfo_t info;
2623 int ret = 0;
2624
2625 addr = env->lock_addr;
2626 tmp = env->lock_st_addr;
2627 env->lock_addr = -1;
2628 env->lock_st_addr = 0;
2629
2630 start_exclusive();
2631 mmap_lock();
2632
2633 if (addr == tmp) {
2634 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2635 goto do_sigsegv;
2636 }
2637
2638 if (val == env->lock_value) {
2639 tmp = env->ir[reg];
2640 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2641 goto do_sigsegv;
2642 }
2643 ret = 1;
2644 }
2645 }
2646 env->ir[reg] = ret;
2647 env->pc += 4;
2648
2649 mmap_unlock();
2650 end_exclusive();
2651 return;
2652
2653 do_sigsegv:
2654 mmap_unlock();
2655 end_exclusive();
2656
2657 info.si_signo = TARGET_SIGSEGV;
2658 info.si_errno = 0;
2659 info.si_code = TARGET_SEGV_MAPERR;
2660 info._sifields._sigfault._addr = addr;
2661 queue_signal(env, TARGET_SIGSEGV, &info);
2662 }
2663
2664 void cpu_loop(CPUAlphaState *env)
2665 {
2666 int trapnr;
2667 target_siginfo_t info;
2668 abi_long sysret;
2669
2670 while (1) {
2671 trapnr = cpu_alpha_exec (env);
2672
2673 /* All of the traps imply a transition through PALcode, which
2674 implies an REI instruction has been executed. Which means
2675 that the intr_flag should be cleared. */
2676 env->intr_flag = 0;
2677
2678 switch (trapnr) {
2679 case EXCP_RESET:
2680 fprintf(stderr, "Reset requested. Exit\n");
2681 exit(1);
2682 break;
2683 case EXCP_MCHK:
2684 fprintf(stderr, "Machine check exception. Exit\n");
2685 exit(1);
2686 break;
2687 case EXCP_SMP_INTERRUPT:
2688 case EXCP_CLK_INTERRUPT:
2689 case EXCP_DEV_INTERRUPT:
2690 fprintf(stderr, "External interrupt. Exit\n");
2691 exit(1);
2692 break;
2693 case EXCP_MMFAULT:
2694 env->lock_addr = -1;
2695 info.si_signo = TARGET_SIGSEGV;
2696 info.si_errno = 0;
2697 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
2698 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
2699 info._sifields._sigfault._addr = env->trap_arg0;
2700 queue_signal(env, info.si_signo, &info);
2701 break;
2702 case EXCP_UNALIGN:
2703 env->lock_addr = -1;
2704 info.si_signo = TARGET_SIGBUS;
2705 info.si_errno = 0;
2706 info.si_code = TARGET_BUS_ADRALN;
2707 info._sifields._sigfault._addr = env->trap_arg0;
2708 queue_signal(env, info.si_signo, &info);
2709 break;
2710 case EXCP_OPCDEC:
2711 do_sigill:
2712 env->lock_addr = -1;
2713 info.si_signo = TARGET_SIGILL;
2714 info.si_errno = 0;
2715 info.si_code = TARGET_ILL_ILLOPC;
2716 info._sifields._sigfault._addr = env->pc;
2717 queue_signal(env, info.si_signo, &info);
2718 break;
2719 case EXCP_ARITH:
2720 env->lock_addr = -1;
2721 info.si_signo = TARGET_SIGFPE;
2722 info.si_errno = 0;
2723 info.si_code = TARGET_FPE_FLTINV;
2724 info._sifields._sigfault._addr = env->pc;
2725 queue_signal(env, info.si_signo, &info);
2726 break;
2727 case EXCP_FEN:
2728 /* No-op. Linux simply re-enables the FPU. */
2729 break;
2730 case EXCP_CALL_PAL:
2731 env->lock_addr = -1;
2732 switch (env->error_code) {
2733 case 0x80:
2734 /* BPT */
2735 info.si_signo = TARGET_SIGTRAP;
2736 info.si_errno = 0;
2737 info.si_code = TARGET_TRAP_BRKPT;
2738 info._sifields._sigfault._addr = env->pc;
2739 queue_signal(env, info.si_signo, &info);
2740 break;
2741 case 0x81:
2742 /* BUGCHK */
2743 info.si_signo = TARGET_SIGTRAP;
2744 info.si_errno = 0;
2745 info.si_code = 0;
2746 info._sifields._sigfault._addr = env->pc;
2747 queue_signal(env, info.si_signo, &info);
2748 break;
2749 case 0x83:
2750 /* CALLSYS */
2751 trapnr = env->ir[IR_V0];
2752 sysret = do_syscall(env, trapnr,
2753 env->ir[IR_A0], env->ir[IR_A1],
2754 env->ir[IR_A2], env->ir[IR_A3],
2755 env->ir[IR_A4], env->ir[IR_A5],
2756 0, 0);
2757 if (trapnr == TARGET_NR_sigreturn
2758 || trapnr == TARGET_NR_rt_sigreturn) {
2759 break;
2760 }
2761 /* Syscall writes 0 to V0 to bypass error check, similar
2762 to how this is handled internal to Linux kernel. */
2763 if (env->ir[IR_V0] == 0) {
2764 env->ir[IR_V0] = sysret;
2765 } else {
2766 env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
2767 env->ir[IR_A3] = (sysret < 0);
2768 }
2769 break;
2770 case 0x86:
2771 /* IMB */
2772 /* ??? We can probably elide the code using page_unprotect
2773 that is checking for self-modifying code. Instead we
2774 could simply call tb_flush here. Until we work out the
2775 changes required to turn off the extra write protection,
2776 this can be a no-op. */
2777 break;
2778 case 0x9E:
2779 /* RDUNIQUE */
2780 /* Handled in the translator for usermode. */
2781 abort();
2782 case 0x9F:
2783 /* WRUNIQUE */
2784 /* Handled in the translator for usermode. */
2785 abort();
2786 case 0xAA:
2787 /* GENTRAP */
2788 info.si_signo = TARGET_SIGFPE;
2789 switch (env->ir[IR_A0]) {
2790 case TARGET_GEN_INTOVF:
2791 info.si_code = TARGET_FPE_INTOVF;
2792 break;
2793 case TARGET_GEN_INTDIV:
2794 info.si_code = TARGET_FPE_INTDIV;
2795 break;
2796 case TARGET_GEN_FLTOVF:
2797 info.si_code = TARGET_FPE_FLTOVF;
2798 break;
2799 case TARGET_GEN_FLTUND:
2800 info.si_code = TARGET_FPE_FLTUND;
2801 break;
2802 case TARGET_GEN_FLTINV:
2803 info.si_code = TARGET_FPE_FLTINV;
2804 break;
2805 case TARGET_GEN_FLTINE:
2806 info.si_code = TARGET_FPE_FLTRES;
2807 break;
2808 case TARGET_GEN_ROPRAND:
2809 info.si_code = 0;
2810 break;
2811 default:
2812 info.si_signo = TARGET_SIGTRAP;
2813 info.si_code = 0;
2814 break;
2815 }
2816 info.si_errno = 0;
2817 info._sifields._sigfault._addr = env->pc;
2818 queue_signal(env, info.si_signo, &info);
2819 break;
2820 default:
2821 goto do_sigill;
2822 }
2823 break;
2824 case EXCP_DEBUG:
2825 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2826 if (info.si_signo) {
2827 env->lock_addr = -1;
2828 info.si_errno = 0;
2829 info.si_code = TARGET_TRAP_BRKPT;
2830 queue_signal(env, info.si_signo, &info);
2831 }
2832 break;
2833 case EXCP_STL_C:
2834 case EXCP_STQ_C:
2835 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2836 break;
2837 default:
2838 printf ("Unhandled trap: 0x%x\n", trapnr);
2839 cpu_dump_state(env, stderr, fprintf, 0);
2840 exit (1);
2841 }
2842 process_pending_signals (env);
2843 }
2844 }
2845 #endif /* TARGET_ALPHA */
2846
2847 #ifdef TARGET_S390X
2848 void cpu_loop(CPUS390XState *env)
2849 {
2850 int trapnr;
2851 target_siginfo_t info;
2852
2853 while (1) {
2854 trapnr = cpu_s390x_exec (env);
2855
2856 switch (trapnr) {
2857 case EXCP_INTERRUPT:
2858 /* just indicate that signals should be handled asap */
2859 break;
2860 case EXCP_DEBUG:
2861 {
2862 int sig;
2863
2864 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2865 if (sig) {
2866 info.si_signo = sig;
2867 info.si_errno = 0;
2868 info.si_code = TARGET_TRAP_BRKPT;
2869 queue_signal(env, info.si_signo, &info);
2870 }
2871 }
2872 break;
2873 case EXCP_SVC:
2874 {
2875 int n = env->int_svc_code;
2876 if (!n) {
2877 /* syscalls > 255 */
2878 n = env->regs[1];
2879 }
2880 env->psw.addr += env->int_svc_ilc;
2881 env->regs[2] = do_syscall(env, n,
2882 env->regs[2],
2883 env->regs[3],
2884 env->regs[4],
2885 env->regs[5],
2886 env->regs[6],
2887 env->regs[7],
2888 0, 0);
2889 }
2890 break;
2891 case EXCP_ADDR:
2892 {
2893 info.si_signo = SIGSEGV;
2894 info.si_errno = 0;
2895 /* XXX: check env->error_code */
2896 info.si_code = TARGET_SEGV_MAPERR;
2897 info._sifields._sigfault._addr = env->__excp_addr;
2898 queue_signal(env, info.si_signo, &info);
2899 }
2900 break;
2901 case EXCP_SPEC:
2902 {
2903 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4));
2904 info.si_signo = SIGILL;
2905 info.si_errno = 0;
2906 info.si_code = TARGET_ILL_ILLOPC;
2907 info._sifields._sigfault._addr = env->__excp_addr;
2908 queue_signal(env, info.si_signo, &info);
2909 }
2910 break;
2911 default:
2912 printf ("Unhandled trap: 0x%x\n", trapnr);
2913 cpu_dump_state(env, stderr, fprintf, 0);
2914 exit (1);
2915 }
2916 process_pending_signals (env);
2917 }
2918 }
2919
2920 #endif /* TARGET_S390X */
2921
2922 THREAD CPUArchState *thread_env;
2923
2924 void task_settid(TaskState *ts)
2925 {
2926 if (ts->ts_tid == 0) {
2927 #ifdef CONFIG_USE_NPTL
2928 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2929 #else
2930 /* when no threads are used, tid becomes pid */
2931 ts->ts_tid = getpid();
2932 #endif
2933 }
2934 }
2935
2936 void stop_all_tasks(void)
2937 {
2938 /*
2939 * We trust that when using NPTL, start_exclusive()
2940 * handles thread stopping correctly.
2941 */
2942 start_exclusive();
2943 }
2944
2945 /* Assumes contents are already zeroed. */
2946 void init_task_state(TaskState *ts)
2947 {
2948 int i;
2949
2950 ts->used = 1;
2951 ts->first_free = ts->sigqueue_table;
2952 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2953 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2954 }
2955 ts->sigqueue_table[i].next = NULL;
2956 }
2957
2958 static void handle_arg_help(const char *arg)
2959 {
2960 usage();
2961 }
2962
2963 static void handle_arg_log(const char *arg)
2964 {
2965 int mask;
2966 const CPULogItem *item;
2967
2968 mask = cpu_str_to_log_mask(arg);
2969 if (!mask) {
2970 printf("Log items (comma separated):\n");
2971 for (item = cpu_log_items; item->mask != 0; item++) {
2972 printf("%-10s %s\n", item->name, item->help);
2973 }
2974 exit(1);
2975 }
2976 cpu_set_log(mask);
2977 }
2978
2979 static void handle_arg_log_filename(const char *arg)
2980 {
2981 cpu_set_log_filename(arg);
2982 }
2983
2984 static void handle_arg_set_env(const char *arg)
2985 {
2986 char *r, *p, *token;
2987 r = p = strdup(arg);
2988 while ((token = strsep(&p, ",")) != NULL) {
2989 if (envlist_setenv(envlist, token) != 0) {
2990 usage();
2991 }
2992 }
2993 free(r);
2994 }
2995
2996 static void handle_arg_unset_env(const char *arg)
2997 {
2998 char *r, *p, *token;
2999 r = p = strdup(arg);
3000 while ((token = strsep(&p, ",")) != NULL) {
3001 if (envlist_unsetenv(envlist, token) != 0) {
3002 usage();
3003 }
3004 }
3005 free(r);
3006 }
3007
3008 static void handle_arg_argv0(const char *arg)
3009 {
3010 argv0 = strdup(arg);
3011 }
3012
3013 static void handle_arg_stack_size(const char *arg)
3014 {
3015 char *p;
3016 guest_stack_size = strtoul(arg, &p, 0);
3017 if (guest_stack_size == 0) {
3018 usage();
3019 }
3020
3021 if (*p == 'M') {
3022 guest_stack_size *= 1024 * 1024;
3023 } else if (*p == 'k' || *p == 'K') {
3024 guest_stack_size *= 1024;
3025 }
3026 }
3027
3028 static void handle_arg_ld_prefix(const char *arg)
3029 {
3030 interp_prefix = strdup(arg);
3031 }
3032
3033 static void handle_arg_pagesize(const char *arg)
3034 {
3035 qemu_host_page_size = atoi(arg);
3036 if (qemu_host_page_size == 0 ||
3037 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3038 fprintf(stderr, "page size must be a power of two\n");
3039 exit(1);
3040 }
3041 }
3042
3043 static void handle_arg_gdb(const char *arg)
3044 {
3045 gdbstub_port = atoi(arg);
3046 }
3047
3048 static void handle_arg_uname(const char *arg)
3049 {
3050 qemu_uname_release = strdup(arg);
3051 }
3052
3053 static void handle_arg_cpu(const char *arg)
3054 {
3055 cpu_model = strdup(arg);
3056 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
3057 /* XXX: implement xxx_cpu_list for targets that still miss it */
3058 #if defined(cpu_list_id)
3059 cpu_list_id(stdout, &fprintf, "");
3060 #elif defined(cpu_list)
3061 cpu_list(stdout, &fprintf); /* deprecated */
3062 #endif
3063 exit(1);
3064 }
3065 }
3066
3067 #if defined(CONFIG_USE_GUEST_BASE)
3068 static void handle_arg_guest_base(const char *arg)
3069 {
3070 guest_base = strtol(arg, NULL, 0);
3071 have_guest_base = 1;
3072 }
3073
3074 static void handle_arg_reserved_va(const char *arg)
3075 {
3076 char *p;
3077 int shift = 0;
3078 reserved_va = strtoul(arg, &p, 0);
3079 switch (*p) {
3080 case 'k':
3081 case 'K':
3082 shift = 10;
3083 break;
3084 case 'M':
3085 shift = 20;
3086 break;
3087 case 'G':
3088 shift = 30;
3089 break;
3090 }
3091 if (shift) {
3092 unsigned long unshifted = reserved_va;
3093 p++;
3094 reserved_va <<= shift;
3095 if (((reserved_va >> shift) != unshifted)
3096 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3097 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3098 #endif
3099 ) {
3100 fprintf(stderr, "Reserved virtual address too big\n");
3101 exit(1);
3102 }
3103 }
3104 if (*p) {
3105 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3106 exit(1);
3107 }
3108 }
3109 #endif
3110
3111 static void handle_arg_singlestep(const char *arg)
3112 {
3113 singlestep = 1;
3114 }
3115
3116 static void handle_arg_strace(const char *arg)
3117 {
3118 do_strace = 1;
3119 }
3120
3121 static void handle_arg_version(const char *arg)
3122 {
3123 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
3124 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3125 exit(0);
3126 }
3127
3128 struct qemu_argument {
3129 const char *argv;
3130 const char *env;
3131 bool has_arg;
3132 void (*handle_opt)(const char *arg);
3133 const char *example;
3134 const char *help;
3135 };
3136
3137 struct qemu_argument arg_table[] = {
3138 {"h", "", false, handle_arg_help,
3139 "", "print this help"},
3140 {"g", "QEMU_GDB", true, handle_arg_gdb,
3141 "port", "wait gdb connection to 'port'"},
3142 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
3143 "path", "set the elf interpreter prefix to 'path'"},
3144 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
3145 "size", "set the stack size to 'size' bytes"},
3146 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
3147 "model", "select CPU (-cpu ? for list)"},
3148 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
3149 "var=value", "sets targets environment variable (see below)"},
3150 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
3151 "var", "unsets targets environment variable (see below)"},
3152 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
3153 "argv0", "forces target process argv[0] to be 'argv0'"},
3154 {"r", "QEMU_UNAME", true, handle_arg_uname,
3155 "uname", "set qemu uname release string to 'uname'"},
3156 #if defined(CONFIG_USE_GUEST_BASE)
3157 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
3158 "address", "set guest_base address to 'address'"},
3159 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
3160 "size", "reserve 'size' bytes for guest virtual address space"},
3161 #endif
3162 {"d", "QEMU_LOG", true, handle_arg_log,
3163 "options", "activate log"},
3164 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
3165 "logfile", "override default logfile location"},
3166 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
3167 "pagesize", "set the host page size to 'pagesize'"},
3168 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
3169 "", "run in singlestep mode"},
3170 {"strace", "QEMU_STRACE", false, handle_arg_strace,
3171 "", "log system calls"},
3172 {"version", "QEMU_VERSION", false, handle_arg_version,
3173 "", "display version information and exit"},
3174 {NULL, NULL, false, NULL, NULL, NULL}
3175 };
3176
3177 static void usage(void)
3178 {
3179 struct qemu_argument *arginfo;
3180 int maxarglen;
3181 int maxenvlen;
3182
3183 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
3184 "Linux CPU emulator (compiled for " TARGET_ARCH " emulation)\n"
3185 "\n"
3186 "Options and associated environment variables:\n"
3187 "\n");
3188
3189 maxarglen = maxenvlen = 0;
3190
3191 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3192 if (strlen(arginfo->env) > maxenvlen) {
3193 maxenvlen = strlen(arginfo->env);
3194 }
3195 if (strlen(arginfo->argv) > maxarglen) {
3196 maxarglen = strlen(arginfo->argv);
3197 }
3198 }
3199
3200 printf("%-*s%-*sDescription\n", maxarglen+3, "Argument",
3201 maxenvlen+1, "Env-variable");
3202
3203 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3204 if (arginfo->has_arg) {
3205 printf("-%s %-*s %-*s %s\n", arginfo->argv,
3206 (int)(maxarglen-strlen(arginfo->argv)), arginfo->example,
3207 maxenvlen, arginfo->env, arginfo->help);
3208 } else {
3209 printf("-%-*s %-*s %s\n", maxarglen+1, arginfo->argv,
3210 maxenvlen, arginfo->env,
3211 arginfo->help);
3212 }
3213 }
3214
3215 printf("\n"
3216 "Defaults:\n"
3217 "QEMU_LD_PREFIX = %s\n"
3218 "QEMU_STACK_SIZE = %ld byte\n"
3219 "QEMU_LOG = %s\n",
3220 interp_prefix,
3221 guest_stack_size,
3222 DEBUG_LOGFILE);
3223
3224 printf("\n"
3225 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3226 "QEMU_UNSET_ENV environment variables to set and unset\n"
3227 "environment variables for the target process.\n"
3228 "It is possible to provide several variables by separating them\n"
3229 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3230 "provide the -E and -U options multiple times.\n"
3231 "The following lines are equivalent:\n"
3232 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3233 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3234 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3235 "Note that if you provide several changes to a single variable\n"
3236 "the last change will stay in effect.\n");
3237
3238 exit(1);
3239 }
3240
3241 static int parse_args(int argc, char **argv)
3242 {
3243 const char *r;
3244 int optind;
3245 struct qemu_argument *arginfo;
3246
3247 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3248 if (arginfo->env == NULL) {
3249 continue;
3250 }
3251
3252 r = getenv(arginfo->env);
3253 if (r != NULL) {
3254 arginfo->handle_opt(r);
3255 }
3256 }
3257
3258 optind = 1;
3259 for (;;) {
3260 if (optind >= argc) {
3261 break;
3262 }
3263 r = argv[optind];
3264 if (r[0] != '-') {
3265 break;
3266 }
3267 optind++;
3268 r++;
3269 if (!strcmp(r, "-")) {
3270 break;
3271 }
3272
3273 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3274 if (!strcmp(r, arginfo->argv)) {
3275 if (arginfo->has_arg) {
3276 if (optind >= argc) {
3277 usage();
3278 }
3279 arginfo->handle_opt(argv[optind]);
3280 optind++;
3281 } else {
3282 arginfo->handle_opt(NULL);
3283 }
3284 break;
3285 }
3286 }
3287
3288 /* no option matched the current argv */
3289 if (arginfo->handle_opt == NULL) {
3290 usage();
3291 }
3292 }
3293
3294 if (optind >= argc) {
3295 usage();
3296 }
3297
3298 filename = argv[optind];
3299 exec_path = argv[optind];
3300
3301 return optind;
3302 }
3303
3304 int main(int argc, char **argv, char **envp)
3305 {
3306 const char *log_file = DEBUG_LOGFILE;
3307 struct target_pt_regs regs1, *regs = &regs1;
3308 struct image_info info1, *info = &info1;
3309 struct linux_binprm bprm;
3310 TaskState *ts;
3311 CPUArchState *env;
3312 int optind;
3313 char **target_environ, **wrk;
3314 char **target_argv;
3315 int target_argc;
3316 int i;
3317 int ret;
3318
3319 module_call_init(MODULE_INIT_QOM);
3320
3321 qemu_cache_utils_init(envp);
3322
3323 if ((envlist = envlist_create()) == NULL) {
3324 (void) fprintf(stderr, "Unable to allocate envlist\n");
3325 exit(1);
3326 }
3327
3328 /* add current environment into the list */
3329 for (wrk = environ; *wrk != NULL; wrk++) {
3330 (void) envlist_setenv(envlist, *wrk);
3331 }
3332
3333 /* Read the stack limit from the kernel. If it's "unlimited",
3334 then we can do little else besides use the default. */
3335 {
3336 struct rlimit lim;
3337 if (getrlimit(RLIMIT_STACK, &lim) == 0
3338 && lim.rlim_cur != RLIM_INFINITY
3339 && lim.rlim_cur == (target_long)lim.rlim_cur) {
3340 guest_stack_size = lim.rlim_cur;
3341 }
3342 }
3343
3344 cpu_model = NULL;
3345 #if defined(cpudef_setup)
3346 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3347 #endif
3348
3349 /* init debug */
3350 cpu_set_log_filename(log_file);
3351 optind = parse_args(argc, argv);
3352
3353 /* Zero out regs */
3354 memset(regs, 0, sizeof(struct target_pt_regs));
3355
3356 /* Zero out image_info */
3357 memset(info, 0, sizeof(struct image_info));
3358
3359 memset(&bprm, 0, sizeof (bprm));
3360
3361 /* Scan interp_prefix dir for replacement files. */
3362 init_paths(interp_prefix);
3363
3364 if (cpu_model == NULL) {
3365 #if defined(TARGET_I386)
3366 #ifdef TARGET_X86_64
3367 cpu_model = "qemu64";
3368 #else
3369 cpu_model = "qemu32";
3370 #endif
3371 #elif defined(TARGET_ARM)
3372 cpu_model = "any";
3373 #elif defined(TARGET_UNICORE32)
3374 cpu_model = "any";
3375 #elif defined(TARGET_M68K)
3376 cpu_model = "any";
3377 #elif defined(TARGET_SPARC)
3378 #ifdef TARGET_SPARC64
3379 cpu_model = "TI UltraSparc II";
3380 #else
3381 cpu_model = "Fujitsu MB86904";
3382 #endif
3383 #elif defined(TARGET_MIPS)
3384 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3385 cpu_model = "20Kc";
3386 #else
3387 cpu_model = "24Kf";
3388 #endif
3389 #elif defined(TARGET_PPC)
3390 #ifdef TARGET_PPC64
3391 cpu_model = "970fx";
3392 #else
3393 cpu_model = "750";
3394 #endif
3395 #else
3396 cpu_model = "any";
3397 #endif
3398 }
3399 tcg_exec_init(0);
3400 cpu_exec_init_all();
3401 /* NOTE: we need to init the CPU at this stage to get
3402 qemu_host_page_size */
3403 env = cpu_init(cpu_model);
3404 if (!env) {
3405 fprintf(stderr, "Unable to find CPU definition\n");
3406 exit(1);
3407 }
3408 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3409 cpu_reset(ENV_GET_CPU(env));
3410 #endif
3411
3412 thread_env = env;
3413
3414 if (getenv("QEMU_STRACE")) {
3415 do_strace = 1;
3416 }
3417
3418 target_environ = envlist_to_environ(envlist, NULL);
3419 envlist_free(envlist);
3420
3421 #if defined(CONFIG_USE_GUEST_BASE)
3422 /*
3423 * Now that page sizes are configured in cpu_init() we can do
3424 * proper page alignment for guest_base.
3425 */
3426 guest_base = HOST_PAGE_ALIGN(guest_base);
3427
3428 if (reserved_va) {
3429 void *p;
3430 int flags;
3431
3432 flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
3433 if (have_guest_base) {
3434 flags |= MAP_FIXED;
3435 }
3436 p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0);
3437 if (p == MAP_FAILED) {
3438 fprintf(stderr, "Unable to reserve guest address space\n");
3439 exit(1);
3440 }
3441 guest_base = (unsigned long)p;
3442 /* Make sure the address is properly aligned. */
3443 if (guest_base & ~qemu_host_page_mask) {
3444 munmap(p, reserved_va);
3445 p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
3446 PROT_NONE, flags, -1, 0);
3447 if (p == MAP_FAILED) {
3448 fprintf(stderr, "Unable to reserve guest address space\n");
3449 exit(1);
3450 }
3451 guest_base = HOST_PAGE_ALIGN((unsigned long)p);
3452 }
3453 qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
3454 mmap_next_start = reserved_va;
3455 }
3456
3457 if (reserved_va || have_guest_base) {
3458 if (!guest_validate_base(guest_base)) {
3459 fprintf(stderr, "Guest base/Reserved VA rejected by guest code\n");
3460 exit(1);
3461 }
3462 }
3463 #endif /* CONFIG_USE_GUEST_BASE */
3464
3465 /*
3466 * Read in mmap_min_addr kernel parameter. This value is used
3467 * When loading the ELF image to determine whether guest_base
3468 * is needed. It is also used in mmap_find_vma.
3469 */
3470 {
3471 FILE *fp;
3472
3473 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3474 unsigned long tmp;
3475 if (fscanf(fp, "%lu", &tmp) == 1) {
3476 mmap_min_addr = tmp;
3477 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3478 }
3479 fclose(fp);
3480 }
3481 }
3482
3483 /*
3484 * Prepare copy of argv vector for target.
3485 */
3486 target_argc = argc - optind;
3487 target_argv = calloc(target_argc + 1, sizeof (char *));
3488 if (target_argv == NULL) {
3489 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3490 exit(1);
3491 }
3492
3493 /*
3494 * If argv0 is specified (using '-0' switch) we replace
3495 * argv[0] pointer with the given one.
3496 */
3497 i = 0;
3498 if (argv0 != NULL) {
3499 target_argv[i++] = strdup(argv0);
3500 }
3501 for (; i < target_argc; i++) {
3502 target_argv[i] = strdup(argv[optind + i]);
3503 }
3504 target_argv[target_argc] = NULL;
3505
3506 ts = g_malloc0 (sizeof(TaskState));
3507 init_task_state(ts);
3508 /* build Task State */
3509 ts->info = info;
3510 ts->bprm = &bprm;
3511 env->opaque = ts;
3512 task_settid(ts);
3513
3514 ret = loader_exec(filename, target_argv, target_environ, regs,
3515 info, &bprm);
3516 if (ret != 0) {
3517 printf("Error %d while loading %s\n", ret, filename);
3518 _exit(1);
3519 }
3520
3521 for (wrk = target_environ; *wrk; wrk++) {
3522 free(*wrk);
3523 }
3524
3525 free(target_environ);
3526
3527 if (qemu_log_enabled()) {
3528 #if defined(CONFIG_USE_GUEST_BASE)
3529 qemu_log("guest_base 0x%lx\n", guest_base);
3530 #endif
3531 log_page_dump();
3532
3533 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3534 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3535 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3536 info->start_code);
3537 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3538 info->start_data);
3539 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3540 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3541 info->start_stack);
3542 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3543 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3544 }
3545
3546 target_set_brk(info->brk);
3547 syscall_init();
3548 signal_init();
3549
3550 #if defined(CONFIG_USE_GUEST_BASE)
3551 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3552 generating the prologue until now so that the prologue can take
3553 the real value of GUEST_BASE into account. */
3554 tcg_prologue_init(&tcg_ctx);
3555 #endif
3556
3557 #if defined(TARGET_I386)
3558 cpu_x86_set_cpl(env, 3);
3559
3560 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
3561 env->hflags |= HF_PE_MASK;
3562 if (env->cpuid_features & CPUID_SSE) {
3563 env->cr[4] |= CR4_OSFXSR_MASK;
3564 env->hflags |= HF_OSFXSR_MASK;
3565 }
3566 #ifndef TARGET_ABI32
3567 /* enable 64 bit mode if possible */
3568 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3569 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3570 exit(1);
3571 }
3572 env->cr[4] |= CR4_PAE_MASK;
3573 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
3574 env->hflags |= HF_LMA_MASK;
3575 #endif
3576
3577 /* flags setup : we activate the IRQs by default as in user mode */
3578 env->eflags |= IF_MASK;
3579
3580 /* linux register setup */
3581 #ifndef TARGET_ABI32
3582 env->regs[R_EAX] = regs->rax;
3583 env->regs[R_EBX] = regs->rbx;
3584 env->regs[R_ECX] = regs->rcx;
3585 env->regs[R_EDX] = regs->rdx;
3586 env->regs[R_ESI] = regs->rsi;
3587 env->regs[R_EDI] = regs->rdi;
3588 env->regs[R_EBP] = regs->rbp;
3589 env->regs[R_ESP] = regs->rsp;
3590 env->eip = regs->rip;
3591 #else
3592 env->regs[R_EAX] = regs->eax;
3593 env->regs[R_EBX] = regs->ebx;
3594 env->regs[R_ECX] = regs->ecx;
3595 env->regs[R_EDX] = regs->edx;
3596 env->regs[R_ESI] = regs->esi;
3597 env->regs[R_EDI] = regs->edi;
3598 env->regs[R_EBP] = regs->ebp;
3599 env->regs[R_ESP] = regs->esp;
3600 env->eip = regs->eip;
3601 #endif
3602
3603 /* linux interrupt setup */
3604 #ifndef TARGET_ABI32
3605 env->idt.limit = 511;
3606 #else
3607 env->idt.limit = 255;
3608 #endif
3609 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
3610 PROT_READ|PROT_WRITE,
3611 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3612 idt_table = g2h(env->idt.base);
3613 set_idt(0, 0);
3614 set_idt(1, 0);
3615 set_idt(2, 0);
3616 set_idt(3, 3);
3617 set_idt(4, 3);
3618 set_idt(5, 0);
3619 set_idt(6, 0);
3620 set_idt(7, 0);
3621 set_idt(8, 0);
3622 set_idt(9, 0);
3623 set_idt(10, 0);
3624 set_idt(11, 0);
3625 set_idt(12, 0);
3626 set_idt(13, 0);
3627 set_idt(14, 0);
3628 set_idt(15, 0);
3629 set_idt(16, 0);
3630 set_idt(17, 0);
3631 set_idt(18, 0);
3632 set_idt(19, 0);
3633 set_idt(0x80, 3);
3634
3635 /* linux segment setup */
3636 {
3637 uint64_t *gdt_table;
3638 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3639 PROT_READ|PROT_WRITE,
3640 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3641 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
3642 gdt_table = g2h(env->gdt.base);
3643 #ifdef TARGET_ABI32
3644 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3645 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3646 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3647 #else
3648 /* 64 bit code segment */
3649 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3650 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3651 DESC_L_MASK |
3652 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3653 #endif
3654 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3655 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3656 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3657 }
3658 cpu_x86_load_seg(env, R_CS, __USER_CS);
3659 cpu_x86_load_seg(env, R_SS, __USER_DS);
3660 #ifdef TARGET_ABI32
3661 cpu_x86_load_seg(env, R_DS, __USER_DS);
3662 cpu_x86_load_seg(env, R_ES, __USER_DS);
3663 cpu_x86_load_seg(env, R_FS, __USER_DS);
3664 cpu_x86_load_seg(env, R_GS, __USER_DS);
3665 /* This hack makes Wine work... */
3666 env->segs[R_FS].selector = 0;
3667 #else
3668 cpu_x86_load_seg(env, R_DS, 0);
3669 cpu_x86_load_seg(env, R_ES, 0);
3670 cpu_x86_load_seg(env, R_FS, 0);
3671 cpu_x86_load_seg(env, R_GS, 0);
3672 #endif
3673 #elif defined(TARGET_ARM)
3674 {
3675 int i;
3676 cpsr_write(env, regs->uregs[16], 0xffffffff);
3677 for(i = 0; i < 16; i++) {
3678 env->regs[i] = regs->uregs[i];
3679 }
3680 /* Enable BE8. */
3681 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
3682 && (info->elf_flags & EF_ARM_BE8)) {
3683 env->bswap_code = 1;
3684 }
3685 }
3686 #elif defined(TARGET_UNICORE32)
3687 {
3688 int i;
3689 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
3690 for (i = 0; i < 32; i++) {
3691 env->regs[i] = regs->uregs[i];
3692 }
3693 }
3694 #elif defined(TARGET_SPARC)
3695 {
3696 int i;
3697 env->pc = regs->pc;
3698 env->npc = regs->npc;
3699 env->y = regs->y;
3700 for(i = 0; i < 8; i++)
3701 env->gregs[i] = regs->u_regs[i];
3702 for(i = 0; i < 8; i++)
3703 env->regwptr[i] = regs->u_regs[i + 8];
3704 }
3705 #elif defined(TARGET_PPC)
3706 {
3707 int i;
3708
3709 #if defined(TARGET_PPC64)
3710 #if defined(TARGET_ABI32)
3711 env->msr &= ~((target_ulong)1 << MSR_SF);
3712 #else
3713 env->msr |= (target_ulong)1 << MSR_SF;
3714 #endif
3715 #endif
3716 env->nip = regs->nip;
3717 for(i = 0; i < 32; i++) {
3718 env->gpr[i] = regs->gpr[i];
3719 }
3720 }
3721 #elif defined(TARGET_M68K)
3722 {
3723 env->pc = regs->pc;
3724 env->dregs[0] = regs->d0;
3725 env->dregs[1] = regs->d1;
3726 env->dregs[2] = regs->d2;
3727 env->dregs[3] = regs->d3;
3728 env->dregs[4] = regs->d4;
3729 env->dregs[5] = regs->d5;
3730 env->dregs[6] = regs->d6;
3731 env->dregs[7] = regs->d7;
3732 env->aregs[0] = regs->a0;
3733 env->aregs[1] = regs->a1;
3734 env->aregs[2] = regs->a2;
3735 env->aregs[3] = regs->a3;
3736 env->aregs[4] = regs->a4;
3737 env->aregs[5] = regs->a5;
3738 env->aregs[6] = regs->a6;
3739 env->aregs[7] = regs->usp;
3740 env->sr = regs->sr;
3741 ts->sim_syscalls = 1;
3742 }
3743 #elif defined(TARGET_MICROBLAZE)
3744 {
3745 env->regs[0] = regs->r0;
3746 env->regs[1] = regs->r1;
3747 env->regs[2] = regs->r2;
3748 env->regs[3] = regs->r3;
3749 env->regs[4] = regs->r4;
3750 env->regs[5] = regs->r5;
3751 env->regs[6] = regs->r6;
3752 env->regs[7] = regs->r7;
3753 env->regs[8] = regs->r8;
3754 env->regs[9] = regs->r9;
3755 env->regs[10] = regs->r10;
3756 env->regs[11] = regs->r11;
3757 env->regs[12] = regs->r12;
3758 env->regs[13] = regs->r13;
3759 env->regs[14] = regs->r14;
3760 env->regs[15] = regs->r15;
3761 env->regs[16] = regs->r16;
3762 env->regs[17] = regs->r17;
3763 env->regs[18] = regs->r18;
3764 env->regs[19] = regs->r19;
3765 env->regs[20] = regs->r20;
3766 env->regs[21] = regs->r21;
3767 env->regs[22] = regs->r22;
3768 env->regs[23] = regs->r23;
3769 env->regs[24] = regs->r24;
3770 env->regs[25] = regs->r25;
3771 env->regs[26] = regs->r26;
3772 env->regs[27] = regs->r27;
3773 env->regs[28] = regs->r28;
3774 env->regs[29] = regs->r29;
3775 env->regs[30] = regs->r30;
3776 env->regs[31] = regs->r31;
3777 env->sregs[SR_PC] = regs->pc;
3778 }
3779 #elif defined(TARGET_MIPS)
3780 {
3781 int i;
3782
3783 for(i = 0; i < 32; i++) {
3784 env->active_tc.gpr[i] = regs->regs[i];
3785 }
3786 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
3787 if (regs->cp0_epc & 1) {
3788 env->hflags |= MIPS_HFLAG_M16;
3789 }
3790 }
3791 #elif defined(TARGET_SH4)
3792 {
3793 int i;
3794
3795 for(i = 0; i < 16; i++) {
3796 env->gregs[i] = regs->regs[i];
3797 }
3798 env->pc = regs->pc;
3799 }
3800 #elif defined(TARGET_ALPHA)
3801 {
3802 int i;
3803
3804 for(i = 0; i < 28; i++) {
3805 env->ir[i] = ((abi_ulong *)regs)[i];
3806 }
3807 env->ir[IR_SP] = regs->usp;
3808 env->pc = regs->pc;
3809 }
3810 #elif defined(TARGET_CRIS)
3811 {
3812 env->regs[0] = regs->r0;
3813 env->regs[1] = regs->r1;
3814 env->regs[2] = regs->r2;
3815 env->regs[3] = regs->r3;
3816 env->regs[4] = regs->r4;
3817 env->regs[5] = regs->r5;
3818 env->regs[6] = regs->r6;
3819 env->regs[7] = regs->r7;
3820 env->regs[8] = regs->r8;
3821 env->regs[9] = regs->r9;
3822 env->regs[10] = regs->r10;
3823 env->regs[11] = regs->r11;
3824 env->regs[12] = regs->r12;
3825 env->regs[13] = regs->r13;
3826 env->regs[14] = info->start_stack;
3827 env->regs[15] = regs->acr;
3828 env->pc = regs->erp;
3829 }
3830 #elif defined(TARGET_S390X)
3831 {
3832 int i;
3833 for (i = 0; i < 16; i++) {
3834 env->regs[i] = regs->gprs[i];
3835 }
3836 env->psw.mask = regs->psw.mask;
3837 env->psw.addr = regs->psw.addr;
3838 }
3839 #else
3840 #error unsupported target CPU
3841 #endif
3842
3843 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
3844 ts->stack_base = info->start_stack;
3845 ts->heap_base = info->brk;
3846 /* This will be filled in on the first SYS_HEAPINFO call. */
3847 ts->heap_limit = 0;
3848 #endif
3849
3850 if (gdbstub_port) {
3851 if (gdbserver_start(gdbstub_port) < 0) {
3852 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
3853 gdbstub_port);
3854 exit(1);
3855 }
3856 gdb_handlesig(env, 0);
3857 }
3858 cpu_loop(env);
3859 /* never exits */
3860 return 0;
3861 }
Qemu copy for testing