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Merge remote-tracking branch 'stefanha/block' into staging
[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "sysemu/kvm.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25
26 //#define DEBUG_UNASSIGNED
27
28 static unsigned memory_region_transaction_depth;
29 static bool memory_region_update_pending;
30 static bool global_dirty_log = false;
31
32 /* flat_view_mutex is taken around reading as->current_map; the critical
33 * section is extremely short, so I'm using a single mutex for every AS.
34 * We could also RCU for the read-side.
35 *
36 * The BQL is taken around transaction commits, hence both locks are taken
37 * while writing to as->current_map (with the BQL taken outside).
38 */
39 static QemuMutex flat_view_mutex;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 static void memory_init(void)
48 {
49 qemu_mutex_init(&flat_view_mutex);
50 }
51
52 typedef struct AddrRange AddrRange;
53
54 /*
55 * Note using signed integers limits us to physical addresses at most
56 * 63 bits wide. They are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 static bool memory_listener_match(MemoryListener *listener,
107 MemoryRegionSection *section)
108 {
109 return !listener->address_space_filter
110 || listener->address_space_filter == section->address_space;
111 }
112
113 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
128 if (_listener->_callback) { \
129 _listener->_callback(_listener, ##_args); \
130 } \
131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
138 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
139 do { \
140 MemoryListener *_listener; \
141 \
142 switch (_direction) { \
143 case Forward: \
144 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 case Reverse: \
152 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
153 memory_listeners, link) { \
154 if (_listener->_callback \
155 && memory_listener_match(_listener, _section)) { \
156 _listener->_callback(_listener, _section, ##_args); \
157 } \
158 } \
159 break; \
160 default: \
161 abort(); \
162 } \
163 } while (0)
164
165 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
166 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
167 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
168 .mr = (fr)->mr, \
169 .address_space = (as), \
170 .offset_within_region = (fr)->offset_in_region, \
171 .size = (fr)->addr.size, \
172 .offset_within_address_space = int128_get64((fr)->addr.start), \
173 .readonly = (fr)->readonly, \
174 }))
175
176 struct CoalescedMemoryRange {
177 AddrRange addr;
178 QTAILQ_ENTRY(CoalescedMemoryRange) link;
179 };
180
181 struct MemoryRegionIoeventfd {
182 AddrRange addr;
183 bool match_data;
184 uint64_t data;
185 EventNotifier *e;
186 };
187
188 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
189 MemoryRegionIoeventfd b)
190 {
191 if (int128_lt(a.addr.start, b.addr.start)) {
192 return true;
193 } else if (int128_gt(a.addr.start, b.addr.start)) {
194 return false;
195 } else if (int128_lt(a.addr.size, b.addr.size)) {
196 return true;
197 } else if (int128_gt(a.addr.size, b.addr.size)) {
198 return false;
199 } else if (a.match_data < b.match_data) {
200 return true;
201 } else if (a.match_data > b.match_data) {
202 return false;
203 } else if (a.match_data) {
204 if (a.data < b.data) {
205 return true;
206 } else if (a.data > b.data) {
207 return false;
208 }
209 }
210 if (a.e < b.e) {
211 return true;
212 } else if (a.e > b.e) {
213 return false;
214 }
215 return false;
216 }
217
218 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
219 MemoryRegionIoeventfd b)
220 {
221 return !memory_region_ioeventfd_before(a, b)
222 && !memory_region_ioeventfd_before(b, a);
223 }
224
225 typedef struct FlatRange FlatRange;
226 typedef struct FlatView FlatView;
227
228 /* Range of memory in the global map. Addresses are absolute. */
229 struct FlatRange {
230 MemoryRegion *mr;
231 hwaddr offset_in_region;
232 AddrRange addr;
233 uint8_t dirty_log_mask;
234 bool romd_mode;
235 bool readonly;
236 };
237
238 /* Flattened global view of current active memory hierarchy. Kept in sorted
239 * order.
240 */
241 struct FlatView {
242 unsigned ref;
243 FlatRange *ranges;
244 unsigned nr;
245 unsigned nr_allocated;
246 };
247
248 typedef struct AddressSpaceOps AddressSpaceOps;
249
250 #define FOR_EACH_FLAT_RANGE(var, view) \
251 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
252
253 static bool flatrange_equal(FlatRange *a, FlatRange *b)
254 {
255 return a->mr == b->mr
256 && addrrange_equal(a->addr, b->addr)
257 && a->offset_in_region == b->offset_in_region
258 && a->romd_mode == b->romd_mode
259 && a->readonly == b->readonly;
260 }
261
262 static void flatview_init(FlatView *view)
263 {
264 view->ref = 1;
265 view->ranges = NULL;
266 view->nr = 0;
267 view->nr_allocated = 0;
268 }
269
270 /* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274 {
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
277 view->ranges = g_realloc(view->ranges,
278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
283 memory_region_ref(range->mr);
284 ++view->nr;
285 }
286
287 static void flatview_destroy(FlatView *view)
288 {
289 int i;
290
291 for (i = 0; i < view->nr; i++) {
292 memory_region_unref(view->ranges[i].mr);
293 }
294 g_free(view->ranges);
295 g_free(view);
296 }
297
298 static void flatview_ref(FlatView *view)
299 {
300 atomic_inc(&view->ref);
301 }
302
303 static void flatview_unref(FlatView *view)
304 {
305 if (atomic_fetch_dec(&view->ref) == 1) {
306 flatview_destroy(view);
307 }
308 }
309
310 static bool can_merge(FlatRange *r1, FlatRange *r2)
311 {
312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
313 && r1->mr == r2->mr
314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
317 && r1->dirty_log_mask == r2->dirty_log_mask
318 && r1->romd_mode == r2->romd_mode
319 && r1->readonly == r2->readonly;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340 }
341
342 static void memory_region_oldmmio_read_accessor(void *opaque,
343 hwaddr addr,
344 uint64_t *value,
345 unsigned size,
346 unsigned shift,
347 uint64_t mask)
348 {
349 MemoryRegion *mr = opaque;
350 uint64_t tmp;
351
352 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
353 *value |= (tmp & mask) << shift;
354 }
355
356 static void memory_region_read_accessor(void *opaque,
357 hwaddr addr,
358 uint64_t *value,
359 unsigned size,
360 unsigned shift,
361 uint64_t mask)
362 {
363 MemoryRegion *mr = opaque;
364 uint64_t tmp;
365
366 if (mr->flush_coalesced_mmio) {
367 qemu_flush_coalesced_mmio_buffer();
368 }
369 tmp = mr->ops->read(mr->opaque, addr, size);
370 *value |= (tmp & mask) << shift;
371 }
372
373 static void memory_region_oldmmio_write_accessor(void *opaque,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask)
379 {
380 MemoryRegion *mr = opaque;
381 uint64_t tmp;
382
383 tmp = (*value >> shift) & mask;
384 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
385 }
386
387 static void memory_region_write_accessor(void *opaque,
388 hwaddr addr,
389 uint64_t *value,
390 unsigned size,
391 unsigned shift,
392 uint64_t mask)
393 {
394 MemoryRegion *mr = opaque;
395 uint64_t tmp;
396
397 if (mr->flush_coalesced_mmio) {
398 qemu_flush_coalesced_mmio_buffer();
399 }
400 tmp = (*value >> shift) & mask;
401 mr->ops->write(mr->opaque, addr, tmp, size);
402 }
403
404 static void access_with_adjusted_size(hwaddr addr,
405 uint64_t *value,
406 unsigned size,
407 unsigned access_size_min,
408 unsigned access_size_max,
409 void (*access)(void *opaque,
410 hwaddr addr,
411 uint64_t *value,
412 unsigned size,
413 unsigned shift,
414 uint64_t mask),
415 void *opaque)
416 {
417 uint64_t access_mask;
418 unsigned access_size;
419 unsigned i;
420
421 if (!access_size_min) {
422 access_size_min = 1;
423 }
424 if (!access_size_max) {
425 access_size_max = 4;
426 }
427
428 /* FIXME: support unaligned access? */
429 access_size = MAX(MIN(size, access_size_max), access_size_min);
430 access_mask = -1ULL >> (64 - access_size * 8);
431 for (i = 0; i < size; i += access_size) {
432 #ifdef TARGET_WORDS_BIGENDIAN
433 access(opaque, addr + i, value, access_size,
434 (size - access_size - i) * 8, access_mask);
435 #else
436 access(opaque, addr + i, value, access_size, i * 8, access_mask);
437 #endif
438 }
439 }
440
441 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
442 {
443 AddressSpace *as;
444
445 while (mr->parent) {
446 mr = mr->parent;
447 }
448 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
449 if (mr == as->root) {
450 return as;
451 }
452 }
453 abort();
454 }
455
456 /* Render a memory region into the global view. Ranges in @view obscure
457 * ranges in @mr.
458 */
459 static void render_memory_region(FlatView *view,
460 MemoryRegion *mr,
461 Int128 base,
462 AddrRange clip,
463 bool readonly)
464 {
465 MemoryRegion *subregion;
466 unsigned i;
467 hwaddr offset_in_region;
468 Int128 remain;
469 Int128 now;
470 FlatRange fr;
471 AddrRange tmp;
472
473 if (!mr->enabled) {
474 return;
475 }
476
477 int128_addto(&base, int128_make64(mr->addr));
478 readonly |= mr->readonly;
479
480 tmp = addrrange_make(base, mr->size);
481
482 if (!addrrange_intersects(tmp, clip)) {
483 return;
484 }
485
486 clip = addrrange_intersection(tmp, clip);
487
488 if (mr->alias) {
489 int128_subfrom(&base, int128_make64(mr->alias->addr));
490 int128_subfrom(&base, int128_make64(mr->alias_offset));
491 render_memory_region(view, mr->alias, base, clip, readonly);
492 return;
493 }
494
495 /* Render subregions in priority order. */
496 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
497 render_memory_region(view, subregion, base, clip, readonly);
498 }
499
500 if (!mr->terminates) {
501 return;
502 }
503
504 offset_in_region = int128_get64(int128_sub(clip.start, base));
505 base = clip.start;
506 remain = clip.size;
507
508 fr.mr = mr;
509 fr.dirty_log_mask = mr->dirty_log_mask;
510 fr.romd_mode = mr->romd_mode;
511 fr.readonly = readonly;
512
513 /* Render the region itself into any gaps left by the current view. */
514 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
515 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
516 continue;
517 }
518 if (int128_lt(base, view->ranges[i].addr.start)) {
519 now = int128_min(remain,
520 int128_sub(view->ranges[i].addr.start, base));
521 fr.offset_in_region = offset_in_region;
522 fr.addr = addrrange_make(base, now);
523 flatview_insert(view, i, &fr);
524 ++i;
525 int128_addto(&base, now);
526 offset_in_region += int128_get64(now);
527 int128_subfrom(&remain, now);
528 }
529 now = int128_sub(int128_min(int128_add(base, remain),
530 addrrange_end(view->ranges[i].addr)),
531 base);
532 int128_addto(&base, now);
533 offset_in_region += int128_get64(now);
534 int128_subfrom(&remain, now);
535 }
536 if (int128_nz(remain)) {
537 fr.offset_in_region = offset_in_region;
538 fr.addr = addrrange_make(base, remain);
539 flatview_insert(view, i, &fr);
540 }
541 }
542
543 /* Render a memory topology into a list of disjoint absolute ranges. */
544 static FlatView *generate_memory_topology(MemoryRegion *mr)
545 {
546 FlatView *view;
547
548 view = g_new(FlatView, 1);
549 flatview_init(view);
550
551 if (mr) {
552 render_memory_region(view, mr, int128_zero(),
553 addrrange_make(int128_zero(), int128_2_64()), false);
554 }
555 flatview_simplify(view);
556
557 return view;
558 }
559
560 static void address_space_add_del_ioeventfds(AddressSpace *as,
561 MemoryRegionIoeventfd *fds_new,
562 unsigned fds_new_nb,
563 MemoryRegionIoeventfd *fds_old,
564 unsigned fds_old_nb)
565 {
566 unsigned iold, inew;
567 MemoryRegionIoeventfd *fd;
568 MemoryRegionSection section;
569
570 /* Generate a symmetric difference of the old and new fd sets, adding
571 * and deleting as necessary.
572 */
573
574 iold = inew = 0;
575 while (iold < fds_old_nb || inew < fds_new_nb) {
576 if (iold < fds_old_nb
577 && (inew == fds_new_nb
578 || memory_region_ioeventfd_before(fds_old[iold],
579 fds_new[inew]))) {
580 fd = &fds_old[iold];
581 section = (MemoryRegionSection) {
582 .address_space = as,
583 .offset_within_address_space = int128_get64(fd->addr.start),
584 .size = fd->addr.size,
585 };
586 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
587 fd->match_data, fd->data, fd->e);
588 ++iold;
589 } else if (inew < fds_new_nb
590 && (iold == fds_old_nb
591 || memory_region_ioeventfd_before(fds_new[inew],
592 fds_old[iold]))) {
593 fd = &fds_new[inew];
594 section = (MemoryRegionSection) {
595 .address_space = as,
596 .offset_within_address_space = int128_get64(fd->addr.start),
597 .size = fd->addr.size,
598 };
599 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
600 fd->match_data, fd->data, fd->e);
601 ++inew;
602 } else {
603 ++iold;
604 ++inew;
605 }
606 }
607 }
608
609 static FlatView *address_space_get_flatview(AddressSpace *as)
610 {
611 FlatView *view;
612
613 qemu_mutex_lock(&flat_view_mutex);
614 view = as->current_map;
615 flatview_ref(view);
616 qemu_mutex_unlock(&flat_view_mutex);
617 return view;
618 }
619
620 static void address_space_update_ioeventfds(AddressSpace *as)
621 {
622 FlatView *view;
623 FlatRange *fr;
624 unsigned ioeventfd_nb = 0;
625 MemoryRegionIoeventfd *ioeventfds = NULL;
626 AddrRange tmp;
627 unsigned i;
628
629 view = address_space_get_flatview(as);
630 FOR_EACH_FLAT_RANGE(fr, view) {
631 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
632 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
633 int128_sub(fr->addr.start,
634 int128_make64(fr->offset_in_region)));
635 if (addrrange_intersects(fr->addr, tmp)) {
636 ++ioeventfd_nb;
637 ioeventfds = g_realloc(ioeventfds,
638 ioeventfd_nb * sizeof(*ioeventfds));
639 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
640 ioeventfds[ioeventfd_nb-1].addr = tmp;
641 }
642 }
643 }
644
645 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
646 as->ioeventfds, as->ioeventfd_nb);
647
648 g_free(as->ioeventfds);
649 as->ioeventfds = ioeventfds;
650 as->ioeventfd_nb = ioeventfd_nb;
651 flatview_unref(view);
652 }
653
654 static void address_space_update_topology_pass(AddressSpace *as,
655 const FlatView *old_view,
656 const FlatView *new_view,
657 bool adding)
658 {
659 unsigned iold, inew;
660 FlatRange *frold, *frnew;
661
662 /* Generate a symmetric difference of the old and new memory maps.
663 * Kill ranges in the old map, and instantiate ranges in the new map.
664 */
665 iold = inew = 0;
666 while (iold < old_view->nr || inew < new_view->nr) {
667 if (iold < old_view->nr) {
668 frold = &old_view->ranges[iold];
669 } else {
670 frold = NULL;
671 }
672 if (inew < new_view->nr) {
673 frnew = &new_view->ranges[inew];
674 } else {
675 frnew = NULL;
676 }
677
678 if (frold
679 && (!frnew
680 || int128_lt(frold->addr.start, frnew->addr.start)
681 || (int128_eq(frold->addr.start, frnew->addr.start)
682 && !flatrange_equal(frold, frnew)))) {
683 /* In old but not in new, or in both but attributes changed. */
684
685 if (!adding) {
686 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
687 }
688
689 ++iold;
690 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
691 /* In both and unchanged (except logging may have changed) */
692
693 if (adding) {
694 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
695 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
696 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
697 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
698 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
699 }
700 }
701
702 ++iold;
703 ++inew;
704 } else {
705 /* In new */
706
707 if (adding) {
708 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
709 }
710
711 ++inew;
712 }
713 }
714 }
715
716
717 static void address_space_update_topology(AddressSpace *as)
718 {
719 FlatView *old_view = address_space_get_flatview(as);
720 FlatView *new_view = generate_memory_topology(as->root);
721
722 address_space_update_topology_pass(as, old_view, new_view, false);
723 address_space_update_topology_pass(as, old_view, new_view, true);
724
725 qemu_mutex_lock(&flat_view_mutex);
726 flatview_unref(as->current_map);
727 as->current_map = new_view;
728 qemu_mutex_unlock(&flat_view_mutex);
729
730 /* Note that all the old MemoryRegions are still alive up to this
731 * point. This relieves most MemoryListeners from the need to
732 * ref/unref the MemoryRegions they get---unless they use them
733 * outside the iothread mutex, in which case precise reference
734 * counting is necessary.
735 */
736 flatview_unref(old_view);
737
738 address_space_update_ioeventfds(as);
739 }
740
741 void memory_region_transaction_begin(void)
742 {
743 qemu_flush_coalesced_mmio_buffer();
744 ++memory_region_transaction_depth;
745 }
746
747 void memory_region_transaction_commit(void)
748 {
749 AddressSpace *as;
750
751 assert(memory_region_transaction_depth);
752 --memory_region_transaction_depth;
753 if (!memory_region_transaction_depth && memory_region_update_pending) {
754 memory_region_update_pending = false;
755 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
756
757 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
758 address_space_update_topology(as);
759 }
760
761 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
762 }
763 }
764
765 static void memory_region_destructor_none(MemoryRegion *mr)
766 {
767 }
768
769 static void memory_region_destructor_ram(MemoryRegion *mr)
770 {
771 qemu_ram_free(mr->ram_addr);
772 }
773
774 static void memory_region_destructor_alias(MemoryRegion *mr)
775 {
776 memory_region_unref(mr->alias);
777 }
778
779 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
780 {
781 qemu_ram_free_from_ptr(mr->ram_addr);
782 }
783
784 static void memory_region_destructor_rom_device(MemoryRegion *mr)
785 {
786 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
787 }
788
789 static bool memory_region_wrong_endianness(MemoryRegion *mr)
790 {
791 #ifdef TARGET_WORDS_BIGENDIAN
792 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
793 #else
794 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
795 #endif
796 }
797
798 void memory_region_init(MemoryRegion *mr,
799 Object *owner,
800 const char *name,
801 uint64_t size)
802 {
803 mr->ops = &unassigned_mem_ops;
804 mr->opaque = NULL;
805 mr->owner = owner;
806 mr->iommu_ops = NULL;
807 mr->parent = NULL;
808 mr->owner = NULL;
809 mr->size = int128_make64(size);
810 if (size == UINT64_MAX) {
811 mr->size = int128_2_64();
812 }
813 mr->addr = 0;
814 mr->subpage = false;
815 mr->enabled = true;
816 mr->terminates = false;
817 mr->ram = false;
818 mr->romd_mode = true;
819 mr->readonly = false;
820 mr->rom_device = false;
821 mr->destructor = memory_region_destructor_none;
822 mr->priority = 0;
823 mr->may_overlap = false;
824 mr->alias = NULL;
825 QTAILQ_INIT(&mr->subregions);
826 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
827 QTAILQ_INIT(&mr->coalesced);
828 mr->name = g_strdup(name);
829 mr->dirty_log_mask = 0;
830 mr->ioeventfd_nb = 0;
831 mr->ioeventfds = NULL;
832 mr->flush_coalesced_mmio = false;
833 }
834
835 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
836 unsigned size)
837 {
838 #ifdef DEBUG_UNASSIGNED
839 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
840 #endif
841 if (cpu_single_env != NULL) {
842 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
843 addr, false, false, 0, size);
844 }
845 return 0;
846 }
847
848 static void unassigned_mem_write(void *opaque, hwaddr addr,
849 uint64_t val, unsigned size)
850 {
851 #ifdef DEBUG_UNASSIGNED
852 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
853 #endif
854 if (cpu_single_env != NULL) {
855 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
856 addr, true, false, 0, size);
857 }
858 }
859
860 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
861 unsigned size, bool is_write)
862 {
863 return false;
864 }
865
866 const MemoryRegionOps unassigned_mem_ops = {
867 .valid.accepts = unassigned_mem_accepts,
868 .endianness = DEVICE_NATIVE_ENDIAN,
869 };
870
871 bool memory_region_access_valid(MemoryRegion *mr,
872 hwaddr addr,
873 unsigned size,
874 bool is_write)
875 {
876 int access_size_min, access_size_max;
877 int access_size, i;
878
879 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
880 return false;
881 }
882
883 if (!mr->ops->valid.accepts) {
884 return true;
885 }
886
887 access_size_min = mr->ops->valid.min_access_size;
888 if (!mr->ops->valid.min_access_size) {
889 access_size_min = 1;
890 }
891
892 access_size_max = mr->ops->valid.max_access_size;
893 if (!mr->ops->valid.max_access_size) {
894 access_size_max = 4;
895 }
896
897 access_size = MAX(MIN(size, access_size_max), access_size_min);
898 for (i = 0; i < size; i += access_size) {
899 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
900 is_write)) {
901 return false;
902 }
903 }
904
905 return true;
906 }
907
908 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
909 hwaddr addr,
910 unsigned size)
911 {
912 uint64_t data = 0;
913
914 if (mr->ops->read) {
915 access_with_adjusted_size(addr, &data, size,
916 mr->ops->impl.min_access_size,
917 mr->ops->impl.max_access_size,
918 memory_region_read_accessor, mr);
919 } else {
920 access_with_adjusted_size(addr, &data, size, 1, 4,
921 memory_region_oldmmio_read_accessor, mr);
922 }
923
924 return data;
925 }
926
927 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
928 {
929 if (memory_region_wrong_endianness(mr)) {
930 switch (size) {
931 case 1:
932 break;
933 case 2:
934 *data = bswap16(*data);
935 break;
936 case 4:
937 *data = bswap32(*data);
938 break;
939 case 8:
940 *data = bswap64(*data);
941 break;
942 default:
943 abort();
944 }
945 }
946 }
947
948 static bool memory_region_dispatch_read(MemoryRegion *mr,
949 hwaddr addr,
950 uint64_t *pval,
951 unsigned size)
952 {
953 if (!memory_region_access_valid(mr, addr, size, false)) {
954 *pval = unassigned_mem_read(mr, addr, size);
955 return true;
956 }
957
958 *pval = memory_region_dispatch_read1(mr, addr, size);
959 adjust_endianness(mr, pval, size);
960 return false;
961 }
962
963 static bool memory_region_dispatch_write(MemoryRegion *mr,
964 hwaddr addr,
965 uint64_t data,
966 unsigned size)
967 {
968 if (!memory_region_access_valid(mr, addr, size, true)) {
969 unassigned_mem_write(mr, addr, data, size);
970 return true;
971 }
972
973 adjust_endianness(mr, &data, size);
974
975 if (mr->ops->write) {
976 access_with_adjusted_size(addr, &data, size,
977 mr->ops->impl.min_access_size,
978 mr->ops->impl.max_access_size,
979 memory_region_write_accessor, mr);
980 } else {
981 access_with_adjusted_size(addr, &data, size, 1, 4,
982 memory_region_oldmmio_write_accessor, mr);
983 }
984 return false;
985 }
986
987 void memory_region_init_io(MemoryRegion *mr,
988 Object *owner,
989 const MemoryRegionOps *ops,
990 void *opaque,
991 const char *name,
992 uint64_t size)
993 {
994 memory_region_init(mr, owner, name, size);
995 mr->ops = ops;
996 mr->opaque = opaque;
997 mr->terminates = true;
998 mr->ram_addr = ~(ram_addr_t)0;
999 }
1000
1001 void memory_region_init_ram(MemoryRegion *mr,
1002 Object *owner,
1003 const char *name,
1004 uint64_t size)
1005 {
1006 memory_region_init(mr, owner, name, size);
1007 mr->ram = true;
1008 mr->terminates = true;
1009 mr->destructor = memory_region_destructor_ram;
1010 mr->ram_addr = qemu_ram_alloc(size, mr);
1011 }
1012
1013 void memory_region_init_ram_ptr(MemoryRegion *mr,
1014 Object *owner,
1015 const char *name,
1016 uint64_t size,
1017 void *ptr)
1018 {
1019 memory_region_init(mr, owner, name, size);
1020 mr->ram = true;
1021 mr->terminates = true;
1022 mr->destructor = memory_region_destructor_ram_from_ptr;
1023 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1024 }
1025
1026 void memory_region_init_alias(MemoryRegion *mr,
1027 Object *owner,
1028 const char *name,
1029 MemoryRegion *orig,
1030 hwaddr offset,
1031 uint64_t size)
1032 {
1033 memory_region_init(mr, owner, name, size);
1034 memory_region_ref(orig);
1035 mr->destructor = memory_region_destructor_alias;
1036 mr->alias = orig;
1037 mr->alias_offset = offset;
1038 }
1039
1040 void memory_region_init_rom_device(MemoryRegion *mr,
1041 Object *owner,
1042 const MemoryRegionOps *ops,
1043 void *opaque,
1044 const char *name,
1045 uint64_t size)
1046 {
1047 memory_region_init(mr, owner, name, size);
1048 mr->ops = ops;
1049 mr->opaque = opaque;
1050 mr->terminates = true;
1051 mr->rom_device = true;
1052 mr->destructor = memory_region_destructor_rom_device;
1053 mr->ram_addr = qemu_ram_alloc(size, mr);
1054 }
1055
1056 void memory_region_init_iommu(MemoryRegion *mr,
1057 Object *owner,
1058 const MemoryRegionIOMMUOps *ops,
1059 const char *name,
1060 uint64_t size)
1061 {
1062 memory_region_init(mr, owner, name, size);
1063 mr->iommu_ops = ops,
1064 mr->terminates = true; /* then re-forwards */
1065 notifier_list_init(&mr->iommu_notify);
1066 }
1067
1068 void memory_region_init_reservation(MemoryRegion *mr,
1069 Object *owner,
1070 const char *name,
1071 uint64_t size)
1072 {
1073 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1074 }
1075
1076 void memory_region_destroy(MemoryRegion *mr)
1077 {
1078 assert(QTAILQ_EMPTY(&mr->subregions));
1079 assert(memory_region_transaction_depth == 0);
1080 mr->destructor(mr);
1081 memory_region_clear_coalescing(mr);
1082 g_free((char *)mr->name);
1083 g_free(mr->ioeventfds);
1084 }
1085
1086 Object *memory_region_owner(MemoryRegion *mr)
1087 {
1088 return mr->owner;
1089 }
1090
1091 void memory_region_ref(MemoryRegion *mr)
1092 {
1093 if (mr && mr->owner) {
1094 object_ref(mr->owner);
1095 }
1096 }
1097
1098 void memory_region_unref(MemoryRegion *mr)
1099 {
1100 if (mr && mr->owner) {
1101 object_unref(mr->owner);
1102 }
1103 }
1104
1105 uint64_t memory_region_size(MemoryRegion *mr)
1106 {
1107 if (int128_eq(mr->size, int128_2_64())) {
1108 return UINT64_MAX;
1109 }
1110 return int128_get64(mr->size);
1111 }
1112
1113 const char *memory_region_name(MemoryRegion *mr)
1114 {
1115 return mr->name;
1116 }
1117
1118 bool memory_region_is_ram(MemoryRegion *mr)
1119 {
1120 return mr->ram;
1121 }
1122
1123 bool memory_region_is_logging(MemoryRegion *mr)
1124 {
1125 return mr->dirty_log_mask;
1126 }
1127
1128 bool memory_region_is_rom(MemoryRegion *mr)
1129 {
1130 return mr->ram && mr->readonly;
1131 }
1132
1133 bool memory_region_is_iommu(MemoryRegion *mr)
1134 {
1135 return mr->iommu_ops;
1136 }
1137
1138 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1139 {
1140 notifier_list_add(&mr->iommu_notify, n);
1141 }
1142
1143 void memory_region_unregister_iommu_notifier(Notifier *n)
1144 {
1145 notifier_remove(n);
1146 }
1147
1148 void memory_region_notify_iommu(MemoryRegion *mr,
1149 IOMMUTLBEntry entry)
1150 {
1151 assert(memory_region_is_iommu(mr));
1152 notifier_list_notify(&mr->iommu_notify, &entry);
1153 }
1154
1155 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1156 {
1157 uint8_t mask = 1 << client;
1158
1159 memory_region_transaction_begin();
1160 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1161 memory_region_update_pending |= mr->enabled;
1162 memory_region_transaction_commit();
1163 }
1164
1165 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1166 hwaddr size, unsigned client)
1167 {
1168 assert(mr->terminates);
1169 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1170 1 << client);
1171 }
1172
1173 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1174 hwaddr size)
1175 {
1176 assert(mr->terminates);
1177 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1178 }
1179
1180 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1181 hwaddr size, unsigned client)
1182 {
1183 bool ret;
1184 assert(mr->terminates);
1185 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1186 1 << client);
1187 if (ret) {
1188 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1189 mr->ram_addr + addr + size,
1190 1 << client);
1191 }
1192 return ret;
1193 }
1194
1195
1196 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1197 {
1198 AddressSpace *as;
1199 FlatRange *fr;
1200
1201 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1202 FlatView *view = address_space_get_flatview(as);
1203 FOR_EACH_FLAT_RANGE(fr, view) {
1204 if (fr->mr == mr) {
1205 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1206 }
1207 }
1208 flatview_unref(view);
1209 }
1210 }
1211
1212 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1213 {
1214 if (mr->readonly != readonly) {
1215 memory_region_transaction_begin();
1216 mr->readonly = readonly;
1217 memory_region_update_pending |= mr->enabled;
1218 memory_region_transaction_commit();
1219 }
1220 }
1221
1222 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1223 {
1224 if (mr->romd_mode != romd_mode) {
1225 memory_region_transaction_begin();
1226 mr->romd_mode = romd_mode;
1227 memory_region_update_pending |= mr->enabled;
1228 memory_region_transaction_commit();
1229 }
1230 }
1231
1232 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1233 hwaddr size, unsigned client)
1234 {
1235 assert(mr->terminates);
1236 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1237 mr->ram_addr + addr + size,
1238 1 << client);
1239 }
1240
1241 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1242 {
1243 if (mr->alias) {
1244 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1245 }
1246
1247 assert(mr->terminates);
1248
1249 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1250 }
1251
1252 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1253 {
1254 FlatView *view;
1255 FlatRange *fr;
1256 CoalescedMemoryRange *cmr;
1257 AddrRange tmp;
1258 MemoryRegionSection section;
1259
1260 view = address_space_get_flatview(as);
1261 FOR_EACH_FLAT_RANGE(fr, view) {
1262 if (fr->mr == mr) {
1263 section = (MemoryRegionSection) {
1264 .address_space = as,
1265 .offset_within_address_space = int128_get64(fr->addr.start),
1266 .size = fr->addr.size,
1267 };
1268
1269 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1270 int128_get64(fr->addr.start),
1271 int128_get64(fr->addr.size));
1272 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1273 tmp = addrrange_shift(cmr->addr,
1274 int128_sub(fr->addr.start,
1275 int128_make64(fr->offset_in_region)));
1276 if (!addrrange_intersects(tmp, fr->addr)) {
1277 continue;
1278 }
1279 tmp = addrrange_intersection(tmp, fr->addr);
1280 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1281 int128_get64(tmp.start),
1282 int128_get64(tmp.size));
1283 }
1284 }
1285 }
1286 flatview_unref(view);
1287 }
1288
1289 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1290 {
1291 AddressSpace *as;
1292
1293 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1294 memory_region_update_coalesced_range_as(mr, as);
1295 }
1296 }
1297
1298 void memory_region_set_coalescing(MemoryRegion *mr)
1299 {
1300 memory_region_clear_coalescing(mr);
1301 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1302 }
1303
1304 void memory_region_add_coalescing(MemoryRegion *mr,
1305 hwaddr offset,
1306 uint64_t size)
1307 {
1308 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1309
1310 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1311 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1312 memory_region_update_coalesced_range(mr);
1313 memory_region_set_flush_coalesced(mr);
1314 }
1315
1316 void memory_region_clear_coalescing(MemoryRegion *mr)
1317 {
1318 CoalescedMemoryRange *cmr;
1319
1320 qemu_flush_coalesced_mmio_buffer();
1321 mr->flush_coalesced_mmio = false;
1322
1323 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1324 cmr = QTAILQ_FIRST(&mr->coalesced);
1325 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1326 g_free(cmr);
1327 }
1328 memory_region_update_coalesced_range(mr);
1329 }
1330
1331 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1332 {
1333 mr->flush_coalesced_mmio = true;
1334 }
1335
1336 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1337 {
1338 qemu_flush_coalesced_mmio_buffer();
1339 if (QTAILQ_EMPTY(&mr->coalesced)) {
1340 mr->flush_coalesced_mmio = false;
1341 }
1342 }
1343
1344 void memory_region_add_eventfd(MemoryRegion *mr,
1345 hwaddr addr,
1346 unsigned size,
1347 bool match_data,
1348 uint64_t data,
1349 EventNotifier *e)
1350 {
1351 MemoryRegionIoeventfd mrfd = {
1352 .addr.start = int128_make64(addr),
1353 .addr.size = int128_make64(size),
1354 .match_data = match_data,
1355 .data = data,
1356 .e = e,
1357 };
1358 unsigned i;
1359
1360 adjust_endianness(mr, &mrfd.data, size);
1361 memory_region_transaction_begin();
1362 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1363 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1364 break;
1365 }
1366 }
1367 ++mr->ioeventfd_nb;
1368 mr->ioeventfds = g_realloc(mr->ioeventfds,
1369 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1370 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1371 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1372 mr->ioeventfds[i] = mrfd;
1373 memory_region_update_pending |= mr->enabled;
1374 memory_region_transaction_commit();
1375 }
1376
1377 void memory_region_del_eventfd(MemoryRegion *mr,
1378 hwaddr addr,
1379 unsigned size,
1380 bool match_data,
1381 uint64_t data,
1382 EventNotifier *e)
1383 {
1384 MemoryRegionIoeventfd mrfd = {
1385 .addr.start = int128_make64(addr),
1386 .addr.size = int128_make64(size),
1387 .match_data = match_data,
1388 .data = data,
1389 .e = e,
1390 };
1391 unsigned i;
1392
1393 adjust_endianness(mr, &mrfd.data, size);
1394 memory_region_transaction_begin();
1395 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1396 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1397 break;
1398 }
1399 }
1400 assert(i != mr->ioeventfd_nb);
1401 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1402 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1403 --mr->ioeventfd_nb;
1404 mr->ioeventfds = g_realloc(mr->ioeventfds,
1405 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1406 memory_region_update_pending |= mr->enabled;
1407 memory_region_transaction_commit();
1408 }
1409
1410 static void memory_region_add_subregion_common(MemoryRegion *mr,
1411 hwaddr offset,
1412 MemoryRegion *subregion)
1413 {
1414 MemoryRegion *other;
1415
1416 memory_region_transaction_begin();
1417
1418 assert(!subregion->parent);
1419 memory_region_ref(subregion);
1420 subregion->parent = mr;
1421 subregion->addr = offset;
1422 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1423 if (subregion->may_overlap || other->may_overlap) {
1424 continue;
1425 }
1426 if (int128_ge(int128_make64(offset),
1427 int128_add(int128_make64(other->addr), other->size))
1428 || int128_le(int128_add(int128_make64(offset), subregion->size),
1429 int128_make64(other->addr))) {
1430 continue;
1431 }
1432 #if 0
1433 printf("warning: subregion collision %llx/%llx (%s) "
1434 "vs %llx/%llx (%s)\n",
1435 (unsigned long long)offset,
1436 (unsigned long long)int128_get64(subregion->size),
1437 subregion->name,
1438 (unsigned long long)other->addr,
1439 (unsigned long long)int128_get64(other->size),
1440 other->name);
1441 #endif
1442 }
1443 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1444 if (subregion->priority >= other->priority) {
1445 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1446 goto done;
1447 }
1448 }
1449 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1450 done:
1451 memory_region_update_pending |= mr->enabled && subregion->enabled;
1452 memory_region_transaction_commit();
1453 }
1454
1455
1456 void memory_region_add_subregion(MemoryRegion *mr,
1457 hwaddr offset,
1458 MemoryRegion *subregion)
1459 {
1460 subregion->may_overlap = false;
1461 subregion->priority = 0;
1462 memory_region_add_subregion_common(mr, offset, subregion);
1463 }
1464
1465 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1466 hwaddr offset,
1467 MemoryRegion *subregion,
1468 unsigned priority)
1469 {
1470 subregion->may_overlap = true;
1471 subregion->priority = priority;
1472 memory_region_add_subregion_common(mr, offset, subregion);
1473 }
1474
1475 void memory_region_del_subregion(MemoryRegion *mr,
1476 MemoryRegion *subregion)
1477 {
1478 memory_region_transaction_begin();
1479 assert(subregion->parent == mr);
1480 subregion->parent = NULL;
1481 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1482 memory_region_unref(subregion);
1483 memory_region_update_pending |= mr->enabled && subregion->enabled;
1484 memory_region_transaction_commit();
1485 }
1486
1487 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1488 {
1489 if (enabled == mr->enabled) {
1490 return;
1491 }
1492 memory_region_transaction_begin();
1493 mr->enabled = enabled;
1494 memory_region_update_pending = true;
1495 memory_region_transaction_commit();
1496 }
1497
1498 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1499 {
1500 MemoryRegion *parent = mr->parent;
1501 unsigned priority = mr->priority;
1502 bool may_overlap = mr->may_overlap;
1503
1504 if (addr == mr->addr || !parent) {
1505 mr->addr = addr;
1506 return;
1507 }
1508
1509 memory_region_transaction_begin();
1510 memory_region_ref(mr);
1511 memory_region_del_subregion(parent, mr);
1512 if (may_overlap) {
1513 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1514 } else {
1515 memory_region_add_subregion(parent, addr, mr);
1516 }
1517 memory_region_unref(mr);
1518 memory_region_transaction_commit();
1519 }
1520
1521 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1522 {
1523 assert(mr->alias);
1524
1525 if (offset == mr->alias_offset) {
1526 return;
1527 }
1528
1529 memory_region_transaction_begin();
1530 mr->alias_offset = offset;
1531 memory_region_update_pending |= mr->enabled;
1532 memory_region_transaction_commit();
1533 }
1534
1535 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1536 {
1537 return mr->ram_addr;
1538 }
1539
1540 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1541 {
1542 const AddrRange *addr = addr_;
1543 const FlatRange *fr = fr_;
1544
1545 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1546 return -1;
1547 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1548 return 1;
1549 }
1550 return 0;
1551 }
1552
1553 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1554 {
1555 return bsearch(&addr, view->ranges, view->nr,
1556 sizeof(FlatRange), cmp_flatrange_addr);
1557 }
1558
1559 bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1560 {
1561 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1562 if (!mr) {
1563 return false;
1564 }
1565 memory_region_unref(mr);
1566 return true;
1567 }
1568
1569 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1570 hwaddr addr, uint64_t size)
1571 {
1572 MemoryRegionSection ret = { .mr = NULL };
1573 MemoryRegion *root;
1574 AddressSpace *as;
1575 AddrRange range;
1576 FlatView *view;
1577 FlatRange *fr;
1578
1579 addr += mr->addr;
1580 for (root = mr; root->parent; ) {
1581 root = root->parent;
1582 addr += root->addr;
1583 }
1584
1585 as = memory_region_to_address_space(root);
1586 range = addrrange_make(int128_make64(addr), int128_make64(size));
1587
1588 view = address_space_get_flatview(as);
1589 fr = flatview_lookup(view, range);
1590 if (!fr) {
1591 return ret;
1592 }
1593
1594 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1595 --fr;
1596 }
1597
1598 ret.mr = fr->mr;
1599 ret.address_space = as;
1600 range = addrrange_intersection(range, fr->addr);
1601 ret.offset_within_region = fr->offset_in_region;
1602 ret.offset_within_region += int128_get64(int128_sub(range.start,
1603 fr->addr.start));
1604 ret.size = range.size;
1605 ret.offset_within_address_space = int128_get64(range.start);
1606 ret.readonly = fr->readonly;
1607 memory_region_ref(ret.mr);
1608
1609 flatview_unref(view);
1610 return ret;
1611 }
1612
1613 void address_space_sync_dirty_bitmap(AddressSpace *as)
1614 {
1615 FlatView *view;
1616 FlatRange *fr;
1617
1618 view = address_space_get_flatview(as);
1619 FOR_EACH_FLAT_RANGE(fr, view) {
1620 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1621 }
1622 flatview_unref(view);
1623 }
1624
1625 void memory_global_dirty_log_start(void)
1626 {
1627 global_dirty_log = true;
1628 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1629 }
1630
1631 void memory_global_dirty_log_stop(void)
1632 {
1633 global_dirty_log = false;
1634 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1635 }
1636
1637 static void listener_add_address_space(MemoryListener *listener,
1638 AddressSpace *as)
1639 {
1640 FlatView *view;
1641 FlatRange *fr;
1642
1643 if (listener->address_space_filter
1644 && listener->address_space_filter != as) {
1645 return;
1646 }
1647
1648 if (global_dirty_log) {
1649 if (listener->log_global_start) {
1650 listener->log_global_start(listener);
1651 }
1652 }
1653
1654 view = address_space_get_flatview(as);
1655 FOR_EACH_FLAT_RANGE(fr, view) {
1656 MemoryRegionSection section = {
1657 .mr = fr->mr,
1658 .address_space = as,
1659 .offset_within_region = fr->offset_in_region,
1660 .size = fr->addr.size,
1661 .offset_within_address_space = int128_get64(fr->addr.start),
1662 .readonly = fr->readonly,
1663 };
1664 if (listener->region_add) {
1665 listener->region_add(listener, &section);
1666 }
1667 }
1668 flatview_unref(view);
1669 }
1670
1671 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1672 {
1673 MemoryListener *other = NULL;
1674 AddressSpace *as;
1675
1676 listener->address_space_filter = filter;
1677 if (QTAILQ_EMPTY(&memory_listeners)
1678 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1679 memory_listeners)->priority) {
1680 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1681 } else {
1682 QTAILQ_FOREACH(other, &memory_listeners, link) {
1683 if (listener->priority < other->priority) {
1684 break;
1685 }
1686 }
1687 QTAILQ_INSERT_BEFORE(other, listener, link);
1688 }
1689
1690 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1691 listener_add_address_space(listener, as);
1692 }
1693 }
1694
1695 void memory_listener_unregister(MemoryListener *listener)
1696 {
1697 QTAILQ_REMOVE(&memory_listeners, listener, link);
1698 }
1699
1700 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1701 {
1702 if (QTAILQ_EMPTY(&address_spaces)) {
1703 memory_init();
1704 }
1705
1706 memory_region_transaction_begin();
1707 as->root = root;
1708 as->current_map = g_new(FlatView, 1);
1709 flatview_init(as->current_map);
1710 as->ioeventfd_nb = 0;
1711 as->ioeventfds = NULL;
1712 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1713 as->name = g_strdup(name ? name : "anonymous");
1714 address_space_init_dispatch(as);
1715 memory_region_update_pending |= root->enabled;
1716 memory_region_transaction_commit();
1717 }
1718
1719 void address_space_destroy(AddressSpace *as)
1720 {
1721 /* Flush out anything from MemoryListeners listening in on this */
1722 memory_region_transaction_begin();
1723 as->root = NULL;
1724 memory_region_transaction_commit();
1725 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1726 address_space_destroy_dispatch(as);
1727 flatview_unref(as->current_map);
1728 g_free(as->name);
1729 g_free(as->ioeventfds);
1730 }
1731
1732 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1733 {
1734 return memory_region_dispatch_read(mr, addr, pval, size);
1735 }
1736
1737 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1738 uint64_t val, unsigned size)
1739 {
1740 return memory_region_dispatch_write(mr, addr, val, size);
1741 }
1742
1743 typedef struct MemoryRegionList MemoryRegionList;
1744
1745 struct MemoryRegionList {
1746 const MemoryRegion *mr;
1747 bool printed;
1748 QTAILQ_ENTRY(MemoryRegionList) queue;
1749 };
1750
1751 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1752
1753 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1754 const MemoryRegion *mr, unsigned int level,
1755 hwaddr base,
1756 MemoryRegionListHead *alias_print_queue)
1757 {
1758 MemoryRegionList *new_ml, *ml, *next_ml;
1759 MemoryRegionListHead submr_print_queue;
1760 const MemoryRegion *submr;
1761 unsigned int i;
1762
1763 if (!mr || !mr->enabled) {
1764 return;
1765 }
1766
1767 for (i = 0; i < level; i++) {
1768 mon_printf(f, " ");
1769 }
1770
1771 if (mr->alias) {
1772 MemoryRegionList *ml;
1773 bool found = false;
1774
1775 /* check if the alias is already in the queue */
1776 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1777 if (ml->mr == mr->alias && !ml->printed) {
1778 found = true;
1779 }
1780 }
1781
1782 if (!found) {
1783 ml = g_new(MemoryRegionList, 1);
1784 ml->mr = mr->alias;
1785 ml->printed = false;
1786 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1787 }
1788 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1789 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1790 "-" TARGET_FMT_plx "\n",
1791 base + mr->addr,
1792 base + mr->addr
1793 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1794 mr->priority,
1795 mr->romd_mode ? 'R' : '-',
1796 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1797 : '-',
1798 mr->name,
1799 mr->alias->name,
1800 mr->alias_offset,
1801 mr->alias_offset
1802 + (hwaddr)int128_get64(mr->size) - 1);
1803 } else {
1804 mon_printf(f,
1805 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1806 base + mr->addr,
1807 base + mr->addr
1808 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1809 mr->priority,
1810 mr->romd_mode ? 'R' : '-',
1811 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1812 : '-',
1813 mr->name);
1814 }
1815
1816 QTAILQ_INIT(&submr_print_queue);
1817
1818 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1819 new_ml = g_new(MemoryRegionList, 1);
1820 new_ml->mr = submr;
1821 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1822 if (new_ml->mr->addr < ml->mr->addr ||
1823 (new_ml->mr->addr == ml->mr->addr &&
1824 new_ml->mr->priority > ml->mr->priority)) {
1825 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1826 new_ml = NULL;
1827 break;
1828 }
1829 }
1830 if (new_ml) {
1831 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1832 }
1833 }
1834
1835 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1836 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1837 alias_print_queue);
1838 }
1839
1840 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1841 g_free(ml);
1842 }
1843 }
1844
1845 void mtree_info(fprintf_function mon_printf, void *f)
1846 {
1847 MemoryRegionListHead ml_head;
1848 MemoryRegionList *ml, *ml2;
1849 AddressSpace *as;
1850
1851 QTAILQ_INIT(&ml_head);
1852
1853 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1854 mon_printf(f, "%s\n", as->name);
1855 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1856 }
1857
1858 mon_printf(f, "aliases\n");
1859 /* print aliased regions */
1860 QTAILQ_FOREACH(ml, &ml_head, queue) {
1861 if (!ml->printed) {
1862 mon_printf(f, "%s\n", ml->mr->name);
1863 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1864 }
1865 }
1866
1867 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1868 g_free(ml);
1869 }
1870 }
Qemu copy for testing