softmmu_header.h

   1 /*
   2  *  Software MMU support
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #if DATA_SIZE == 8
  21 #define SUFFIX q
  22 #define USUFFIX q
  23 #define DATA_TYPE uint64_t
  24 #elif DATA_SIZE == 4
  25 #define SUFFIX l
  26 #define USUFFIX l
  27 #define DATA_TYPE uint32_t
  28 #elif DATA_SIZE == 2
  29 #define SUFFIX w
  30 #define USUFFIX uw
  31 #define DATA_TYPE uint16_t
  32 #define DATA_STYPE int16_t
  33 #elif DATA_SIZE == 1
  34 #define SUFFIX b
  35 #define USUFFIX ub
  36 #define DATA_TYPE uint8_t
  37 #define DATA_STYPE int8_t
  38 #else
  39 #error unsupported data size
  40 #endif
  41
  42 #if ACCESS_TYPE == 0
  43
  44 #define CPU_MEM_INDEX 0
  45 #define MMUSUFFIX _mmu
  46
  47 #elif ACCESS_TYPE == 1
  48
  49 #define CPU_MEM_INDEX 1
  50 #define MMUSUFFIX _mmu
  51
  52 #elif ACCESS_TYPE == 2
  53
  54 #ifdef TARGET_I386
  55 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
  56 #elif defined (TARGET_PPC)
  57 #define CPU_MEM_INDEX (msr_pr)
  58 #elif defined (TARGET_SPARC)
  59 #define CPU_MEM_INDEX ((env->psrs) == 0)
  60 #endif
  61 #define MMUSUFFIX _mmu
  62
  63 #elif ACCESS_TYPE == 3
  64
  65 #ifdef TARGET_I386
  66 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
  67 #elif defined (TARGET_PPC)
  68 #define CPU_MEM_INDEX (msr_pr)
  69 #elif defined (TARGET_SPARC)
  70 #define CPU_MEM_INDEX ((env->psrs) == 0)
  71 #endif
  72 #define MMUSUFFIX _cmmu
  73
  74 #else
  75 #error invalid ACCESS_TYPE
  76 #endif
  77
  78 #if DATA_SIZE == 8
  79 #define RES_TYPE uint64_t
  80 #else
  81 #define RES_TYPE int
  82 #endif
  83
  84
  85 DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
  86                                                          int is_user);
  87 void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
  88
  89 #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
  90     (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
  91
  92 static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
  93 {
  94     int res;
  95
  96     asm volatile ("movl %1, %%edx\n"
  97                   "movl %1, %%eax\n"
  98                   "shrl %3, %%edx\n"
  99                   "andl %4, %%eax\n"
 100                   "andl %2, %%edx\n"
 101                   "leal %5(%%edx, %%ebp), %%edx\n"
 102                   "cmpl (%%edx), %%eax\n"
 103                   "movl %1, %%eax\n"
 104                   "je 1f\n"
 105                   "pushl %6\n"
 106                   "call %7\n"
 107                   "popl %%edx\n"
 108                   "movl %%eax, %0\n"
 109                   "jmp 2f\n"
 110                   "1:\n"
 111                   "addl 4(%%edx), %%eax\n"
 112 #if DATA_SIZE == 1
 113                   "movzbl (%%eax), %0\n"
 114 #elif DATA_SIZE == 2
 115                   "movzwl (%%eax), %0\n"
 116 #elif DATA_SIZE == 4
 117                   "movl (%%eax), %0\n"
 118 #else
 119 #error unsupported size
 120 #endif
 121                   "2:\n"
 122                   : "=r" (res)
 123                   : "r" (ptr),
 124                   "i" ((CPU_TLB_SIZE - 1) << 3),
 125                   "i" (TARGET_PAGE_BITS - 3),
 126                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 127                   "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
 128                   "i" (CPU_MEM_INDEX),
 129                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
 130                   : "%eax", "%ecx", "%edx", "memory", "cc");
 131     return res;
 132 }
 133
 134 #if DATA_SIZE <= 2
 135 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
 136 {
 137     int res;
 138
 139     asm volatile ("movl %1, %%edx\n"
 140                   "movl %1, %%eax\n"
 141                   "shrl %3, %%edx\n"
 142                   "andl %4, %%eax\n"
 143                   "andl %2, %%edx\n"
 144                   "leal %5(%%edx, %%ebp), %%edx\n"
 145                   "cmpl (%%edx), %%eax\n"
 146                   "movl %1, %%eax\n"
 147                   "je 1f\n"
 148                   "pushl %6\n"
 149                   "call %7\n"
 150                   "popl %%edx\n"
 151 #if DATA_SIZE == 1
 152                   "movsbl %%al, %0\n"
 153 #elif DATA_SIZE == 2
 154                   "movswl %%ax, %0\n"
 155 #else
 156 #error unsupported size
 157 #endif
 158                   "jmp 2f\n"
 159                   "1:\n"
 160                   "addl 4(%%edx), %%eax\n"
 161 #if DATA_SIZE == 1
 162                   "movsbl (%%eax), %0\n"
 163 #elif DATA_SIZE == 2
 164                   "movswl (%%eax), %0\n"
 165 #else
 166 #error unsupported size
 167 #endif
 168                   "2:\n"
 169                   : "=r" (res)
 170                   : "r" (ptr),
 171                   "i" ((CPU_TLB_SIZE - 1) << 3),
 172                   "i" (TARGET_PAGE_BITS - 3),
 173                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 174                   "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
 175                   "i" (CPU_MEM_INDEX),
 176                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
 177                   : "%eax", "%ecx", "%edx", "memory", "cc");
 178     return res;
 179 }
 180 #endif
 181
 182 static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
 183 {
 184     asm volatile ("movl %0, %%edx\n"
 185                   "movl %0, %%eax\n"
 186                   "shrl %3, %%edx\n"
 187                   "andl %4, %%eax\n"
 188                   "andl %2, %%edx\n"
 189                   "leal %5(%%edx, %%ebp), %%edx\n"
 190                   "cmpl (%%edx), %%eax\n"
 191                   "movl %0, %%eax\n"
 192                   "je 1f\n"
 193 #if DATA_SIZE == 1
 194                   "movzbl %b1, %%edx\n"
 195 #elif DATA_SIZE == 2
 196                   "movzwl %w1, %%edx\n"
 197 #elif DATA_SIZE == 4
 198                   "movl %1, %%edx\n"
 199 #else
 200 #error unsupported size
 201 #endif
 202                   "pushl %6\n"
 203                   "call %7\n"
 204                   "popl %%eax\n"
 205                   "jmp 2f\n"
 206                   "1:\n"
 207                   "addl 4(%%edx), %%eax\n"
 208 #if DATA_SIZE == 1
 209                   "movb %b1, (%%eax)\n"
 210 #elif DATA_SIZE == 2
 211                   "movw %w1, (%%eax)\n"
 212 #elif DATA_SIZE == 4
 213                   "movl %1, (%%eax)\n"
 214 #else
 215 #error unsupported size
 216 #endif
 217                   "2:\n"
 218                   :
 219                   : "r" (ptr),
 220 /* NOTE: 'q' would be needed as constraint, but we could not use it
 221    with T1 ! */
 222                   "r" (v),
 223                   "i" ((CPU_TLB_SIZE - 1) << 3),
 224                   "i" (TARGET_PAGE_BITS - 3),
 225                   "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
 226                   "m" (*(uint32_t *)offsetof(CPUState, tlb_write[CPU_MEM_INDEX][0].address)),
 227                   "i" (CPU_MEM_INDEX),
 228                   "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
 229                   : "%eax", "%ecx", "%edx", "memory", "cc");
 230 }
 231
 232 #else
 233
 234 /* generic load/store macros */
 235
 236 static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
 237 {
 238     int index;
 239     RES_TYPE res;
 240     target_ulong addr;
 241     unsigned long physaddr;
 242     int is_user;
 243
 244     addr = ptr;
 245     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 246     is_user = CPU_MEM_INDEX;
 247     if (__builtin_expect(env->tlb_read[is_user][index].address !=
 248                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
 249         res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
 250     } else {
 251         physaddr = addr + env->tlb_read[is_user][index].addend;
 252         res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
 253     }
 254     return res;
 255 }
 256
 257 #if DATA_SIZE <= 2
 258 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
 259 {
 260     int res, index;
 261     target_ulong addr;
 262     unsigned long physaddr;
 263     int is_user;
 264
 265     addr = ptr;
 266     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 267     is_user = CPU_MEM_INDEX;
 268     if (__builtin_expect(env->tlb_read[is_user][index].address !=
 269                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
 270         res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
 271     } else {
 272         physaddr = addr + env->tlb_read[is_user][index].addend;
 273         res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
 274     }
 275     return res;
 276 }
 277 #endif
 278
 279 /* generic store macro */
 280
 281 static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
 282 {
 283     int index;
 284     target_ulong addr;
 285     unsigned long physaddr;
 286     int is_user;
 287
 288     addr = ptr;
 289     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 290     is_user = CPU_MEM_INDEX;
 291     if (__builtin_expect(env->tlb_write[is_user][index].address !=
 292                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
 293         glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
 294     } else {
 295         physaddr = addr + env->tlb_write[is_user][index].addend;
 296         glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
 297     }
 298 }
 299
 300 #endif
 301
 302 #if DATA_SIZE == 8
 303 static inline double glue(ldfq, MEMSUFFIX)(target_ulong ptr)
 304 {
 305     union {
 306         double d;
 307         uint64_t i;
 308     } u;
 309     u.i = glue(ldq, MEMSUFFIX)(ptr);
 310     return u.d;
 311 }
 312
 313 static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, double v)
 314 {
 315     union {
 316         double d;
 317         uint64_t i;
 318     } u;
 319     u.d = v;
 320     glue(stq, MEMSUFFIX)(ptr, u.i);
 321 }
 322 #endif /* DATA_SIZE == 8 */
 323
 324 #if DATA_SIZE == 4
 325 static inline float glue(ldfl, MEMSUFFIX)(target_ulong ptr)
 326 {
 327     union {
 328         float f;
 329         uint32_t i;
 330     } u;
 331     u.i = glue(ldl, MEMSUFFIX)(ptr);
 332     return u.f;
 333 }
 334
 335 static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float v)
 336 {
 337     union {
 338         float f;
 339         uint32_t i;
 340     } u;
 341     u.f = v;
 342     glue(stl, MEMSUFFIX)(ptr, u.i);
 343 }
 344 #endif /* DATA_SIZE == 4 */
 345
 346 #undef RES_TYPE
 347 #undef DATA_TYPE
 348 #undef DATA_STYPE
 349 #undef SUFFIX
 350 #undef USUFFIX
 351 #undef DATA_SIZE
 352 #undef CPU_MEM_INDEX
 353 #undef MMUSUFFIX