softmmu_template.h

   1 /*
   2  *  Software MMU support
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #define DATA_SIZE (1 << SHIFT)
  21
  22 #if DATA_SIZE == 8
  23 #define SUFFIX q
  24 #define USUFFIX q
  25 #define DATA_TYPE uint64_t
  26 #elif DATA_SIZE == 4
  27 #define SUFFIX l
  28 #define USUFFIX l
  29 #define DATA_TYPE uint32_t
  30 #elif DATA_SIZE == 2
  31 #define SUFFIX w
  32 #define USUFFIX uw
  33 #define DATA_TYPE uint16_t
  34 #elif DATA_SIZE == 1
  35 #define SUFFIX b
  36 #define USUFFIX ub
  37 #define DATA_TYPE uint8_t
  38 #else
  39 #error unsupported data size
  40 #endif
  41
  42 #ifdef SOFTMMU_CODE_ACCESS
  43 #define READ_ACCESS_TYPE 2
  44 #define ADDR_READ addr_code
  45 #else
  46 #define READ_ACCESS_TYPE 0
  47 #define ADDR_READ addr_read
  48 #endif
  49
  50 static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
  51                                                         int is_user,
  52                                                         void *retaddr);
  53 static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
  54                                               target_ulong tlb_addr)
  55 {
  56     DATA_TYPE res;
  57     int index;
  58
  59     index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
  60 #if SHIFT <= 2
  61     res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr);
  62 #else
  63 #ifdef TARGET_WORDS_BIGENDIAN
  64     res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32;
  65     res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4);
  66 #else
  67     res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
  68     res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32;
  69 #endif
  70 #endif /* SHIFT > 2 */
  71     return res;
  72 }
  73
  74 /* handle all cases except unaligned access which span two pages */
  75 DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
  76                                                          int is_user)
  77 {
  78     DATA_TYPE res;
  79     int index;
  80     target_ulong tlb_addr;
  81     target_phys_addr_t physaddr;
  82     void *retaddr;
  83
  84     /* test if there is match for unaligned or IO access */
  85     /* XXX: could done more in memory macro in a non portable way */
  86     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  87  redo:
  88     tlb_addr = env->tlb_table[is_user][index].ADDR_READ;
  89     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
  90         physaddr = addr + env->tlb_table[is_user][index].addend;
  91         if (tlb_addr & ~TARGET_PAGE_MASK) {
  92             /* IO access */
  93             if ((addr & (DATA_SIZE - 1)) != 0)
  94                 goto do_unaligned_access;
  95             res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
  96         } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
  97             /* slow unaligned access (it spans two pages or IO) */
  98         do_unaligned_access:
  99             retaddr = GETPC();
 100 #ifdef ALIGNED_ONLY
 101             do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr);
 102 #endif
 103             res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr,
 104                                                          is_user, retaddr);
 105         } else {
 106             /* unaligned/aligned access in the same page */
 107 #ifdef ALIGNED_ONLY
 108             if ((addr & (DATA_SIZE - 1)) != 0) {
 109                 retaddr = GETPC();
 110                 do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr);
 111             }
 112 #endif
 113             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr);
 114         }
 115     } else {
 116         /* the page is not in the TLB : fill it */
 117         retaddr = GETPC();
 118 #ifdef ALIGNED_ONLY
 119         if ((addr & (DATA_SIZE - 1)) != 0)
 120             do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr);
 121 #endif
 122         tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr);
 123         goto redo;
 124     }
 125     return res;
 126 }
 127
 128 /* handle all unaligned cases */
 129 static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
 130                                                         int is_user,
 131                                                         void *retaddr)
 132 {
 133     DATA_TYPE res, res1, res2;
 134     int index, shift;
 135     target_phys_addr_t physaddr;
 136     target_ulong tlb_addr, addr1, addr2;
 137
 138     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 139  redo:
 140     tlb_addr = env->tlb_table[is_user][index].ADDR_READ;
 141     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
 142         physaddr = addr + env->tlb_table[is_user][index].addend;
 143         if (tlb_addr & ~TARGET_PAGE_MASK) {
 144             /* IO access */
 145             if ((addr & (DATA_SIZE - 1)) != 0)
 146                 goto do_unaligned_access;
 147             res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
 148         } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
 149         do_unaligned_access:
 150             /* slow unaligned access (it spans two pages) */
 151             addr1 = addr & ~(DATA_SIZE - 1);
 152             addr2 = addr1 + DATA_SIZE;
 153             res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1,
 154                                                           is_user, retaddr);
 155             res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2,
 156                                                           is_user, retaddr);
 157             shift = (addr & (DATA_SIZE - 1)) * 8;
 158 #ifdef TARGET_WORDS_BIGENDIAN
 159             res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
 160 #else
 161             res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
 162 #endif
 163             res = (DATA_TYPE)res;
 164         } else {
 165             /* unaligned/aligned access in the same page */
 166             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr);
 167         }
 168     } else {
 169         /* the page is not in the TLB : fill it */
 170         tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr);
 171         goto redo;
 172     }
 173     return res;
 174 }
 175
 176 #ifndef SOFTMMU_CODE_ACCESS
 177
 178 static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
 179                                                    DATA_TYPE val,
 180                                                    int is_user,
 181                                                    void *retaddr);
 182
 183 static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,
 184                                           DATA_TYPE val,
 185                                           target_ulong tlb_addr,
 186                                           void *retaddr)
 187 {
 188     int index;
 189
 190     index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
 191     env->mem_write_vaddr = tlb_addr;
 192     env->mem_write_pc = (unsigned long)retaddr;
 193 #if SHIFT <= 2
 194     io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);
 195 #else
 196 #ifdef TARGET_WORDS_BIGENDIAN
 197     io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32);
 198     io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val);
 199 #else
 200     io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
 201     io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32);
 202 #endif
 203 #endif /* SHIFT > 2 */
 204 }
 205
 206 void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
 207                                                     DATA_TYPE val,
 208                                                     int is_user)
 209 {
 210     target_phys_addr_t physaddr;
 211     target_ulong tlb_addr;
 212     void *retaddr;
 213     int index;
 214
 215     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 216  redo:
 217     tlb_addr = env->tlb_table[is_user][index].addr_write;
 218     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
 219         physaddr = addr + env->tlb_table[is_user][index].addend;
 220         if (tlb_addr & ~TARGET_PAGE_MASK) {
 221             /* IO access */
 222             if ((addr & (DATA_SIZE - 1)) != 0)
 223                 goto do_unaligned_access;
 224             retaddr = GETPC();
 225             glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
 226         } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
 227         do_unaligned_access:
 228             retaddr = GETPC();
 229 #ifdef ALIGNED_ONLY
 230             do_unaligned_access(addr, 1, is_user, retaddr);
 231 #endif
 232             glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val,
 233                                                    is_user, retaddr);
 234         } else {
 235             /* aligned/unaligned access in the same page */
 236 #ifdef ALIGNED_ONLY
 237             if ((addr & (DATA_SIZE - 1)) != 0) {
 238                 retaddr = GETPC();
 239                 do_unaligned_access(addr, 1, is_user, retaddr);
 240             }
 241 #endif
 242             glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val);
 243         }
 244     } else {
 245         /* the page is not in the TLB : fill it */
 246         retaddr = GETPC();
 247 #ifdef ALIGNED_ONLY
 248         if ((addr & (DATA_SIZE - 1)) != 0)
 249             do_unaligned_access(addr, 1, is_user, retaddr);
 250 #endif
 251         tlb_fill(addr, 1, is_user, retaddr);
 252         goto redo;
 253     }
 254 }
 255
 256 /* handles all unaligned cases */
 257 static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
 258                                                    DATA_TYPE val,
 259                                                    int is_user,
 260                                                    void *retaddr)
 261 {
 262     target_phys_addr_t physaddr;
 263     target_ulong tlb_addr;
 264     int index, i;
 265
 266     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 267  redo:
 268     tlb_addr = env->tlb_table[is_user][index].addr_write;
 269     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
 270         physaddr = addr + env->tlb_table[is_user][index].addend;
 271         if (tlb_addr & ~TARGET_PAGE_MASK) {
 272             /* IO access */
 273             if ((addr & (DATA_SIZE - 1)) != 0)
 274                 goto do_unaligned_access;
 275             glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
 276         } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
 277         do_unaligned_access:
 278             /* XXX: not efficient, but simple */
 279             for(i = 0;i < DATA_SIZE; i++) {
 280 #ifdef TARGET_WORDS_BIGENDIAN
 281                 glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)),
 282                                           is_user, retaddr);
 283 #else
 284                 glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
 285                                           is_user, retaddr);
 286 #endif
 287             }
 288         } else {
 289             /* aligned/unaligned access in the same page */
 290             glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val);
 291         }
 292     } else {
 293         /* the page is not in the TLB : fill it */
 294         tlb_fill(addr, 1, is_user, retaddr);
 295         goto redo;
 296     }
 297 }
 298
 299 #endif /* !defined(SOFTMMU_CODE_ACCESS) */
 300
 301 #undef READ_ACCESS_TYPE
 302 #undef SHIFT
 303 #undef DATA_TYPE
 304 #undef SUFFIX
 305 #undef USUFFIX
 306 #undef DATA_SIZE
 307 #undef ADDR_READ