target-arm/kvm.c

   1 /*
   2  * ARM implementation of KVM hooks
   3  *
   4  * Copyright Christoffer Dall 2009-2010
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #include <stdio.h>
  12 #include <sys/types.h>
  13 #include <sys/ioctl.h>
  14 #include <sys/mman.h>
  15
  16 #include <linux/kvm.h>
  17
  18 #include "qemu-common.h"
  19 #include "qemu/timer.h"
  20 #include "sysemu/sysemu.h"
  21 #include "sysemu/kvm.h"
  22 #include "kvm_arm.h"
  23 #include "cpu.h"
  24 #include "hw/arm/arm.h"
  25
  26 /* Check that cpu.h's idea of coprocessor fields matches KVM's */
  27 #if (CP_REG_SIZE_SHIFT != KVM_REG_SIZE_SHIFT) || \
  28     (CP_REG_SIZE_MASK != KVM_REG_SIZE_MASK) ||   \
  29     (CP_REG_SIZE_U32 != KVM_REG_SIZE_U32) || \
  30     (CP_REG_SIZE_U64 != KVM_REG_SIZE_U64) || \
  31     (CP_REG_ARM != KVM_REG_ARM)
  32 #error mismatch between cpu.h and KVM header definitions
  33 #endif
  34
  35 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
  36     KVM_CAP_LAST_INFO
  37 };
  38
  39 int kvm_arch_init(KVMState *s)
  40 {
  41     /* For ARM interrupt delivery is always asynchronous,
  42      * whether we are using an in-kernel VGIC or not.
  43      */
  44     kvm_async_interrupts_allowed = true;
  45     return 0;
  46 }
  47
  48 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
  49 {
  50     return cpu->cpu_index;
  51 }
  52
  53 static bool reg_syncs_via_tuple_list(uint64_t regidx)
  54 {
  55     /* Return true if the regidx is a register we should synchronize
  56      * via the cpreg_tuples array (ie is not a core reg we sync by
  57      * hand in kvm_arch_get/put_registers())
  58      */
  59     switch (regidx & KVM_REG_ARM_COPROC_MASK) {
  60     case KVM_REG_ARM_CORE:
  61     case KVM_REG_ARM_VFP:
  62         return false;
  63     default:
  64         return true;
  65     }
  66 }
  67
  68 static int compare_u64(const void *a, const void *b)
  69 {
  70     return *(uint64_t *)a - *(uint64_t *)b;
  71 }
  72
  73 int kvm_arch_init_vcpu(CPUState *cs)
  74 {
  75     struct kvm_vcpu_init init;
  76     int i, ret, arraylen;
  77     uint64_t v;
  78     struct kvm_one_reg r;
  79     struct kvm_reg_list rl;
  80     struct kvm_reg_list *rlp;
  81     ARMCPU *cpu = ARM_CPU(cs);
  82
  83     init.target = KVM_ARM_TARGET_CORTEX_A15;
  84     memset(init.features, 0, sizeof(init.features));
  85     ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
  86     if (ret) {
  87         return ret;
  88     }
  89     /* Query the kernel to make sure it supports 32 VFP
  90      * registers: QEMU's "cortex-a15" CPU is always a
  91      * VFP-D32 core. The simplest way to do this is just
  92      * to attempt to read register d31.
  93      */
  94     r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP | 31;
  95     r.addr = (uintptr_t)(&v);
  96     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
  97     if (ret == -ENOENT) {
  98         return -EINVAL;
  99     }
 100
 101     /* Populate the cpreg list based on the kernel's idea
 102      * of what registers exist (and throw away the TCG-created list).
 103      */
 104     rl.n = 0;
 105     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
 106     if (ret != -E2BIG) {
 107         return ret;
 108     }
 109     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
 110     rlp->n = rl.n;
 111     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
 112     if (ret) {
 113         goto out;
 114     }
 115     /* Sort the list we get back from the kernel, since cpreg_tuples
 116      * must be in strictly ascending order.
 117      */
 118     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
 119
 120     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 121         if (!reg_syncs_via_tuple_list(rlp->reg[i])) {
 122             continue;
 123         }
 124         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
 125         case KVM_REG_SIZE_U32:
 126         case KVM_REG_SIZE_U64:
 127             break;
 128         default:
 129             fprintf(stderr, "Can't handle size of register in kernel list\n");
 130             ret = -EINVAL;
 131             goto out;
 132         }
 133
 134         arraylen++;
 135     }
 136
 137     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
 138     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
 139     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
 140                                          arraylen);
 141     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
 142                                         arraylen);
 143     cpu->cpreg_array_len = arraylen;
 144     cpu->cpreg_vmstate_array_len = arraylen;
 145
 146     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 147         uint64_t regidx = rlp->reg[i];
 148         if (!reg_syncs_via_tuple_list(regidx)) {
 149             continue;
 150         }
 151         cpu->cpreg_indexes[arraylen] = regidx;
 152         arraylen++;
 153     }
 154     assert(cpu->cpreg_array_len == arraylen);
 155
 156     if (!write_kvmstate_to_list(cpu)) {
 157         /* Shouldn't happen unless kernel is inconsistent about
 158          * what registers exist.
 159          */
 160         fprintf(stderr, "Initial read of kernel register state failed\n");
 161         ret = -EINVAL;
 162         goto out;
 163     }
 164
 165     /* Save a copy of the initial register values so that we can
 166      * feed it back to the kernel on VCPU reset.
 167      */
 168     cpu->cpreg_reset_values = g_memdup(cpu->cpreg_values,
 169                                        cpu->cpreg_array_len *
 170                                        sizeof(cpu->cpreg_values[0]));
 171
 172 out:
 173     g_free(rlp);
 174     return ret;
 175 }
 176
 177 /* We track all the KVM devices which need their memory addresses
 178  * passing to the kernel in a list of these structures.
 179  * When board init is complete we run through the list and
 180  * tell the kernel the base addresses of the memory regions.
 181  * We use a MemoryListener to track mapping and unmapping of
 182  * the regions during board creation, so the board models don't
 183  * need to do anything special for the KVM case.
 184  */
 185 typedef struct KVMDevice {
 186     struct kvm_arm_device_addr kda;
 187     MemoryRegion *mr;
 188     QSLIST_ENTRY(KVMDevice) entries;
 189 } KVMDevice;
 190
 191 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
 192
 193 static void kvm_arm_devlistener_add(MemoryListener *listener,
 194                                     MemoryRegionSection *section)
 195 {
 196     KVMDevice *kd;
 197
 198     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 199         if (section->mr == kd->mr) {
 200             kd->kda.addr = section->offset_within_address_space;
 201         }
 202     }
 203 }
 204
 205 static void kvm_arm_devlistener_del(MemoryListener *listener,
 206                                     MemoryRegionSection *section)
 207 {
 208     KVMDevice *kd;
 209
 210     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 211         if (section->mr == kd->mr) {
 212             kd->kda.addr = -1;
 213         }
 214     }
 215 }
 216
 217 static MemoryListener devlistener = {
 218     .region_add = kvm_arm_devlistener_add,
 219     .region_del = kvm_arm_devlistener_del,
 220 };
 221
 222 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
 223 {
 224     KVMDevice *kd, *tkd;
 225
 226     memory_listener_unregister(&devlistener);
 227     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
 228         if (kd->kda.addr != -1) {
 229             if (kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR,
 230                              &kd->kda) < 0) {
 231                 fprintf(stderr, "KVM_ARM_SET_DEVICE_ADDRESS failed: %s\n",
 232                         strerror(errno));
 233                 abort();
 234             }
 235         }
 236         memory_region_unref(kd->mr);
 237         g_free(kd);
 238     }
 239 }
 240
 241 static Notifier notify = {
 242     .notify = kvm_arm_machine_init_done,
 243 };
 244
 245 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid)
 246 {
 247     KVMDevice *kd;
 248
 249     if (!kvm_irqchip_in_kernel()) {
 250         return;
 251     }
 252
 253     if (QSLIST_EMPTY(&kvm_devices_head)) {
 254         memory_listener_register(&devlistener, NULL);
 255         qemu_add_machine_init_done_notifier(&notify);
 256     }
 257     kd = g_new0(KVMDevice, 1);
 258     kd->mr = mr;
 259     kd->kda.id = devid;
 260     kd->kda.addr = -1;
 261     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
 262     memory_region_ref(kd->mr);
 263 }
 264
 265 bool write_kvmstate_to_list(ARMCPU *cpu)
 266 {
 267     CPUState *cs = CPU(cpu);
 268     int i;
 269     bool ok = true;
 270
 271     for (i = 0; i < cpu->cpreg_array_len; i++) {
 272         struct kvm_one_reg r;
 273         uint64_t regidx = cpu->cpreg_indexes[i];
 274         uint32_t v32;
 275         int ret;
 276
 277         r.id = regidx;
 278
 279         switch (regidx & KVM_REG_SIZE_MASK) {
 280         case KVM_REG_SIZE_U32:
 281             r.addr = (uintptr_t)&v32;
 282             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 283             if (!ret) {
 284                 cpu->cpreg_values[i] = v32;
 285             }
 286             break;
 287         case KVM_REG_SIZE_U64:
 288             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 289             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 290             break;
 291         default:
 292             abort();
 293         }
 294         if (ret) {
 295             ok = false;
 296         }
 297     }
 298     return ok;
 299 }
 300
 301 bool write_list_to_kvmstate(ARMCPU *cpu)
 302 {
 303     CPUState *cs = CPU(cpu);
 304     int i;
 305     bool ok = true;
 306
 307     for (i = 0; i < cpu->cpreg_array_len; i++) {
 308         struct kvm_one_reg r;
 309         uint64_t regidx = cpu->cpreg_indexes[i];
 310         uint32_t v32;
 311         int ret;
 312
 313         r.id = regidx;
 314         switch (regidx & KVM_REG_SIZE_MASK) {
 315         case KVM_REG_SIZE_U32:
 316             v32 = cpu->cpreg_values[i];
 317             r.addr = (uintptr_t)&v32;
 318             break;
 319         case KVM_REG_SIZE_U64:
 320             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 321             break;
 322         default:
 323             abort();
 324         }
 325         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 326         if (ret) {
 327             /* We might fail for "unknown register" and also for
 328              * "you tried to set a register which is constant with
 329              * a different value from what it actually contains".
 330              */
 331             ok = false;
 332         }
 333     }
 334     return ok;
 335 }
 336
 337 typedef struct Reg {
 338     uint64_t id;
 339     int offset;
 340 } Reg;
 341
 342 #define COREREG(KERNELNAME, QEMUFIELD)                       \
 343     {                                                        \
 344         KVM_REG_ARM | KVM_REG_SIZE_U32 |                     \
 345         KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(KERNELNAME), \
 346         offsetof(CPUARMState, QEMUFIELD)                     \
 347     }
 348
 349 #define VFPSYSREG(R)                                       \
 350     {                                                      \
 351         KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP | \
 352         KVM_REG_ARM_VFP_##R,                               \
 353         offsetof(CPUARMState, vfp.xregs[ARM_VFP_##R])      \
 354     }
 355
 356 static const Reg regs[] = {
 357     /* R0_usr .. R14_usr */
 358     COREREG(usr_regs.uregs[0], regs[0]),
 359     COREREG(usr_regs.uregs[1], regs[1]),
 360     COREREG(usr_regs.uregs[2], regs[2]),
 361     COREREG(usr_regs.uregs[3], regs[3]),
 362     COREREG(usr_regs.uregs[4], regs[4]),
 363     COREREG(usr_regs.uregs[5], regs[5]),
 364     COREREG(usr_regs.uregs[6], regs[6]),
 365     COREREG(usr_regs.uregs[7], regs[7]),
 366     COREREG(usr_regs.uregs[8], usr_regs[0]),
 367     COREREG(usr_regs.uregs[9], usr_regs[1]),
 368     COREREG(usr_regs.uregs[10], usr_regs[2]),
 369     COREREG(usr_regs.uregs[11], usr_regs[3]),
 370     COREREG(usr_regs.uregs[12], usr_regs[4]),
 371     COREREG(usr_regs.uregs[13], banked_r13[0]),
 372     COREREG(usr_regs.uregs[14], banked_r14[0]),
 373     /* R13, R14, SPSR for SVC, ABT, UND, IRQ banks */
 374     COREREG(svc_regs[0], banked_r13[1]),
 375     COREREG(svc_regs[1], banked_r14[1]),
 376     COREREG(svc_regs[2], banked_spsr[1]),
 377     COREREG(abt_regs[0], banked_r13[2]),
 378     COREREG(abt_regs[1], banked_r14[2]),
 379     COREREG(abt_regs[2], banked_spsr[2]),
 380     COREREG(und_regs[0], banked_r13[3]),
 381     COREREG(und_regs[1], banked_r14[3]),
 382     COREREG(und_regs[2], banked_spsr[3]),
 383     COREREG(irq_regs[0], banked_r13[4]),
 384     COREREG(irq_regs[1], banked_r14[4]),
 385     COREREG(irq_regs[2], banked_spsr[4]),
 386     /* R8_fiq .. R14_fiq and SPSR_fiq */
 387     COREREG(fiq_regs[0], fiq_regs[0]),
 388     COREREG(fiq_regs[1], fiq_regs[1]),
 389     COREREG(fiq_regs[2], fiq_regs[2]),
 390     COREREG(fiq_regs[3], fiq_regs[3]),
 391     COREREG(fiq_regs[4], fiq_regs[4]),
 392     COREREG(fiq_regs[5], banked_r13[5]),
 393     COREREG(fiq_regs[6], banked_r14[5]),
 394     COREREG(fiq_regs[7], banked_spsr[5]),
 395     /* R15 */
 396     COREREG(usr_regs.uregs[15], regs[15]),
 397     /* VFP system registers */
 398     VFPSYSREG(FPSID),
 399     VFPSYSREG(MVFR1),
 400     VFPSYSREG(MVFR0),
 401     VFPSYSREG(FPEXC),
 402     VFPSYSREG(FPINST),
 403     VFPSYSREG(FPINST2),
 404 };
 405
 406 int kvm_arch_put_registers(CPUState *cs, int level)
 407 {
 408     ARMCPU *cpu = ARM_CPU(cs);
 409     CPUARMState *env = &cpu->env;
 410     struct kvm_one_reg r;
 411     int mode, bn;
 412     int ret, i;
 413     uint32_t cpsr, fpscr;
 414
 415     /* Make sure the banked regs are properly set */
 416     mode = env->uncached_cpsr & CPSR_M;
 417     bn = bank_number(mode);
 418     if (mode == ARM_CPU_MODE_FIQ) {
 419         memcpy(env->fiq_regs, env->regs + 8, 5 * sizeof(uint32_t));
 420     } else {
 421         memcpy(env->usr_regs, env->regs + 8, 5 * sizeof(uint32_t));
 422     }
 423     env->banked_r13[bn] = env->regs[13];
 424     env->banked_r14[bn] = env->regs[14];
 425     env->banked_spsr[bn] = env->spsr;
 426
 427     /* Now we can safely copy stuff down to the kernel */
 428     for (i = 0; i < ARRAY_SIZE(regs); i++) {
 429         r.id = regs[i].id;
 430         r.addr = (uintptr_t)(env) + regs[i].offset;
 431         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 432         if (ret) {
 433             return ret;
 434         }
 435     }
 436
 437     /* Special cases which aren't a single CPUARMState field */
 438     cpsr = cpsr_read(env);
 439     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
 440         KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
 441     r.addr = (uintptr_t)(&cpsr);
 442     ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 443     if (ret) {
 444         return ret;
 445     }
 446
 447     /* VFP registers */
 448     r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
 449     for (i = 0; i < 32; i++) {
 450         r.addr = (uintptr_t)(&env->vfp.regs[i]);
 451         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 452         if (ret) {
 453             return ret;
 454         }
 455         r.id++;
 456     }
 457
 458     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
 459         KVM_REG_ARM_VFP_FPSCR;
 460     fpscr = vfp_get_fpscr(env);
 461     r.addr = (uintptr_t)&fpscr;
 462     ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 463     if (ret) {
 464         return ret;
 465     }
 466
 467     /* Note that we do not call write_cpustate_to_list()
 468      * here, so we are only writing the tuple list back to
 469      * KVM. This is safe because nothing can change the
 470      * CPUARMState cp15 fields (in particular gdb accesses cannot)
 471      * and so there are no changes to sync. In fact syncing would
 472      * be wrong at this point: for a constant register where TCG and
 473      * KVM disagree about its value, the preceding write_list_to_cpustate()
 474      * would not have had any effect on the CPUARMState value (since the
 475      * register is read-only), and a write_cpustate_to_list() here would
 476      * then try to write the TCG value back into KVM -- this would either
 477      * fail or incorrectly change the value the guest sees.
 478      *
 479      * If we ever want to allow the user to modify cp15 registers via
 480      * the gdb stub, we would need to be more clever here (for instance
 481      * tracking the set of registers kvm_arch_get_registers() successfully
 482      * managed to update the CPUARMState with, and only allowing those
 483      * to be written back up into the kernel).
 484      */
 485     if (!write_list_to_kvmstate(cpu)) {
 486         return EINVAL;
 487     }
 488
 489     return ret;
 490 }
 491
 492 int kvm_arch_get_registers(CPUState *cs)
 493 {
 494     ARMCPU *cpu = ARM_CPU(cs);
 495     CPUARMState *env = &cpu->env;
 496     struct kvm_one_reg r;
 497     int mode, bn;
 498     int ret, i;
 499     uint32_t cpsr, fpscr;
 500
 501     for (i = 0; i < ARRAY_SIZE(regs); i++) {
 502         r.id = regs[i].id;
 503         r.addr = (uintptr_t)(env) + regs[i].offset;
 504         ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 505         if (ret) {
 506             return ret;
 507         }
 508     }
 509
 510     /* Special cases which aren't a single CPUARMState field */
 511     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 |
 512         KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr);
 513     r.addr = (uintptr_t)(&cpsr);
 514     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 515     if (ret) {
 516         return ret;
 517     }
 518     cpsr_write(env, cpsr, 0xffffffff);
 519
 520     /* Make sure the current mode regs are properly set */
 521     mode = env->uncached_cpsr & CPSR_M;
 522     bn = bank_number(mode);
 523     if (mode == ARM_CPU_MODE_FIQ) {
 524         memcpy(env->regs + 8, env->fiq_regs, 5 * sizeof(uint32_t));
 525     } else {
 526         memcpy(env->regs + 8, env->usr_regs, 5 * sizeof(uint32_t));
 527     }
 528     env->regs[13] = env->banked_r13[bn];
 529     env->regs[14] = env->banked_r14[bn];
 530     env->spsr = env->banked_spsr[bn];
 531
 532     /* VFP registers */
 533     r.id = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
 534     for (i = 0; i < 32; i++) {
 535         r.addr = (uintptr_t)(&env->vfp.regs[i]);
 536         ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 537         if (ret) {
 538             return ret;
 539         }
 540         r.id++;
 541     }
 542
 543     r.id = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP |
 544         KVM_REG_ARM_VFP_FPSCR;
 545     r.addr = (uintptr_t)&fpscr;
 546     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 547     if (ret) {
 548         return ret;
 549     }
 550     vfp_set_fpscr(env, fpscr);
 551
 552     if (!write_kvmstate_to_list(cpu)) {
 553         return EINVAL;
 554     }
 555     /* Note that it's OK to have registers which aren't in CPUState,
 556      * so we can ignore a failure return here.
 557      */
 558     write_list_to_cpustate(cpu);
 559
 560     return 0;
 561 }
 562
 563 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 564 {
 565 }
 566
 567 void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 568 {
 569 }
 570
 571 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 572 {
 573     return 0;
 574 }
 575
 576 void kvm_arch_reset_vcpu(CPUState *cs)
 577 {
 578     /* Feed the kernel back its initial register state */
 579     ARMCPU *cpu = ARM_CPU(cs);
 580
 581     memmove(cpu->cpreg_values, cpu->cpreg_reset_values,
 582             cpu->cpreg_array_len * sizeof(cpu->cpreg_values[0]));
 583
 584     if (!write_list_to_kvmstate(cpu)) {
 585         abort();
 586     }
 587 }
 588
 589 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 590 {
 591     return true;
 592 }
 593
 594 int kvm_arch_process_async_events(CPUState *cs)
 595 {
 596     return 0;
 597 }
 598
 599 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
 600 {
 601     return 1;
 602 }
 603
 604 int kvm_arch_on_sigbus(int code, void *addr)
 605 {
 606     return 1;
 607 }
 608
 609 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
 610 {
 611     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 612 }
 613
 614 int kvm_arch_insert_sw_breakpoint(CPUState *cs,
 615                                   struct kvm_sw_breakpoint *bp)
 616 {
 617     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 618     return -EINVAL;
 619 }
 620
 621 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
 622                                   target_ulong len, int type)
 623 {
 624     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 625     return -EINVAL;
 626 }
 627
 628 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
 629                                   target_ulong len, int type)
 630 {
 631     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 632     return -EINVAL;
 633 }
 634
 635 int kvm_arch_remove_sw_breakpoint(CPUState *cs,
 636                                   struct kvm_sw_breakpoint *bp)
 637 {
 638     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 639     return -EINVAL;
 640 }
 641
 642 void kvm_arch_remove_all_hw_breakpoints(void)
 643 {
 644     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 645 }
 646
 647 void kvm_arch_init_irq_routing(KVMState *s)
 648 {
 649 }