target-mips/exec.h

   1 #if !defined(__QEMU_MIPS_EXEC_H__)
   2 #define __QEMU_MIPS_EXEC_H__
   3
   4 #define DEBUG_OP
   5
   6 #include "mips-defs.h"
   7 #include "dyngen-exec.h"
   8
   9 register struct CPUMIPSState *env asm(AREG0);
  10
  11 #if defined (USE_64BITS_REGS)
  12 typedef int64_t host_int_t;
  13 typedef uint64_t host_uint_t;
  14 #else
  15 typedef int32_t host_int_t;
  16 typedef uint32_t host_uint_t;
  17 #endif
  18
  19 register host_uint_t T0 asm(AREG1);
  20 register host_uint_t T1 asm(AREG2);
  21 register host_uint_t T2 asm(AREG3);
  22
  23 #if defined (USE_HOST_FLOAT_REGS)
  24 register double FT0 asm(FREG0);
  25 register double FT1 asm(FREG1);
  26 register double FT2 asm(FREG2);
  27 #else
  28 #define FT0 (env->ft0.d)
  29 #define FT1 (env->ft1.d)
  30 #define FT2 (env->ft2.d)
  31 #endif
  32
  33 #if defined (DEBUG_OP)
  34 #define RETURN() __asm__ __volatile__("nop");
  35 #else
  36 #define RETURN() __asm__ __volatile__("");
  37 #endif
  38
  39 #include "cpu.h"
  40 #include "exec-all.h"
  41
  42 #if !defined(CONFIG_USER_ONLY)
  43
  44 #define ldul_user ldl_user
  45 #define ldul_kernel ldl_kernel
  46
  47 #define ACCESS_TYPE 0
  48 #define MEMSUFFIX _kernel
  49 #define DATA_SIZE 1
  50 #include "softmmu_header.h"
  51
  52 #define DATA_SIZE 2
  53 #include "softmmu_header.h"
  54
  55 #define DATA_SIZE 4
  56 #include "softmmu_header.h"
  57
  58 #define DATA_SIZE 8
  59 #include "softmmu_header.h"
  60 #undef ACCESS_TYPE
  61 #undef MEMSUFFIX
  62
  63 #define ACCESS_TYPE 1
  64 #define MEMSUFFIX _user
  65 #define DATA_SIZE 1
  66 #include "softmmu_header.h"
  67
  68 #define DATA_SIZE 2
  69 #include "softmmu_header.h"
  70
  71 #define DATA_SIZE 4
  72 #include "softmmu_header.h"
  73
  74 #define DATA_SIZE 8
  75 #include "softmmu_header.h"
  76 #undef ACCESS_TYPE
  77 #undef MEMSUFFIX
  78
  79 /* these access are slower, they must be as rare as possible */
  80 #define ACCESS_TYPE 2
  81 #define MEMSUFFIX _data
  82 #define DATA_SIZE 1
  83 #include "softmmu_header.h"
  84
  85 #define DATA_SIZE 2
  86 #include "softmmu_header.h"
  87
  88 #define DATA_SIZE 4
  89 #include "softmmu_header.h"
  90
  91 #define DATA_SIZE 8
  92 #include "softmmu_header.h"
  93 #undef ACCESS_TYPE
  94 #undef MEMSUFFIX
  95
  96 #define ldub(p) ldub_data(p)
  97 #define ldsb(p) ldsb_data(p)
  98 #define lduw(p) lduw_data(p)
  99 #define ldsw(p) ldsw_data(p)
 100 #define ldl(p) ldl_data(p)
 101 #define ldq(p) ldq_data(p)
 102
 103 #define stb(p, v) stb_data(p, v)
 104 #define stw(p, v) stw_data(p, v)
 105 #define stl(p, v) stl_data(p, v)
 106 #define stq(p, v) stq_data(p, v)
 107
 108 #endif /* !defined(CONFIG_USER_ONLY) */
 109
 110 static inline void env_to_regs(void)
 111 {
 112 }
 113
 114 static inline void regs_to_env(void)
 115 {
 116 }
 117
 118 #if (HOST_LONG_BITS == 32)
 119 void do_mult (void);
 120 void do_multu (void);
 121 void do_madd (void);
 122 void do_maddu (void);
 123 void do_msub (void);
 124 void do_msubu (void);
 125 #endif
 126 __attribute__ (( regparm(2) ))
 127 void do_mfc0(int reg, int sel);
 128 __attribute__ (( regparm(2) ))
 129 void do_mtc0(int reg, int sel);
 130 void do_tlbwi (void);
 131 void do_tlbwr (void);
 132 void do_tlbp (void);
 133 void do_tlbr (void);
 134 void do_lwl_raw (void);
 135 void do_lwr_raw (void);
 136 void do_swl_raw (void);
 137 void do_swr_raw (void);
 138 #if !defined(CONFIG_USER_ONLY)
 139 void do_lwl_user (void);
 140 void do_lwl_kernel (void);
 141 void do_lwr_user (void);
 142 void do_lwr_kernel (void);
 143 void do_swl_user (void);
 144 void do_swl_kernel (void);
 145 void do_swr_user (void);
 146 void do_swr_kernel (void);
 147 #endif
 148 __attribute__ (( regparm(1) ))
 149 void do_pmon (int function);
 150
 151 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
 152                                int is_user, int is_softmmu);
 153 void do_interrupt (CPUState *env);
 154
 155 void cpu_loop_exit(void);
 156 __attribute__ (( regparm(2) ))
 157 void do_raise_exception_err (uint32_t exception, int error_code);
 158 __attribute__ (( regparm(1) ))
 159 void do_raise_exception (uint32_t exception);
 160
 161 void cpu_dump_state(CPUState *env, FILE *f,
 162                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
 163                     int flags);
 164 void cpu_mips_irqctrl_init (void);
 165 uint32_t cpu_mips_get_random (CPUState *env);
 166 uint32_t cpu_mips_get_count (CPUState *env);
 167 void cpu_mips_store_count (CPUState *env, uint32_t value);
 168 void cpu_mips_store_compare (CPUState *env, uint32_t value);
 169 void cpu_mips_clock_init (CPUState *env);
 170
 171 #endif /* !defined(__QEMU_MIPS_EXEC_H__) */