target-unicore32/helper.c

   1 /*
   2  * Copyright (C) 2010-2012 Guan Xuetao
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * Contributions from 2012-04-01 on are considered under GPL version 2,
   9  * or (at your option) any later version.
  10  */
  11
  12 #include "cpu.h"
  13 #include "exec/gdbstub.h"
  14 #include "helper.h"
  15 #include "qemu/host-utils.h"
  16 #ifndef CONFIG_USER_ONLY
  17 #include "ui/console.h"
  18 #endif
  19
  20 #undef DEBUG_UC32
  21
  22 #ifdef DEBUG_UC32
  23 #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
  24 #else
  25 #define DPRINTF(fmt, ...) do {} while (0)
  26 #endif
  27
  28 CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
  29 {
  30     UniCore32CPU *cpu;
  31     CPUUniCore32State *env;
  32     ObjectClass *oc;
  33     static int inited = 1;
  34
  35     oc = cpu_class_by_name(TYPE_UNICORE32_CPU, cpu_model);
  36     if (oc == NULL) {
  37         return NULL;
  38     }
  39     cpu = UNICORE32_CPU(object_new(object_class_get_name(oc)));
  40     env = &cpu->env;
  41
  42     if (inited) {
  43         inited = 0;
  44         uc32_translate_init();
  45     }
  46
  47     qemu_init_vcpu(env);
  48     return env;
  49 }
  50
  51 uint32_t HELPER(clo)(uint32_t x)
  52 {
  53     return clo32(x);
  54 }
  55
  56 uint32_t HELPER(clz)(uint32_t x)
  57 {
  58     return clz32(x);
  59 }
  60
  61 #ifndef CONFIG_USER_ONLY
  62 void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
  63         uint32_t cop)
  64 {
  65     /*
  66      * movc pp.nn, rn, #imm9
  67      *      rn: UCOP_REG_D
  68      *      nn: UCOP_REG_N
  69      *          1: sys control reg.
  70      *          2: page table base reg.
  71      *          3: data fault status reg.
  72      *          4: insn fault status reg.
  73      *          5: cache op. reg.
  74      *          6: tlb op. reg.
  75      *      imm9: split UCOP_IMM10 with bit5 is 0
  76      */
  77     switch (creg) {
  78     case 1:
  79         if (cop != 0) {
  80             goto unrecognized;
  81         }
  82         env->cp0.c1_sys = val;
  83         break;
  84     case 2:
  85         if (cop != 0) {
  86             goto unrecognized;
  87         }
  88         env->cp0.c2_base = val;
  89         break;
  90     case 3:
  91         if (cop != 0) {
  92             goto unrecognized;
  93         }
  94         env->cp0.c3_faultstatus = val;
  95         break;
  96     case 4:
  97         if (cop != 0) {
  98             goto unrecognized;
  99         }
 100         env->cp0.c4_faultaddr = val;
 101         break;
 102     case 5:
 103         switch (cop) {
 104         case 28:
 105             DPRINTF("Invalidate Entire I&D cache\n");
 106             return;
 107         case 20:
 108             DPRINTF("Invalidate Entire Icache\n");
 109             return;
 110         case 12:
 111             DPRINTF("Invalidate Entire Dcache\n");
 112             return;
 113         case 10:
 114             DPRINTF("Clean Entire Dcache\n");
 115             return;
 116         case 14:
 117             DPRINTF("Flush Entire Dcache\n");
 118             return;
 119         case 13:
 120             DPRINTF("Invalidate Dcache line\n");
 121             return;
 122         case 11:
 123             DPRINTF("Clean Dcache line\n");
 124             return;
 125         case 15:
 126             DPRINTF("Flush Dcache line\n");
 127             return;
 128         }
 129         break;
 130     case 6:
 131         if ((cop <= 6) && (cop >= 2)) {
 132             /* invalid all tlb */
 133             tlb_flush(env, 1);
 134             return;
 135         }
 136         break;
 137     default:
 138         goto unrecognized;
 139     }
 140     return;
 141 unrecognized:
 142     DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
 143             creg, cop);
 144 }
 145
 146 uint32_t helper_cp0_get(CPUUniCore32State *env, uint32_t creg, uint32_t cop)
 147 {
 148     /*
 149      * movc rd, pp.nn, #imm9
 150      *      rd: UCOP_REG_D
 151      *      nn: UCOP_REG_N
 152      *          0: cpuid and cachetype
 153      *          1: sys control reg.
 154      *          2: page table base reg.
 155      *          3: data fault status reg.
 156      *          4: insn fault status reg.
 157      *      imm9: split UCOP_IMM10 with bit5 is 0
 158      */
 159     switch (creg) {
 160     case 0:
 161         switch (cop) {
 162         case 0:
 163             return env->cp0.c0_cpuid;
 164         case 1:
 165             return env->cp0.c0_cachetype;
 166         }
 167         break;
 168     case 1:
 169         if (cop == 0) {
 170             return env->cp0.c1_sys;
 171         }
 172         break;
 173     case 2:
 174         if (cop == 0) {
 175             return env->cp0.c2_base;
 176         }
 177         break;
 178     case 3:
 179         if (cop == 0) {
 180             return env->cp0.c3_faultstatus;
 181         }
 182         break;
 183     case 4:
 184         if (cop == 0) {
 185             return env->cp0.c4_faultaddr;
 186         }
 187         break;
 188     }
 189     DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
 190             creg, cop);
 191     return 0;
 192 }
 193
 194 #ifdef CONFIG_CURSES
 195 /*
 196  * FIXME:
 197  *     1. curses windows will be blank when switching back
 198  *     2. backspace is not handled yet
 199  */
 200 static void putc_on_screen(unsigned char ch)
 201 {
 202     static WINDOW *localwin;
 203     static int init;
 204
 205     if (!init) {
 206         /* Assume 80 * 30 screen to minimize the implementation */
 207         localwin = newwin(30, 80, 0, 0);
 208         scrollok(localwin, TRUE);
 209         init = TRUE;
 210     }
 211
 212     if (isprint(ch)) {
 213         wprintw(localwin, "%c", ch);
 214     } else {
 215         switch (ch) {
 216         case '\n':
 217             wprintw(localwin, "%c", ch);
 218             break;
 219         case '\r':
 220             /* If '\r' is put before '\n', the curses window will destroy the
 221              * last print line. And meanwhile, '\n' implifies '\r' inside. */
 222             break;
 223         default: /* Not handled, so just print it hex code */
 224             wprintw(localwin, "-- 0x%x --", ch);
 225         }
 226     }
 227
 228     wrefresh(localwin);
 229 }
 230 #else
 231 #define putc_on_screen(c)               do { } while (0)
 232 #endif
 233
 234 void helper_cp1_putc(target_ulong x)
 235 {
 236     putc_on_screen((unsigned char)x);   /* Output to screen */
 237     DPRINTF("%c", x);                   /* Output to stdout */
 238 }
 239 #endif
 240
 241 #ifdef CONFIG_USER_ONLY
 242 void switch_mode(CPUUniCore32State *env, int mode)
 243 {
 244     if (mode != ASR_MODE_USER) {
 245         cpu_abort(env, "Tried to switch out of user mode\n");
 246     }
 247 }
 248
 249 void do_interrupt(CPUUniCore32State *env)
 250 {
 251     cpu_abort(env, "NO interrupt in user mode\n");
 252 }
 253
 254 int uc32_cpu_handle_mmu_fault(CPUUniCore32State *env, target_ulong address,
 255                               int access_type, int mmu_idx)
 256 {
 257     cpu_abort(env, "NO mmu fault in user mode\n");
 258     return 1;
 259 }
 260 #endif