tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu-common.h"
  25
  26 /* Target word size (must be identical to pointer size). */
  27 #if UINTPTR_MAX == UINT32_MAX
  28 # define TCG_TARGET_REG_BITS 32
  29 #elif UINTPTR_MAX == UINT64_MAX
  30 # define TCG_TARGET_REG_BITS 64
  31 #else
  32 # error Unknown pointer size for tcg target
  33 #endif
  34
  35 #if TCG_TARGET_REG_BITS == 32
  36 typedef int32_t tcg_target_long;
  37 typedef uint32_t tcg_target_ulong;
  38 #define TCG_PRIlx PRIx32
  39 #define TCG_PRIld PRId32
  40 #elif TCG_TARGET_REG_BITS == 64
  41 typedef int64_t tcg_target_long;
  42 typedef uint64_t tcg_target_ulong;
  43 #define TCG_PRIlx PRIx64
  44 #define TCG_PRIld PRId64
  45 #else
  46 #error unsupported
  47 #endif
  48
  49 #include "tcg-target.h"
  50 #include "tcg-runtime.h"
  51
  52 #if TCG_TARGET_NB_REGS <= 32
  53 typedef uint32_t TCGRegSet;
  54 #elif TCG_TARGET_NB_REGS <= 64
  55 typedef uint64_t TCGRegSet;
  56 #else
  57 #error unsupported
  58 #endif
  59
  60 #if TCG_TARGET_REG_BITS == 32
  61 /* Turn some undef macros into false macros.  */
  62 #define TCG_TARGET_HAS_div_i64          0
  63 #define TCG_TARGET_HAS_rem_i64          0
  64 #define TCG_TARGET_HAS_div2_i64         0
  65 #define TCG_TARGET_HAS_rot_i64          0
  66 #define TCG_TARGET_HAS_ext8s_i64        0
  67 #define TCG_TARGET_HAS_ext16s_i64       0
  68 #define TCG_TARGET_HAS_ext32s_i64       0
  69 #define TCG_TARGET_HAS_ext8u_i64        0
  70 #define TCG_TARGET_HAS_ext16u_i64       0
  71 #define TCG_TARGET_HAS_ext32u_i64       0
  72 #define TCG_TARGET_HAS_bswap16_i64      0
  73 #define TCG_TARGET_HAS_bswap32_i64      0
  74 #define TCG_TARGET_HAS_bswap64_i64      0
  75 #define TCG_TARGET_HAS_neg_i64          0
  76 #define TCG_TARGET_HAS_not_i64          0
  77 #define TCG_TARGET_HAS_andc_i64         0
  78 #define TCG_TARGET_HAS_orc_i64          0
  79 #define TCG_TARGET_HAS_eqv_i64          0
  80 #define TCG_TARGET_HAS_nand_i64         0
  81 #define TCG_TARGET_HAS_nor_i64          0
  82 #define TCG_TARGET_HAS_deposit_i64      0
  83 #define TCG_TARGET_HAS_movcond_i64      0
  84 #define TCG_TARGET_HAS_add2_i64         0
  85 #define TCG_TARGET_HAS_sub2_i64         0
  86 #define TCG_TARGET_HAS_mulu2_i64        0
  87 #define TCG_TARGET_HAS_muls2_i64        0
  88 #define TCG_TARGET_HAS_muluh_i64        0
  89 #define TCG_TARGET_HAS_mulsh_i64        0
  90 /* Turn some undef macros into true macros.  */
  91 #define TCG_TARGET_HAS_add2_i32         1
  92 #define TCG_TARGET_HAS_sub2_i32         1
  93 #define TCG_TARGET_HAS_mulu2_i32        1
  94 #endif
  95
  96 #ifndef TCG_TARGET_deposit_i32_valid
  97 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
  98 #endif
  99 #ifndef TCG_TARGET_deposit_i64_valid
 100 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 101 #endif
 102
 103 /* Only one of DIV or DIV2 should be defined.  */
 104 #if defined(TCG_TARGET_HAS_div_i32)
 105 #define TCG_TARGET_HAS_div2_i32         0
 106 #elif defined(TCG_TARGET_HAS_div2_i32)
 107 #define TCG_TARGET_HAS_div_i32          0
 108 #define TCG_TARGET_HAS_rem_i32          0
 109 #endif
 110 #if defined(TCG_TARGET_HAS_div_i64)
 111 #define TCG_TARGET_HAS_div2_i64         0
 112 #elif defined(TCG_TARGET_HAS_div2_i64)
 113 #define TCG_TARGET_HAS_div_i64          0
 114 #define TCG_TARGET_HAS_rem_i64          0
 115 #endif
 116
 117 typedef enum TCGOpcode {
 118 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 119 #include "tcg-opc.h"
 120 #undef DEF
 121     NB_OPS,
 122 } TCGOpcode;
 123
 124 #define tcg_regset_clear(d) (d) = 0
 125 #define tcg_regset_set(d, s) (d) = (s)
 126 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 127 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 128 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 129 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 130 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 131 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 132 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 133 #define tcg_regset_not(d, a) (d) = ~(a)
 134
 135 typedef struct TCGRelocation {
 136     struct TCGRelocation *next;
 137     int type;
 138     uint8_t *ptr;
 139     tcg_target_long addend;
 140 } TCGRelocation;
 141
 142 typedef struct TCGLabel {
 143     int has_value;
 144     union {
 145         tcg_target_ulong value;
 146         TCGRelocation *first_reloc;
 147     } u;
 148 } TCGLabel;
 149
 150 typedef struct TCGPool {
 151     struct TCGPool *next;
 152     int size;
 153     uint8_t data[0] __attribute__ ((aligned));
 154 } TCGPool;
 155
 156 #define TCG_POOL_CHUNK_SIZE 32768
 157
 158 #define TCG_MAX_LABELS 512
 159
 160 #define TCG_MAX_TEMPS 512
 161
 162 /* when the size of the arguments of a called function is smaller than
 163    this value, they are statically allocated in the TB stack frame */
 164 #define TCG_STATIC_CALL_ARGS_SIZE 128
 165
 166 typedef enum TCGType {
 167     TCG_TYPE_I32,
 168     TCG_TYPE_I64,
 169     TCG_TYPE_COUNT, /* number of different types */
 170
 171     /* An alias for the size of the host register.  */
 172 #if TCG_TARGET_REG_BITS == 32
 173     TCG_TYPE_REG = TCG_TYPE_I32,
 174 #else
 175     TCG_TYPE_REG = TCG_TYPE_I64,
 176 #endif
 177
 178     /* An alias for the size of the native pointer.  We don't currently
 179        support any hosts with 64-bit registers and 32-bit pointers.  */
 180     TCG_TYPE_PTR = TCG_TYPE_REG,
 181
 182     /* An alias for the size of the target "long", aka register.  */
 183 #if TARGET_LONG_BITS == 64
 184     TCG_TYPE_TL = TCG_TYPE_I64,
 185 #else
 186     TCG_TYPE_TL = TCG_TYPE_I32,
 187 #endif
 188 } TCGType;
 189
 190 typedef tcg_target_ulong TCGArg;
 191
 192 /* Define a type and accessor macros for variables.  Using a struct is
 193    nice because it gives some level of type safely.  Ideally the compiler
 194    be able to see through all this.  However in practice this is not true,
 195    especially on targets with braindamaged ABIs (e.g. i386).
 196    We use plain int by default to avoid this runtime overhead.
 197    Users of tcg_gen_* don't need to know about any of this, and should
 198    treat TCGv as an opaque type.
 199    In addition we do typechecking for different types of variables.  TCGv_i32
 200    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 201    are aliases for target_ulong and host pointer sized values respectively.
 202  */
 203
 204 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
 205 /* Macros/structures for qemu_ld/st IR code optimization:
 206    TCG_MAX_HELPER_LABELS is defined as same as OPC_BUF_SIZE in exec-all.h. */
 207 #define TCG_MAX_QEMU_LDST       640
 208
 209 typedef struct TCGLabelQemuLdst {
 210     int is_ld:1;            /* qemu_ld: 1, qemu_st: 0 */
 211     int opc:4;
 212     int addrlo_reg;         /* reg index for low word of guest virtual addr */
 213     int addrhi_reg;         /* reg index for high word of guest virtual addr */
 214     int datalo_reg;         /* reg index for low word to be loaded or stored */
 215     int datahi_reg;         /* reg index for high word to be loaded or stored */
 216     int mem_index;          /* soft MMU memory index */
 217     uint8_t *raddr;         /* gen code addr of the next IR of qemu_ld/st IR */
 218     uint8_t *label_ptr[2];  /* label pointers to be updated */
 219 } TCGLabelQemuLdst;
 220 #endif
 221
 222 #ifdef CONFIG_DEBUG_TCG
 223 #define DEBUG_TCGV 1
 224 #endif
 225
 226 #ifdef DEBUG_TCGV
 227
 228 typedef struct
 229 {
 230     int i32;
 231 } TCGv_i32;
 232
 233 typedef struct
 234 {
 235     int i64;
 236 } TCGv_i64;
 237
 238 typedef struct {
 239     int iptr;
 240 } TCGv_ptr;
 241
 242 #define MAKE_TCGV_I32(i) __extension__                  \
 243     ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 244 #define MAKE_TCGV_I64(i) __extension__                  \
 245     ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 246 #define MAKE_TCGV_PTR(i) __extension__                  \
 247     ({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
 248 #define GET_TCGV_I32(t) ((t).i32)
 249 #define GET_TCGV_I64(t) ((t).i64)
 250 #define GET_TCGV_PTR(t) ((t).iptr)
 251 #if TCG_TARGET_REG_BITS == 32
 252 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 253 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 254 #endif
 255
 256 #else /* !DEBUG_TCGV */
 257
 258 typedef int TCGv_i32;
 259 typedef int TCGv_i64;
 260 #if TCG_TARGET_REG_BITS == 32
 261 #define TCGv_ptr TCGv_i32
 262 #else
 263 #define TCGv_ptr TCGv_i64
 264 #endif
 265 #define MAKE_TCGV_I32(x) (x)
 266 #define MAKE_TCGV_I64(x) (x)
 267 #define MAKE_TCGV_PTR(x) (x)
 268 #define GET_TCGV_I32(t) (t)
 269 #define GET_TCGV_I64(t) (t)
 270 #define GET_TCGV_PTR(t) (t)
 271
 272 #if TCG_TARGET_REG_BITS == 32
 273 #define TCGV_LOW(t) (t)
 274 #define TCGV_HIGH(t) ((t) + 1)
 275 #endif
 276
 277 #endif /* DEBUG_TCGV */
 278
 279 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 280 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 281
 282 /* Dummy definition to avoid compiler warnings.  */
 283 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 284 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 285
 286 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 287 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 288
 289 /* call flags */
 290 /* Helper does not read globals (either directly or through an exception). It
 291    implies TCG_CALL_NO_WRITE_GLOBALS. */
 292 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 293 /* Helper does not write globals */
 294 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 295 /* Helper can be safely suppressed if the return value is not used. */
 296 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 297
 298 /* convenience version of most used call flags */
 299 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 300 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 301 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 302 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 303 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 304
 305 /* used to align parameters */
 306 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 307 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 308
 309 /* Conditions.  Note that these are laid out for easy manipulation by
 310    the functions below:
 311      bit 0 is used for inverting;
 312      bit 1 is signed,
 313      bit 2 is unsigned,
 314      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 315 typedef enum {
 316     /* non-signed */
 317     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 318     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 319     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 320     TCG_COND_NE     = 8 | 0 | 0 | 1,
 321     /* signed */
 322     TCG_COND_LT     = 0 | 0 | 2 | 0,
 323     TCG_COND_GE     = 0 | 0 | 2 | 1,
 324     TCG_COND_LE     = 8 | 0 | 2 | 0,
 325     TCG_COND_GT     = 8 | 0 | 2 | 1,
 326     /* unsigned */
 327     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 328     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 329     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 330     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 331 } TCGCond;
 332
 333 /* Invert the sense of the comparison.  */
 334 static inline TCGCond tcg_invert_cond(TCGCond c)
 335 {
 336     return (TCGCond)(c ^ 1);
 337 }
 338
 339 /* Swap the operands in a comparison.  */
 340 static inline TCGCond tcg_swap_cond(TCGCond c)
 341 {
 342     return c & 6 ? (TCGCond)(c ^ 9) : c;
 343 }
 344
 345 /* Create an "unsigned" version of a "signed" comparison.  */
 346 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 347 {
 348     return c & 2 ? (TCGCond)(c ^ 6) : c;
 349 }
 350
 351 /* Must a comparison be considered unsigned?  */
 352 static inline bool is_unsigned_cond(TCGCond c)
 353 {
 354     return (c & 4) != 0;
 355 }
 356
 357 /* Create a "high" version of a double-word comparison.
 358    This removes equality from a LTE or GTE comparison.  */
 359 static inline TCGCond tcg_high_cond(TCGCond c)
 360 {
 361     switch (c) {
 362     case TCG_COND_GE:
 363     case TCG_COND_LE:
 364     case TCG_COND_GEU:
 365     case TCG_COND_LEU:
 366         return (TCGCond)(c ^ 8);
 367     default:
 368         return c;
 369     }
 370 }
 371
 372 #define TEMP_VAL_DEAD  0
 373 #define TEMP_VAL_REG   1
 374 #define TEMP_VAL_MEM   2
 375 #define TEMP_VAL_CONST 3
 376
 377 /* XXX: optimize memory layout */
 378 typedef struct TCGTemp {
 379     TCGType base_type;
 380     TCGType type;
 381     int val_type;
 382     int reg;
 383     tcg_target_long val;
 384     int mem_reg;
 385     tcg_target_long mem_offset;
 386     unsigned int fixed_reg:1;
 387     unsigned int mem_coherent:1;
 388     unsigned int mem_allocated:1;
 389     unsigned int temp_local:1; /* If true, the temp is saved across
 390                                   basic blocks. Otherwise, it is not
 391                                   preserved across basic blocks. */
 392     unsigned int temp_allocated:1; /* never used for code gen */
 393     /* index of next free temp of same base type, -1 if end */
 394     int next_free_temp;
 395     const char *name;
 396 } TCGTemp;
 397
 398 typedef struct TCGHelperInfo {
 399     tcg_target_ulong func;
 400     const char *name;
 401 } TCGHelperInfo;
 402
 403 typedef struct TCGContext TCGContext;
 404
 405 struct TCGContext {
 406     uint8_t *pool_cur, *pool_end;
 407     TCGPool *pool_first, *pool_current, *pool_first_large;
 408     TCGLabel *labels;
 409     int nb_labels;
 410     int nb_globals;
 411     int nb_temps;
 412     /* index of free temps, -1 if none */
 413     int first_free_temp[TCG_TYPE_COUNT * 2];
 414
 415     /* goto_tb support */
 416     uint8_t *code_buf;
 417     uintptr_t *tb_next;
 418     uint16_t *tb_next_offset;
 419     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 420
 421     /* liveness analysis */
 422     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 423                                corresponding argument is dead */
 424     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 425                                corresponding output argument needs to be
 426                                sync to memory. */
 427
 428     /* tells in which temporary a given register is. It does not take
 429        into account fixed registers */
 430     int reg_to_temp[TCG_TARGET_NB_REGS];
 431     TCGRegSet reserved_regs;
 432     tcg_target_long current_frame_offset;
 433     tcg_target_long frame_start;
 434     tcg_target_long frame_end;
 435     int frame_reg;
 436
 437     uint8_t *code_ptr;
 438     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 439
 440     TCGHelperInfo *helpers;
 441     int nb_helpers;
 442     int allocated_helpers;
 443     int helpers_sorted;
 444
 445 #ifdef CONFIG_PROFILER
 446     /* profiling info */
 447     int64_t tb_count1;
 448     int64_t tb_count;
 449     int64_t op_count; /* total insn count */
 450     int op_count_max; /* max insn per TB */
 451     int64_t temp_count;
 452     int temp_count_max;
 453     int64_t del_op_count;
 454     int64_t code_in_len;
 455     int64_t code_out_len;
 456     int64_t interm_time;
 457     int64_t code_time;
 458     int64_t la_time;
 459     int64_t opt_time;
 460     int64_t restore_count;
 461     int64_t restore_time;
 462 #endif
 463
 464 #ifdef CONFIG_DEBUG_TCG
 465     int temps_in_use;
 466     int goto_tb_issue_mask;
 467 #endif
 468
 469     uint16_t gen_opc_buf[OPC_BUF_SIZE];
 470     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 471
 472     uint16_t *gen_opc_ptr;
 473     TCGArg *gen_opparam_ptr;
 474     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 475     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 476     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 477
 478     /* Code generation */
 479     int code_gen_max_blocks;
 480     uint8_t *code_gen_prologue;
 481     uint8_t *code_gen_buffer;
 482     size_t code_gen_buffer_size;
 483     /* threshold to flush the translated code buffer */
 484     size_t code_gen_buffer_max_size;
 485     uint8_t *code_gen_ptr;
 486
 487     TBContext tb_ctx;
 488
 489 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
 490     /* labels info for qemu_ld/st IRs
 491        The labels help to generate TLB miss case codes at the end of TB */
 492     TCGLabelQemuLdst *qemu_ldst_labels;
 493     int nb_qemu_ldst_labels;
 494 #endif
 495 };
 496
 497 extern TCGContext tcg_ctx;
 498
 499 /* pool based memory allocation */
 500
 501 void *tcg_malloc_internal(TCGContext *s, int size);
 502 void tcg_pool_reset(TCGContext *s);
 503 void tcg_pool_delete(TCGContext *s);
 504
 505 static inline void *tcg_malloc(int size)
 506 {
 507     TCGContext *s = &tcg_ctx;
 508     uint8_t *ptr, *ptr_end;
 509     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 510     ptr = s->pool_cur;
 511     ptr_end = ptr + size;
 512     if (unlikely(ptr_end > s->pool_end)) {
 513         return tcg_malloc_internal(&tcg_ctx, size);
 514     } else {
 515         s->pool_cur = ptr_end;
 516         return ptr;
 517     }
 518 }
 519
 520 void tcg_context_init(TCGContext *s);
 521 void tcg_prologue_init(TCGContext *s);
 522 void tcg_func_start(TCGContext *s);
 523
 524 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf);
 525 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);
 526
 527 void tcg_set_frame(TCGContext *s, int reg,
 528                    tcg_target_long start, tcg_target_long size);
 529
 530 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 531 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
 532                                 const char *name);
 533 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 534 static inline TCGv_i32 tcg_temp_new_i32(void)
 535 {
 536     return tcg_temp_new_internal_i32(0);
 537 }
 538 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 539 {
 540     return tcg_temp_new_internal_i32(1);
 541 }
 542 void tcg_temp_free_i32(TCGv_i32 arg);
 543 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 544
 545 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 546 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
 547                                 const char *name);
 548 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 549 static inline TCGv_i64 tcg_temp_new_i64(void)
 550 {
 551     return tcg_temp_new_internal_i64(0);
 552 }
 553 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 554 {
 555     return tcg_temp_new_internal_i64(1);
 556 }
 557 void tcg_temp_free_i64(TCGv_i64 arg);
 558 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 559
 560 #if defined(CONFIG_DEBUG_TCG)
 561 /* If you call tcg_clear_temp_count() at the start of a section of
 562  * code which is not supposed to leak any TCG temporaries, then
 563  * calling tcg_check_temp_count() at the end of the section will
 564  * return 1 if the section did in fact leak a temporary.
 565  */
 566 void tcg_clear_temp_count(void);
 567 int tcg_check_temp_count(void);
 568 #else
 569 #define tcg_clear_temp_count() do { } while (0)
 570 #define tcg_check_temp_count() 0
 571 #endif
 572
 573 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 574
 575 #define TCG_CT_ALIAS  0x80
 576 #define TCG_CT_IALIAS 0x40
 577 #define TCG_CT_REG    0x01
 578 #define TCG_CT_CONST  0x02 /* any constant of register size */
 579
 580 typedef struct TCGArgConstraint {
 581     uint16_t ct;
 582     uint8_t alias_index;
 583     union {
 584         TCGRegSet regs;
 585     } u;
 586 } TCGArgConstraint;
 587
 588 #define TCG_MAX_OP_ARGS 16
 589
 590 /* Bits for TCGOpDef->flags, 8 bits available.  */
 591 enum {
 592     /* Instruction defines the end of a basic block.  */
 593     TCG_OPF_BB_END       = 0x01,
 594     /* Instruction clobbers call registers and potentially update globals.  */
 595     TCG_OPF_CALL_CLOBBER = 0x02,
 596     /* Instruction has side effects: it cannot be removed if its outputs
 597        are not used, and might trigger exceptions.  */
 598     TCG_OPF_SIDE_EFFECTS = 0x04,
 599     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 600     TCG_OPF_64BIT        = 0x08,
 601     /* Instruction is optional and not implemented by the host, or insn
 602        is generic and should not be implemened by the host.  */
 603     TCG_OPF_NOT_PRESENT  = 0x10,
 604 };
 605
 606 typedef struct TCGOpDef {
 607     const char *name;
 608     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 609     uint8_t flags;
 610     TCGArgConstraint *args_ct;
 611     int *sorted_args;
 612 #if defined(CONFIG_DEBUG_TCG)
 613     int used;
 614 #endif
 615 } TCGOpDef;
 616
 617 extern TCGOpDef tcg_op_defs[];
 618 extern const size_t tcg_op_defs_max;
 619
 620 typedef struct TCGTargetOpDef {
 621     TCGOpcode op;
 622     const char *args_ct_str[TCG_MAX_OP_ARGS];
 623 } TCGTargetOpDef;
 624
 625 #define tcg_abort() \
 626 do {\
 627     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 628     abort();\
 629 } while (0)
 630
 631 #ifdef CONFIG_DEBUG_TCG
 632 # define tcg_debug_assert(X) do { assert(X); } while (0)
 633 #elif QEMU_GNUC_PREREQ(4, 5)
 634 # define tcg_debug_assert(X) \
 635     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 636 #else
 637 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 638 #endif
 639
 640 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 641
 642 #if TCG_TARGET_REG_BITS == 32
 643 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 644 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 645
 646 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((tcg_target_long)(V)))
 647 #define tcg_global_reg_new_ptr(R, N) \
 648     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 649 #define tcg_global_mem_new_ptr(R, O, N) \
 650     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 651 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 652 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 653 #else
 654 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 655 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 656
 657 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((tcg_target_long)(V)))
 658 #define tcg_global_reg_new_ptr(R, N) \
 659     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 660 #define tcg_global_mem_new_ptr(R, O, N) \
 661     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 662 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 663 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 664 #endif
 665
 666 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
 667                    int sizemask, TCGArg ret, int nargs, TCGArg *args);
 668
 669 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
 670                         int c, int right, int arith);
 671
 672 TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args,
 673                      TCGOpDef *tcg_op_def);
 674
 675 /* only used for debugging purposes */
 676 void tcg_register_helper(void *func, const char *name);
 677 const char *tcg_helper_get_name(TCGContext *s, void *func);
 678 void tcg_dump_ops(TCGContext *s);
 679
 680 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 681 TCGv_i32 tcg_const_i32(int32_t val);
 682 TCGv_i64 tcg_const_i64(int64_t val);
 683 TCGv_i32 tcg_const_local_i32(int32_t val);
 684 TCGv_i64 tcg_const_local_i64(int64_t val);
 685
 686 /**
 687  * tcg_qemu_tb_exec:
 688  * @env: CPUArchState * for the CPU
 689  * @tb_ptr: address of generated code for the TB to execute
 690  *
 691  * Start executing code from a given translation block.
 692  * Where translation blocks have been linked, execution
 693  * may proceed from the given TB into successive ones.
 694  * Control eventually returns only when some action is needed
 695  * from the top-level loop: either control must pass to a TB
 696  * which has not yet been directly linked, or an asynchronous
 697  * event such as an interrupt needs handling.
 698  *
 699  * The return value is a pointer to the next TB to execute
 700  * (if known; otherwise zero). This pointer is assumed to be
 701  * 4-aligned, and the bottom two bits are used to return further
 702  * information:
 703  *  0, 1: the link between this TB and the next is via the specified
 704  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 705  *        of) "goto_tb <index>". The main loop uses this to determine
 706  *        how to link the TB just executed to the next.
 707  *  2:    we are using instruction counting code generation, and we
 708  *        did not start executing this TB because the instruction counter
 709  *        would hit zero midway through it. In this case the next-TB pointer
 710  *        returned is the TB we were about to execute, and the caller must
 711  *        arrange to execute the remaining count of instructions.
 712  *  3:    we stopped because the CPU's exit_request flag was set
 713  *        (usually meaning that there is an interrupt that needs to be
 714  *        handled). The next-TB pointer returned is the TB we were
 715  *        about to execute when we noticed the pending exit request.
 716  *
 717  * If the bottom two bits indicate an exit-via-index then the CPU
 718  * state is correctly synchronised and ready for execution of the next
 719  * TB (and in particular the guest PC is the address to execute next).
 720  * Otherwise, we gave up on execution of this TB before it started, and
 721  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 722  * with the next-TB pointer we return.
 723  *
 724  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 725  * to this default (which just calls the prologue.code emitted by
 726  * tcg_target_qemu_prologue()).
 727  */
 728 #define TB_EXIT_MASK 3
 729 #define TB_EXIT_IDX0 0
 730 #define TB_EXIT_IDX1 1
 731 #define TB_EXIT_ICOUNT_EXPIRED 2
 732 #define TB_EXIT_REQUESTED 3
 733
 734 #if !defined(tcg_qemu_tb_exec)
 735 # define tcg_qemu_tb_exec(env, tb_ptr) \
 736     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 737 #endif
 738
 739 void tcg_register_jit(void *buf, size_t buf_size);
 740
 741 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
 742 /* Generate TB finalization at the end of block */
 743 void tcg_out_tb_finalize(TCGContext *s);
 744 #endif