----------------------
Overall
- M: Avi Kivity <avi@redhat.com>
+ M: Gleb Natapov <gleb@redhat.com>
M: Marcelo Tosatti <mtosatti@redhat.com>
L: kvm@vger.kernel.org
S: Supported
F: target-s390x/kvm.c
X86
- M: Avi Kivity <avi@redhat.com>
+ M: Gleb Natapov <gleb@redhat.com>
M: Marcelo Tosatti <mtosatti@redhat.com>
L: kvm@vger.kernel.org
S: Supported
F: hw/xilinx_zynq.c
F: hw/zynq_slcr.c
F: hw/cadence_*
+ F: hw/xilinx_spips.c
CRIS Machines
-------------
405
M: Alexander Graf <agraf@suse.de>
L: qemu-ppc@nongnu.org
- S: Maintained
+ S: Odd Fixes
F: hw/ppc405_boards.c
+ Bamboo
+ M: Alexander Graf <agraf@suse.de>
+ L: qemu-ppc@nongnu.org
+ S: Odd Fixes
+ F: hw/ppc440_bamboo.c
+
+ e500
+ M: Alexander Graf <agraf@suse.de>
+ M: Scott Wood <scottwood@freescale.com>
+ L: qemu-ppc@nongnu.org
+ S: Supported
+ F: hw/ppc/e500.[hc]
+ F: hw/ppc/e500plat.c
+
+ mpc8544ds
+ M: Alexander Graf <agraf@suse.de>
+ M: Scott Wood <scottwood@freescale.com>
+ L: qemu-ppc@nongnu.org
+ S: Supported
+ F: hw/ppc/mpc8544ds.c
+ F: hw/mpc8544_guts.c
+
New World
M: Alexander Graf <agraf@suse.de>
L: qemu-ppc@nongnu.org
S: Odd Fixes
F: hw/ppc_prep.c
F: hw/prep_pci.[hc]
+F: hw/pc87312.[hc]
+ sPAPR
+ M: David Gibson <david@gibson.dropbear.id.au>
+ M: Alexander Graf <agraf@suse.de>
+ L: qemu-ppc@nongnu.org
+ S: Supported
+ F: hw/spapr*
+
+ virtex_ml507
+ M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+ L: qemu-ppc@nongnu.org
+ S: Odd Fixes
+ F: hw/virtex_ml507.c
+
SH4 Machines
------------
R2D
S: Maintained
F: hw/sun4u.c
+ Leon3
+ M: Fabien Chouteau <chouteau@adacore.com>
+ S: Maintained
+ F: hw/leon3.c
+ F: hw/grlib*
+
S390 Machines
-------------
S390 Virtio
PCI
M: Michael S. Tsirkin <mst@redhat.com>
S: Supported
+ F: hw/pci/*
F: hw/pci*
F: hw/piix*
+ ppc4xx
+ M: Alexander Graf <agraf@suse.de>
+ L: qemu-ppc@nongnu.org
+ S: Odd Fixes
+ F: hw/ppc4xx*.[hc]
+
+ ppce500
+ M: Alexander Graf <agraf@suse.de>
+ M: Scott Wood <scottwood@freescale.com>
+ L: qemu-ppc@nongnu.org
+ S: Supported
+ F: hw/ppce500_*
+
SCSI
M: Paolo Bonzini <pbonzini@redhat.com>
S: Supported
S: Odd Fixes
F: hw/lsi53c895a.c
+ SSI
+ M: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
+ S: Maintained
+ F: hw/ssi.*
+ F: hw/m25p80.c
+
USB
M: Gerd Hoffmann <kraxel@redhat.com>
S: Maintained
F: hw/usb*
+ VFIO
+ M: Alex Williamson <alex.williamson@redhat.com>
+ S: Supported
+ F: hw/vfio*
+
vhost
M: Michael S. Tsirkin <mst@redhat.com>
S: Supported
virtio-blk
M: Kevin Wolf <kwolf@redhat.com>
+ M: Stefan Hajnoczi <stefanha@redhat.com>
S: Supported
F: hw/virtio-blk*
F: hw/xilinx_ethlite.c
F: hw/xilinx_timer.c
F: hw/xilinx.h
+ F: hw/xilinx_spi.c
Subsystems
----------
Block
M: Kevin Wolf <kwolf@redhat.com>
+ M: Stefan Hajnoczi <stefanha@redhat.com>
S: Supported
F: block*
F: block/
S: Maintained
F: qemu-char.c
+ CPU
+ M: Andreas Färber <afaerber@suse.de>
+ S: Supported
+ F: qom/cpu.c
+ F: include/qemu/cpu.h
+ F: target-i386/cpu.c
+
Device Tree
M: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
M: Alexander Graf <agraf@suse.de>
Network device layer
M: Anthony Liguori <aliguori@us.ibm.com>
- M: Stefan Hajnoczi <stefanha@gmail.com>
+ M: Stefan Hajnoczi <stefanha@redhat.com>
S: Maintained
F: net/
T: git git://github.com/stefanha/qemu.git net
T: git git://git.kiszka.org/qemu.git queues/slirp
Tracing
- M: Stefan Hajnoczi <stefanha@gmail.com>
+ M: Stefan Hajnoczi <stefanha@redhat.com>
S: Maintained
F: trace/
F: scripts/tracetool.py
- hw-obj-y = usb/ ide/
- hw-obj-y += loader.o
- hw-obj-$(CONFIG_VIRTIO) += virtio-console.o
- hw-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
- hw-obj-y += fw_cfg.o
- hw-obj-$(CONFIG_PCI) += pci.o pci_bridge.o pci_bridge_dev.o
- hw-obj-$(CONFIG_PCI) += msix.o msi.o
- hw-obj-$(CONFIG_PCI) += shpc.o
- hw-obj-$(CONFIG_PCI) += slotid_cap.o
- hw-obj-$(CONFIG_PCI) += pci_host.o pcie_host.o
- hw-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
- hw-obj-y += watchdog.o
- hw-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
- hw-obj-$(CONFIG_ECC) += ecc.o
- hw-obj-$(CONFIG_NAND) += nand.o
- hw-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
- hw-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
-
- hw-obj-$(CONFIG_M48T59) += m48t59.o
- hw-obj-$(CONFIG_ESCC) += escc.o
- hw-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
-
- hw-obj-$(CONFIG_SERIAL) += serial.o
- hw-obj-$(CONFIG_PARALLEL) += parallel.o
- hw-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
- hw-obj-$(CONFIG_PCSPK) += pcspk.o
- hw-obj-$(CONFIG_PCKBD) += pckbd.o
- hw-obj-$(CONFIG_FDC) += fdc.o
- hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o
- hw-obj-$(CONFIG_APM) += pm_smbus.o apm.o
- hw-obj-$(CONFIG_DMA) += dma.o
- hw-obj-$(CONFIG_I82374) += i82374.o
- hw-obj-$(CONFIG_HPET) += hpet.o
- hw-obj-$(CONFIG_APPLESMC) += applesmc.o
- hw-obj-$(CONFIG_SMARTCARD) += ccid-card-passthru.o
- hw-obj-$(CONFIG_SMARTCARD_NSS) += ccid-card-emulated.o
- hw-obj-$(CONFIG_I8259) += i8259_common.o i8259.o
+ # core qdev-related obj files, also used by *-user:
+ hw-core-obj-y += qdev.o qdev-properties.o
+ # irq.o needed for qdev GPIO handling:
+ hw-core-obj-y += irq.o
+
+
+ common-obj-y = usb/ ide/ pci/
+ common-obj-y += loader.o
+ common-obj-$(CONFIG_VIRTIO) += virtio-console.o
+ common-obj-$(CONFIG_VIRTIO) += virtio-rng.o
+ common-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
+ common-obj-y += fw_cfg.o
+ common-obj-$(CONFIG_PCI) += pci_bridge_dev.o
+ common-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
+ common-obj-$(CONFIG_PCI) += i82801b11.o
+ common-obj-y += watchdog.o
+ common-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
+ common-obj-$(CONFIG_ECC) += ecc.o
+ common-obj-$(CONFIG_NAND) += nand.o
+ common-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
+ common-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
+
+ common-obj-$(CONFIG_M48T59) += m48t59.o
+ common-obj-$(CONFIG_ESCC) += escc.o
+ common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
+
+ common-obj-$(CONFIG_SERIAL) += serial.o serial-isa.o
+ common-obj-$(CONFIG_SERIAL_PCI) += serial-pci.o
+ common-obj-$(CONFIG_PARALLEL) += parallel.o
+ common-obj-$(CONFIG_I8254) += i8254_common.o i8254.o
+ common-obj-$(CONFIG_PCSPK) += pcspk.o
+ common-obj-$(CONFIG_PCKBD) += pckbd.o
+ common-obj-$(CONFIG_FDC) += fdc.o
+ common-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o acpi_ich9.o smbus_ich9.o
+ common-obj-$(CONFIG_APM) += pm_smbus.o apm.o
+ common-obj-$(CONFIG_DMA) += dma.o
+ common-obj-$(CONFIG_I82374) += i82374.o
+ common-obj-$(CONFIG_HPET) += hpet.o
+ common-obj-$(CONFIG_APPLESMC) += applesmc.o
+ common-obj-$(CONFIG_SMARTCARD) += ccid-card-passthru.o
+ common-obj-$(CONFIG_SMARTCARD_NSS) += ccid-card-emulated.o
+ common-obj-$(CONFIG_I8259) += i8259_common.o i8259.o
+ common-obj-y += fifo.o
+ common-obj-y += pam.o
+
+ extra-obj-y += pci/
# PPC devices
- hw-obj-$(CONFIG_PREP_PCI) += prep_pci.o
- hw-obj-$(CONFIG_I82378) += i82378.o
- hw-obj-$(CONFIG_PC87312) += pc87312.o
+ common-obj-$(CONFIG_PREP_PCI) += prep_pci.o
+ common-obj-$(CONFIG_I82378) += i82378.o
++common-obj-$(CONFIG_PC87312) += pc87312.o
# Mac shared devices
- hw-obj-$(CONFIG_MACIO) += macio.o
- hw-obj-$(CONFIG_CUDA) += cuda.o
- hw-obj-$(CONFIG_ADB) += adb.o
- hw-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
- hw-obj-$(CONFIG_MAC_DBDMA) += mac_dbdma.o
+ common-obj-$(CONFIG_MACIO) += macio.o
+ common-obj-$(CONFIG_CUDA) += cuda.o
+ common-obj-$(CONFIG_ADB) += adb.o
+ common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
+ common-obj-$(CONFIG_MAC_DBDMA) += mac_dbdma.o
# OldWorld PowerMac
- hw-obj-$(CONFIG_HEATHROW_PIC) += heathrow_pic.o
- hw-obj-$(CONFIG_GRACKLE_PCI) += grackle_pci.o
+ common-obj-$(CONFIG_HEATHROW_PIC) += heathrow_pic.o
+ common-obj-$(CONFIG_GRACKLE_PCI) += grackle_pci.o
# NewWorld PowerMac
- hw-obj-$(CONFIG_UNIN_PCI) += unin_pci.o
- hw-obj-$(CONFIG_DEC_PCI) += dec_pci.o
+ common-obj-$(CONFIG_UNIN_PCI) += unin_pci.o
+ common-obj-$(CONFIG_DEC_PCI) += dec_pci.o
# PowerPC E500 boards
- hw-obj-$(CONFIG_PPCE500_PCI) += ppce500_pci.o
+ common-obj-$(CONFIG_PPCE500_PCI) += ppce500_pci.o
# MIPS devices
- hw-obj-$(CONFIG_PIIX4) += piix4.o
- hw-obj-$(CONFIG_G364FB) += g364fb.o
- hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
+ common-obj-$(CONFIG_PIIX4) += piix4.o
+ common-obj-$(CONFIG_G364FB) += g364fb.o
+ common-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
# Xilinx devices
- hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
- hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
- hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
- hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
- hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axienet.o
- hw-obj-$(CONFIG_XILINX_AXI) += stream.o
+ common-obj-$(CONFIG_XILINX) += xilinx_intc.o
+ common-obj-$(CONFIG_XILINX) += xilinx_timer.o
+ common-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
+ common-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
+ common-obj-$(CONFIG_XILINX_AXI) += xilinx_axienet.o
+ common-obj-$(CONFIG_XILINX_AXI) += stream.o
# PKUnity SoC devices
- hw-obj-$(CONFIG_PUV3) += puv3_intc.o
- hw-obj-$(CONFIG_PUV3) += puv3_ost.o
- hw-obj-$(CONFIG_PUV3) += puv3_gpio.o
- hw-obj-$(CONFIG_PUV3) += puv3_pm.o
- hw-obj-$(CONFIG_PUV3) += puv3_dma.o
+ common-obj-$(CONFIG_PUV3) += puv3_intc.o
+ common-obj-$(CONFIG_PUV3) += puv3_ost.o
+ common-obj-$(CONFIG_PUV3) += puv3_gpio.o
+ common-obj-$(CONFIG_PUV3) += puv3_pm.o
+ common-obj-$(CONFIG_PUV3) += puv3_dma.o
# ARM devices
- hw-obj-$(CONFIG_ARM_TIMER) += arm_timer.o
- hw-obj-$(CONFIG_PL011) += pl011.o
- hw-obj-$(CONFIG_PL022) += pl022.o
- hw-obj-$(CONFIG_PL031) += pl031.o
- hw-obj-$(CONFIG_PL041) += pl041.o lm4549.o
- hw-obj-$(CONFIG_PL050) += pl050.o
- hw-obj-$(CONFIG_PL061) += pl061.o
- hw-obj-$(CONFIG_PL080) += pl080.o
- hw-obj-$(CONFIG_PL110) += pl110.o
- hw-obj-$(CONFIG_PL181) += pl181.o
- hw-obj-$(CONFIG_PL190) += pl190.o
- hw-obj-$(CONFIG_PL310) += arm_l2x0.o
- hw-obj-$(CONFIG_VERSATILE_PCI) += versatile_pci.o
- hw-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
- hw-obj-$(CONFIG_CADENCE) += cadence_uart.o
- hw-obj-$(CONFIG_CADENCE) += cadence_ttc.o
- hw-obj-$(CONFIG_CADENCE) += cadence_gem.o
- hw-obj-$(CONFIG_XGMAC) += xgmac.o
+ common-obj-$(CONFIG_ARM_TIMER) += arm_timer.o
+ common-obj-$(CONFIG_PL011) += pl011.o
+ common-obj-$(CONFIG_PL022) += pl022.o
+ common-obj-$(CONFIG_PL031) += pl031.o
+ common-obj-$(CONFIG_PL041) += pl041.o lm4549.o
+ common-obj-$(CONFIG_PL050) += pl050.o
+ common-obj-$(CONFIG_PL061) += pl061.o
+ common-obj-$(CONFIG_PL080) += pl080.o
+ common-obj-$(CONFIG_PL110) += pl110.o
+ common-obj-$(CONFIG_PL181) += pl181.o
+ common-obj-$(CONFIG_PL190) += pl190.o
+ common-obj-$(CONFIG_PL310) += arm_l2x0.o
+ common-obj-$(CONFIG_VERSATILE_PCI) += versatile_pci.o
+ common-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
+ common-obj-$(CONFIG_CADENCE) += cadence_uart.o
+ common-obj-$(CONFIG_CADENCE) += cadence_ttc.o
+ common-obj-$(CONFIG_CADENCE) += cadence_gem.o
+ common-obj-$(CONFIG_XGMAC) += xgmac.o
# PCI watchdog devices
- hw-obj-$(CONFIG_PCI) += wdt_i6300esb.o
-
- hw-obj-$(CONFIG_PCI) += pcie.o pcie_aer.o pcie_port.o
+ common-obj-$(CONFIG_PCI) += wdt_i6300esb.o
# PCI network cards
- hw-obj-$(CONFIG_NE2000_PCI) += ne2000.o
- hw-obj-$(CONFIG_EEPRO100_PCI) += eepro100.o
- hw-obj-$(CONFIG_PCNET_PCI) += pcnet-pci.o
- hw-obj-$(CONFIG_PCNET_COMMON) += pcnet.o
- hw-obj-$(CONFIG_E1000_PCI) += e1000.o
- hw-obj-$(CONFIG_RTL8139_PCI) += rtl8139.o
-
- hw-obj-$(CONFIG_SMC91C111) += smc91c111.o
- hw-obj-$(CONFIG_LAN9118) += lan9118.o
- hw-obj-$(CONFIG_NE2000_ISA) += ne2000-isa.o
- hw-obj-$(CONFIG_OPENCORES_ETH) += opencores_eth.o
+ common-obj-$(CONFIG_NE2000_PCI) += ne2000.o
+ common-obj-$(CONFIG_EEPRO100_PCI) += eepro100.o
+ common-obj-$(CONFIG_PCNET_PCI) += pcnet-pci.o
+ common-obj-$(CONFIG_PCNET_COMMON) += pcnet.o
+ common-obj-$(CONFIG_E1000_PCI) += e1000.o
+ common-obj-$(CONFIG_RTL8139_PCI) += rtl8139.o
+
+ common-obj-$(CONFIG_SMC91C111) += smc91c111.o
+ common-obj-$(CONFIG_LAN9118) += lan9118.o
+ common-obj-$(CONFIG_NE2000_ISA) += ne2000-isa.o
+ common-obj-$(CONFIG_OPENCORES_ETH) += opencores_eth.o
# SCSI layer
- hw-obj-$(CONFIG_LSI_SCSI_PCI) += lsi53c895a.o
- hw-obj-$(CONFIG_MEGASAS_SCSI_PCI) += megasas.o
- hw-obj-$(CONFIG_ESP) += esp.o
- hw-obj-$(CONFIG_ESP_PCI) += esp-pci.o
+ common-obj-$(CONFIG_LSI_SCSI_PCI) += lsi53c895a.o
+ common-obj-$(CONFIG_MEGASAS_SCSI_PCI) += megasas.o
+ common-obj-$(CONFIG_ESP) += esp.o
+ common-obj-$(CONFIG_ESP_PCI) += esp-pci.o
- hw-obj-y += sysbus.o isa-bus.o
- hw-obj-y += qdev-addr.o
+ common-obj-y += sysbus.o isa-bus.o
+ common-obj-y += qdev-addr.o
# VGA
- hw-obj-$(CONFIG_VGA_PCI) += vga-pci.o
- hw-obj-$(CONFIG_VGA_ISA) += vga-isa.o
- hw-obj-$(CONFIG_VGA_ISA_MM) += vga-isa-mm.o
- hw-obj-$(CONFIG_VMWARE_VGA) += vmware_vga.o
- hw-obj-$(CONFIG_VMMOUSE) += vmmouse.o
- hw-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o
-
- hw-obj-$(CONFIG_RC4030) += rc4030.o
- hw-obj-$(CONFIG_DP8393X) += dp8393x.o
- hw-obj-$(CONFIG_DS1225Y) += ds1225y.o
- hw-obj-$(CONFIG_MIPSNET) += mipsnet.o
+ common-obj-$(CONFIG_VGA_PCI) += vga-pci.o
+ common-obj-$(CONFIG_VGA_ISA) += vga-isa.o
+ common-obj-$(CONFIG_VGA_ISA_MM) += vga-isa-mm.o
+ common-obj-$(CONFIG_VMWARE_VGA) += vmware_vga.o
+ common-obj-$(CONFIG_VMMOUSE) += vmmouse.o
+ common-obj-$(CONFIG_VGA_CIRRUS) += cirrus_vga.o
+
+ common-obj-$(CONFIG_RC4030) += rc4030.o
+ common-obj-$(CONFIG_DP8393X) += dp8393x.o
+ common-obj-$(CONFIG_DS1225Y) += ds1225y.o
+ common-obj-$(CONFIG_MIPSNET) += mipsnet.o
+
+ common-obj-y += null-machine.o
# Sound
sound-obj-y =
$(obj)/adlib.o $(obj)/fmopl.o: QEMU_CFLAGS += -DBUILD_Y8950=0
- hw-obj-$(CONFIG_SOUND) += $(sound-obj-y)
+ common-obj-$(CONFIG_SOUND) += $(sound-obj-y)
- hw-obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/
+ common-obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/
common-obj-y += usb/
- common-obj-y += irq.o
common-obj-$(CONFIG_PTIMER) += ptimer.o
common-obj-$(CONFIG_MAX7310) += max7310.o
common-obj-$(CONFIG_WM8750) += wm8750.o
common-obj-y += scsi-generic.o scsi-bus.o
common-obj-y += hid.o
common-obj-$(CONFIG_SSI) += ssi.o
+ common-obj-$(CONFIG_SSI_M25P80) += m25p80.o
common-obj-$(CONFIG_SSI_SD) += ssi-sd.o
common-obj-$(CONFIG_SD) += sd.o
common-obj-y += bt.o bt-l2cap.o bt-sdp.o bt-hci.o bt-hid.o
common-obj-y += bt-hci-csr.o
common-obj-y += msmouse.o ps2.o
- common-obj-y += qdev.o qdev-properties.o qdev-monitor.o
+ common-obj-y += qdev-monitor.o
+ common-obj-y += qdev-properties-system.o
common-obj-$(CONFIG_BRLAPI) += baum.o
# xen backend driver support
# Per-target files
# virtio has to be here due to weird dependency between PCI and virtio-net.
# need to fix this properly
+ obj-$(CONFIG_VIRTIO) += dataplane/
obj-$(CONFIG_VIRTIO) += virtio.o virtio-blk.o virtio-balloon.o virtio-net.o
obj-$(CONFIG_VIRTIO) += virtio-serial-bus.o virtio-scsi.o
obj-$(CONFIG_SOFTMMU) += vhost_net.o
obj-$(CONFIG_VHOST_NET) += vhost.o
obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/
- obj-$(CONFIG_NO_PCI) += pci-stub.o
obj-$(CONFIG_VGA) += vga.o
obj-$(CONFIG_SOFTMMU) += device-hotplug.o
obj-$(CONFIG_XEN) += xen_domainbuild.o xen_machine_pv.o
- # Inter-VM PCI shared memory
+ # Inter-VM PCI shared memory & VFIO PCI device assignment
ifeq ($(CONFIG_PCI), y)
obj-$(CONFIG_KVM) += ivshmem.o
+ obj-$(CONFIG_LINUX) += vfio_pci.o
endif
+
+ $(obj)/baum.o: QEMU_CFLAGS += $(SDL_CFLAGS)
--- /dev/null
- #include "blockdev.h"
- #include "sysemu.h"
+/*
+ * QEMU National Semiconductor PC87312 (Super I/O)
+ *
+ * Copyright (c) 2010-2012 Herve Poussineau
+ * Copyright (c) 2011-2012 Andreas Färber
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "pc87312.h"
++#include "sysemu/blockdev.h"
++#include "sysemu/sysemu.h"
++#include "char/char.h"
+#include "trace.h"
+
+
+#define REG_FER 0
+#define REG_FAR 1
+#define REG_PTR 2
+
+#define FER regs[REG_FER]
+#define FAR regs[REG_FAR]
+#define PTR regs[REG_PTR]
+
+#define FER_PARALLEL_EN 0x01
+#define FER_UART1_EN 0x02
+#define FER_UART2_EN 0x04
+#define FER_FDC_EN 0x08
+#define FER_FDC_4 0x10
+#define FER_FDC_ADDR 0x20
+#define FER_IDE_EN 0x40
+#define FER_IDE_ADDR 0x80
+
+#define FAR_PARALLEL_ADDR 0x03
+#define FAR_UART1_ADDR 0x0C
+#define FAR_UART2_ADDR 0x30
+#define FAR_UART_3_4 0xC0
+
+#define PTR_POWER_DOWN 0x01
+#define PTR_CLOCK_DOWN 0x02
+#define PTR_PWDN 0x04
+#define PTR_IRQ_5_7 0x08
+#define PTR_UART1_TEST 0x10
+#define PTR_UART2_TEST 0x20
+#define PTR_LOCK_CONF 0x40
+#define PTR_EPP_MODE 0x80
+
+
+/* Parallel port */
+
+static inline bool is_parallel_enabled(PC87312State *s)
+{
+ return s->FER & FER_PARALLEL_EN;
+}
+
+static const uint32_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
+
+static inline uint32_t get_parallel_iobase(PC87312State *s)
+{
+ return parallel_base[s->FAR & FAR_PARALLEL_ADDR];
+}
+
+static const uint32_t parallel_irq[] = { 5, 7, 5, 0 };
+
+static inline uint32_t get_parallel_irq(PC87312State *s)
+{
+ int idx;
+ idx = (s->FAR & FAR_PARALLEL_ADDR);
+ if (idx == 0) {
+ return (s->PTR & PTR_IRQ_5_7) ? 7 : 5;
+ } else {
+ return parallel_irq[idx];
+ }
+}
+
+static inline bool is_parallel_epp(PC87312State *s)
+{
+ return s->PTR & PTR_EPP_MODE;
+}
+
+
+/* UARTs */
+
+static const uint32_t uart_base[2][4] = {
+ { 0x3e8, 0x338, 0x2e8, 0x220 },
+ { 0x2e8, 0x238, 0x2e0, 0x228 }
+};
+
+static inline uint32_t get_uart_iobase(PC87312State *s, int i)
+{
+ int idx;
+ idx = (s->FAR >> (2 * i + 2)) & 0x3;
+ if (idx == 0) {
+ return 0x3f8;
+ } else if (idx == 1) {
+ return 0x2f8;
+ } else {
+ return uart_base[idx & 1][(s->FAR & FAR_UART_3_4) >> 6];
+ }
+}
+
+static inline uint32_t get_uart_irq(PC87312State *s, int i)
+{
+ int idx;
+ idx = (s->FAR >> (2 * i + 2)) & 0x3;
+ return (idx & 1) ? 3 : 4;
+}
+
+static inline bool is_uart_enabled(PC87312State *s, int i)
+{
+ return s->FER & (FER_UART1_EN << i);
+}
+
+
+/* Floppy controller */
+
+static inline bool is_fdc_enabled(PC87312State *s)
+{
+ return s->FER & FER_FDC_EN;
+}
+
+static inline uint32_t get_fdc_iobase(PC87312State *s)
+{
+ return (s->FER & FER_FDC_ADDR) ? 0x370 : 0x3f0;
+}
+
+
+/* IDE controller */
+
+static inline bool is_ide_enabled(PC87312State *s)
+{
+ return s->FER & FER_IDE_EN;
+}
+
+static inline uint32_t get_ide_iobase(PC87312State *s)
+{
+ return (s->FER & FER_IDE_ADDR) ? 0x170 : 0x1f0;
+}
+
+
+static void reconfigure_devices(PC87312State *s)
+{
+ error_report("pc87312: unsupported device reconfiguration (%02x %02x %02x)",
+ s->FER, s->FAR, s->PTR);
+}
+
+static void pc87312_soft_reset(PC87312State *s)
+{
+ static const uint8_t fer_init[] = {
+ 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4b, 0x4b,
+ 0x4b, 0x4b, 0x4b, 0x4b, 0x0f, 0x0f, 0x0f, 0x0f,
+ 0x49, 0x49, 0x49, 0x49, 0x07, 0x07, 0x07, 0x07,
+ 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x08, 0x00,
+ };
+ static const uint8_t far_init[] = {
+ 0x10, 0x11, 0x11, 0x39, 0x24, 0x38, 0x00, 0x01,
+ 0x01, 0x09, 0x08, 0x08, 0x10, 0x11, 0x39, 0x24,
+ 0x00, 0x01, 0x01, 0x00, 0x10, 0x11, 0x39, 0x24,
+ 0x10, 0x11, 0x11, 0x39, 0x24, 0x38, 0x10, 0x10,
+ };
+ static const uint8_t ptr_init[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+ };
+
+ s->read_id_step = 0;
+ s->selected_index = REG_FER;
+
+ s->FER = fer_init[s->config & 0x1f];
+ s->FAR = far_init[s->config & 0x1f];
+ s->PTR = ptr_init[s->config & 0x1f];
+}
+
+static void pc87312_hard_reset(PC87312State *s)
+{
+ pc87312_soft_reset(s);
+}
+
+static void pc87312_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+{
+ PC87312State *s = opaque;
+
+ trace_pc87312_io_write(addr, val);
+
+ if ((addr & 1) == 0) {
+ /* Index register */
+ s->read_id_step = 2;
+ s->selected_index = val;
+ } else {
+ /* Data register */
+ if (s->selected_index < 3) {
+ s->regs[s->selected_index] = val;
+ reconfigure_devices(s);
+ }
+ }
+}
+
+static uint32_t pc87312_ioport_read(void *opaque, uint32_t addr)
+{
+ PC87312State *s = opaque;
+ uint32_t val;
+
+ if ((addr & 1) == 0) {
+ /* Index register */
+ if (s->read_id_step++ == 0) {
+ val = 0x88;
+ } else if (s->read_id_step++ == 1) {
+ val = 0;
+ } else {
+ val = s->selected_index;
+ }
+ } else {
+ /* Data register */
+ if (s->selected_index < 3) {
+ val = s->regs[s->selected_index];
+ } else {
+ /* Invalid selected index */
+ val = 0;
+ }
+ }
+
+ trace_pc87312_io_read(addr, val);
+ return val;
+}
+
+static int pc87312_post_load(void *opaque, int version_id)
+{
+ PC87312State *s = opaque;
+
+ reconfigure_devices(s);
+ return 0;
+}
+
+static void pc87312_reset(DeviceState *d)
+{
+ PC87312State *s = PC87312(d);
+
+ pc87312_soft_reset(s);
+}
+
+static int pc87312_init(ISADevice *dev)
+{
+ PC87312State *s;
+ DeviceState *d;
+ ISADevice *isa;
+ ISABus *bus;
+ CharDriverState *chr;
+ DriveInfo *drive;
+ char name[5];
+ int i;
+
+ s = PC87312(dev);
+ bus = isa_bus_from_device(dev);
+ pc87312_hard_reset(s);
+
+ if (is_parallel_enabled(s)) {
+ chr = parallel_hds[0];
+ if (chr == NULL) {
+ chr = qemu_chr_new("par0", "null", NULL);
+ }
+ isa = isa_create(bus, "isa-parallel");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "index", 0);
+ qdev_prop_set_uint32(d, "iobase", get_parallel_iobase(s));
+ qdev_prop_set_uint32(d, "irq", get_parallel_irq(s));
+ qdev_prop_set_chr(d, "chardev", chr);
+ qdev_init_nofail(d);
+ s->parallel.dev = isa;
+ trace_pc87312_info_parallel(get_parallel_iobase(s),
+ get_parallel_irq(s));
+ }
+
+ for (i = 0; i < 2; i++) {
+ if (is_uart_enabled(s, i)) {
+ chr = serial_hds[i];
+ if (chr == NULL) {
+ snprintf(name, sizeof(name), "ser%d", i);
+ chr = qemu_chr_new(name, "null", NULL);
+ }
+ isa = isa_create(bus, "isa-serial");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "index", i);
+ qdev_prop_set_uint32(d, "iobase", get_uart_iobase(s, i));
+ qdev_prop_set_uint32(d, "irq", get_uart_irq(s, i));
+ qdev_prop_set_chr(d, "chardev", chr);
+ qdev_init_nofail(d);
+ s->uart[i].dev = isa;
+ trace_pc87312_info_serial(i, get_uart_iobase(s, i),
+ get_uart_irq(s, i));
+ }
+ }
+
+ if (is_fdc_enabled(s)) {
+ isa = isa_create(bus, "isa-fdc");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "iobase", get_fdc_iobase(s));
+ qdev_prop_set_uint32(d, "irq", 6);
+ drive = drive_get(IF_FLOPPY, 0, 0);
+ if (drive != NULL) {
+ qdev_prop_set_drive_nofail(d, "driveA", drive->bdrv);
+ }
+ drive = drive_get(IF_FLOPPY, 0, 1);
+ if (drive != NULL) {
+ qdev_prop_set_drive_nofail(d, "driveB", drive->bdrv);
+ }
+ qdev_init_nofail(d);
+ s->fdc.dev = isa;
+ trace_pc87312_info_floppy(get_fdc_iobase(s));
+ }
+
+ if (is_ide_enabled(s)) {
+ isa = isa_create(bus, "isa-ide");
+ d = DEVICE(isa);
+ qdev_prop_set_uint32(d, "iobase", get_ide_iobase(s));
+ qdev_prop_set_uint32(d, "iobase2", get_ide_iobase(s) + 0x206);
+ qdev_prop_set_uint32(d, "irq", 14);
+ qdev_init_nofail(d);
+ s->ide.dev = isa;
+ trace_pc87312_info_ide(get_ide_iobase(s));
+ }
+
+ register_ioport_write(s->iobase, 2, 1, pc87312_ioport_write, s);
+ register_ioport_read(s->iobase, 2, 1, pc87312_ioport_read, s);
+ return 0;
+}
+
+static const VMStateDescription vmstate_pc87312 = {
+ .name = "pc87312",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .post_load = pc87312_post_load,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(read_id_step, PC87312State),
+ VMSTATE_UINT8(selected_index, PC87312State),
+ VMSTATE_UINT8_ARRAY(regs, PC87312State, 3),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static Property pc87312_properties[] = {
+ DEFINE_PROP_HEX32("iobase", PC87312State, iobase, 0x398),
+ DEFINE_PROP_UINT8("config", PC87312State, config, 1),
+ DEFINE_PROP_END_OF_LIST()
+};
+
+static void pc87312_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
+
+ ic->init = pc87312_init;
+ dc->reset = pc87312_reset;
+ dc->vmsd = &vmstate_pc87312;
+ dc->props = pc87312_properties;
+}
+
+static const TypeInfo pc87312_type_info = {
+ .name = TYPE_PC87312,
+ .parent = TYPE_ISA_DEVICE,
+ .instance_size = sizeof(PC87312State),
+ .class_init = pc87312_class_init,
+};
+
+static void pc87312_register_types(void)
+{
+ type_register_static(&pc87312_type_info);
+}
+
+type_init(pc87312_register_types)
#include "hw.h"
#include "nvram.h"
#include "pc.h"
+ #include "serial.h"
#include "fdc.h"
- #include "net.h"
- #include "sysemu.h"
+ #include "net/net.h"
+ #include "sysemu/sysemu.h"
#include "isa.h"
- #include "pci.h"
- #include "pci_host.h"
+ #include "pci/pci.h"
+ #include "pci/pci_host.h"
#include "ppc.h"
#include "boards.h"
- #include "qemu-log.h"
+ #include "qemu/log.h"
#include "ide.h"
#include "loader.h"
#include "mc146818rtc.h"
- #include "blockdev.h"
- #include "arch_init.h"
- #include "exec-memory.h"
+#include "pc87312.h"
+ #include "sysemu/blockdev.h"
+ #include "sysemu/arch_init.h"
+ #include "exec/address-spaces.h"
//#define HARD_DEBUG_PPC_IO
//#define DEBUG_PPC_IO
} XCSR;
static void PPC_XCSR_writeb (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+ hwaddr addr, uint32_t value)
{
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
static void PPC_XCSR_writew (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+ hwaddr addr, uint32_t value)
{
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
static void PPC_XCSR_writel (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+ hwaddr addr, uint32_t value)
{
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
- static uint32_t PPC_XCSR_readb (void *opaque, target_phys_addr_t addr)
+ static uint32_t PPC_XCSR_readb (void *opaque, hwaddr addr)
{
uint32_t retval = 0;
return retval;
}
- static uint32_t PPC_XCSR_readw (void *opaque, target_phys_addr_t addr)
+ static uint32_t PPC_XCSR_readw (void *opaque, hwaddr addr)
{
uint32_t retval = 0;
return retval;
}
- static uint32_t PPC_XCSR_readl (void *opaque, target_phys_addr_t addr)
+ static uint32_t PPC_XCSR_readl (void *opaque, hwaddr addr)
{
uint32_t retval = 0;
M48t59State *nvram;
uint8_t state;
uint8_t syscontrol;
- uint8_t fake_io[2];
int contiguous_map;
int endian;
} sysctrl_t;
static sysctrl_t *sysctrl;
-static void PREP_io_write (void *opaque, uint32_t addr, uint32_t val)
-{
- sysctrl_t *sysctrl = opaque;
-
- PPC_IO_DPRINTF("0x%08" PRIx32 " => 0x%02" PRIx32 "\n", addr - PPC_IO_BASE,
- val);
- sysctrl->fake_io[addr - 0x0398] = val;
-}
-
-static uint32_t PREP_io_read (void *opaque, uint32_t addr)
-{
- sysctrl_t *sysctrl = opaque;
-
- PPC_IO_DPRINTF("0x%08" PRIx32 " <= 0x%02" PRIx32 "\n", addr - PPC_IO_BASE,
- sysctrl->fake_io[addr - 0x0398]);
- return sysctrl->fake_io[addr - 0x0398];
-}
-
static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val)
{
sysctrl_t *sysctrl = opaque;
return retval;
}
- static inline target_phys_addr_t prep_IO_address(sysctrl_t *sysctrl,
- target_phys_addr_t addr)
+ static inline hwaddr prep_IO_address(sysctrl_t *sysctrl,
+ hwaddr addr)
{
if (sysctrl->contiguous_map == 0) {
/* 64 KB contiguous space for IOs */
return addr;
}
- static void PPC_prep_io_writeb (void *opaque, target_phys_addr_t addr,
+ static void PPC_prep_io_writeb (void *opaque, hwaddr addr,
uint32_t value)
{
sysctrl_t *sysctrl = opaque;
cpu_outb(addr, value);
}
- static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr)
+ static uint32_t PPC_prep_io_readb (void *opaque, hwaddr addr)
{
sysctrl_t *sysctrl = opaque;
uint32_t ret;
return ret;
}
- static void PPC_prep_io_writew (void *opaque, target_phys_addr_t addr,
+ static void PPC_prep_io_writew (void *opaque, hwaddr addr,
uint32_t value)
{
sysctrl_t *sysctrl = opaque;
cpu_outw(addr, value);
}
- static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr)
+ static uint32_t PPC_prep_io_readw (void *opaque, hwaddr addr)
{
sysctrl_t *sysctrl = opaque;
uint32_t ret;
return ret;
}
- static void PPC_prep_io_writel (void *opaque, target_phys_addr_t addr,
+ static void PPC_prep_io_writel (void *opaque, hwaddr addr,
uint32_t value)
{
sysctrl_t *sysctrl = opaque;
cpu_outl(addr, value);
}
- static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
+ static uint32_t PPC_prep_io_readl (void *opaque, hwaddr addr)
{
sysctrl_t *sysctrl = opaque;
uint32_t ret;
}
/* PowerPC PREP hardware initialisation */
- static void ppc_prep_init (ram_addr_t ram_size,
- const char *boot_device,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename,
- const char *cpu_model)
+ static void ppc_prep_init(QEMUMachineInitArgs *args)
{
+ ram_addr_t ram_size = args->ram_size;
+ const char *cpu_model = args->cpu_model;
+ const char *kernel_filename = args->kernel_filename;
+ const char *kernel_cmdline = args->kernel_cmdline;
+ const char *initrd_filename = args->initrd_filename;
+ const char *boot_device = args->boot_device;
MemoryRegion *sysmem = get_system_memory();
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
uint32_t kernel_base, initrd_base;
long kernel_size, initrd_size;
DeviceState *dev;
- SysBusDevice *sys;
PCIHostState *pcihost;
PCIBus *pci_bus;
PCIDevice *pci;
ISABus *isa_bus;
+ ISADevice *isa;
qemu_irq *cpu_exit_irq;
int ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
- DriveInfo *fd[MAX_FD];
sysctrl = g_malloc0(sizeof(sysctrl_t));
bios_size = -1;
}
if (bios_size > 0 && bios_size <= BIOS_SIZE) {
- target_phys_addr_t bios_addr;
+ hwaddr bios_addr;
bios_size = (bios_size + 0xfff) & ~0xfff;
bios_addr = (uint32_t)(-bios_size);
bios_size = load_image_targphys(filename, bios_addr, bios_size);
}
dev = qdev_create(NULL, "raven-pcihost");
- sys = sysbus_from_qdev(dev);
- pcihost = DO_UPCAST(PCIHostState, busdev, sys);
+ pcihost = PCI_HOST_BRIDGE(dev);
pcihost->address_space = get_system_memory();
object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NULL);
qdev_init_nofail(dev);
sysbus_connect_irq(&pcihost->busdev, 3, qdev_get_gpio_in(&pci->qdev, 11));
isa_bus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&pci->qdev, "isa.0"));
+ /* Super I/O (parallel + serial ports) */
+ isa = isa_create(isa_bus, TYPE_PC87312);
+ qdev_prop_set_uint8(&isa->qdev, "config", 13); /* fdc, ser0, ser1, par0 */
+ qdev_init_nofail(&isa->qdev);
+
/* Register 8 MB of ISA IO space (needed for non-contiguous map) */
memory_region_init_io(PPC_io_memory, &PPC_prep_io_ops, sysctrl,
"ppc-io", 0x00800000);
/* init basic PC hardware */
pci_vga_init(pci_bus);
- if (serial_hds[0])
- serial_isa_init(isa_bus, 0, serial_hds[0]);
nb_nics1 = nb_nics;
if (nb_nics1 > NE2000_NB_MAX)
nb_nics1 = NE2000_NB_MAX;
}
isa_create_simple(isa_bus, "i8042");
- // SB16_init();
-
- for(i = 0; i < MAX_FD; i++) {
- fd[i] = drive_get(IF_FLOPPY, 0, i);
- }
- fdctrl_init_isa(isa_bus, fd);
-
- /* Register fake IO ports for PREP */
sysctrl->reset_irq = first_cpu->irq_inputs[PPC6xx_INPUT_HRESET];
- register_ioport_read(0x398, 2, 1, &PREP_io_read, sysctrl);
- register_ioport_write(0x398, 2, 1, &PREP_io_write, sysctrl);
/* System control ports */
register_ioport_read(0x0092, 0x01, 1, &PREP_io_800_readb, sysctrl);
register_ioport_write(0x0092, 0x01, 1, &PREP_io_800_writeb, sysctrl);
memory_region_add_subregion(sysmem, 0xFEFF0000, xcsr);
#endif
- if (usb_enabled) {
+ if (usb_enabled(false)) {
pci_create_simple(pci_bus, -1, "pci-ohci");
}
# block/stream.c
stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p"
+ commit_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d"
+ commit_start(void *bs, void *base, void *top, void *s, void *co, void *opaque) "bs %p base %p top %p s %p co %p opaque %p"
+
+ # block/mirror.c
+ mirror_start(void *bs, void *s, void *co, void *opaque) "bs %p s %p co %p opaque %p"
+ mirror_before_flush(void *s) "s %p"
+ mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64
+ mirror_before_sleep(void *s, int64_t cnt, int synced) "s %p dirty count %"PRId64" synced %d"
+ mirror_one_iteration(void *s, int64_t sector_num, int nb_sectors) "s %p sector_num %"PRId64" nb_sectors %d"
# blockdev.c
qmp_block_job_cancel(void *job) "job %p"
- block_stream_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
+ qmp_block_job_pause(void *job) "job %p"
+ qmp_block_job_resume(void *job) "job %p"
+ qmp_block_job_complete(void *job) "job %p"
+ block_job_cb(void *bs, void *job, int ret) "bs %p job %p ret %d"
qmp_block_stream(void *bs, void *job) "bs %p job %p"
# hw/virtio-blk.c
virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
+ # hw/dataplane/virtio-blk.c
+ virtio_blk_data_plane_start(void *s) "dataplane %p"
+ virtio_blk_data_plane_stop(void *s) "dataplane %p"
+ virtio_blk_data_plane_process_request(void *s, unsigned int out_num, unsigned int in_num, unsigned int head) "dataplane %p out_num %u in_num %u head %u"
+ virtio_blk_data_plane_complete_request(void *s, unsigned int head, int ret) "dataplane %p head %u ret %d"
+
+ # hw/dataplane/vring.c
+ vring_setup(uint64_t physical, void *desc, void *avail, void *used) "vring physical %#"PRIx64" desc %p avail %p used %p"
+
+ # thread-pool.c
+ thread_pool_submit(void *req, void *opaque) "req %p opaque %p"
+ thread_pool_complete(void *req, void *opaque, int ret) "req %p opaque %p ret %d"
+ thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
+
# posix-aio-compat.c
paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
# hw/usb/hcd-ehci.c
usb_ehci_reset(void) "=== RESET ==="
- usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
- usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
- usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
+ usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
+ usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
+ usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
+ usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x"
+ usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x"
+ usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)"
usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s"
usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x"
+ usb_ehci_guest_bug(const char *reason) "%s"
+ usb_ehci_doorbell_ring(void) ""
+ usb_ehci_doorbell_ack(void) ""
+ usb_ehci_dma_error(void) ""
# hw/usb/hcd-uhci.c
usb_uhci_reset(void) "=== RESET ==="
usb_uhci_frame_loop_continue(void) ""
usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x"
usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x"
- usb_uhci_mmio_readl(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%08x"
- usb_uhci_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%08x"
usb_uhci_queue_add(uint32_t token) "token 0x%x"
- usb_uhci_queue_del(uint32_t token) "token 0x%x"
+ usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s"
usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
usb_xhci_irq_intx(uint32_t level) "level %d"
usb_xhci_irq_msi(uint32_t nr) "nr %d"
- usb_xhci_queue_event(uint32_t idx, const char *name, uint64_t param, uint32_t status, uint32_t control) "idx %d, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
+ usb_xhci_irq_msix(uint32_t nr) "nr %d"
+ usb_xhci_irq_msix_use(uint32_t nr) "nr %d"
+ usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d"
+ usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
+ usb_xhci_port_reset(uint32_t port) "port %d"
+ usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d"
usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
usb_xhci_slot_address(uint32_t slotid) "slotid %d"
usb_xhci_slot_reset(uint32_t slotid) "slotid %d"
usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
+ usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint64_t param) "slotid %d, epid %d, ptr %016" PRIx64
usb_xhci_ep_kick(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
- usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t length) "%p: slotid %d, epid %d, length %d"
+ usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid) "%p: slotid %d, epid %d"
usb_xhci_xfer_async(void *xfer) "%p"
usb_xhci_xfer_nak(void *xfer) "%p"
usb_xhci_xfer_retry(void *xfer) "%p"
usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
+ usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d"
usb_set_addr(int addr) "dev %d"
usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d"
usb_host_release_interfaces(int bus, int addr) "dev %d:%d"
usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d"
usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
- usb_host_req_complete(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
+ usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d"
usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p"
usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d"
spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
+ spice_vmc_event(int event) "spice vmc event %d"
# hw/lm32_pic.c
lm32_pic_raise_irq(void) "Raise CPU interrupt"
mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ""
mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
+# hw/pc87312.c
+pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
+pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
+pc87312_info_floppy(uint32_t base) "base 0x%x"
+pc87312_info_ide(uint32_t base) "base 0x%x"
+pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
+pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
+
# xen-all.c
xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
savevm_section_start(void) ""
savevm_section_end(unsigned int section_id) "section_id %u"
+ # arch_init.c
+ migration_bitmap_sync_start(void) ""
+ migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64""
+
# hw/qxl.c
disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
+ qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
qxl_io_read_unexpected(int qid) "%d"
- qxl_io_unexpected_vga_mode(int qid, uint32_t io_port, const char *desc) "%d 0x%x (%s)"
+ qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
qxl_io_write(int qid, const char *mode, uint64_t addr, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " val=%"PRIu64" size=%u async=%d"
qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
qxl_post_load(int qid, const char *mode) "%d %s"
qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
+ qxl_spice_monitors_config(int qid) "%d"
qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
qxl_spice_oom(int qid) "%d"
qxl_spice_reset_cursor(int qid) "%d"
qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
+ qxl_send_events(int qid, uint32_t events) "%d %d"
+ qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
+ qxl_set_guest_bug(int qid) "%d"
+ qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
+ qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
+ qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
+ qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
# hw/qxl-render.c
qxl_render_blit_guest_primary_initialized(void) ""
qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
qxl_render_update_area_done(void *cookie) "%p"
+
+ # hw/spapr_pci.c
+ spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)"
+ spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
+ spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u"
+ spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
+ spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
+ spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
+
+ # hw/xics.c
+ xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
+ xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
+ xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
+ xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x"
+ xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x"
+ xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]"
+ xics_masked_pending(void) "set_irq_msi: masked pending"
+ xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]"
+ xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x"
+ xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
+ xics_ics_eoi(int nr) "ics_eoi: irq %#x"
projects / qemu.git / commitdiff