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55a0d64b | 1 | /** @file\r |
2 | *\r | |
2ca815a4 | 3 | * Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r |
55a0d64b | 4 | * \r |
5 | * This program and the accompanying materials \r | |
6 | * are licensed and made available under the terms and conditions of the BSD License \r | |
7 | * which accompanies this distribution. The full text of the license may be found at \r | |
8 | * http://opensource.org/licenses/bsd-license.php \r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #include <Uefi.h>\r | |
16 | #include <Library/IoLib.h>\r | |
17 | #include <Library/ArmGicLib.h>\r | |
be613c8b | 18 | #include <Library/PcdLib.h>\r |
55a0d64b | 19 | \r |
e9f7c58f | 20 | UINTN\r |
21 | EFIAPI\r | |
22 | ArmGicGetMaxNumInterrupts (\r | |
23 | IN INTN GicDistributorBase\r | |
24 | )\r | |
25 | {\r | |
26 | return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);\r | |
27 | }\r | |
28 | \r | |
55a0d64b | 29 | VOID\r |
30 | EFIAPI\r | |
31 | ArmGicSendSgiTo (\r | |
32 | IN INTN GicDistributorBase,\r | |
33 | IN INTN TargetListFilter,\r | |
4c19ece3 | 34 | IN INTN CPUTargetList,\r |
35 | IN INTN SgiId\r | |
55a0d64b | 36 | )\r |
37 | {\r | |
4c19ece3 | 38 | MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);\r |
55a0d64b | 39 | }\r |
40 | \r | |
2ca815a4 | 41 | UINTN\r |
55a0d64b | 42 | EFIAPI\r |
315649cd | 43 | ArmGicAcknowledgeInterrupt (\r |
2ca815a4 | 44 | IN UINTN GicInterruptInterfaceBase\r |
55a0d64b | 45 | )\r |
46 | {\r | |
315649cd | 47 | // Read the Interrupt Acknowledge Register\r |
2ca815a4 | 48 | return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);\r |
55a0d64b | 49 | }\r |
d80401a1 OM |
50 | \r |
51 | VOID\r | |
52 | EFIAPI\r | |
53 | ArmGicEndOfInterrupt (\r | |
54 | IN UINTN GicInterruptInterfaceBase,\r | |
55 | IN UINTN Source\r | |
56 | )\r | |
57 | {\r | |
58 | MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);\r | |
59 | }\r |