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25402f5d | 1 | /** @file\r |
5f1103bd | 2 | Macros to work around lack of Clang support for LDR register, =expr\r |
25402f5d HL |
3 | \r |
4 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
0a6f2862 | 5 | Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r |
d2d0e27c | 6 | Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>\r |
25402f5d | 7 | \r |
4059386c | 8 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
25402f5d HL |
9 | \r |
10 | **/\r | |
11 | \r | |
cc15a619 PG |
12 | #ifndef ASM_MACRO_IO_LIBV8_H_\r |
13 | #define ASM_MACRO_IO_LIBV8_H_\r | |
25402f5d | 14 | \r |
25402f5d HL |
15 | // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r |
16 | // This only selects between EL1 and EL2, else we die.\r | |
17 | // Provide the Macro with a safe temp xreg to use.\r | |
18 | #define EL1_OR_EL2(SAFE_XREG) \\r | |
19 | mrs SAFE_XREG, CurrentEL ;\\r | |
eaa84fd5 | 20 | cmp SAFE_XREG, #0x8 ;\\r |
a34608ca | 21 | b.gt . ;\\r |
eaa84fd5 | 22 | b.eq 2f ;\\r |
a34608ca AB |
23 | cbnz SAFE_XREG, 1f ;\\r |
24 | b . ;// We should never get here\r | |
25 | \r | |
25402f5d HL |
26 | // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1\r |
27 | // This only selects between EL1 and EL2 and EL3, else we die.\r | |
28 | // Provide the Macro with a safe temp xreg to use.\r | |
eaa84fd5 | 29 | #define EL1_OR_EL2_OR_EL3(SAFE_XREG) \\r |
25402f5d | 30 | mrs SAFE_XREG, CurrentEL ;\\r |
eaa84fd5 | 31 | cmp SAFE_XREG, #0x8 ;\\r |
a34608ca | 32 | b.gt 3f ;\\r |
eaa84fd5 | 33 | b.eq 2f ;\\r |
a34608ca AB |
34 | cbnz SAFE_XREG, 1f ;\\r |
35 | b . ;// We should never get here\r | |
36 | \r | |
d2d0e27c AB |
37 | #define _ASM_FUNC(Name, Section) \\r |
38 | .global Name ; \\r | |
39 | .section #Section, "ax" ; \\r | |
40 | .type Name, %function ; \\r | |
41 | Name:\r | |
42 | \r | |
429309e0 | 43 | #define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)\r |
d2d0e27c AB |
44 | \r |
45 | #define MOV32(Reg, Val) \\r | |
46 | movz Reg, (Val) >> 16, lsl #16 ; \\r | |
47 | movk Reg, (Val) & 0xffff\r | |
25402f5d | 48 | \r |
d2d0e27c AB |
49 | #define MOV64(Reg, Val) \\r |
50 | movz Reg, (Val) >> 48, lsl #48 ; \\r | |
51 | movk Reg, ((Val) >> 32) & 0xffff, lsl #32 ; \\r | |
52 | movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \\r | |
53 | movk Reg, (Val) & 0xffff\r | |
54 | \r | |
cc15a619 | 55 | #endif // ASM_MACRO_IO_LIBV8_H_\r |