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1d5d0ae9 | 1 | //\r |
2 | // Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
3 | // \r | |
4 | // This program and the accompanying materials \r | |
5 | // are licensed and made available under the terms and conditions of the BSD License \r | |
6 | // which accompanies this distribution. The full text of the license may be found at \r | |
7 | // http://opensource.org/licenses/bsd-license.php \r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
19 | INCLUDE AsmMacroIoLib.inc\r | |
20 | \r | |
21 | IMPORT CEntryPoint\r | |
0787bc61 | 22 | IMPORT ArmReadMpidr\r |
1d5d0ae9 | 23 | EXPORT _ModuleEntryPoint\r |
24 | \r | |
25 | PRESERVE8\r | |
26 | AREA PrePeiCoreEntryPoint, CODE, READONLY\r | |
27 | \r | |
28 | StartupAddr DCD CEntryPoint\r | |
29 | \r | |
1d5d0ae9 | 30 | _ModuleEntryPoint\r |
31 | // Identify CPU ID\r | |
0787bc61 | 32 | bl ArmReadMpidr\r |
33 | // Get ID of this CPU in Multicore system\r | |
34 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r | |
35 | and r0, r0, r1\r | |
1d5d0ae9 | 36 | \r |
2dbcb8f0 | 37 | // Calculate the top of the primary stack\r |
38 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r | |
39 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
40 | add r2, r2, r1\r | |
41 | \r | |
42 | // Is it the Primary Core ?\r | |
43 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)\r | |
44 | cmp r0, r1\r | |
45 | beq _SetupPrimaryCoreStack\r | |
46 | \r | |
47 | _SetupSecondaryCoreStack\r | |
48 | // r2 = Top of the primary stack = Base of the Secondary Stacks\r | |
49 | \r | |
50 | // Get the position of the cores (ClusterId * 4) + CoreId\r | |
51 | GetCorePositionInStack(r3, r0, r1)\r | |
52 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r | |
53 | add r3, r3, #1\r | |
1d5d0ae9 | 54 | \r |
2dbcb8f0 | 55 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r |
56 | // StackOffset = CorePos * StackSize\r | |
57 | mul r3, r3, r1\r | |
58 | // SP = StackBase + StackOffset\r | |
59 | add sp, r2, r3\r | |
47a8e12f | 60 | \r |
2dbcb8f0 | 61 | b _PrepareArguments\r |
62 | \r | |
63 | _SetupPrimaryCoreStack\r | |
64 | // r2 = Top of the primary stack\r | |
65 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r3)\r | |
66 | \r | |
67 | // The reserved space for global variable must be 8-bytes aligned for pushing\r | |
68 | // 64-bit variable on the stack\r | |
69 | SetPrimaryStack (r2, r3, r1)\r | |
70 | \r | |
71 | // Set all the PEI global variables to 0\r | |
72 | mov r3, sp\r | |
73 | mov r1, #0x0\r | |
74 | _InitGlobals\r | |
2dbcb8f0 | 75 | cmp r3, r2\r |
5f5b907c | 76 | beq _PrepareArguments\r |
77 | str r1, [r3], #4\r | |
78 | b _InitGlobals\r | |
47a8e12f | 79 | \r |
80 | _PrepareArguments\r | |
1d5d0ae9 | 81 | // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r |
f92b93c9 | 82 | LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r |
1d5d0ae9 | 83 | add r2, r2, #4\r |
84 | ldr r1, [r2]\r | |
85 | \r | |
86 | // move sec startup address into a data register\r | |
87 | // ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
88 | ldr r2, StartupAddr\r | |
89 | \r | |
262a9b04 | 90 | // jump to PrePeiCore C code\r |
0787bc61 | 91 | // r0 = mp_id\r |
1d5d0ae9 | 92 | // r1 = pei_core_address\r |
93 | blx r2\r | |
94 | \r | |
2dbcb8f0 | 95 | _NeverReturn\r |
96 | b _NeverReturn\r | |
97 | \r | |
1d5d0ae9 | 98 | END\r |