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0591696e FT |
1 | /** @file\r |
2 | UfsPassThruDxe driver is used to produce EFI_EXT_SCSI_PASS_THRU protocol interface\r | |
3 | for upper layer application to execute UFS-supported SCSI cmds.\r | |
4 | \r | |
5 | Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php.\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef _UFS_PASS_THRU_HCI_H_\r | |
17 | #define _UFS_PASS_THRU_HCI_H_\r | |
18 | \r | |
19 | //\r | |
20 | // Host Capabilities Register Offsets\r | |
21 | //\r | |
22 | #define UFS_HC_CAP_OFFSET 0x0000 // Controller Capabilities\r | |
23 | #define UFS_HC_VER_OFFSET 0x0008 // Version\r | |
24 | #define UFS_HC_DDID_OFFSET 0x0010 // Device ID and Device Class\r | |
25 | #define UFS_HC_PMID_OFFSET 0x0014 // Product ID and Manufacturer ID\r | |
26 | #define UFS_HC_AHIT_OFFSET 0x0018 // Auto-Hibernate Idle Timer\r | |
27 | //\r | |
28 | // Operation and Runtime Register Offsets\r | |
29 | //\r | |
30 | #define UFS_HC_IS_OFFSET 0x0020 // Interrupt Status\r | |
31 | #define UFS_HC_IE_OFFSET 0x0024 // Interrupt Enable\r | |
32 | #define UFS_HC_STATUS_OFFSET 0x0030 // Host Controller Status\r | |
33 | #define UFS_HC_ENABLE_OFFSET 0x0034 // Host Controller Enable\r | |
34 | #define UFS_HC_UECPA_OFFSET 0x0038 // Host UIC Error Code PHY Adapter Layer\r | |
35 | #define UFS_HC_UECDL_OFFSET 0x003c // Host UIC Error Code Data Link Layer\r | |
36 | #define UFS_HC_UECN_OFFSET 0x0040 // Host UIC Error Code Network Layer\r | |
37 | #define UFS_HC_UECT_OFFSET 0x0044 // Host UIC Error Code Transport Layer\r | |
38 | #define UFS_HC_UECDME_OFFSET 0x0048 // Host UIC Error Code DME\r | |
39 | #define UFS_HC_UTRIACR_OFFSET 0x004c // UTP Transfer Request Interrupt Aggregation Control Register\r | |
40 | //\r | |
41 | // UTP Transfer Register Offsets\r | |
42 | //\r | |
43 | #define UFS_HC_UTRLBA_OFFSET 0x0050 // UTP Transfer Request List Base Address\r | |
44 | #define UFS_HC_UTRLBAU_OFFSET 0x0054 // UTP Transfer Request List Base Address Upper 32-Bits\r | |
45 | #define UFS_HC_UTRLDBR_OFFSET 0x0058 // UTP Transfer Request List Door Bell Register\r | |
46 | #define UFS_HC_UTRLCLR_OFFSET 0x005c // UTP Transfer Request List CLear Register\r | |
47 | #define UFS_HC_UTRLRSR_OFFSET 0x0060 // UTP Transfer Request Run-Stop Register\r | |
48 | //\r | |
49 | // UTP Task Management Register Offsets\r | |
50 | //\r | |
51 | #define UFS_HC_UTMRLBA_OFFSET 0x0070 // UTP Task Management Request List Base Address\r | |
52 | #define UFS_HC_UTMRLBAU_OFFSET 0x0074 // UTP Task Management Request List Base Address Upper 32-Bits\r | |
53 | #define UFS_HC_UTMRLDBR_OFFSET 0x0078 // UTP Task Management Request List Door Bell Register\r | |
54 | #define UFS_HC_UTMRLCLR_OFFSET 0x007c // UTP Task Management Request List CLear Register\r | |
55 | #define UFS_HC_UTMRLRSR_OFFSET 0x0080 // UTP Task Management Run-Stop Register\r | |
56 | //\r | |
57 | // UIC Command Register Offsets\r | |
58 | //\r | |
59 | #define UFS_HC_UIC_CMD_OFFSET 0x0090 // UIC Command Register\r | |
60 | #define UFS_HC_UCMD_ARG1_OFFSET 0x0094 // UIC Command Argument 1\r | |
61 | #define UFS_HC_UCMD_ARG2_OFFSET 0x0098 // UIC Command Argument 2\r | |
62 | #define UFS_HC_UCMD_ARG3_OFFSET 0x009c // UIC Command Argument 3\r | |
63 | //\r | |
64 | // UMA Register Offsets\r | |
65 | //\r | |
66 | #define UFS_HC_UMA_OFFSET 0x00b0 // Reserved for Unified Memory Extension\r | |
67 | \r | |
68 | #define UFS_HC_HCE_EN BIT0\r | |
69 | #define UFS_HC_HCS_DP BIT0\r | |
70 | #define UFS_HC_HCS_UCRDY BIT3\r | |
71 | #define UFS_HC_IS_ULSS BIT8\r | |
72 | #define UFS_HC_IS_UCCS BIT10\r | |
73 | #define UFS_HC_CAP_64ADDR BIT24\r | |
74 | #define UFS_HC_CAP_NUTMRS (BIT16 | BIT17 | BIT18)\r | |
75 | #define UFS_HC_CAP_NUTRS (BIT0 | BIT1 | BIT2 | BIT3 | BIT4)\r | |
76 | #define UFS_HC_UTMRLRSR BIT0\r | |
77 | #define UFS_HC_UTRLRSR BIT0\r | |
78 | \r | |
4d580428 HZ |
79 | //\r |
80 | // The initial value of the OCS field of UTP TRD or TMRD descriptor\r | |
81 | // defined in JEDEC JESD223 specification\r | |
82 | //\r | |
83 | #define UFS_HC_TRD_OCS_INIT_VALUE 0x0F\r | |
84 | \r | |
0591696e FT |
85 | //\r |
86 | // A maximum of length of 256KB is supported by PRDT entry\r | |
87 | //\r | |
88 | #define UFS_MAX_DATA_LEN_PER_PRD 0x40000\r | |
89 | \r | |
90 | #define UFS_STORAGE_COMMAND_TYPE 0x01\r | |
91 | \r | |
92 | #define UFS_REGULAR_COMMAND 0x00\r | |
93 | #define UFS_INTERRUPT_COMMAND 0x01\r | |
94 | \r | |
95 | #define UFS_LUN_0 0x00\r | |
96 | #define UFS_LUN_1 0x01\r | |
97 | #define UFS_LUN_2 0x02\r | |
98 | #define UFS_LUN_3 0x03\r | |
99 | #define UFS_LUN_4 0x04\r | |
100 | #define UFS_LUN_5 0x05\r | |
101 | #define UFS_LUN_6 0x06\r | |
102 | #define UFS_LUN_7 0x07\r | |
103 | #define UFS_WLUN_REPORT_LUNS 0x81\r | |
104 | #define UFS_WLUN_UFS_DEV 0xD0\r | |
105 | #define UFS_WLUN_BOOT 0xB0\r | |
106 | #define UFS_WLUN_RPMB 0xC4\r | |
107 | \r | |
108 | #pragma pack(1)\r | |
109 | \r | |
110 | //\r | |
111 | // UFSHCI 2.0 Spec Section 5.2.1 Offset 00h: CAP - Controller Capabilities\r | |
112 | //\r | |
113 | typedef struct {\r | |
114 | UINT8 Nutrs:4; // Number of UTP Transfer Request Slots\r | |
115 | UINT8 Rsvd1:4;\r | |
116 | \r | |
117 | UINT8 NoRtt; // Number of outstanding READY TO TRANSFER (RTT) requests supported\r | |
118 | \r | |
119 | UINT8 Nutmrs:3; // Number of UTP Task Management Request Slots\r | |
120 | UINT8 Rsvd2:4;\r | |
121 | UINT8 AutoHs:1; // Auto-Hibernation Support\r | |
122 | \r | |
123 | UINT8 As64:1; // 64-bit addressing supported\r | |
124 | UINT8 Oodds:1; // Out of order data delivery supported\r | |
125 | UINT8 UicDmetms:1; // UIC DME_TEST_MODE command supported\r | |
126 | UINT8 Ume:1; // Reserved for Unified Memory Extension\r | |
127 | UINT8 Rsvd4:4;\r | |
128 | } UFS_HC_CAP;\r | |
129 | \r | |
130 | //\r | |
131 | // UFSHCI 2.0 Spec Section 5.2.2 Offset 08h: VER - UFS Version\r | |
132 | //\r | |
133 | typedef struct {\r | |
134 | UINT8 Vs:4; // Version Suffix\r | |
135 | UINT8 Mnr:4; // Minor version number\r | |
136 | \r | |
137 | UINT8 Mjr; // Major version number\r | |
138 | \r | |
139 | UINT16 Rsvd1;\r | |
140 | } UFS_HC_VER;\r | |
141 | \r | |
142 | //\r | |
143 | // UFSHCI 2.0 Spec Section 5.2.3 Offset 10h: HCPID - Host Controller Product ID\r | |
144 | //\r | |
145 | #define UFS_HC_PID UINT32\r | |
146 | \r | |
147 | //\r | |
148 | // UFSHCI 2.0 Spec Section 5.2.4 Offset 14h: HCMID - Host Controller Manufacturer ID\r | |
149 | //\r | |
150 | #define UFS_HC_MID UINT32\r | |
151 | \r | |
152 | //\r | |
153 | // UFSHCI 2.0 Spec Section 5.2.5 Offset 18h: AHIT - Auto-Hibernate Idle Timer\r | |
154 | //\r | |
155 | typedef struct {\r | |
156 | UINT32 Ahitv:10; // Auto-Hibernate Idle Timer Value \r | |
157 | UINT32 Ts:3; // Timer scale\r | |
158 | UINT32 Rsvd1:19;\r | |
159 | } UFS_HC_AHIT;\r | |
160 | \r | |
161 | //\r | |
162 | // UFSHCI 2.0 Spec Section 5.3.1 Offset 20h: IS - Interrupt Status\r | |
163 | //\r | |
164 | typedef struct {\r | |
165 | UINT16 Utrcs:1; // UTP Transfer Request Completion Status\r | |
166 | UINT16 Udepri:1; // UIC DME_ENDPOINT_RESET Indication\r | |
167 | UINT16 Ue:1; // UIC Error\r | |
168 | UINT16 Utms:1; // UIC Test Mode Status \r | |
169 | \r | |
170 | UINT16 Upms:1; // UIC Power Mode Status \r | |
171 | UINT16 Uhxs:1; // UIC Hibernate Exit Status \r | |
172 | UINT16 Uhes:1; // UIC Hibernate Enter Status \r | |
173 | UINT16 Ulls:1; // UIC Link Lost Status \r | |
174 | \r | |
175 | UINT16 Ulss:1; // UIC Link Startup Status \r | |
176 | UINT16 Utmrcs:1; // UTP Task Management Request Completion Status \r | |
177 | UINT16 Uccs:1; // UIC Command Completion Status \r | |
178 | UINT16 Dfes:1; // Device Fatal Error Status \r | |
179 | \r | |
180 | UINT16 Utpes:1; // UTP Error Status \r | |
181 | UINT16 Rsvd1:3;\r | |
182 | \r | |
183 | UINT16 Hcfes:1; // Host Controller Fatal Error Status\r | |
184 | UINT16 Sbfes:1; // System Bus Fatal Error Status\r | |
185 | UINT16 Rsvd2:14;\r | |
186 | } UFS_HC_IS;\r | |
187 | \r | |
188 | //\r | |
189 | // UFSHCI 2.0 Spec Section 5.3.2 Offset 24h: IE - Interrupt Enable\r | |
190 | //\r | |
191 | typedef struct {\r | |
192 | UINT16 Utrce:1; // UTP Transfer Request Completion Enable\r | |
193 | UINT16 Udeprie:1; // UIC DME_ENDPOINT_RESET Enable\r | |
194 | UINT16 Uee:1; // UIC Error Enable\r | |
195 | UINT16 Utmse:1; // UIC Test Mode Status Enable\r | |
196 | \r | |
197 | UINT16 Upmse:1; // UIC Power Mode Status Enable \r | |
198 | UINT16 Uhxse:1; // UIC Hibernate Exit Status Enable\r | |
199 | UINT16 Uhese:1; // UIC Hibernate Enter Status Enable \r | |
200 | UINT16 Ullse:1; // UIC Link Lost Status Enable\r | |
201 | \r | |
202 | UINT16 Ulsse:1; // UIC Link Startup Status Enable\r | |
203 | UINT16 Utmrce:1; // UTP Task Management Request Completion Enable\r | |
204 | UINT16 Ucce:1; // UIC Command Completion Enable\r | |
205 | UINT16 Dfee:1; // Device Fatal Error Enable\r | |
206 | \r | |
207 | UINT16 Utpee:1; // UTP Error Enable\r | |
208 | UINT16 Rsvd1:3;\r | |
209 | \r | |
210 | UINT16 Hcfee:1; // Host Controller Fatal Error Enable\r | |
211 | UINT16 Sbfee:1; // System Bus Fatal Error Enable\r | |
212 | UINT16 Rsvd2:14;\r | |
213 | } UFS_HC_IE;\r | |
214 | \r | |
215 | //\r | |
216 | // UFSHCI 2.0 Spec Section 5.3.3 Offset 30h: HCS - Host Controller Status\r | |
217 | //\r | |
218 | typedef struct {\r | |
219 | UINT8 Dp:1; // Device Present\r | |
220 | UINT8 UtrlRdy:1; // UTP Transfer Request List Ready\r | |
221 | UINT8 UtmrlRdy:1; // UTP Task Management Request List Ready\r | |
222 | UINT8 UcRdy:1; // UIC COMMAND Ready\r | |
223 | UINT8 Rsvd1:4;\r | |
224 | \r | |
225 | UINT8 Upmcrs:3; // UIC Power Mode Change Request Status\r | |
226 | UINT8 Rsvd2:1; // UIC Hibernate Exit Status Enable\r | |
227 | UINT8 Utpec:4; // UTP Error Code\r | |
228 | \r | |
229 | UINT8 TtagUtpE; // Task Tag of UTP error\r | |
230 | UINT8 TlunUtpE; // Target LUN of UTP error\r | |
231 | } UFS_HC_STATUS;\r | |
232 | \r | |
233 | //\r | |
234 | // UFSHCI 2.0 Spec Section 5.3.4 Offset 34h: HCE - Host Controller Enable\r | |
235 | //\r | |
236 | typedef struct {\r | |
237 | UINT32 Hce:1; // Host Controller Enable\r | |
238 | UINT32 Rsvd1:31;\r | |
239 | } UFS_HC_ENABLE;\r | |
240 | \r | |
241 | //\r | |
242 | // UFSHCI 2.0 Spec Section 5.3.5 Offset 38h: UECPA - Host UIC Error Code PHY Adapter Layer\r | |
243 | //\r | |
244 | typedef struct {\r | |
245 | UINT32 Ec:5; // UIC PHY Adapter Layer Error Code\r | |
246 | UINT32 Rsvd1:26;\r | |
247 | UINT32 Err:1; // UIC PHY Adapter Layer Error\r | |
248 | } UFS_HC_UECPA;\r | |
249 | \r | |
250 | //\r | |
251 | // UFSHCI 2.0 Spec Section 5.3.6 Offset 3ch: UECDL - Host UIC Error Code Data Link Layer\r | |
252 | //\r | |
253 | typedef struct {\r | |
254 | UINT32 Ec:15; // UIC Data Link Layer Error Code\r | |
255 | UINT32 Rsvd1:16;\r | |
256 | UINT32 Err:1; // UIC Data Link Layer Error\r | |
257 | } UFS_HC_UECDL;\r | |
258 | \r | |
259 | //\r | |
260 | // UFSHCI 2.0 Spec Section 5.3.7 Offset 40h: UECN - Host UIC Error Code Network Layer\r | |
261 | //\r | |
262 | typedef struct {\r | |
263 | UINT32 Ec:3; // UIC Network Layer Error Code\r | |
264 | UINT32 Rsvd1:28;\r | |
265 | UINT32 Err:1; // UIC Network Layer Error\r | |
266 | } UFS_HC_UECN;\r | |
267 | \r | |
268 | //\r | |
269 | // UFSHCI 2.0 Spec Section 5.3.8 Offset 44h: UECT - Host UIC Error Code Transport Layer\r | |
270 | //\r | |
271 | typedef struct {\r | |
272 | UINT32 Ec:7; // UIC Transport Layer Error Code\r | |
273 | UINT32 Rsvd1:24;\r | |
274 | UINT32 Err:1; // UIC Transport Layer Error\r | |
275 | } UFS_HC_UECT;\r | |
276 | \r | |
277 | //\r | |
278 | // UFSHCI 2.0 Spec Section 5.3.9 Offset 48h: UECDME - Host UIC Error Code\r | |
279 | //\r | |
280 | typedef struct {\r | |
281 | UINT32 Ec:1; // UIC DME Error Code\r | |
282 | UINT32 Rsvd1:30;\r | |
283 | UINT32 Err:1; // UIC DME Error\r | |
284 | } UFS_HC_UECDME;\r | |
285 | \r | |
286 | //\r | |
287 | // UFSHCI 2.0 Spec Section 5.3.10 Offset 4Ch: UTRIACR - UTP Transfer Request Interrupt Aggregation Control Register\r | |
288 | //\r | |
289 | typedef struct {\r | |
290 | UINT8 IaToVal; // Interrupt aggregation timeout value\r | |
291 | \r | |
292 | UINT8 IacTh:5; // Interrupt aggregation counter threshold\r | |
293 | UINT8 Rsvd1:3;\r | |
294 | \r | |
295 | UINT8 Ctr:1; // Counter and Timer Reset\r | |
296 | UINT8 Rsvd2:3;\r | |
297 | UINT8 Iasb:1; // Interrupt aggregation status bit\r | |
298 | UINT8 Rsvd3:3;\r | |
299 | \r | |
300 | UINT8 IapwEn:1; // Interrupt aggregation parameter write enable\r | |
301 | UINT8 Rsvd4:6;\r | |
302 | UINT8 IaEn:1; // Interrupt Aggregation Enable/Disable\r | |
303 | } UFS_HC_UTRIACR;\r | |
304 | \r | |
305 | //\r | |
306 | // UFSHCI 2.0 Spec Section 5.4.1 Offset 50h: UTRLBA - UTP Transfer Request List Base Address\r | |
307 | //\r | |
308 | typedef struct {\r | |
309 | UINT32 Rsvd1:10;\r | |
310 | UINT32 UtrlBa:22; // UTP Transfer Request List Base Address\r | |
311 | } UFS_HC_UTRLBA;\r | |
312 | \r | |
313 | //\r | |
314 | // UFSHCI 2.0 Spec Section 5.4.2 Offset 54h: UTRLBAU - UTP Transfer Request List Base Address Upper 32-bits\r | |
315 | //\r | |
316 | #define UFS_HC_UTRLBAU UINT32\r | |
317 | \r | |
318 | //\r | |
319 | // UFSHCI 2.0 Spec Section 5.4.3 Offset 58h: UTRLDBR - UTP Transfer Request List Door Bell Register\r | |
320 | //\r | |
321 | #define UFS_HC_UTRLDBR UINT32\r | |
322 | \r | |
323 | //\r | |
324 | // UFSHCI 2.0 Spec Section 5.4.4 Offset 5Ch: UTRLCLR - UTP Transfer Request List CLear Register\r | |
325 | //\r | |
326 | #define UFS_HC_UTRLCLR UINT32\r | |
327 | \r | |
328 | #if 0\r | |
329 | //\r | |
330 | // UFSHCI 2.0 Spec Section 5.4.5 Offset 60h: UTRLRSR - UTP Transfer Request List Run Stop Register\r | |
331 | //\r | |
332 | typedef struct {\r | |
333 | UINT32 UtrlRsr:1; // UTP Transfer Request List Run-Stop Register\r | |
334 | UINT32 Rsvd1:31;\r | |
335 | } UFS_HC_UTRLRSR;\r | |
336 | #endif\r | |
337 | \r | |
338 | //\r | |
339 | // UFSHCI 2.0 Spec Section 5.5.1 Offset 70h: UTMRLBA - UTP Task Management Request List Base Address\r | |
340 | //\r | |
341 | typedef struct {\r | |
342 | UINT32 Rsvd1:10;\r | |
343 | UINT32 UtmrlBa:22; // UTP Task Management Request List Base Address\r | |
344 | } UFS_HC_UTMRLBA;\r | |
345 | \r | |
346 | //\r | |
347 | // UFSHCI 2.0 Spec Section 5.5.2 Offset 74h: UTMRLBAU - UTP Task Management Request List Base Address Upper 32-bits\r | |
348 | //\r | |
349 | #define UFS_HC_UTMRLBAU UINT32\r | |
350 | \r | |
351 | //\r | |
352 | // UFSHCI 2.0 Spec Section 5.5.3 Offset 78h: UTMRLDBR - UTP Task Management Request List Door Bell Register\r | |
353 | //\r | |
354 | typedef struct {\r | |
355 | UINT32 UtmrlDbr:8; // UTP Task Management Request List Door bell Register\r | |
356 | UINT32 Rsvd1:24;\r | |
357 | } UFS_HC_UTMRLDBR;\r | |
358 | \r | |
359 | //\r | |
360 | // UFSHCI 2.0 Spec Section 5.5.4 Offset 7Ch: UTMRLCLR - UTP Task Management Request List CLear Register\r | |
361 | //\r | |
362 | typedef struct {\r | |
363 | UINT32 UtmrlClr:8; // UTP Task Management List Clear Register\r | |
364 | UINT32 Rsvd1:24;\r | |
365 | } UFS_HC_UTMRLCLR;\r | |
366 | \r | |
367 | #if 0\r | |
368 | //\r | |
369 | // UFSHCI 2.0 Spec Section 5.5.5 Offset 80h: UTMRLRSR - UTP Task Management Request List Run Stop Register\r | |
370 | //\r | |
371 | typedef struct {\r | |
372 | UINT32 UtmrlRsr:1; // UTP Task Management Request List Run-Stop Register\r | |
373 | UINT32 Rsvd1:31;\r | |
374 | } UFS_HC_UTMRLRSR;\r | |
375 | #endif\r | |
376 | \r | |
377 | //\r | |
378 | // UFSHCI 2.0 Spec Section 5.6.1 Offset 90h: UICCMD - UIC Command\r | |
379 | //\r | |
380 | typedef struct {\r | |
381 | UINT32 CmdOp:8; // Command Opcode\r | |
382 | UINT32 Rsvd1:24;\r | |
383 | } UFS_HC_UICCMD;\r | |
384 | \r | |
385 | //\r | |
386 | // UFSHCI 2.0 Spec Section 5.6.2 Offset 94h: UICCMDARG1 - UIC Command Argument 1\r | |
387 | //\r | |
388 | #define UFS_HC_UICCMD_ARG1 UINT32\r | |
389 | \r | |
390 | //\r | |
391 | // UFSHCI 2.0 Spec Section 5.6.2 Offset 98h: UICCMDARG2 - UIC Command Argument 2\r | |
392 | //\r | |
393 | #define UFS_HC_UICCMD_ARG2 UINT32\r | |
394 | \r | |
395 | //\r | |
396 | // UFSHCI 2.0 Spec Section 5.6.2 Offset 9ch: UICCMDARG3 - UIC Command Argument 3\r | |
397 | //\r | |
398 | #define UFS_HC_UICCMD_ARG3 UINT32\r | |
399 | \r | |
400 | //\r | |
401 | // UIC command opcodes\r | |
402 | //\r | |
403 | typedef enum {\r | |
404 | UfsUicDmeGet = 0x01,\r | |
405 | UfsUicDmeSet = 0x02,\r | |
406 | UfsUicDmePeerGet = 0x03,\r | |
407 | UfsUicDmePeerSet = 0x04,\r | |
408 | UfsUicDmePwrOn = 0x10,\r | |
409 | UfsUicDmePwrOff = 0x11,\r | |
410 | UfsUicDmeEnable = 0x12,\r | |
411 | UfsUicDmeReset = 0x14,\r | |
412 | UfsUicDmeEndpointReset = 0x15,\r | |
413 | UfsUicDmeLinkStartup = 0x16,\r | |
414 | UfsUicDmeHibernateEnter = 0x17,\r | |
415 | UfsUicDmeHibernateExit = 0x18,\r | |
416 | UfsUicDmeTestMode = 0x1A\r | |
417 | } UFS_UIC_OPCODE;\r | |
418 | \r | |
419 | //\r | |
420 | // UTP Transfer Request Descriptor\r | |
421 | //\r | |
422 | typedef struct {\r | |
423 | //\r | |
424 | // DW0\r | |
425 | //\r | |
426 | UINT32 Rsvd1:24;\r | |
427 | UINT32 Int:1; /* Interrupt */\r | |
428 | UINT32 Dd:2; /* Data Direction */\r | |
429 | UINT32 Rsvd2:1;\r | |
430 | UINT32 Ct:4; /* Command Type */\r | |
431 | \r | |
432 | //\r | |
433 | // DW1\r | |
434 | //\r | |
435 | UINT32 Rsvd3;\r | |
436 | \r | |
437 | //\r | |
438 | // DW2\r | |
439 | //\r | |
440 | UINT32 Ocs:8; /* Overall Command Status */\r | |
441 | UINT32 Rsvd4:24;\r | |
442 | \r | |
443 | //\r | |
444 | // DW3\r | |
445 | //\r | |
446 | UINT32 Rsvd5;\r | |
447 | \r | |
448 | //\r | |
449 | // DW4\r | |
450 | //\r | |
451 | UINT32 Rsvd6:7;\r | |
452 | UINT32 UcdBa:25; /* UTP Command Descriptor Base Address */\r | |
453 | \r | |
454 | //\r | |
455 | // DW5\r | |
456 | //\r | |
457 | UINT32 UcdBaU; /* UTP Command Descriptor Base Address Upper 32-bits */\r | |
458 | \r | |
459 | //\r | |
460 | // DW6\r | |
461 | //\r | |
462 | UINT16 RuL; /* Response UPIU Length */ \r | |
463 | UINT16 RuO; /* Response UPIU Offset */\r | |
464 | \r | |
465 | //\r | |
466 | // DW7\r | |
467 | //\r | |
468 | UINT16 PrdtL; /* PRDT Length */ \r | |
469 | UINT16 PrdtO; /* PRDT Offset */\r | |
470 | } UTP_TRD;\r | |
471 | \r | |
472 | typedef struct {\r | |
473 | //\r | |
474 | // DW0\r | |
475 | //\r | |
476 | UINT32 Rsvd1:2;\r | |
477 | UINT32 DbAddr:30; /* Data Base Address */\r | |
478 | \r | |
479 | //\r | |
480 | // DW1\r | |
481 | //\r | |
482 | UINT32 DbAddrU; /* Data Base Address Upper 32-bits */\r | |
483 | \r | |
484 | //\r | |
485 | // DW2\r | |
486 | //\r | |
487 | UINT32 Rsvd2;\r | |
488 | \r | |
489 | //\r | |
490 | // DW3\r | |
491 | //\r | |
492 | UINT32 DbCount:18; /* Data Byte Count */\r | |
493 | UINT32 Rsvd3:14;\r | |
494 | } UTP_TR_PRD;\r | |
495 | \r | |
496 | //\r | |
497 | // UFS 2.0 Spec Section 10.5.3 - UTP Command UPIU\r | |
498 | //\r | |
499 | typedef struct {\r | |
500 | //\r | |
501 | // DW0\r | |
502 | //\r | |
503 | UINT8 TransCode:6; /* Transaction Type - 0x01*/\r | |
504 | UINT8 Dd:1;\r | |
505 | UINT8 Hd:1;\r | |
506 | UINT8 Flags;\r | |
507 | UINT8 Lun;\r | |
508 | UINT8 TaskTag; /* Task Tag */\r | |
509 | \r | |
510 | //\r | |
511 | // DW1\r | |
512 | //\r | |
513 | UINT8 CmdSet:4; /* Command Set Type */\r | |
514 | UINT8 Rsvd1:4;\r | |
515 | UINT8 Rsvd2;\r | |
516 | UINT8 Rsvd3;\r | |
517 | UINT8 Rsvd4;\r | |
518 | \r | |
519 | //\r | |
520 | // DW2\r | |
521 | //\r | |
522 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
523 | UINT8 Rsvd5;\r | |
524 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
525 | \r | |
526 | //\r | |
527 | // DW3\r | |
528 | //\r | |
529 | UINT32 ExpDataTranLen; /* Expected Data Transfer Length - Big Endian */\r | |
530 | \r | |
531 | //\r | |
532 | // DW4 - DW7\r | |
533 | //\r | |
534 | UINT8 Cdb[16];\r | |
535 | } UTP_COMMAND_UPIU;\r | |
536 | \r | |
537 | //\r | |
538 | // UFS 2.0 Spec Section 10.5.4 - UTP Response UPIU\r | |
539 | //\r | |
540 | typedef struct {\r | |
541 | //\r | |
542 | // DW0\r | |
543 | //\r | |
544 | UINT8 TransCode:6; /* Transaction Type - 0x21*/\r | |
545 | UINT8 Dd:1;\r | |
546 | UINT8 Hd:1;\r | |
547 | UINT8 Flags;\r | |
548 | UINT8 Lun;\r | |
549 | UINT8 TaskTag; /* Task Tag */\r | |
550 | \r | |
551 | //\r | |
552 | // DW1\r | |
553 | //\r | |
554 | UINT8 CmdSet:4; /* Command Set Type */\r | |
555 | UINT8 Rsvd1:4;\r | |
556 | UINT8 Rsvd2;\r | |
557 | UINT8 Response; /* Response */\r | |
558 | UINT8 Status; /* Status */\r | |
559 | \r | |
560 | //\r | |
561 | // DW2\r | |
562 | //\r | |
563 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
564 | UINT8 DevInfo; /* Device Information */\r | |
565 | UINT16 DataSegLen; /* Data Segment Length - Big Endian */\r | |
566 | \r | |
567 | //\r | |
568 | // DW3\r | |
569 | //\r | |
570 | UINT32 ResTranCount; /* Residual Transfer Count - Big Endian */\r | |
571 | \r | |
572 | //\r | |
573 | // DW4 - DW7\r | |
574 | //\r | |
575 | UINT8 Rsvd3[16];\r | |
576 | \r | |
577 | //\r | |
578 | // Data Segment - Sense Data\r | |
579 | //\r | |
580 | UINT16 SenseDataLen; /* Sense Data Length - Big Endian */\r | |
581 | UINT8 SenseData[18]; /* Sense Data */\r | |
582 | } UTP_RESPONSE_UPIU;\r | |
583 | \r | |
584 | //\r | |
585 | // UFS 2.0 Spec Section 10.5.5 - UTP Data-Out UPIU\r | |
586 | //\r | |
587 | typedef struct {\r | |
588 | //\r | |
589 | // DW0\r | |
590 | //\r | |
591 | UINT8 TransCode:6; /* Transaction Type - 0x02*/\r | |
592 | UINT8 Dd:1;\r | |
593 | UINT8 Hd:1;\r | |
594 | UINT8 Flags;\r | |
595 | UINT8 Lun;\r | |
596 | UINT8 TaskTag; /* Task Tag */\r | |
597 | \r | |
598 | //\r | |
599 | // DW1\r | |
600 | //\r | |
601 | UINT8 Rsvd1[4];\r | |
602 | \r | |
603 | //\r | |
604 | // DW2\r | |
605 | //\r | |
606 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
607 | UINT8 Rsvd2;\r | |
608 | UINT16 DataSegLen; /* Data Segment Length - Big Endian */\r | |
609 | \r | |
610 | //\r | |
611 | // DW3\r | |
612 | //\r | |
613 | UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */\r | |
614 | \r | |
615 | //\r | |
616 | // DW4\r | |
617 | //\r | |
618 | UINT32 DataTranCount; /* Data Transfer Count - Big Endian */\r | |
619 | \r | |
620 | //\r | |
621 | // DW5 - DW7\r | |
622 | //\r | |
623 | UINT8 Rsvd3[12];\r | |
624 | \r | |
625 | //\r | |
626 | // Data Segment - Data to be sent out\r | |
627 | //\r | |
628 | //UINT8 Data[]; /* Data to be sent out, maximum is 65535 bytes */\r | |
629 | } UTP_DATA_OUT_UPIU;\r | |
630 | \r | |
631 | //\r | |
632 | // UFS 2.0 Spec Section 10.5.6 - UTP Data-In UPIU\r | |
633 | //\r | |
634 | typedef struct {\r | |
635 | //\r | |
636 | // DW0\r | |
637 | //\r | |
638 | UINT8 TransCode:6; /* Transaction Type - 0x22*/\r | |
639 | UINT8 Dd:1;\r | |
640 | UINT8 Hd:1;\r | |
641 | UINT8 Flags;\r | |
642 | UINT8 Lun;\r | |
643 | UINT8 TaskTag; /* Task Tag */\r | |
644 | \r | |
645 | //\r | |
646 | // DW1\r | |
647 | //\r | |
648 | UINT8 Rsvd1[4];\r | |
649 | \r | |
650 | //\r | |
651 | // DW2\r | |
652 | //\r | |
653 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
654 | UINT8 Rsvd2;\r | |
655 | UINT16 DataSegLen; /* Data Segment Length - Big Endian */\r | |
656 | \r | |
657 | //\r | |
658 | // DW3\r | |
659 | //\r | |
660 | UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */\r | |
661 | \r | |
662 | //\r | |
663 | // DW4\r | |
664 | //\r | |
665 | UINT32 DataTranCount; /* Data Transfer Count - Big Endian */\r | |
666 | \r | |
667 | //\r | |
668 | // DW5 - DW7\r | |
669 | //\r | |
670 | UINT8 Rsvd3[12];\r | |
671 | \r | |
672 | //\r | |
673 | // Data Segment - Data to be read\r | |
674 | //\r | |
675 | //UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */\r | |
676 | } UTP_DATA_IN_UPIU;\r | |
677 | \r | |
678 | //\r | |
679 | // UFS 2.0 Spec Section 10.5.7 - UTP Ready-To-Transfer UPIU\r | |
680 | //\r | |
681 | typedef struct {\r | |
682 | //\r | |
683 | // DW0\r | |
684 | //\r | |
685 | UINT8 TransCode:6; /* Transaction Type - 0x31*/\r | |
686 | UINT8 Dd:1;\r | |
687 | UINT8 Hd:1;\r | |
688 | UINT8 Flags;\r | |
689 | UINT8 Lun;\r | |
690 | UINT8 TaskTag; /* Task Tag */\r | |
691 | \r | |
692 | //\r | |
693 | // DW1\r | |
694 | //\r | |
695 | UINT8 Rsvd1[4];\r | |
696 | \r | |
697 | //\r | |
698 | // DW2\r | |
699 | //\r | |
700 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
701 | UINT8 Rsvd2;\r | |
702 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
703 | \r | |
704 | //\r | |
705 | // DW3\r | |
706 | //\r | |
707 | UINT32 DataBufOffset; /* Data Buffer Offset - Big Endian */\r | |
708 | \r | |
709 | //\r | |
710 | // DW4\r | |
711 | //\r | |
712 | UINT32 DataTranCount; /* Data Transfer Count - Big Endian */\r | |
713 | \r | |
714 | //\r | |
715 | // DW5 - DW7\r | |
716 | //\r | |
717 | UINT8 Rsvd3[12];\r | |
718 | \r | |
719 | //\r | |
720 | // Data Segment - Data to be read\r | |
721 | //\r | |
722 | //UINT8 Data[]; /* Data to be read, maximum is 65535 bytes */\r | |
723 | } UTP_RDY_TO_TRAN_UPIU;\r | |
724 | \r | |
725 | //\r | |
726 | // UFS 2.0 Spec Section 10.5.8 - UTP Task Management Request UPIU\r | |
727 | //\r | |
728 | typedef struct {\r | |
729 | //\r | |
730 | // DW0\r | |
731 | //\r | |
732 | UINT8 TransCode:6; /* Transaction Type - 0x04*/\r | |
733 | UINT8 Dd:1;\r | |
734 | UINT8 Hd:1;\r | |
735 | UINT8 Flags;\r | |
736 | UINT8 Lun;\r | |
737 | UINT8 TaskTag; /* Task Tag */\r | |
738 | \r | |
739 | //\r | |
740 | // DW1\r | |
741 | //\r | |
742 | UINT8 Rsvd1;\r | |
743 | UINT8 TskManFunc; /* Task Management Function */\r | |
744 | UINT8 Rsvd2[2];\r | |
745 | \r | |
746 | //\r | |
747 | // DW2\r | |
748 | //\r | |
749 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
750 | UINT8 Rsvd3;\r | |
751 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
752 | \r | |
753 | //\r | |
754 | // DW3\r | |
755 | //\r | |
756 | UINT32 InputParam1; /* Input Parameter 1 - Big Endian */\r | |
757 | \r | |
758 | //\r | |
759 | // DW4\r | |
760 | //\r | |
761 | UINT32 InputParam2; /* Input Parameter 2 - Big Endian */\r | |
762 | \r | |
763 | //\r | |
764 | // DW5\r | |
765 | //\r | |
766 | UINT32 InputParam3; /* Input Parameter 3 - Big Endian */\r | |
767 | \r | |
768 | //\r | |
769 | // DW6 - DW7\r | |
770 | //\r | |
771 | UINT8 Rsvd4[8];\r | |
772 | } UTP_TM_REQ_UPIU;\r | |
773 | \r | |
774 | //\r | |
775 | // UFS 2.0 Spec Section 10.5.9 - UTP Task Management Response UPIU\r | |
776 | //\r | |
777 | typedef struct {\r | |
778 | //\r | |
779 | // DW0\r | |
780 | //\r | |
781 | UINT8 TransCode:6; /* Transaction Type - 0x24*/\r | |
782 | UINT8 Dd:1;\r | |
783 | UINT8 Hd:1;\r | |
784 | UINT8 Flags;\r | |
785 | UINT8 Lun;\r | |
786 | UINT8 TaskTag; /* Task Tag */\r | |
787 | \r | |
788 | //\r | |
789 | // DW1\r | |
790 | //\r | |
791 | UINT8 Rsvd1[2];\r | |
792 | UINT8 Resp; /* Response */\r | |
793 | UINT8 Rsvd2;\r | |
794 | \r | |
795 | //\r | |
796 | // DW2\r | |
797 | //\r | |
798 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
799 | UINT8 Rsvd3;\r | |
800 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
801 | \r | |
802 | //\r | |
803 | // DW3\r | |
804 | //\r | |
805 | UINT32 OutputParam1; /* Output Parameter 1 - Big Endian */\r | |
806 | \r | |
807 | //\r | |
808 | // DW4\r | |
809 | //\r | |
810 | UINT32 OutputParam2; /* Output Parameter 2 - Big Endian */\r | |
811 | \r | |
812 | //\r | |
813 | // DW5 - DW7\r | |
814 | //\r | |
815 | UINT8 Rsvd4[12];\r | |
816 | } UTP_TM_RESP_UPIU;\r | |
817 | \r | |
818 | //\r | |
819 | // UTP Task Management Request Descriptor\r | |
820 | //\r | |
821 | typedef struct {\r | |
822 | //\r | |
823 | // DW0\r | |
824 | //\r | |
825 | UINT32 Rsvd1:24;\r | |
826 | UINT32 Int:1; /* Interrupt */\r | |
827 | UINT32 Rsvd2:7;\r | |
828 | \r | |
829 | //\r | |
830 | // DW1\r | |
831 | //\r | |
832 | UINT32 Rsvd3;\r | |
833 | \r | |
834 | //\r | |
835 | // DW2\r | |
836 | //\r | |
837 | UINT32 Ocs:8; /* Overall Command Status */\r | |
838 | UINT32 Rsvd4:24;\r | |
839 | \r | |
840 | //\r | |
841 | // DW3\r | |
842 | //\r | |
843 | UINT32 Rsvd5;\r | |
844 | \r | |
845 | //\r | |
846 | // DW4 - DW11\r | |
847 | //\r | |
848 | UTP_TM_REQ_UPIU TmReq; /* Task Management Request UPIU */\r | |
849 | \r | |
850 | //\r | |
851 | // DW12 - DW19\r | |
852 | //\r | |
853 | UTP_TM_RESP_UPIU TmResp; /* Task Management Response UPIU */\r | |
854 | } UTP_TMRD;\r | |
855 | \r | |
856 | \r | |
857 | typedef struct {\r | |
858 | UINT8 Opcode;\r | |
859 | UINT8 DescId;\r | |
860 | UINT8 Index;\r | |
861 | UINT8 Selector;\r | |
862 | UINT16 Rsvd1;\r | |
863 | UINT16 Length;\r | |
864 | UINT32 Value;\r | |
865 | UINT32 Rsvd2;\r | |
866 | } UTP_UPIU_TSF;\r | |
867 | \r | |
868 | //\r | |
869 | // UFS 2.0 Spec Section 10.5.10 - UTP Query Request UPIU\r | |
870 | //\r | |
871 | typedef struct {\r | |
872 | //\r | |
873 | // DW0\r | |
874 | //\r | |
875 | UINT8 TransCode:6; /* Transaction Type - 0x16*/\r | |
876 | UINT8 Dd:1;\r | |
877 | UINT8 Hd:1;\r | |
878 | UINT8 Flags;\r | |
879 | UINT8 Rsvd1;\r | |
880 | UINT8 TaskTag; /* Task Tag */\r | |
881 | \r | |
882 | //\r | |
883 | // DW1\r | |
884 | //\r | |
885 | UINT8 Rsvd2;\r | |
886 | UINT8 QueryFunc; /* Query Function */\r | |
887 | UINT8 Rsvd3[2];\r | |
888 | \r | |
889 | //\r | |
890 | // DW2\r | |
891 | //\r | |
892 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
893 | UINT8 Rsvd4;\r | |
894 | UINT16 DataSegLen; /* Data Segment Length - Big Endian */\r | |
895 | \r | |
896 | //\r | |
897 | // DW3 - 6\r | |
898 | //\r | |
899 | UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */\r | |
900 | \r | |
901 | //\r | |
902 | // DW7\r | |
903 | //\r | |
904 | UINT8 Rsvd5[4];\r | |
905 | \r | |
906 | //\r | |
907 | // Data Segment - Data to be transferred\r | |
908 | //\r | |
909 | //UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */\r | |
910 | } UTP_QUERY_REQ_UPIU;\r | |
911 | \r | |
912 | #define QUERY_FUNC_STD_READ_REQ 0x01\r | |
913 | #define QUERY_FUNC_STD_WRITE_REQ 0x81\r | |
914 | \r | |
915 | typedef enum {\r | |
916 | UtpQueryFuncOpcodeNop = 0x00,\r | |
917 | UtpQueryFuncOpcodeRdDesc = 0x01,\r | |
918 | UtpQueryFuncOpcodeWrDesc = 0x02,\r | |
919 | UtpQueryFuncOpcodeRdAttr = 0x03,\r | |
920 | UtpQueryFuncOpcodeWrAttr = 0x04,\r | |
921 | UtpQueryFuncOpcodeRdFlag = 0x05,\r | |
922 | UtpQueryFuncOpcodeSetFlag = 0x06,\r | |
923 | UtpQueryFuncOpcodeClrFlag = 0x07,\r | |
924 | UtpQueryFuncOpcodeTogFlag = 0x08\r | |
925 | } UTP_QUERY_FUNC_OPCODE;\r | |
926 | \r | |
927 | //\r | |
928 | // UFS 2.0 Spec Section 10.5.11 - UTP Query Response UPIU\r | |
929 | //\r | |
930 | typedef struct {\r | |
931 | //\r | |
932 | // DW0\r | |
933 | //\r | |
934 | UINT8 TransCode:6; /* Transaction Type - 0x36*/\r | |
935 | UINT8 Dd:1;\r | |
936 | UINT8 Hd:1;\r | |
937 | UINT8 Flags;\r | |
938 | UINT8 Rsvd1;\r | |
939 | UINT8 TaskTag; /* Task Tag */\r | |
940 | \r | |
941 | //\r | |
942 | // DW1\r | |
943 | //\r | |
944 | UINT8 Rsvd2;\r | |
945 | UINT8 QueryFunc; /* Query Function */\r | |
946 | UINT8 QueryResp; /* Query Response */\r | |
947 | UINT8 Rsvd3;\r | |
948 | \r | |
949 | //\r | |
950 | // DW2\r | |
951 | //\r | |
952 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
953 | UINT8 DevInfo; /* Device Information */\r | |
954 | UINT16 DataSegLen; /* Data Segment Length - Big Endian */\r | |
955 | \r | |
956 | //\r | |
957 | // DW3 - 6\r | |
958 | //\r | |
959 | UTP_UPIU_TSF Tsf; /* Transaction Specific Fields */\r | |
960 | \r | |
961 | //\r | |
962 | // DW7\r | |
963 | //\r | |
964 | UINT8 Rsvd4[4];\r | |
965 | \r | |
966 | //\r | |
967 | // Data Segment - Data to be transferred\r | |
968 | //\r | |
969 | //UINT8 Data[]; /* Data to be transferred, maximum is 65535 bytes */\r | |
970 | } UTP_QUERY_RESP_UPIU;\r | |
971 | \r | |
972 | typedef enum {\r | |
973 | UfsUtpQueryResponseSuccess = 0x00,\r | |
974 | UfsUtpQueryResponseParamNotReadable = 0xF6,\r | |
975 | UfsUtpQueryResponseParamNotWriteable = 0xF7, \r | |
976 | UfsUtpQueryResponseParamAlreadyWritten = 0xF8,\r | |
977 | UfsUtpQueryResponseInvalidLen = 0xF9,\r | |
978 | UfsUtpQueryResponseInvalidVal = 0xFA,\r | |
979 | UfsUtpQueryResponseInvalidSelector = 0xFB,\r | |
980 | UfsUtpQueryResponseInvalidIndex = 0xFC,\r | |
981 | UfsUtpQueryResponseInvalidIdn = 0xFD,\r | |
982 | UfsUtpQueryResponseInvalidOpc = 0xFE,\r | |
983 | UfsUtpQueryResponseGeneralFailure = 0xFF\r | |
984 | } UTP_QUERY_RESP_CODE;\r | |
985 | \r | |
986 | //\r | |
987 | // UFS 2.0 Spec Section 10.5.12 - UTP Reject UPIU\r | |
988 | //\r | |
989 | typedef struct {\r | |
990 | //\r | |
991 | // DW0\r | |
992 | //\r | |
993 | UINT8 TransCode:6; /* Transaction Type - 0x3F*/\r | |
994 | UINT8 Dd:1;\r | |
995 | UINT8 Hd:1;\r | |
996 | UINT8 Flags;\r | |
997 | UINT8 Lun;\r | |
998 | UINT8 TaskTag; /* Task Tag */\r | |
999 | \r | |
1000 | //\r | |
1001 | // DW1\r | |
1002 | //\r | |
1003 | UINT8 Rsvd1[2];\r | |
1004 | UINT8 Response; /* Response - 0x01 */\r | |
1005 | UINT8 Rsvd2;\r | |
1006 | \r | |
1007 | //\r | |
1008 | // DW2\r | |
1009 | //\r | |
1010 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
1011 | UINT8 DevInfo; /* Device Information - 0x00 */\r | |
1012 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
1013 | \r | |
1014 | //\r | |
1015 | // DW3\r | |
1016 | //\r | |
1017 | UINT8 HdrSts; /* Basic Header Status */\r | |
1018 | UINT8 Rsvd3;\r | |
1019 | UINT8 E2ESts; /* End-to-End Status */\r | |
1020 | UINT8 Rsvd4;\r | |
1021 | \r | |
1022 | //\r | |
1023 | // DW4 - DW7\r | |
1024 | //\r | |
1025 | UINT8 Rsvd5[16];\r | |
1026 | } UTP_REJ_UPIU;\r | |
1027 | \r | |
1028 | //\r | |
1029 | // UFS 2.0 Spec Section 10.5.13 - UTP NOP OUT UPIU\r | |
1030 | //\r | |
1031 | typedef struct {\r | |
1032 | //\r | |
1033 | // DW0\r | |
1034 | //\r | |
1035 | UINT8 TransCode:6; /* Transaction Type - 0x00*/\r | |
1036 | UINT8 Dd:1;\r | |
1037 | UINT8 Hd:1;\r | |
1038 | UINT8 Flags;\r | |
1039 | UINT8 Rsvd1;\r | |
1040 | UINT8 TaskTag; /* Task Tag */\r | |
1041 | \r | |
1042 | //\r | |
1043 | // DW1\r | |
1044 | //\r | |
1045 | UINT8 Rsvd2[4];\r | |
1046 | \r | |
1047 | //\r | |
1048 | // DW2\r | |
1049 | //\r | |
1050 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
1051 | UINT8 Rsvd3;\r | |
1052 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
1053 | \r | |
1054 | //\r | |
1055 | // DW3 - DW7\r | |
1056 | //\r | |
1057 | UINT8 Rsvd4[20];\r | |
1058 | } UTP_NOP_OUT_UPIU;\r | |
1059 | \r | |
1060 | //\r | |
1061 | // UFS 2.0 Spec Section 10.5.14 - UTP NOP IN UPIU\r | |
1062 | //\r | |
1063 | typedef struct {\r | |
1064 | //\r | |
1065 | // DW0\r | |
1066 | //\r | |
1067 | UINT8 TransCode:6; /* Transaction Type - 0x20*/\r | |
1068 | UINT8 Dd:1;\r | |
1069 | UINT8 Hd:1;\r | |
1070 | UINT8 Flags;\r | |
1071 | UINT8 Rsvd1;\r | |
1072 | UINT8 TaskTag; /* Task Tag */\r | |
1073 | \r | |
1074 | //\r | |
1075 | // DW1\r | |
1076 | //\r | |
1077 | UINT8 Rsvd2[2];\r | |
1078 | UINT8 Resp; /* Response - 0x00 */\r | |
1079 | UINT8 Rsvd3;\r | |
1080 | \r | |
1081 | //\r | |
1082 | // DW2\r | |
1083 | //\r | |
1084 | UINT8 EhsLen; /* Total EHS Length - 0x00 */\r | |
1085 | UINT8 DevInfo; /* Device Information - 0x00 */\r | |
1086 | UINT16 DataSegLen; /* Data Segment Length - Big Endian - 0x0000 */\r | |
1087 | \r | |
1088 | //\r | |
1089 | // DW3 - DW7\r | |
1090 | //\r | |
1091 | UINT8 Rsvd4[20];\r | |
1092 | } UTP_NOP_IN_UPIU;\r | |
1093 | \r | |
1094 | //\r | |
1095 | // UFS Descriptors\r | |
1096 | //\r | |
1097 | typedef enum {\r | |
1098 | UfsDeviceDesc = 0x00,\r | |
1099 | UfsConfigDesc = 0x01,\r | |
1100 | UfsUnitDesc = 0x02,\r | |
1101 | UfsInterConnDesc = 0x04,\r | |
1102 | UfsStringDesc = 0x05,\r | |
1103 | UfsGeometryDesc = 0x07,\r | |
1104 | UfsPowerDesc = 0x08\r | |
1105 | } UFS_DESC_IDN;\r | |
1106 | \r | |
1107 | //\r | |
1108 | // UFS 2.0 Spec Section 14.1.6.2 - Device Descriptor\r | |
1109 | //\r | |
1110 | typedef struct {\r | |
1111 | UINT8 Length;\r | |
1112 | UINT8 DescType;\r | |
1113 | UINT8 Device;\r | |
1114 | UINT8 DevClass;\r | |
1115 | UINT8 DevSubClass;\r | |
1116 | UINT8 Protocol;\r | |
1117 | UINT8 NumLun;\r | |
1118 | UINT8 NumWLun;\r | |
1119 | UINT8 BootEn;\r | |
1120 | UINT8 DescAccessEn;\r | |
1121 | UINT8 InitPowerMode;\r | |
1122 | UINT8 HighPriorityLun;\r | |
1123 | UINT8 SecureRemovalType;\r | |
1124 | UINT8 SecurityLun;\r | |
1125 | UINT8 BgOpsTermLat;\r | |
1126 | UINT8 InitActiveIccLevel;\r | |
1127 | UINT16 SpecVersion;\r | |
1128 | UINT16 ManufactureDate;\r | |
1129 | UINT8 ManufacturerName;\r | |
1130 | UINT8 ProductName;\r | |
1131 | UINT8 SerialName;\r | |
1132 | UINT8 OemId;\r | |
1133 | UINT16 ManufacturerId;\r | |
1134 | UINT8 Ud0BaseOffset;\r | |
1135 | UINT8 Ud0ConfParamLen;\r | |
1136 | UINT8 DevRttCap;\r | |
1137 | UINT16 PeriodicRtcUpdate;\r | |
1138 | UINT8 Rsvd1[17];\r | |
1139 | UINT8 Rsvd2[16];\r | |
1140 | } UFS_DEV_DESC;\r | |
1141 | \r | |
1142 | typedef struct {\r | |
1143 | UINT8 Length;\r | |
1144 | UINT8 DescType;\r | |
1145 | UINT8 Rsvd1;\r | |
1146 | UINT8 BootEn;\r | |
1147 | UINT8 DescAccessEn;\r | |
1148 | UINT8 InitPowerMode;\r | |
1149 | UINT8 HighPriorityLun;\r | |
1150 | UINT8 SecureRemovalType;\r | |
1151 | UINT8 InitActiveIccLevel;\r | |
1152 | UINT16 PeriodicRtcUpdate;\r | |
1153 | UINT8 Rsvd2[5];\r | |
1154 | } UFS_CONFIG_DESC_GEN_HEADER;\r | |
1155 | \r | |
1156 | typedef struct {\r | |
1157 | UINT8 LunEn;\r | |
1158 | UINT8 BootLunId;\r | |
1159 | UINT8 LunWriteProt;\r | |
1160 | UINT8 MemType;\r | |
1161 | UINT32 NumAllocUnits;\r | |
1162 | UINT8 DataReliability;\r | |
1163 | UINT8 LogicBlkSize;\r | |
1164 | UINT8 ProvisionType;\r | |
1165 | UINT16 CtxCap;\r | |
1166 | UINT8 Rsvd1[3];\r | |
1167 | } UFS_UNIT_DESC_CONFIG_PARAMS;\r | |
1168 | \r | |
1169 | //\r | |
1170 | // UFS 2.0 Spec Section 14.1.6.3 - Configuration Descriptor\r | |
1171 | //\r | |
1172 | typedef struct {\r | |
1173 | UFS_CONFIG_DESC_GEN_HEADER Header;\r | |
1174 | UFS_UNIT_DESC_CONFIG_PARAMS UnitDescConfParams[8];\r | |
1175 | } UFS_CONFIG_DESC;\r | |
1176 | \r | |
1177 | //\r | |
1178 | // UFS 2.0 Spec Section 14.1.6.4 - Geometry Descriptor\r | |
1179 | //\r | |
1180 | typedef struct {\r | |
1181 | UINT8 Length;\r | |
1182 | UINT8 DescType;\r | |
1183 | UINT8 MediaTech;\r | |
1184 | UINT8 Rsvd1;\r | |
1185 | UINT64 TotalRawDevCapacity;\r | |
1186 | UINT8 Rsvd2;\r | |
1187 | UINT32 SegSize;\r | |
1188 | UINT8 AllocUnitSize;\r | |
1189 | UINT8 MinAddrBlkSize;\r | |
1190 | UINT8 OptReadBlkSize;\r | |
1191 | UINT8 OptWriteBlkSize;\r | |
1192 | UINT8 MaxInBufSize;\r | |
1193 | UINT8 MaxOutBufSize;\r | |
1194 | UINT8 RpmbRwSize;\r | |
1195 | UINT8 Rsvd3;\r | |
1196 | UINT8 DataOrder;\r | |
1197 | UINT8 MaxCtxIdNum;\r | |
1198 | UINT8 SysDataTagUnitSize;\r | |
1199 | UINT8 SysDataResUnitSize;\r | |
1200 | UINT8 SupSecRemovalTypes;\r | |
1201 | UINT16 SupMemTypes;\r | |
1202 | UINT32 SysCodeMaxNumAllocUnits;\r | |
1203 | UINT16 SupCodeCapAdjFac;\r | |
1204 | UINT32 NonPersMaxNumAllocUnits;\r | |
1205 | UINT16 NonPersCapAdjFac;\r | |
1206 | UINT32 Enhance1MaxNumAllocUnits;\r | |
1207 | UINT16 Enhance1CapAdjFac;\r | |
1208 | UINT32 Enhance2MaxNumAllocUnits;\r | |
1209 | UINT16 Enhance2CapAdjFac;\r | |
1210 | UINT32 Enhance3MaxNumAllocUnits;\r | |
1211 | UINT16 Enhance3CapAdjFac;\r | |
1212 | UINT32 Enhance4MaxNumAllocUnits;\r | |
1213 | UINT16 Enhance4CapAdjFac;\r | |
1214 | } UFS_GEOMETRY_DESC;\r | |
1215 | \r | |
1216 | //\r | |
1217 | // UFS 2.0 Spec Section 14.1.6.5 - Unit Descriptor\r | |
1218 | //\r | |
1219 | typedef struct {\r | |
1220 | UINT8 Length;\r | |
1221 | UINT8 DescType;\r | |
1222 | UINT8 UnitIdx;\r | |
1223 | UINT8 LunEn;\r | |
1224 | UINT8 BootLunId;\r | |
1225 | UINT8 LunWriteProt;\r | |
1226 | UINT8 LunQueueDep;\r | |
1227 | UINT8 Rsvd1;\r | |
1228 | UINT8 MemType;\r | |
1229 | UINT8 DataReliability;\r | |
1230 | UINT8 LogicBlkSize;\r | |
1231 | UINT64 LogicBlkCount;\r | |
1232 | UINT32 EraseBlkSize;\r | |
1233 | UINT8 ProvisionType;\r | |
1234 | UINT64 PhyMemResCount;\r | |
1235 | UINT16 CtxCap;\r | |
1236 | UINT8 LargeUnitGranularity;\r | |
1237 | } UFS_UNIT_DESC;\r | |
1238 | \r | |
1239 | //\r | |
1240 | // UFS 2.0 Spec Section 14.1.6.6 - RPMB Unit Descriptor\r | |
1241 | //\r | |
1242 | typedef struct {\r | |
1243 | UINT8 Length;\r | |
1244 | UINT8 DescType;\r | |
1245 | UINT8 UnitIdx;\r | |
1246 | UINT8 LunEn;\r | |
1247 | UINT8 BootLunId;\r | |
1248 | UINT8 LunWriteProt;\r | |
1249 | UINT8 LunQueueDep;\r | |
1250 | UINT8 Rsvd1;\r | |
1251 | UINT8 MemType;\r | |
1252 | UINT8 Rsvd2;\r | |
1253 | UINT8 LogicBlkSize;\r | |
1254 | UINT64 LogicBlkCount;\r | |
1255 | UINT32 EraseBlkSize;\r | |
1256 | UINT8 ProvisionType;\r | |
1257 | UINT64 PhyMemResCount;\r | |
1258 | UINT8 Rsvd3[3];\r | |
1259 | } UFS_RPMB_UNIT_DESC;\r | |
1260 | \r | |
1261 | typedef struct {\r | |
1262 | UINT16 Value:10;\r | |
1263 | UINT16 Rsvd1:4;\r | |
1264 | UINT16 Unit:2;\r | |
1265 | } UFS_POWER_PARAM_ELEMENT;\r | |
1266 | \r | |
1267 | //\r | |
1268 | // UFS 2.0 Spec Section 14.1.6.7 - Power Parameter Descriptor\r | |
1269 | //\r | |
1270 | typedef struct {\r | |
1271 | UINT8 Length;\r | |
1272 | UINT8 DescType;\r | |
1273 | UFS_POWER_PARAM_ELEMENT ActiveIccLevelVcc[16];\r | |
1274 | UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ[16];\r | |
1275 | UFS_POWER_PARAM_ELEMENT ActiveIccLevelVccQ2[16];\r | |
1276 | } UFS_POWER_DESC;\r | |
1277 | \r | |
1278 | //\r | |
1279 | // UFS 2.0 Spec Section 14.1.6.8 - InterConnect Descriptor\r | |
1280 | //\r | |
1281 | typedef struct {\r | |
1282 | UINT8 Length;\r | |
1283 | UINT8 DescType;\r | |
1284 | UINT16 UniProVer;\r | |
1285 | UINT16 MphyVer;\r | |
1286 | } UFS_INTER_CONNECT_DESC;\r | |
1287 | \r | |
1288 | //\r | |
1289 | // UFS 2.0 Spec Section 14.1.6.9 - 14.1.6.12 - String Descriptor\r | |
1290 | //\r | |
1291 | typedef struct {\r | |
1292 | UINT8 Length;\r | |
1293 | UINT8 DescType;\r | |
1294 | CHAR16 Unicode[126];\r | |
1295 | } UFS_STRING_DESC;\r | |
1296 | \r | |
1297 | //\r | |
1298 | // UFS 2.0 Spec Section 14.2 - Flags\r | |
1299 | //\r | |
1300 | typedef enum {\r | |
1301 | UfsFlagDevInit = 0x01,\r | |
1302 | UfsFlagPermWpEn = 0x02,\r | |
1303 | UfsFlagPowerOnWpEn = 0x03,\r | |
1304 | UfsFlagBgOpsEn = 0x04,\r | |
1305 | UfsFlagPurgeEn = 0x06,\r | |
1306 | UfsFlagPhyResRemoval = 0x08,\r | |
1307 | UfsFlagBusyRtc = 0x09,\r | |
1308 | UfsFlagPermDisFwUpdate = 0x0B \r | |
1309 | } UFS_FLAGS_IDN;\r | |
1310 | \r | |
1311 | //\r | |
1312 | // UFS 2.0 Spec Section 14.2 - Attributes\r | |
1313 | //\r | |
1314 | typedef enum {\r | |
1315 | UfsAttrBootLunEn = 0x00,\r | |
1316 | UfsAttrCurPowerMode = 0x02,\r | |
1317 | UfsAttrActiveIccLevel = 0x03,\r | |
1318 | UfsAttrOutOfOrderDataEn = 0x04,\r | |
1319 | UfsAttrBgOpStatus = 0x05,\r | |
1320 | UfsAttrPurgeStatus = 0x06,\r | |
1321 | UfsAttrMaxDataInSize = 0x07,\r | |
1322 | UfsAttrMaxDataOutSize = 0x08,\r | |
1323 | UfsAttrDynCapNeeded = 0x09,\r | |
1324 | UfsAttrRefClkFreq = 0x0a,\r | |
1325 | UfsAttrConfigDescLock = 0x0b,\r | |
1326 | UfsAttrMaxNumOfRtt = 0x0c,\r | |
1327 | UfsAttrExceptionEvtCtrl = 0x0d,\r | |
1328 | UfsAttrExceptionEvtSts = 0x0e,\r | |
1329 | UfsAttrSecondsPassed = 0x0f,\r | |
1330 | UfsAttrContextConf = 0x10,\r | |
1331 | UfsAttrCorrPrgBlkNum = 0x11\r | |
1332 | } UFS_ATTR_IDN;\r | |
1333 | \r | |
1334 | typedef enum {\r | |
1335 | UfsNoData = 0,\r | |
1336 | UfsDataOut = 1,\r | |
1337 | UfsDataIn = 2,\r | |
1338 | UfsDdReserved\r | |
1339 | } UFS_DATA_DIRECTION;\r | |
1340 | \r | |
1341 | \r | |
1342 | #pragma pack()\r | |
1343 | \r | |
1344 | #endif\r | |
1345 | \r |