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23c98c94 | 1 | /** @file\r |
e94a9ff7 | 2 | Task priority (TPL) functions.\r |
504214c4 | 3 | \r |
d4848bb9 | 4 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
cd5ebaa0 | 5 | This program and the accompanying materials\r |
23c98c94 | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
28a00297 | 9 | \r |
23c98c94 | 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
28a00297 | 12 | \r |
504214c4 | 13 | **/\r |
28a00297 | 14 | \r |
9c4ac31c | 15 | #include "DxeMain.h"\r |
ec90508b | 16 | #include "Event.h"\r |
162ed594 | 17 | \r |
18 | /**\r | |
19 | Set Interrupt State.\r | |
20 | \r | |
21 | @param Enable The state of enable or disable interrupt\r | |
22 | \r | |
23 | **/\r | |
28a00297 | 24 | VOID\r |
25 | CoreSetInterruptState (\r | |
26 | IN BOOLEAN Enable\r | |
27 | )\r | |
28a00297 | 28 | {\r |
0803854b | 29 | EFI_STATUS Status;\r |
30 | BOOLEAN InSmm;\r | |
31 | \r | |
32 | if (gCpu == NULL) {\r | |
33 | return;\r | |
34 | }\r | |
35 | if (!Enable) {\r | |
36 | gCpu->DisableInterrupt (gCpu);\r | |
37 | return;\r | |
38 | }\r | |
39 | if (gSmmBase2 == NULL) {\r | |
40 | gCpu->EnableInterrupt (gCpu);\r | |
41 | return;\r | |
42 | }\r | |
43 | Status = gSmmBase2->InSmm (gSmmBase2, &InSmm);\r | |
44 | if (!EFI_ERROR (Status) && !InSmm) {\r | |
45 | gCpu->EnableInterrupt(gCpu);\r | |
28a00297 | 46 | }\r |
47 | }\r | |
48 | \r | |
28a00297 | 49 | \r |
162ed594 | 50 | /**\r |
28a00297 | 51 | Raise the task priority level to the new level.\r |
52 | High level is implemented by disabling processor interrupts.\r | |
53 | \r | |
022c6d45 | 54 | @param NewTpl New task priority level\r |
28a00297 | 55 | \r |
162ed594 | 56 | @return The previous task priority level\r |
28a00297 | 57 | \r |
162ed594 | 58 | **/\r |
59 | EFI_TPL\r | |
60 | EFIAPI\r | |
61 | CoreRaiseTpl (\r | |
62 | IN EFI_TPL NewTpl\r | |
63 | )\r | |
28a00297 | 64 | {\r |
65 | EFI_TPL OldTpl;\r | |
66 | \r | |
67 | OldTpl = gEfiCurrentTpl;\r | |
d4848bb9 SZ |
68 | if (OldTpl > NewTpl) {\r |
69 | DEBUG ((EFI_D_ERROR, "FATAL ERROR - RaiseTpl with OldTpl(0x%x) > NewTpl(0x%x)\n", OldTpl, NewTpl));\r | |
70 | ASSERT (FALSE);\r | |
71 | }\r | |
28a00297 | 72 | ASSERT (VALID_TPL (NewTpl));\r |
73 | \r | |
74 | //\r | |
75 | // If raising to high level, disable interrupts\r | |
76 | //\r | |
77 | if (NewTpl >= TPL_HIGH_LEVEL && OldTpl < TPL_HIGH_LEVEL) {\r | |
78 | CoreSetInterruptState (FALSE);\r | |
79 | }\r | |
80 | \r | |
81 | //\r | |
82 | // Set the new value\r | |
83 | //\r | |
84 | gEfiCurrentTpl = NewTpl;\r | |
85 | \r | |
86 | return OldTpl;\r | |
87 | }\r | |
88 | \r | |
89 | \r | |
90 | \r | |
162ed594 | 91 | \r |
92 | /**\r | |
93 | Lowers the task priority to the previous value. If the new\r | |
94 | priority unmasks events at a higher priority, they are dispatched.\r | |
95 | \r | |
96 | @param NewTpl New, lower, task priority\r | |
97 | \r | |
98 | **/\r | |
28a00297 | 99 | VOID\r |
100 | EFIAPI\r | |
101 | CoreRestoreTpl (\r | |
102 | IN EFI_TPL NewTpl\r | |
103 | )\r | |
28a00297 | 104 | {\r |
105 | EFI_TPL OldTpl;\r | |
106 | \r | |
107 | OldTpl = gEfiCurrentTpl;\r | |
d4848bb9 SZ |
108 | if (NewTpl > OldTpl) {\r |
109 | DEBUG ((EFI_D_ERROR, "FATAL ERROR - RestoreTpl with NewTpl(0x%x) > OldTpl(0x%x)\n", NewTpl, OldTpl));\r | |
110 | ASSERT (FALSE);\r | |
111 | }\r | |
28a00297 | 112 | ASSERT (VALID_TPL (NewTpl));\r |
113 | \r | |
114 | //\r | |
115 | // If lowering below HIGH_LEVEL, make sure\r | |
116 | // interrupts are enabled\r | |
117 | //\r | |
118 | \r | |
119 | if (OldTpl >= TPL_HIGH_LEVEL && NewTpl < TPL_HIGH_LEVEL) {\r | |
022c6d45 | 120 | gEfiCurrentTpl = TPL_HIGH_LEVEL;\r |
28a00297 | 121 | }\r |
122 | \r | |
123 | //\r | |
124 | // Dispatch any pending events\r | |
125 | //\r | |
e676c4d0 | 126 | while (((-2 << NewTpl) & gEventPending) != 0) {\r |
cd7bfc2c | 127 | gEfiCurrentTpl = (UINTN) HighBitSet64 (gEventPending);\r |
28a00297 | 128 | if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r |
129 | CoreSetInterruptState (TRUE);\r | |
130 | }\r | |
131 | CoreDispatchEventNotifies (gEfiCurrentTpl);\r | |
132 | }\r | |
133 | \r | |
134 | //\r | |
135 | // Set the new value\r | |
136 | //\r | |
137 | \r | |
138 | gEfiCurrentTpl = NewTpl;\r | |
139 | \r | |
140 | //\r | |
141 | // If lowering below HIGH_LEVEL, make sure\r | |
142 | // interrupts are enabled\r | |
143 | //\r | |
144 | if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r | |
145 | CoreSetInterruptState (TRUE);\r | |
146 | }\r | |
147 | \r | |
148 | }\r |