[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi20.h

/** @file   \r
	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
  Copyright (c) 2006 - 2008, Intel Corporation\r
  All rights reserved. This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
**/\r
\r
#ifndef _ACPI_2_0_H_\r
#define _ACPI_2_0_H_\r
\r
#include <IndustryStandard/Acpi10.h>\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// ACPI 2.0 Generic Address Space definition\r
///\r
typedef struct {\r
  UINT8   AddressSpaceId;\r
  UINT8   RegisterBitWidth;\r
  UINT8   RegisterBitOffset;\r
  UINT8   Reserved;\r
  UINT64  Address;\r
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
\r
#pragma pack()\r
\r
//\r
// Generic Address Space Address IDs\r
//\r
#define EFI_ACPI_2_0_SYSTEM_MEMORY              0\r
#define EFI_ACPI_2_0_SYSTEM_IO                  1\r
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3\r
#define EFI_ACPI_2_0_SMBUS                      4\r
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F\r
\r
//\r
// ACPI 2.0 table structures\r
//\r
\r
///\r
/// Root System Description Pointer Structure\r
///\r
typedef struct {\r
  UINT64  Signature;\r
  UINT8   Checksum;\r
  UINT8   OemId[6];\r
  UINT8   Revision;\r
  UINT32  RsdtAddress;\r
  UINT32  Length;\r
  UINT64  XsdtAddress;\r
  UINT8   ExtendedChecksum;\r
  UINT8   Reserved[3];\r
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
\r
///\r
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
\r
///\r
/// Common table header, this prefaces all ACPI tables, including FACS, but\r
/// excluding the RSD PTR structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
} EFI_ACPI_2_0_COMMON_HEADER;\r
\r
//\r
// Root System Description Table\r
// No definition needed as it is a common description table header, the same with \r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
//\r
\r
///\r
/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
//\r
// Extended System Description Table\r
// No definition needed as it is a common description table header, the same with \r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
//\r
\r
///\r
/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Fixed ACPI Description Table Structure (FADT)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  UINT32                                  FirmwareCtrl;\r
  UINT32                                  Dsdt;\r
  UINT8                                   Reserved0;\r
  UINT8                                   PreferredPmProfile;\r
  UINT16                                  SciInt;\r
  UINT32                                  SmiCmd;\r
  UINT8                                   AcpiEnable;\r
  UINT8                                   AcpiDisable;\r
  UINT8                                   S4BiosReq;\r
  UINT8                                   PstateCnt;\r
  UINT32                                  Pm1aEvtBlk;\r
  UINT32                                  Pm1bEvtBlk;\r
  UINT32                                  Pm1aCntBlk;\r
  UINT32                                  Pm1bCntBlk;\r
  UINT32                                  Pm2CntBlk;\r
  UINT32                                  PmTmrBlk;\r
  UINT32                                  Gpe0Blk;\r
  UINT32                                  Gpe1Blk;\r
  UINT8                                   Pm1EvtLen;\r
  UINT8                                   Pm1CntLen;\r
  UINT8                                   Pm2CntLen;\r
  UINT8                                   PmTmrLen;\r
  UINT8                                   Gpe0BlkLen;\r
  UINT8                                   Gpe1BlkLen;\r
  UINT8                                   Gpe1Base;\r
  UINT8                                   CstCnt;\r
  UINT16                                  PLvl2Lat;\r
  UINT16                                  PLvl3Lat;\r
  UINT16                                  FlushSize;\r
  UINT16                                  FlushStride;\r
  UINT8                                   DutyOffset;\r
  UINT8                                   DutyWidth;\r
  UINT8                                   DayAlrm;\r
  UINT8                                   MonAlrm;\r
  UINT8                                   Century;\r
  UINT16                                  IaPcBootArch;\r
  UINT8                                   Reserved1;\r
  UINT32                                  Flags;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;\r
  UINT8                                   ResetValue;\r
  UINT8                                   Reserved2[3];\r
  UINT64                                  XFirmwareCtrl;\r
  UINT64                                  XDsdt;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;\r
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
\r
///\r
/// FADT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
\r
//\r
// Fixed ACPI Description Table Boot Architecture Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_LEGACY_DEVICES          BIT0\r
#define EFI_ACPI_2_0_8042                    BIT1\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_WBINVD                  BIT0\r
#define EFI_ACPI_2_0_WBINVD_FLUSH            BIT1\r
#define EFI_ACPI_2_0_PROC_C1                 BIT2\r
#define EFI_ACPI_2_0_P_LVL2_UP               BIT3\r
#define EFI_ACPI_2_0_PWR_BUTTON              BIT4\r
#define EFI_ACPI_2_0_SLP_BUTTON              BIT5\r
#define EFI_ACPI_2_0_FIX_RTC                 BIT6\r
#define EFI_ACPI_2_0_RTC_S4                  BIT7\r
#define EFI_ACPI_2_0_TMR_VAL_EXT             BIT8\r
#define EFI_ACPI_2_0_DCK_CAP                 BIT9\r
#define EFI_ACPI_2_0_RESET_REG_SUP           BIT10\r
#define EFI_ACPI_2_0_SEALED_CASE             BIT11\r
#define EFI_ACPI_2_0_HEADLESS                BIT12\r
#define EFI_ACPI_2_0_CPU_SW_SLP              BIT13\r
\r
///\r
/// Firmware ACPI Control Structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
  UINT32  HardwareSignature;\r
  UINT32  FirmwareWakingVector;\r
  UINT32  GlobalLock;\r
  UINT32  Flags;\r
  UINT64  XFirmwareWakingVector;\r
  UINT8   Version;\r
  UINT8   Reserved[31];\r
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// FACS Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01\r
\r
///\r
/// Firmware Control Structure Feature Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_S4BIOS_F        BIT0\r
\r
///\r
/// Multiple APIC Description Table header definition.  The rest of the table\r
/// must be defined in a platform specific manner.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      LocalApicAddress;\r
  UINT32                      Flags;\r
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Multiple APIC Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_PCAT_COMPAT          BIT0\r
\r
//\r
// Multiple APIC Description Table APIC structure types\r
// All other values between 0x09 an 0xFF are reserved and\r
// will be ignored by OSPM.\r
//\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00\r
#define EFI_ACPI_2_0_IO_APIC                        0x01\r
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02\r
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03\r
#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04\r
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05\r
#define EFI_ACPI_2_0_IO_SAPIC                       0x06\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07\r
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08\r
\r
//\r
// APIC Structure Definitions\r
//\r
\r
///\r
/// Processor Local APIC Structure Definition\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   ApicId;\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags.  All other bits are reserved and must be 0.\r
///\r
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED         BIT0\r
\r
///\r
/// IO APIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  IoApicAddress;\r
  UINT32  GlobalSystemInterruptBase;\r
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
\r
///\r
/// Interrupt Source Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   Bus;\r
  UINT8   Source;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT16  Flags;\r
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
\r
///\r
/// Non-Maskable Interrupt Source Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT32  GlobalSystemInterrupt;\r
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// Local APIC NMI Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT16  Flags;\r
  UINT8   LocalApicLint;\r
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
\r
///\r
/// Local APIC Address Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Reserved;\r
  UINT64  LocalApicAddress;\r
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
\r
#pragma pack()\r
\r
///\r
/// IO SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  GlobalSystemInterruptBase;\r
  UINT64  IoSapicAddress;\r
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
\r
///\r
/// Local SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   LocalSapicId;\r
  UINT8   LocalSapicEid;\r
  UINT8   Reserved[3];\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
\r
///\r
/// Platform Interrupt Sources Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT8   InterruptType;\r
  UINT8   ProcessorId;\r
  UINT8   ProcessorEid;\r
  UINT8   IoSapicVector;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT32  Reserved;\r
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
\r
///\r
/// Smart Battery Description Table (SBST)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      WarningEnergyLevel;\r
  UINT32                      LowEnergyLevel;\r
  UINT32                      CriticalEnergyLevel;\r
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
\r
///\r
/// SBST Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Embedded Controller Boot Resources Table (ECDT)\r
/// The table is followed by a null terminated ASCII string that contains\r
/// a fully qualified reference to the name space object.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;\r
  UINT32                                  Uid;\r
  UINT8                                   GpeBit;\r
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
\r
///\r
/// ECDT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01\r
\r
//\r
// Known table signatures\r
//\r
\r
///\r
/// "RSD PTR " Root System Description Pointer\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
\r
///\r
/// "SPIC" Multiple SAPIC Description Table\r
///\r
/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'I', 'C')\r
\r
///\r
/// "BOOT" MS Simple Boot Spec\r
///\r
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')\r
\r
///\r
/// "DBGP" MS Bebug Port Spec\r
///\r
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')\r
\r
///\r
/// "DSDT" Differentiated System Description Table\r
///\r
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')\r
\r
///\r
/// "ECDT" Embedded Controller Boot Resources Table\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')\r
\r
///\r
/// "ETDT" Event Timer Description Table\r
///\r
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')\r
\r
///\r
/// "FACS" Firmware ACPI Control Structure\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')\r
\r
///\r
/// "FACP" Fixed ACPI Description Table\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')\r
\r
///\r
/// "APIC" Multiple APIC Description Table\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')\r
\r
///\r
/// "PSDT" Persistent System Description Table\r
///\r
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')\r
\r
///\r
/// "RSDT" Root System Description Table\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')\r
\r
///\r
/// "SBST" Smart Battery Specification Table\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')\r
\r
///\r
/// "SLIT" System Locality Information Table\r
///\r
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')\r
\r
///\r
/// "SPCR" Serial Port Concole Redirection Table\r
///\r
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')\r
\r
///\r
/// "SRAT" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')\r
\r
///\r
/// "SSDT" Secondary System Description Table\r
///\r
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')\r
\r
///\r
/// "SPMI" Server Platform Management Interface Table\r
///\r
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')\r
\r
///\r
/// "XSDT" Extended System Description Table\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')\r
\r
///\r
/// "MCFG" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')\r
\r
#endif\r
Commit	Line	Data
42eedea9	1	/** @file \r
568eb0cb	2	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
568eb0cb	3	\r
2b1cf49a	4	Copyright (c) 2006 - 2008, Intel Corporation\r
568eb0cb	5	All rights reserved. This program and the accompanying materials \r
	6	are licensed and made available under the terms and conditions of the BSD License \r
	7	which accompanies this distribution. The full text of the license may be found at \r
	8	http://opensource.org/licenses/bsd-license.php \r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	12	**/\r
	13	\r
	14	#ifndef _ACPI_2_0_H_\r
	15	#define _ACPI_2_0_H_\r
	16	\r
732fb201	17	#include <IndustryStandard/Acpi10.h>\r
568eb0cb	18	\r
	19	//\r
	20	// Ensure proper structure formats\r
	21	//\r
	22	#pragma pack(1)\r
568eb0cb	23	\r
1bc5d021	24	///\r
	25	/// ACPI 2.0 Generic Address Space definition\r
	26	///\r
568eb0cb	27	typedef struct {\r
	28	UINT8 AddressSpaceId;\r
	29	UINT8 RegisterBitWidth;\r
	30	UINT8 RegisterBitOffset;\r
	31	UINT8 Reserved;\r
	32	UINT64 Address;\r
	33	} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
	34	\r
55c11cc8	35	#pragma pack()\r
55c11cc8	36	\r
568eb0cb	37	//\r
	38	// Generic Address Space Address IDs\r
	39	//\r
	40	#define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r
	41	#define EFI_ACPI_2_0_SYSTEM_IO 1\r
	42	#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r
	43	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r
	44	#define EFI_ACPI_2_0_SMBUS 4\r
	45	#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
	46	\r
	47	//\r
	48	// ACPI 2.0 table structures\r
	49	//\r
1bc5d021	50	\r
	51	///\r
	52	/// Root System Description Pointer Structure\r
	53	///\r
568eb0cb	54	typedef struct {\r
	55	UINT64 Signature;\r
	56	UINT8 Checksum;\r
	57	UINT8 OemId[6];\r
	58	UINT8 Revision;\r
	59	UINT32 RsdtAddress;\r
	60	UINT32 Length;\r
	61	UINT64 XsdtAddress;\r
	62	UINT8 ExtendedChecksum;\r
	63	UINT8 Reserved[3];\r
	64	} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
	65	\r
1bc5d021	66	///\r
	67	/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
	68	///\r
568eb0cb	69	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
568eb0cb	70	\r
1bc5d021	71	///\r
	72	/// Common table header, this prefaces all ACPI tables, including FACS, but\r
	73	/// excluding the RSD PTR structure\r
	74	///\r
568eb0cb	75	typedef struct {\r
	76	UINT32 Signature;\r
	77	UINT32 Length;\r
	78	} EFI_ACPI_2_0_COMMON_HEADER;\r
	79	\r
	80	//\r
	81	// Root System Description Table\r
2b1cf49a	82	// No definition needed as it is a common description table header, the same with \r
2b1cf49a	83	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
568eb0cb	84	//\r
1bc5d021	85	\r
	86	///\r
	87	/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
	88	///\r
568eb0cb	89	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
	90	\r
	91	//\r
	92	// Extended System Description Table\r
2b1cf49a	93	// No definition needed as it is a common description table header, the same with \r
2b1cf49a	94	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
568eb0cb	95	//\r
1bc5d021	96	\r
	97	///\r
	98	/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
	99	///\r
568eb0cb	100	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	101	\r
1bc5d021	102	///\r
	103	/// Fixed ACPI Description Table Structure (FADT)\r
	104	///\r
568eb0cb	105	typedef struct {\r
	106	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	107	UINT32 FirmwareCtrl;\r
	108	UINT32 Dsdt;\r
	109	UINT8 Reserved0;\r
	110	UINT8 PreferredPmProfile;\r
	111	UINT16 SciInt;\r
	112	UINT32 SmiCmd;\r
	113	UINT8 AcpiEnable;\r
	114	UINT8 AcpiDisable;\r
	115	UINT8 S4BiosReq;\r
	116	UINT8 PstateCnt;\r
	117	UINT32 Pm1aEvtBlk;\r
	118	UINT32 Pm1bEvtBlk;\r
	119	UINT32 Pm1aCntBlk;\r
	120	UINT32 Pm1bCntBlk;\r
	121	UINT32 Pm2CntBlk;\r
	122	UINT32 PmTmrBlk;\r
	123	UINT32 Gpe0Blk;\r
	124	UINT32 Gpe1Blk;\r
	125	UINT8 Pm1EvtLen;\r
	126	UINT8 Pm1CntLen;\r
	127	UINT8 Pm2CntLen;\r
	128	UINT8 PmTmrLen;\r
	129	UINT8 Gpe0BlkLen;\r
	130	UINT8 Gpe1BlkLen;\r
	131	UINT8 Gpe1Base;\r
	132	UINT8 CstCnt;\r
	133	UINT16 PLvl2Lat;\r
	134	UINT16 PLvl3Lat;\r
	135	UINT16 FlushSize;\r
	136	UINT16 FlushStride;\r
	137	UINT8 DutyOffset;\r
	138	UINT8 DutyWidth;\r
	139	UINT8 DayAlrm;\r
	140	UINT8 MonAlrm;\r
	141	UINT8 Century;\r
	142	UINT16 IaPcBootArch;\r
	143	UINT8 Reserved1;\r
	144	UINT32 Flags;\r
	145	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
	146	UINT8 ResetValue;\r
	147	UINT8 Reserved2[3];\r
	148	UINT64 XFirmwareCtrl;\r
	149	UINT64 XDsdt;\r
	150	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
	151	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
	152	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
	153	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
	154	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
	155	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
	156	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
	157	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
	158	} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
	159	\r
1bc5d021	160	///\r
	161	/// FADT Version (as defined in ACPI 2.0 spec.)\r
	162	///\r
568eb0cb	163	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
568eb0cb	164	\r
55c11cc8	165	//\r
	166	// Fixed ACPI Description Table Boot Architecture Flags\r
	167	// All other bits are reserved and must be set to 0.\r
	168	//\r
	169	#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0\r
	170	#define EFI_ACPI_2_0_8042 BIT1\r
568eb0cb	171	\r
	172	//\r
	173	// Fixed ACPI Description Table Fixed Feature Flags\r
	174	// All other bits are reserved and must be set to 0.\r
	175	//\r
55c11cc8	176	#define EFI_ACPI_2_0_WBINVD BIT0\r
	177	#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1\r
	178	#define EFI_ACPI_2_0_PROC_C1 BIT2\r
	179	#define EFI_ACPI_2_0_P_LVL2_UP BIT3\r
	180	#define EFI_ACPI_2_0_PWR_BUTTON BIT4\r
	181	#define EFI_ACPI_2_0_SLP_BUTTON BIT5\r
	182	#define EFI_ACPI_2_0_FIX_RTC BIT6\r
	183	#define EFI_ACPI_2_0_RTC_S4 BIT7\r
	184	#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8\r
	185	#define EFI_ACPI_2_0_DCK_CAP BIT9\r
	186	#define EFI_ACPI_2_0_RESET_REG_SUP BIT10\r
	187	#define EFI_ACPI_2_0_SEALED_CASE BIT11\r
	188	#define EFI_ACPI_2_0_HEADLESS BIT12\r
	189	#define EFI_ACPI_2_0_CPU_SW_SLP BIT13\r
568eb0cb	190	\r
1bc5d021	191	///\r
	192	/// Firmware ACPI Control Structure\r
	193	///\r
568eb0cb	194	typedef struct {\r
	195	UINT32 Signature;\r
	196	UINT32 Length;\r
	197	UINT32 HardwareSignature;\r
	198	UINT32 FirmwareWakingVector;\r
	199	UINT32 GlobalLock;\r
	200	UINT32 Flags;\r
	201	UINT64 XFirmwareWakingVector;\r
	202	UINT8 Version;\r
	203	UINT8 Reserved[31];\r
	204	} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
	205	\r
1bc5d021	206	///\r
	207	/// FACS Version (as defined in ACPI 2.0 spec.)\r
	208	///\r
568eb0cb	209	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r
568eb0cb	210	\r
1bc5d021	211	///\r
	212	/// Firmware Control Structure Feature Flags\r
	213	/// All other bits are reserved and must be set to 0.\r
	214	///\r
55c11cc8	215	#define EFI_ACPI_2_0_S4BIOS_F BIT0\r
568eb0cb	216	\r
1bc5d021	217	///\r
	218	/// Multiple APIC Description Table header definition. The rest of the table\r
	219	/// must be defined in a platform specific manner.\r
	220	///\r
568eb0cb	221	typedef struct {\r
	222	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	223	UINT32 LocalApicAddress;\r
	224	UINT32 Flags;\r
	225	} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
	226	\r
1bc5d021	227	///\r
	228	/// MADT Revision (as defined in ACPI 2.0 spec.)\r
	229	///\r
568eb0cb	230	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	231	\r
1bc5d021	232	///\r
	233	/// Multiple APIC Flags\r
	234	/// All other bits are reserved and must be set to 0.\r
	235	///\r
55c11cc8	236	#define EFI_ACPI_2_0_PCAT_COMPAT BIT0\r
568eb0cb	237	\r
	238	//\r
	239	// Multiple APIC Description Table APIC structure types\r
	240	// All other values between 0x09 an 0xFF are reserved and\r
	241	// will be ignored by OSPM.\r
	242	//\r
	243	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r
	244	#define EFI_ACPI_2_0_IO_APIC 0x01\r
	245	#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
	246	#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
	247	#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r
	248	#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
	249	#define EFI_ACPI_2_0_IO_SAPIC 0x06\r
	250	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r
	251	#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
	252	\r
	253	//\r
	254	// APIC Structure Definitions\r
	255	//\r
1bc5d021	256	\r
	257	///\r
	258	/// Processor Local APIC Structure Definition\r
	259	///\r
568eb0cb	260	typedef struct {\r
	261	UINT8 Type;\r
	262	UINT8 Length;\r
	263	UINT8 AcpiProcessorId;\r
	264	UINT8 ApicId;\r
	265	UINT32 Flags;\r
	266	} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
	267	\r
1bc5d021	268	///\r
	269	/// Local APIC Flags. All other bits are reserved and must be 0.\r
	270	///\r
55c11cc8	271	#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0\r
568eb0cb	272	\r
1bc5d021	273	///\r
	274	/// IO APIC Structure\r
	275	///\r
568eb0cb	276	typedef struct {\r
	277	UINT8 Type;\r
	278	UINT8 Length;\r
	279	UINT8 IoApicId;\r
	280	UINT8 Reserved;\r
	281	UINT32 IoApicAddress;\r
	282	UINT32 GlobalSystemInterruptBase;\r
	283	} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
	284	\r
1bc5d021	285	///\r
	286	/// Interrupt Source Override Structure\r
	287	///\r
568eb0cb	288	typedef struct {\r
	289	UINT8 Type;\r
	290	UINT8 Length;\r
	291	UINT8 Bus;\r
	292	UINT8 Source;\r
	293	UINT32 GlobalSystemInterrupt;\r
	294	UINT16 Flags;\r
	295	} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
	296	\r
1bc5d021	297	///\r
	298	/// Non-Maskable Interrupt Source Structure\r
	299	///\r
568eb0cb	300	typedef struct {\r
	301	UINT8 Type;\r
	302	UINT8 Length;\r
	303	UINT16 Flags;\r
	304	UINT32 GlobalSystemInterrupt;\r
	305	} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
	306	\r
55c11cc8	307	//\r
	308	// Ensure proper structure formats\r
	309	//\r
	310	#pragma pack(1)\r
	311	\r
1bc5d021	312	///\r
	313	/// Local APIC NMI Structure\r
	314	///\r
568eb0cb	315	typedef struct {\r
	316	UINT8 Type;\r
	317	UINT8 Length;\r
	318	UINT8 AcpiProcessorId;\r
	319	UINT16 Flags;\r
	320	UINT8 LocalApicLint;\r
	321	} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
	322	\r
1bc5d021	323	///\r
	324	/// Local APIC Address Override Structure\r
	325	///\r
568eb0cb	326	typedef struct {\r
	327	UINT8 Type;\r
	328	UINT8 Length;\r
	329	UINT16 Reserved;\r
	330	UINT64 LocalApicAddress;\r
	331	} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
	332	\r
55c11cc8	333	#pragma pack()\r
55c11cc8	334	\r
1bc5d021	335	///\r
	336	/// IO SAPIC Structure\r
	337	///\r
568eb0cb	338	typedef struct {\r
	339	UINT8 Type;\r
	340	UINT8 Length;\r
	341	UINT8 IoApicId;\r
	342	UINT8 Reserved;\r
	343	UINT32 GlobalSystemInterruptBase;\r
	344	UINT64 IoSapicAddress;\r
	345	} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
	346	\r
1bc5d021	347	///\r
	348	/// Local SAPIC Structure\r
	349	///\r
568eb0cb	350	typedef struct {\r
	351	UINT8 Type;\r
	352	UINT8 Length;\r
	353	UINT8 AcpiProcessorId;\r
	354	UINT8 LocalSapicId;\r
	355	UINT8 LocalSapicEid;\r
	356	UINT8 Reserved[3];\r
	357	UINT32 Flags;\r
	358	} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
	359	\r
1bc5d021	360	///\r
	361	/// Platform Interrupt Sources Structure\r
	362	///\r
568eb0cb	363	typedef struct {\r
	364	UINT8 Type;\r
	365	UINT8 Length;\r
	366	UINT16 Flags;\r
	367	UINT8 InterruptType;\r
	368	UINT8 ProcessorId;\r
	369	UINT8 ProcessorEid;\r
	370	UINT8 IoSapicVector;\r
	371	UINT32 GlobalSystemInterrupt;\r
	372	UINT32 Reserved;\r
	373	} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
	374	\r
1bc5d021	375	///\r
	376	/// Smart Battery Description Table (SBST)\r
	377	///\r
568eb0cb	378	typedef struct {\r
	379	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	380	UINT32 WarningEnergyLevel;\r
	381	UINT32 LowEnergyLevel;\r
	382	UINT32 CriticalEnergyLevel;\r
	383	} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
	384	\r
1bc5d021	385	///\r
	386	/// SBST Version (as defined in ACPI 2.0 spec.)\r
	387	///\r
568eb0cb	388	#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	389	\r
1bc5d021	390	///\r
	391	/// Embedded Controller Boot Resources Table (ECDT)\r
	392	/// The table is followed by a null terminated ASCII string that contains\r
	393	/// a fully qualified reference to the name space object.\r
	394	///\r
568eb0cb	395	typedef struct {\r
	396	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	397	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
	398	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
	399	UINT32 Uid;\r
	400	UINT8 GpeBit;\r
	401	} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
	402	\r
1bc5d021	403	///\r
	404	/// ECDT Version (as defined in ACPI 2.0 spec.)\r
	405	///\r
568eb0cb	406	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
	407	\r
	408	//\r
	409	// Known table signatures\r
	410	//\r
1bc5d021	411	\r
	412	///\r
	413	/// "RSD PTR " Root System Description Pointer\r
	414	///\r
13c31065	415	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
568eb0cb	416	\r
1bc5d021	417	///\r
	418	/// "SPIC" Multiple SAPIC Description Table\r
	419	///\r
	420	/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
	421	/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
	422	///\r
13c31065	423	#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'I', 'C')\r
568eb0cb	424	\r
1bc5d021	425	///\r
	426	/// "BOOT" MS Simple Boot Spec\r
	427	///\r
13c31065	428	#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
568eb0cb	429	\r
1bc5d021	430	///\r
	431	/// "DBGP" MS Bebug Port Spec\r
	432	///\r
13c31065	433	#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
568eb0cb	434	\r
1bc5d021	435	///\r
	436	/// "DSDT" Differentiated System Description Table\r
	437	///\r
13c31065	438	#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
568eb0cb	439	\r
1bc5d021	440	///\r
	441	/// "ECDT" Embedded Controller Boot Resources Table\r
	442	///\r
13c31065	443	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
568eb0cb	444	\r
1bc5d021	445	///\r
	446	/// "ETDT" Event Timer Description Table\r
	447	///\r
13c31065	448	#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
568eb0cb	449	\r
1bc5d021	450	///\r
	451	/// "FACS" Firmware ACPI Control Structure\r
	452	///\r
13c31065	453	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
568eb0cb	454	\r
1bc5d021	455	///\r
	456	/// "FACP" Fixed ACPI Description Table\r
	457	///\r
13c31065	458	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
568eb0cb	459	\r
1bc5d021	460	///\r
	461	/// "APIC" Multiple APIC Description Table\r
	462	///\r
13c31065	463	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
568eb0cb	464	\r
1bc5d021	465	///\r
	466	/// "PSDT" Persistent System Description Table\r
	467	///\r
13c31065	468	#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
568eb0cb	469	\r
1bc5d021	470	///\r
	471	/// "RSDT" Root System Description Table\r
	472	///\r
13c31065	473	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
568eb0cb	474	\r
1bc5d021	475	///\r
	476	/// "SBST" Smart Battery Specification Table\r
	477	///\r
13c31065	478	#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
568eb0cb	479	\r
1bc5d021	480	///\r
	481	/// "SLIT" System Locality Information Table\r
	482	///\r
13c31065	483	#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
568eb0cb	484	\r
1bc5d021	485	///\r
	486	/// "SPCR" Serial Port Concole Redirection Table\r
	487	///\r
13c31065	488	#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
568eb0cb	489	\r
1bc5d021	490	///\r
	491	/// "SRAT" Static Resource Affinity Table\r
	492	///\r
13c31065	493	#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
568eb0cb	494	\r
1bc5d021	495	///\r
	496	/// "SSDT" Secondary System Description Table\r
	497	///\r
13c31065	498	#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
568eb0cb	499	\r
1bc5d021	500	///\r
	501	/// "SPMI" Server Platform Management Interface Table\r
	502	///\r
13c31065	503	#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
568eb0cb	504	\r
1bc5d021	505	///\r
	506	/// "XSDT" Extended System Description Table\r
	507	///\r
13c31065	508	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
568eb0cb	509	\r
1bc5d021	510	///\r
	511	/// "MCFG" Static Resource Affinity Table\r
	512	///\r
13c31065	513	#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
3431f363	514	\r
568eb0cb	515	#endif\r