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9095d37b | 1 | /** @file\r |
b84621bc | 2 | ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.\r |
f449affe | 3 | \r |
a71c80b6 | 4 | Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>\r |
9095d37b | 5 | Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r |
8a2270a6 | 6 | (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r |
9095d37b LG |
7 | This program and the accompanying materials\r |
8 | are licensed and made available under the terms and conditions of the BSD License\r | |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
10 | http://opensource.org/licenses/bsd-license.php\r | |
f449affe | 11 | \r |
9095d37b LG |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
f449affe JY |
14 | **/\r |
15 | \r | |
16 | #ifndef _ACPI_5_1_H_\r | |
17 | #define _ACPI_5_1_H_\r | |
18 | \r | |
19 | #include <IndustryStandard/Acpi50.h>\r | |
20 | \r | |
21 | //\r | |
22 | // Ensure proper structure formats\r | |
23 | //\r | |
24 | #pragma pack(1)\r | |
25 | \r | |
26 | ///\r | |
27 | /// ACPI 5.1 Generic Address Space definition\r | |
28 | ///\r | |
29 | typedef struct {\r | |
30 | UINT8 AddressSpaceId;\r | |
31 | UINT8 RegisterBitWidth;\r | |
32 | UINT8 RegisterBitOffset;\r | |
33 | UINT8 AccessSize;\r | |
34 | UINT64 Address;\r | |
35 | } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;\r | |
36 | \r | |
37 | //\r | |
38 | // Generic Address Space Address IDs\r | |
39 | //\r | |
40 | #define EFI_ACPI_5_1_SYSTEM_MEMORY 0\r | |
41 | #define EFI_ACPI_5_1_SYSTEM_IO 1\r | |
42 | #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2\r | |
43 | #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3\r | |
44 | #define EFI_ACPI_5_1_SMBUS 4\r | |
45 | #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r | |
46 | #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F\r | |
47 | \r | |
48 | //\r | |
49 | // Generic Address Space Access Sizes\r | |
50 | //\r | |
51 | #define EFI_ACPI_5_1_UNDEFINED 0\r | |
52 | #define EFI_ACPI_5_1_BYTE 1\r | |
53 | #define EFI_ACPI_5_1_WORD 2\r | |
54 | #define EFI_ACPI_5_1_DWORD 3\r | |
55 | #define EFI_ACPI_5_1_QWORD 4\r | |
56 | \r | |
57 | //\r | |
58 | // ACPI 5.1 table structures\r | |
59 | //\r | |
60 | \r | |
61 | ///\r | |
62 | /// Root System Description Pointer Structure\r | |
63 | ///\r | |
64 | typedef struct {\r | |
65 | UINT64 Signature;\r | |
66 | UINT8 Checksum;\r | |
67 | UINT8 OemId[6];\r | |
68 | UINT8 Revision;\r | |
69 | UINT32 RsdtAddress;\r | |
70 | UINT32 Length;\r | |
71 | UINT64 XsdtAddress;\r | |
72 | UINT8 ExtendedChecksum;\r | |
73 | UINT8 Reserved[3];\r | |
74 | } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;\r | |
75 | \r | |
76 | ///\r | |
77 | /// RSD_PTR Revision (as defined in ACPI 5.1 spec.)\r | |
78 | ///\r | |
79 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2\r | |
80 | \r | |
81 | ///\r | |
82 | /// Common table header, this prefaces all ACPI tables, including FACS, but\r | |
83 | /// excluding the RSD PTR structure\r | |
84 | ///\r | |
85 | typedef struct {\r | |
86 | UINT32 Signature;\r | |
87 | UINT32 Length;\r | |
88 | } EFI_ACPI_5_1_COMMON_HEADER;\r | |
89 | \r | |
90 | //\r | |
91 | // Root System Description Table\r | |
9095d37b | 92 | // No definition needed as it is a common description table header, the same with\r |
f449affe JY |
93 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r |
94 | //\r | |
95 | \r | |
96 | ///\r | |
97 | /// RSDT Revision (as defined in ACPI 5.1 spec.)\r | |
98 | ///\r | |
99 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r | |
100 | \r | |
101 | //\r | |
102 | // Extended System Description Table\r | |
9095d37b | 103 | // No definition needed as it is a common description table header, the same with\r |
f449affe JY |
104 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r |
105 | //\r | |
106 | \r | |
107 | ///\r | |
108 | /// XSDT Revision (as defined in ACPI 5.1 spec.)\r | |
109 | ///\r | |
110 | #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r | |
111 | \r | |
112 | ///\r | |
113 | /// Fixed ACPI Description Table Structure (FADT)\r | |
114 | ///\r | |
115 | typedef struct {\r | |
116 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
117 | UINT32 FirmwareCtrl;\r | |
118 | UINT32 Dsdt;\r | |
119 | UINT8 Reserved0;\r | |
120 | UINT8 PreferredPmProfile;\r | |
121 | UINT16 SciInt;\r | |
122 | UINT32 SmiCmd;\r | |
123 | UINT8 AcpiEnable;\r | |
124 | UINT8 AcpiDisable;\r | |
125 | UINT8 S4BiosReq;\r | |
126 | UINT8 PstateCnt;\r | |
127 | UINT32 Pm1aEvtBlk;\r | |
128 | UINT32 Pm1bEvtBlk;\r | |
129 | UINT32 Pm1aCntBlk;\r | |
130 | UINT32 Pm1bCntBlk;\r | |
131 | UINT32 Pm2CntBlk;\r | |
132 | UINT32 PmTmrBlk;\r | |
133 | UINT32 Gpe0Blk;\r | |
134 | UINT32 Gpe1Blk;\r | |
135 | UINT8 Pm1EvtLen;\r | |
136 | UINT8 Pm1CntLen;\r | |
137 | UINT8 Pm2CntLen;\r | |
138 | UINT8 PmTmrLen;\r | |
139 | UINT8 Gpe0BlkLen;\r | |
140 | UINT8 Gpe1BlkLen;\r | |
141 | UINT8 Gpe1Base;\r | |
142 | UINT8 CstCnt;\r | |
143 | UINT16 PLvl2Lat;\r | |
144 | UINT16 PLvl3Lat;\r | |
145 | UINT16 FlushSize;\r | |
146 | UINT16 FlushStride;\r | |
147 | UINT8 DutyOffset;\r | |
148 | UINT8 DutyWidth;\r | |
149 | UINT8 DayAlrm;\r | |
150 | UINT8 MonAlrm;\r | |
151 | UINT8 Century;\r | |
152 | UINT16 IaPcBootArch;\r | |
153 | UINT8 Reserved1;\r | |
154 | UINT32 Flags;\r | |
155 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;\r | |
156 | UINT8 ResetValue;\r | |
157 | UINT16 ArmBootArch;\r | |
158 | UINT8 MinorVersion;\r | |
159 | UINT64 XFirmwareCtrl;\r | |
160 | UINT64 XDsdt;\r | |
161 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r | |
162 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r | |
163 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r | |
164 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r | |
165 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r | |
166 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r | |
167 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r | |
168 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r | |
169 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r | |
170 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r | |
171 | } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;\r | |
172 | \r | |
173 | ///\r | |
174 | /// FADT Version (as defined in ACPI 5.1 spec.)\r | |
175 | ///\r | |
176 | #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r | |
177 | #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01\r | |
178 | \r | |
179 | //\r | |
180 | // Fixed ACPI Description Table Preferred Power Management Profile\r | |
181 | //\r | |
182 | #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0\r | |
183 | #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1\r | |
184 | #define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2\r | |
185 | #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3\r | |
186 | #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4\r | |
187 | #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5\r | |
188 | #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6\r | |
189 | #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7\r | |
190 | #define EFI_ACPI_5_1_PM_PROFILE_TABLET 8\r | |
191 | \r | |
192 | //\r | |
193 | // Fixed ACPI Description Table Boot Architecture Flags\r | |
194 | // All other bits are reserved and must be set to 0.\r | |
195 | //\r | |
196 | #define EFI_ACPI_5_1_LEGACY_DEVICES BIT0\r | |
197 | #define EFI_ACPI_5_1_8042 BIT1\r | |
198 | #define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2\r | |
199 | #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3\r | |
200 | #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4\r | |
201 | #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5\r | |
202 | \r | |
203 | //\r | |
204 | // Fixed ACPI Description Table Arm Boot Architecture Flags\r | |
205 | // All other bits are reserved and must be set to 0.\r | |
206 | //\r | |
207 | #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0\r | |
208 | #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1\r | |
209 | \r | |
210 | //\r | |
211 | // Fixed ACPI Description Table Fixed Feature Flags\r | |
212 | // All other bits are reserved and must be set to 0.\r | |
213 | //\r | |
214 | #define EFI_ACPI_5_1_WBINVD BIT0\r | |
215 | #define EFI_ACPI_5_1_WBINVD_FLUSH BIT1\r | |
216 | #define EFI_ACPI_5_1_PROC_C1 BIT2\r | |
217 | #define EFI_ACPI_5_1_P_LVL2_UP BIT3\r | |
218 | #define EFI_ACPI_5_1_PWR_BUTTON BIT4\r | |
219 | #define EFI_ACPI_5_1_SLP_BUTTON BIT5\r | |
220 | #define EFI_ACPI_5_1_FIX_RTC BIT6\r | |
221 | #define EFI_ACPI_5_1_RTC_S4 BIT7\r | |
222 | #define EFI_ACPI_5_1_TMR_VAL_EXT BIT8\r | |
223 | #define EFI_ACPI_5_1_DCK_CAP BIT9\r | |
224 | #define EFI_ACPI_5_1_RESET_REG_SUP BIT10\r | |
225 | #define EFI_ACPI_5_1_SEALED_CASE BIT11\r | |
226 | #define EFI_ACPI_5_1_HEADLESS BIT12\r | |
227 | #define EFI_ACPI_5_1_CPU_SW_SLP BIT13\r | |
228 | #define EFI_ACPI_5_1_PCI_EXP_WAK BIT14\r | |
229 | #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15\r | |
230 | #define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16\r | |
231 | #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17\r | |
232 | #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18\r | |
233 | #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r | |
234 | #define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20\r | |
235 | #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21\r | |
236 | \r | |
237 | ///\r | |
238 | /// Firmware ACPI Control Structure\r | |
239 | ///\r | |
240 | typedef struct {\r | |
241 | UINT32 Signature;\r | |
242 | UINT32 Length;\r | |
243 | UINT32 HardwareSignature;\r | |
244 | UINT32 FirmwareWakingVector;\r | |
245 | UINT32 GlobalLock;\r | |
246 | UINT32 Flags;\r | |
247 | UINT64 XFirmwareWakingVector;\r | |
248 | UINT8 Version;\r | |
249 | UINT8 Reserved0[3];\r | |
250 | UINT32 OspmFlags;\r | |
251 | UINT8 Reserved1[24];\r | |
252 | } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r | |
253 | \r | |
254 | ///\r | |
255 | /// FACS Version (as defined in ACPI 5.1 spec.)\r | |
256 | ///\r | |
257 | #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r | |
258 | \r | |
259 | ///\r | |
260 | /// Firmware Control Structure Feature Flags\r | |
261 | /// All other bits are reserved and must be set to 0.\r | |
262 | ///\r | |
263 | #define EFI_ACPI_5_1_S4BIOS_F BIT0\r | |
264 | #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1\r | |
265 | \r | |
266 | ///\r | |
267 | /// OSPM Enabled Firmware Control Structure Flags\r | |
268 | /// All other bits are reserved and must be set to 0.\r | |
269 | ///\r | |
270 | #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0\r | |
271 | \r | |
272 | //\r | |
273 | // Differentiated System Description Table,\r | |
274 | // Secondary System Description Table\r | |
275 | // and Persistent System Description Table,\r | |
276 | // no definition needed as they are common description table header, the same with\r | |
277 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r | |
278 | //\r | |
279 | #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r | |
280 | #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r | |
281 | \r | |
282 | ///\r | |
283 | /// Multiple APIC Description Table header definition. The rest of the table\r | |
284 | /// must be defined in a platform specific manner.\r | |
285 | ///\r | |
286 | typedef struct {\r | |
287 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
288 | UINT32 LocalApicAddress;\r | |
289 | UINT32 Flags;\r | |
290 | } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r | |
291 | \r | |
292 | ///\r | |
293 | /// MADT Revision (as defined in ACPI 5.1 spec.)\r | |
294 | ///\r | |
295 | #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r | |
296 | \r | |
297 | ///\r | |
298 | /// Multiple APIC Flags\r | |
299 | /// All other bits are reserved and must be set to 0.\r | |
300 | ///\r | |
301 | #define EFI_ACPI_5_1_PCAT_COMPAT BIT0\r | |
302 | \r | |
303 | //\r | |
304 | // Multiple APIC Description Table APIC structure types\r | |
305 | // All other values between 0x0D and 0x7F are reserved and\r | |
306 | // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r | |
307 | //\r | |
308 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00\r | |
309 | #define EFI_ACPI_5_1_IO_APIC 0x01\r | |
310 | #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02\r | |
311 | #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r | |
312 | #define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04\r | |
313 | #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r | |
314 | #define EFI_ACPI_5_1_IO_SAPIC 0x06\r | |
315 | #define EFI_ACPI_5_1_LOCAL_SAPIC 0x07\r | |
316 | #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08\r | |
317 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09\r | |
318 | #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A\r | |
319 | #define EFI_ACPI_5_1_GIC 0x0B\r | |
320 | #define EFI_ACPI_5_1_GICD 0x0C\r | |
321 | #define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D\r | |
322 | #define EFI_ACPI_5_1_GICR 0x0E\r | |
323 | \r | |
324 | //\r | |
325 | // APIC Structure Definitions\r | |
326 | //\r | |
327 | \r | |
328 | ///\r | |
329 | /// Processor Local APIC Structure Definition\r | |
330 | ///\r | |
331 | typedef struct {\r | |
332 | UINT8 Type;\r | |
333 | UINT8 Length;\r | |
334 | UINT8 AcpiProcessorId;\r | |
335 | UINT8 ApicId;\r | |
336 | UINT32 Flags;\r | |
337 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;\r | |
338 | \r | |
339 | ///\r | |
340 | /// Local APIC Flags. All other bits are reserved and must be 0.\r | |
341 | ///\r | |
342 | #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0\r | |
343 | \r | |
344 | ///\r | |
345 | /// IO APIC Structure\r | |
346 | ///\r | |
347 | typedef struct {\r | |
348 | UINT8 Type;\r | |
349 | UINT8 Length;\r | |
350 | UINT8 IoApicId;\r | |
351 | UINT8 Reserved;\r | |
352 | UINT32 IoApicAddress;\r | |
353 | UINT32 GlobalSystemInterruptBase;\r | |
354 | } EFI_ACPI_5_1_IO_APIC_STRUCTURE;\r | |
355 | \r | |
356 | ///\r | |
357 | /// Interrupt Source Override Structure\r | |
358 | ///\r | |
359 | typedef struct {\r | |
360 | UINT8 Type;\r | |
361 | UINT8 Length;\r | |
362 | UINT8 Bus;\r | |
363 | UINT8 Source;\r | |
364 | UINT32 GlobalSystemInterrupt;\r | |
365 | UINT16 Flags;\r | |
366 | } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r | |
367 | \r | |
368 | ///\r | |
369 | /// Platform Interrupt Sources Structure Definition\r | |
370 | ///\r | |
371 | typedef struct {\r | |
372 | UINT8 Type;\r | |
373 | UINT8 Length;\r | |
374 | UINT16 Flags;\r | |
375 | UINT8 InterruptType;\r | |
376 | UINT8 ProcessorId;\r | |
377 | UINT8 ProcessorEid;\r | |
378 | UINT8 IoSapicVector;\r | |
379 | UINT32 GlobalSystemInterrupt;\r | |
380 | UINT32 PlatformInterruptSourceFlags;\r | |
381 | UINT8 CpeiProcessorOverride;\r | |
382 | UINT8 Reserved[31];\r | |
383 | } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r | |
384 | \r | |
385 | //\r | |
386 | // MPS INTI flags.\r | |
387 | // All other bits are reserved and must be set to 0.\r | |
388 | //\r | |
389 | #define EFI_ACPI_5_1_POLARITY (3 << 0)\r | |
390 | #define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)\r | |
391 | \r | |
392 | ///\r | |
393 | /// Non-Maskable Interrupt Source Structure\r | |
394 | ///\r | |
395 | typedef struct {\r | |
396 | UINT8 Type;\r | |
397 | UINT8 Length;\r | |
398 | UINT16 Flags;\r | |
399 | UINT32 GlobalSystemInterrupt;\r | |
400 | } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r | |
401 | \r | |
402 | ///\r | |
403 | /// Local APIC NMI Structure\r | |
404 | ///\r | |
405 | typedef struct {\r | |
406 | UINT8 Type;\r | |
407 | UINT8 Length;\r | |
408 | UINT8 AcpiProcessorId;\r | |
409 | UINT16 Flags;\r | |
410 | UINT8 LocalApicLint;\r | |
411 | } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;\r | |
412 | \r | |
413 | ///\r | |
414 | /// Local APIC Address Override Structure\r | |
415 | ///\r | |
416 | typedef struct {\r | |
417 | UINT8 Type;\r | |
418 | UINT8 Length;\r | |
419 | UINT16 Reserved;\r | |
420 | UINT64 LocalApicAddress;\r | |
421 | } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r | |
422 | \r | |
423 | ///\r | |
424 | /// IO SAPIC Structure\r | |
425 | ///\r | |
426 | typedef struct {\r | |
427 | UINT8 Type;\r | |
428 | UINT8 Length;\r | |
429 | UINT8 IoApicId;\r | |
430 | UINT8 Reserved;\r | |
431 | UINT32 GlobalSystemInterruptBase;\r | |
432 | UINT64 IoSapicAddress;\r | |
433 | } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;\r | |
434 | \r | |
435 | ///\r | |
436 | /// Local SAPIC Structure\r | |
437 | /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r | |
438 | ///\r | |
439 | typedef struct {\r | |
440 | UINT8 Type;\r | |
441 | UINT8 Length;\r | |
442 | UINT8 AcpiProcessorId;\r | |
443 | UINT8 LocalSapicId;\r | |
444 | UINT8 LocalSapicEid;\r | |
445 | UINT8 Reserved[3];\r | |
446 | UINT32 Flags;\r | |
447 | UINT32 ACPIProcessorUIDValue;\r | |
448 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r | |
449 | \r | |
450 | ///\r | |
451 | /// Platform Interrupt Sources Structure\r | |
452 | ///\r | |
453 | typedef struct {\r | |
454 | UINT8 Type;\r | |
455 | UINT8 Length;\r | |
456 | UINT16 Flags;\r | |
457 | UINT8 InterruptType;\r | |
458 | UINT8 ProcessorId;\r | |
459 | UINT8 ProcessorEid;\r | |
460 | UINT8 IoSapicVector;\r | |
461 | UINT32 GlobalSystemInterrupt;\r | |
462 | UINT32 PlatformInterruptSourceFlags;\r | |
463 | } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r | |
464 | \r | |
465 | ///\r | |
466 | /// Platform Interrupt Source Flags.\r | |
467 | /// All other bits are reserved and must be set to 0.\r | |
468 | ///\r | |
469 | #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0\r | |
470 | \r | |
471 | ///\r | |
472 | /// Processor Local x2APIC Structure Definition\r | |
473 | ///\r | |
474 | typedef struct {\r | |
475 | UINT8 Type;\r | |
476 | UINT8 Length;\r | |
477 | UINT8 Reserved[2];\r | |
478 | UINT32 X2ApicId;\r | |
479 | UINT32 Flags;\r | |
480 | UINT32 AcpiProcessorUid;\r | |
481 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r | |
482 | \r | |
483 | ///\r | |
484 | /// Local x2APIC NMI Structure\r | |
485 | ///\r | |
486 | typedef struct {\r | |
487 | UINT8 Type;\r | |
488 | UINT8 Length;\r | |
489 | UINT16 Flags;\r | |
490 | UINT32 AcpiProcessorUid;\r | |
491 | UINT8 LocalX2ApicLint;\r | |
492 | UINT8 Reserved[3];\r | |
493 | } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;\r | |
494 | \r | |
495 | ///\r | |
496 | /// GIC Structure\r | |
497 | ///\r | |
498 | typedef struct {\r | |
499 | UINT8 Type;\r | |
500 | UINT8 Length;\r | |
501 | UINT16 Reserved;\r | |
502 | UINT32 CPUInterfaceNumber;\r | |
503 | UINT32 AcpiProcessorUid;\r | |
504 | UINT32 Flags;\r | |
505 | UINT32 ParkingProtocolVersion;\r | |
506 | UINT32 PerformanceInterruptGsiv;\r | |
507 | UINT64 ParkedAddress;\r | |
508 | UINT64 PhysicalBaseAddress;\r | |
509 | UINT64 GICV;\r | |
510 | UINT64 GICH;\r | |
511 | UINT32 VGICMaintenanceInterrupt;\r | |
512 | UINT64 GICRBaseAddress;\r | |
513 | UINT64 MPIDR;\r | |
514 | } EFI_ACPI_5_1_GIC_STRUCTURE;\r | |
515 | \r | |
516 | ///\r | |
517 | /// GIC Flags. All other bits are reserved and must be 0.\r | |
518 | ///\r | |
519 | #define EFI_ACPI_5_1_GIC_ENABLED BIT0\r | |
520 | #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1\r | |
521 | #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r | |
522 | \r | |
523 | ///\r | |
524 | /// GIC Distributor Structure\r | |
525 | ///\r | |
526 | typedef struct {\r | |
527 | UINT8 Type;\r | |
528 | UINT8 Length;\r | |
529 | UINT16 Reserved1;\r | |
530 | UINT32 GicId;\r | |
531 | UINT64 PhysicalBaseAddress;\r | |
532 | UINT32 SystemVectorBase;\r | |
8a2270a6 SEHM |
533 | UINT8 GicVersion;\r |
534 | UINT8 Reserved2[3];\r | |
f449affe JY |
535 | } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;\r |
536 | \r | |
8a2270a6 SEHM |
537 | ///\r |
538 | /// GIC Version\r | |
539 | ///\r | |
b84621bc LG |
540 | #define EFI_ACPI_5_1_GIC_V1 0x01\r |
541 | #define EFI_ACPI_5_1_GIC_V2 0x02\r | |
8a2270a6 SEHM |
542 | #define EFI_ACPI_5_1_GIC_V3 0x03\r |
543 | #define EFI_ACPI_5_1_GIC_V4 0x04\r | |
544 | \r | |
f449affe JY |
545 | ///\r |
546 | /// GIC MSI Frame Structure\r | |
547 | ///\r | |
548 | typedef struct {\r | |
549 | UINT8 Type;\r | |
550 | UINT8 Length;\r | |
551 | UINT16 Reserved1;\r | |
552 | UINT32 GicMsiFrameId;\r | |
553 | UINT64 PhysicalBaseAddress;\r | |
554 | UINT32 Flags;\r | |
555 | UINT16 SPICount;\r | |
556 | UINT16 SPIBase;\r | |
557 | } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;\r | |
558 | \r | |
559 | ///\r | |
560 | /// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r | |
561 | ///\r | |
562 | #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0\r | |
563 | \r | |
564 | ///\r | |
565 | /// GICR Structure\r | |
566 | ///\r | |
567 | typedef struct {\r | |
568 | UINT8 Type;\r | |
569 | UINT8 Length;\r | |
570 | UINT16 Reserved;\r | |
571 | UINT64 DiscoveryRangeBaseAddress;\r | |
572 | UINT32 DiscoveryRangeLength;\r | |
573 | } EFI_ACPI_5_1_GICR_STRUCTURE;\r | |
574 | \r | |
575 | ///\r | |
576 | /// Smart Battery Description Table (SBST)\r | |
577 | ///\r | |
578 | typedef struct {\r | |
579 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
580 | UINT32 WarningEnergyLevel;\r | |
581 | UINT32 LowEnergyLevel;\r | |
582 | UINT32 CriticalEnergyLevel;\r | |
583 | } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;\r | |
584 | \r | |
585 | ///\r | |
586 | /// SBST Version (as defined in ACPI 5.1 spec.)\r | |
587 | ///\r | |
588 | #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r | |
589 | \r | |
590 | ///\r | |
591 | /// Embedded Controller Boot Resources Table (ECDT)\r | |
592 | /// The table is followed by a null terminated ASCII string that contains\r | |
593 | /// a fully qualified reference to the name space object.\r | |
594 | ///\r | |
595 | typedef struct {\r | |
596 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
597 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;\r | |
598 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;\r | |
599 | UINT32 Uid;\r | |
600 | UINT8 GpeBit;\r | |
601 | } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r | |
602 | \r | |
603 | ///\r | |
604 | /// ECDT Version (as defined in ACPI 5.1 spec.)\r | |
605 | ///\r | |
606 | #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r | |
607 | \r | |
608 | ///\r | |
609 | /// System Resource Affinity Table (SRAT). The rest of the table\r | |
610 | /// must be defined in a platform specific manner.\r | |
611 | ///\r | |
612 | typedef struct {\r | |
613 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
614 | UINT32 Reserved1; ///< Must be set to 1\r | |
615 | UINT64 Reserved2;\r | |
616 | } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r | |
617 | \r | |
618 | ///\r | |
619 | /// SRAT Version (as defined in ACPI 5.1 spec.)\r | |
620 | ///\r | |
621 | #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r | |
622 | \r | |
623 | //\r | |
624 | // SRAT structure types.\r | |
48a42a1c | 625 | // All other values between 0x04 an 0xFF are reserved and\r |
f449affe JY |
626 | // will be ignored by OSPM.\r |
627 | //\r | |
628 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r | |
629 | #define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01\r | |
630 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r | |
48a42a1c | 631 | #define EFI_ACPI_5_1_GICC_AFFINITY 0x03\r |
f449affe JY |
632 | \r |
633 | ///\r | |
634 | /// Processor Local APIC/SAPIC Affinity Structure Definition\r | |
635 | ///\r | |
636 | typedef struct {\r | |
637 | UINT8 Type;\r | |
638 | UINT8 Length;\r | |
639 | UINT8 ProximityDomain7To0;\r | |
640 | UINT8 ApicId;\r | |
641 | UINT32 Flags;\r | |
642 | UINT8 LocalSapicEid;\r | |
643 | UINT8 ProximityDomain31To8[3];\r | |
644 | UINT32 ClockDomain;\r | |
645 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r | |
646 | \r | |
647 | ///\r | |
648 | /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r | |
649 | ///\r | |
650 | #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r | |
651 | \r | |
652 | ///\r | |
653 | /// Memory Affinity Structure Definition\r | |
654 | ///\r | |
655 | typedef struct {\r | |
656 | UINT8 Type;\r | |
657 | UINT8 Length;\r | |
658 | UINT32 ProximityDomain;\r | |
659 | UINT16 Reserved1;\r | |
660 | UINT32 AddressBaseLow;\r | |
661 | UINT32 AddressBaseHigh;\r | |
662 | UINT32 LengthLow;\r | |
663 | UINT32 LengthHigh;\r | |
664 | UINT32 Reserved2;\r | |
665 | UINT32 Flags;\r | |
666 | UINT64 Reserved3;\r | |
667 | } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;\r | |
668 | \r | |
669 | //\r | |
670 | // Memory Flags. All other bits are reserved and must be 0.\r | |
671 | //\r | |
672 | #define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)\r | |
673 | #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)\r | |
674 | #define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)\r | |
675 | \r | |
676 | ///\r | |
677 | /// Processor Local x2APIC Affinity Structure Definition\r | |
678 | ///\r | |
679 | typedef struct {\r | |
680 | UINT8 Type;\r | |
681 | UINT8 Length;\r | |
682 | UINT8 Reserved1[2];\r | |
683 | UINT32 ProximityDomain;\r | |
684 | UINT32 X2ApicId;\r | |
685 | UINT32 Flags;\r | |
686 | UINT32 ClockDomain;\r | |
687 | UINT8 Reserved2[4];\r | |
688 | } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r | |
689 | \r | |
48a42a1c JY |
690 | ///\r |
691 | /// GICC Affinity Structure Definition\r | |
692 | ///\r | |
693 | typedef struct {\r | |
694 | UINT8 Type;\r | |
695 | UINT8 Length;\r | |
696 | UINT32 ProximityDomain;\r | |
697 | UINT32 AcpiProcessorUid;\r | |
698 | UINT32 Flags;\r | |
699 | UINT32 ClockDomain;\r | |
700 | } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;\r | |
701 | \r | |
702 | ///\r | |
703 | /// GICC Flags. All other bits are reserved and must be 0.\r | |
704 | ///\r | |
705 | #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)\r | |
706 | \r | |
f449affe JY |
707 | ///\r |
708 | /// System Locality Distance Information Table (SLIT).\r | |
709 | /// The rest of the table is a matrix.\r | |
710 | ///\r | |
711 | typedef struct {\r | |
712 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
713 | UINT64 NumberOfSystemLocalities;\r | |
714 | } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r | |
715 | \r | |
716 | ///\r | |
717 | /// SLIT Version (as defined in ACPI 5.1 spec.)\r | |
718 | ///\r | |
719 | #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r | |
720 | \r | |
721 | ///\r | |
722 | /// Corrected Platform Error Polling Table (CPEP)\r | |
723 | ///\r | |
724 | typedef struct {\r | |
725 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
726 | UINT8 Reserved[8];\r | |
727 | } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r | |
728 | \r | |
729 | ///\r | |
730 | /// CPEP Version (as defined in ACPI 5.1 spec.)\r | |
731 | ///\r | |
732 | #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r | |
733 | \r | |
734 | //\r | |
735 | // CPEP processor structure types.\r | |
736 | //\r | |
737 | #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00\r | |
738 | \r | |
739 | ///\r | |
740 | /// Corrected Platform Error Polling Processor Structure Definition\r | |
741 | ///\r | |
742 | typedef struct {\r | |
743 | UINT8 Type;\r | |
744 | UINT8 Length;\r | |
745 | UINT8 ProcessorId;\r | |
746 | UINT8 ProcessorEid;\r | |
747 | UINT32 PollingInterval;\r | |
748 | } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r | |
749 | \r | |
750 | ///\r | |
751 | /// Maximum System Characteristics Table (MSCT)\r | |
752 | ///\r | |
753 | typedef struct {\r | |
754 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
755 | UINT32 OffsetProxDomInfo;\r | |
756 | UINT32 MaximumNumberOfProximityDomains;\r | |
757 | UINT32 MaximumNumberOfClockDomains;\r | |
758 | UINT64 MaximumPhysicalAddress;\r | |
759 | } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r | |
760 | \r | |
761 | ///\r | |
762 | /// MSCT Version (as defined in ACPI 5.1 spec.)\r | |
763 | ///\r | |
764 | #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r | |
765 | \r | |
766 | ///\r | |
767 | /// Maximum Proximity Domain Information Structure Definition\r | |
768 | ///\r | |
769 | typedef struct {\r | |
770 | UINT8 Revision;\r | |
771 | UINT8 Length;\r | |
772 | UINT32 ProximityDomainRangeLow;\r | |
773 | UINT32 ProximityDomainRangeHigh;\r | |
774 | UINT32 MaximumProcessorCapacity;\r | |
775 | UINT64 MaximumMemoryCapacity;\r | |
776 | } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r | |
777 | \r | |
778 | ///\r | |
779 | /// ACPI RAS Feature Table definition.\r | |
780 | ///\r | |
781 | typedef struct {\r | |
782 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
783 | UINT8 PlatformCommunicationChannelIdentifier[12];\r | |
784 | } EFI_ACPI_5_1_RAS_FEATURE_TABLE;\r | |
785 | \r | |
786 | ///\r | |
787 | /// RASF Version (as defined in ACPI 5.1 spec.)\r | |
788 | ///\r | |
789 | #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01\r | |
790 | \r | |
791 | ///\r | |
792 | /// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r | |
793 | ///\r | |
794 | typedef struct {\r | |
795 | UINT32 Signature;\r | |
796 | UINT16 Command;\r | |
797 | UINT16 Status;\r | |
798 | UINT16 Version;\r | |
799 | UINT8 RASCapabilities[16];\r | |
800 | UINT8 SetRASCapabilities[16];\r | |
801 | UINT16 NumberOfRASFParameterBlocks;\r | |
802 | UINT32 SetRASCapabilitiesStatus;\r | |
803 | } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r | |
804 | \r | |
805 | ///\r | |
806 | /// ACPI RASF PCC command code\r | |
807 | ///\r | |
808 | #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r | |
809 | \r | |
810 | ///\r | |
811 | /// ACPI RASF Platform RAS Capabilities\r | |
812 | ///\r | |
813 | #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r | |
814 | #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r | |
815 | \r | |
816 | ///\r | |
817 | /// ACPI RASF Parameter Block structure for PATROL_SCRUB\r | |
818 | ///\r | |
819 | typedef struct {\r | |
820 | UINT16 Type;\r | |
821 | UINT16 Version;\r | |
822 | UINT16 Length;\r | |
823 | UINT16 PatrolScrubCommand;\r | |
824 | UINT64 RequestedAddressRange[2];\r | |
825 | UINT64 ActualAddressRange[2];\r | |
826 | UINT16 Flags;\r | |
827 | UINT8 RequestedSpeed;\r | |
828 | } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r | |
829 | \r | |
830 | ///\r | |
831 | /// ACPI RASF Patrol Scrub command\r | |
832 | ///\r | |
833 | #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r | |
834 | #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r | |
835 | #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r | |
836 | \r | |
837 | ///\r | |
838 | /// Memory Power State Table definition.\r | |
839 | ///\r | |
840 | typedef struct {\r | |
841 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
842 | UINT8 PlatformCommunicationChannelIdentifier;\r | |
843 | UINT8 Reserved[3];\r | |
844 | // Memory Power Node Structure\r | |
845 | // Memory Power State Characteristics\r | |
846 | } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;\r | |
847 | \r | |
848 | ///\r | |
849 | /// MPST Version (as defined in ACPI 5.1 spec.)\r | |
850 | ///\r | |
851 | #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r | |
852 | \r | |
853 | ///\r | |
854 | /// MPST Platform Communication Channel Shared Memory Region definition.\r | |
855 | ///\r | |
856 | typedef struct {\r | |
857 | UINT32 Signature;\r | |
858 | UINT16 Command;\r | |
859 | UINT16 Status;\r | |
860 | UINT32 MemoryPowerCommandRegister;\r | |
861 | UINT32 MemoryPowerStatusRegister;\r | |
862 | UINT32 PowerStateId;\r | |
863 | UINT32 MemoryPowerNodeId;\r | |
864 | UINT64 MemoryEnergyConsumed;\r | |
865 | UINT64 ExpectedAveragePowerComsuned;\r | |
866 | } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r | |
867 | \r | |
868 | ///\r | |
869 | /// ACPI MPST PCC command code\r | |
870 | ///\r | |
871 | #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r | |
872 | \r | |
873 | ///\r | |
874 | /// ACPI MPST Memory Power command\r | |
875 | ///\r | |
876 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r | |
877 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r | |
878 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r | |
879 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r | |
880 | \r | |
881 | ///\r | |
882 | /// MPST Memory Power Node Table\r | |
883 | ///\r | |
884 | typedef struct {\r | |
885 | UINT8 PowerStateValue;\r | |
886 | UINT8 PowerStateInformationIndex;\r | |
887 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;\r | |
888 | \r | |
889 | typedef struct {\r | |
890 | UINT8 Flag;\r | |
891 | UINT8 Reserved;\r | |
892 | UINT16 MemoryPowerNodeId;\r | |
893 | UINT32 Length;\r | |
894 | UINT64 AddressBase;\r | |
895 | UINT64 AddressLength;\r | |
896 | UINT32 NumberOfPowerStates;\r | |
897 | UINT32 NumberOfPhysicalComponents;\r | |
898 | //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r | |
899 | //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r | |
900 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;\r | |
901 | \r | |
902 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r | |
903 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r | |
904 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r | |
905 | \r | |
906 | typedef struct {\r | |
907 | UINT16 MemoryPowerNodeCount;\r | |
908 | UINT8 Reserved[2];\r | |
909 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;\r | |
910 | \r | |
911 | ///\r | |
912 | /// MPST Memory Power State Characteristics Table\r | |
913 | ///\r | |
914 | typedef struct {\r | |
915 | UINT8 PowerStateStructureID;\r | |
916 | UINT8 Flag;\r | |
917 | UINT16 Reserved;\r | |
918 | UINT32 AveragePowerConsumedInMPS0;\r | |
919 | UINT32 RelativePowerSavingToMPS0;\r | |
920 | UINT64 ExitLatencyToMPS0;\r | |
921 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r | |
922 | \r | |
923 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r | |
924 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r | |
925 | #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r | |
926 | \r | |
927 | typedef struct {\r | |
928 | UINT16 MemoryPowerStateCharacteristicsCount;\r | |
929 | UINT8 Reserved[2];\r | |
930 | } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r | |
931 | \r | |
932 | ///\r | |
933 | /// Memory Topology Table definition.\r | |
934 | ///\r | |
935 | typedef struct {\r | |
936 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
937 | UINT32 Reserved;\r | |
938 | } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;\r | |
939 | \r | |
940 | ///\r | |
941 | /// PMTT Version (as defined in ACPI 5.1 spec.)\r | |
942 | ///\r | |
943 | #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r | |
944 | \r | |
945 | ///\r | |
946 | /// Common Memory Aggregator Device Structure.\r | |
947 | ///\r | |
948 | typedef struct {\r | |
949 | UINT8 Type;\r | |
950 | UINT8 Reserved;\r | |
951 | UINT16 Length;\r | |
952 | UINT16 Flags;\r | |
953 | UINT16 Reserved1;\r | |
954 | } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r | |
955 | \r | |
956 | ///\r | |
957 | /// Memory Aggregator Device Type\r | |
958 | ///\r | |
959 | #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r | |
960 | #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r | |
961 | #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r | |
962 | \r | |
963 | ///\r | |
964 | /// Socket Memory Aggregator Device Structure.\r | |
965 | ///\r | |
966 | typedef struct {\r | |
967 | EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r | |
968 | UINT16 SocketIdentifier;\r | |
969 | UINT16 Reserved;\r | |
970 | //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r | |
971 | } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r | |
972 | \r | |
973 | ///\r | |
974 | /// MemoryController Memory Aggregator Device Structure.\r | |
975 | ///\r | |
976 | typedef struct {\r | |
977 | EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r | |
978 | UINT32 ReadLatency;\r | |
979 | UINT32 WriteLatency;\r | |
980 | UINT32 ReadBandwidth;\r | |
981 | UINT32 WriteBandwidth;\r | |
982 | UINT16 OptimalAccessUnit;\r | |
983 | UINT16 OptimalAccessAlignment;\r | |
984 | UINT16 Reserved;\r | |
985 | UINT16 NumberOfProximityDomains;\r | |
986 | //UINT32 ProximityDomain[NumberOfProximityDomains];\r | |
987 | //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r | |
988 | } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r | |
989 | \r | |
990 | ///\r | |
991 | /// DIMM Memory Aggregator Device Structure.\r | |
992 | ///\r | |
993 | typedef struct {\r | |
994 | EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r | |
995 | UINT16 PhysicalComponentIdentifier;\r | |
996 | UINT16 Reserved;\r | |
997 | UINT32 SizeOfDimm;\r | |
998 | UINT32 SmbiosHandle;\r | |
999 | } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r | |
1000 | \r | |
1001 | ///\r | |
1002 | /// Boot Graphics Resource Table definition.\r | |
1003 | ///\r | |
1004 | typedef struct {\r | |
1005 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1006 | ///\r | |
1007 | /// 2-bytes (16 bit) version ID. This value must be 1.\r | |
1008 | ///\r | |
1009 | UINT16 Version;\r | |
1010 | ///\r | |
1011 | /// 1-byte status field indicating current status about the table.\r | |
1012 | /// Bits[7:1] = Reserved (must be zero)\r | |
1013 | /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r | |
1014 | ///\r | |
1015 | UINT8 Status;\r | |
1016 | ///\r | |
1017 | /// 1-byte enumerated type field indicating format of the image.\r | |
1018 | /// 0 = Bitmap\r | |
1019 | /// 1 - 255 Reserved (for future use)\r | |
1020 | ///\r | |
1021 | UINT8 ImageType;\r | |
1022 | ///\r | |
1023 | /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r | |
1024 | /// of the image bitmap.\r | |
1025 | ///\r | |
1026 | UINT64 ImageAddress;\r | |
1027 | ///\r | |
1028 | /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r | |
1029 | /// (X, Y) display offset of the top left corner of the boot image.\r | |
1030 | /// The top left corner of the display is at offset (0, 0).\r | |
1031 | ///\r | |
1032 | UINT32 ImageOffsetX;\r | |
1033 | ///\r | |
1034 | /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r | |
1035 | /// (X, Y) display offset of the top left corner of the boot image.\r | |
1036 | /// The top left corner of the display is at offset (0, 0).\r | |
1037 | ///\r | |
1038 | UINT32 ImageOffsetY;\r | |
1039 | } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;\r | |
1040 | \r | |
1041 | ///\r | |
1042 | /// BGRT Revision\r | |
1043 | ///\r | |
1044 | #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r | |
1045 | \r | |
1046 | ///\r | |
1047 | /// BGRT Version\r | |
1048 | ///\r | |
1049 | #define EFI_ACPI_5_1_BGRT_VERSION 0x01\r | |
1050 | \r | |
1051 | ///\r | |
1052 | /// BGRT Status\r | |
1053 | ///\r | |
1054 | #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00\r | |
1055 | #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01\r | |
1056 | \r | |
1057 | ///\r | |
1058 | /// BGRT Image Type\r | |
1059 | ///\r | |
1060 | #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00\r | |
1061 | \r | |
1062 | ///\r | |
1063 | /// FPDT Version (as defined in ACPI 5.1 spec.)\r | |
1064 | ///\r | |
1065 | #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r | |
1066 | \r | |
1067 | ///\r | |
1068 | /// FPDT Performance Record Types\r | |
1069 | ///\r | |
1070 | #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r | |
1071 | #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r | |
1072 | \r | |
1073 | ///\r | |
1074 | /// FPDT Performance Record Revision\r | |
1075 | ///\r | |
1076 | #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r | |
1077 | #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r | |
1078 | \r | |
1079 | ///\r | |
1080 | /// FPDT Runtime Performance Record Types\r | |
1081 | ///\r | |
1082 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r | |
1083 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r | |
1084 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r | |
1085 | \r | |
1086 | ///\r | |
1087 | /// FPDT Runtime Performance Record Revision\r | |
1088 | ///\r | |
1089 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r | |
1090 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r | |
1091 | #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r | |
1092 | \r | |
1093 | ///\r | |
1094 | /// FPDT Performance Record header\r | |
1095 | ///\r | |
1096 | typedef struct {\r | |
1097 | UINT16 Type;\r | |
1098 | UINT8 Length;\r | |
1099 | UINT8 Revision;\r | |
1100 | } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;\r | |
1101 | \r | |
1102 | ///\r | |
1103 | /// FPDT Performance Table header\r | |
1104 | ///\r | |
1105 | typedef struct {\r | |
1106 | UINT32 Signature;\r | |
1107 | UINT32 Length;\r | |
1108 | } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;\r | |
1109 | \r | |
1110 | ///\r | |
1111 | /// FPDT Firmware Basic Boot Performance Pointer Record Structure\r | |
1112 | ///\r | |
1113 | typedef struct {\r | |
1114 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r | |
1115 | UINT32 Reserved;\r | |
1116 | ///\r | |
1117 | /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r | |
1118 | ///\r | |
1119 | UINT64 BootPerformanceTablePointer;\r | |
1120 | } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r | |
1121 | \r | |
1122 | ///\r | |
1123 | /// FPDT S3 Performance Table Pointer Record Structure\r | |
1124 | ///\r | |
1125 | typedef struct {\r | |
1126 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r | |
1127 | UINT32 Reserved;\r | |
1128 | ///\r | |
1129 | /// 64-bit processor-relative physical address of the S3 Performance Table.\r | |
1130 | ///\r | |
1131 | UINT64 S3PerformanceTablePointer;\r | |
1132 | } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r | |
1133 | \r | |
1134 | ///\r | |
1135 | /// FPDT Firmware Basic Boot Performance Record Structure\r | |
1136 | ///\r | |
1137 | typedef struct {\r | |
1138 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r | |
1139 | UINT32 Reserved;\r | |
1140 | ///\r | |
1141 | /// Timer value logged at the beginning of firmware image execution.\r | |
1142 | /// This may not always be zero or near zero.\r | |
1143 | ///\r | |
1144 | UINT64 ResetEnd;\r | |
1145 | ///\r | |
1146 | /// Timer value logged just prior to loading the OS boot loader into memory.\r | |
1147 | /// For non-UEFI compatible boots, this field must be zero.\r | |
1148 | ///\r | |
1149 | UINT64 OsLoaderLoadImageStart;\r | |
1150 | ///\r | |
1151 | /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r | |
1152 | /// For non-UEFI compatible boots, the timer value logged will be just prior\r | |
1153 | /// to the INT 19h handler invocation.\r | |
1154 | ///\r | |
1155 | UINT64 OsLoaderStartImageStart;\r | |
1156 | ///\r | |
1157 | /// Timer value logged at the point when the OS loader calls the\r | |
1158 | /// ExitBootServices function for UEFI compatible firmware.\r | |
1159 | /// For non-UEFI compatible boots, this field must be zero.\r | |
1160 | ///\r | |
1161 | UINT64 ExitBootServicesEntry;\r | |
1162 | ///\r | |
1163 | /// Timer value logged at the point just prior towhen the OS loader gaining\r | |
1164 | /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r | |
1165 | /// For non-UEFI compatible boots, this field must be zero.\r | |
1166 | ///\r | |
1167 | UINT64 ExitBootServicesExit;\r | |
1168 | } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r | |
1169 | \r | |
1170 | ///\r | |
1171 | /// FPDT Firmware Basic Boot Performance Table signature\r | |
1172 | ///\r | |
1173 | #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r | |
1174 | \r | |
1175 | //\r | |
1176 | // FPDT Firmware Basic Boot Performance Table\r | |
1177 | //\r | |
1178 | typedef struct {\r | |
1179 | EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r | |
1180 | //\r | |
1181 | // one or more Performance Records.\r | |
1182 | //\r | |
1183 | } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r | |
1184 | \r | |
1185 | ///\r | |
1186 | /// FPDT "S3PT" S3 Performance Table\r | |
1187 | ///\r | |
1188 | #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r | |
1189 | \r | |
1190 | //\r | |
1191 | // FPDT Firmware S3 Boot Performance Table\r | |
1192 | //\r | |
1193 | typedef struct {\r | |
1194 | EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r | |
1195 | //\r | |
1196 | // one or more Performance Records.\r | |
1197 | //\r | |
1198 | } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;\r | |
1199 | \r | |
1200 | ///\r | |
1201 | /// FPDT Basic S3 Resume Performance Record\r | |
1202 | ///\r | |
1203 | typedef struct {\r | |
1204 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r | |
1205 | ///\r | |
1206 | /// A count of the number of S3 resume cycles since the last full boot sequence.\r | |
1207 | ///\r | |
1208 | UINT32 ResumeCount;\r | |
1209 | ///\r | |
1210 | /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r | |
1211 | /// OS waking vector. Only the most recent resume cycle's time is retained.\r | |
1212 | ///\r | |
1213 | UINT64 FullResume;\r | |
1214 | ///\r | |
1215 | /// Average timer value of all resume cycles logged since the last full boot\r | |
1216 | /// sequence, including the most recent resume. Note that the entire log of\r | |
1217 | /// timer values does not need to be retained in order to calculate this average.\r | |
1218 | ///\r | |
1219 | UINT64 AverageResume;\r | |
1220 | } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;\r | |
1221 | \r | |
1222 | ///\r | |
1223 | /// FPDT Basic S3 Suspend Performance Record\r | |
1224 | ///\r | |
1225 | typedef struct {\r | |
1226 | EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r | |
1227 | ///\r | |
1228 | /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r | |
1229 | /// Only the most recent suspend cycle's timer value is retained.\r | |
1230 | ///\r | |
1231 | UINT64 SuspendStart;\r | |
1232 | ///\r | |
1233 | /// Timer value recorded at the final firmware write to SLP_TYP (or other\r | |
1234 | /// mechanism) used to trigger hardware entry to S3.\r | |
1235 | /// Only the most recent suspend cycle's timer value is retained.\r | |
1236 | ///\r | |
1237 | UINT64 SuspendEnd;\r | |
1238 | } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;\r | |
1239 | \r | |
1240 | ///\r | |
1241 | /// Firmware Performance Record Table definition.\r | |
1242 | ///\r | |
1243 | typedef struct {\r | |
1244 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1245 | } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r | |
1246 | \r | |
1247 | ///\r | |
1248 | /// Generic Timer Description Table definition.\r | |
1249 | ///\r | |
1250 | typedef struct {\r | |
1251 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1252 | UINT64 CntControlBasePhysicalAddress;\r | |
1253 | UINT32 Reserved;\r | |
1254 | UINT32 SecurePL1TimerGSIV;\r | |
1255 | UINT32 SecurePL1TimerFlags;\r | |
1256 | UINT32 NonSecurePL1TimerGSIV;\r | |
1257 | UINT32 NonSecurePL1TimerFlags;\r | |
1258 | UINT32 VirtualTimerGSIV;\r | |
1259 | UINT32 VirtualTimerFlags;\r | |
1260 | UINT32 NonSecurePL2TimerGSIV;\r | |
1261 | UINT32 NonSecurePL2TimerFlags;\r | |
1262 | UINT64 CntReadBasePhysicalAddress;\r | |
1263 | UINT32 PlatformTimerCount;\r | |
1264 | UINT32 PlatformTimerOffset;\r | |
1265 | } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;\r | |
1266 | \r | |
1267 | ///\r | |
1268 | /// GTDT Version (as defined in ACPI 5.1 spec.)\r | |
1269 | ///\r | |
2d50c478 | 1270 | #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r |
f449affe JY |
1271 | \r |
1272 | ///\r | |
1273 | /// Timer Flags. All other bits are reserved and must be 0.\r | |
1274 | ///\r | |
1275 | #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r | |
1276 | #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r | |
1277 | #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r | |
1278 | \r | |
1279 | ///\r | |
1280 | /// Platform Timer Type\r | |
1281 | ///\r | |
1282 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK 0\r | |
1283 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1\r | |
1284 | \r | |
1285 | ///\r | |
1286 | /// GT Block Structure\r | |
1287 | ///\r | |
1288 | typedef struct {\r | |
1289 | UINT8 Type;\r | |
1290 | UINT16 Length;\r | |
1291 | UINT8 Reserved;\r | |
1292 | UINT64 CntCtlBase;\r | |
1293 | UINT32 GTBlockTimerCount;\r | |
1294 | UINT32 GTBlockTimerOffset;\r | |
1295 | } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;\r | |
1296 | \r | |
1297 | ///\r | |
1298 | /// GT Block Timer Structure\r | |
1299 | ///\r | |
1300 | typedef struct {\r | |
1301 | UINT8 GTFrameNumber;\r | |
1302 | UINT8 Reserved[3];\r | |
1303 | UINT64 CntBaseX;\r | |
1304 | UINT64 CntEL0BaseX;\r | |
1305 | UINT32 GTxPhysicalTimerGSIV;\r | |
1306 | UINT32 GTxPhysicalTimerFlags;\r | |
1307 | UINT32 GTxVirtualTimerGSIV;\r | |
1308 | UINT32 GTxVirtualTimerFlags;\r | |
1309 | UINT32 GTxCommonFlags;\r | |
1310 | } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r | |
1311 | \r | |
1312 | ///\r | |
1313 | /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r | |
1314 | ///\r | |
1315 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r | |
1316 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r | |
1317 | \r | |
1318 | ///\r | |
1319 | /// Common Flags Flags. All other bits are reserved and must be 0.\r | |
1320 | ///\r | |
1321 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r | |
1322 | #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r | |
1323 | \r | |
1324 | ///\r | |
1325 | /// SBSA Generic Watchdog Structure\r | |
1326 | ///\r | |
1327 | typedef struct {\r | |
1328 | UINT8 Type;\r | |
f7acc872 SZ |
1329 | UINT16 Length;\r |
1330 | UINT8 Reserved;\r | |
f449affe JY |
1331 | UINT64 RefreshFramePhysicalAddress;\r |
1332 | UINT64 WatchdogControlFramePhysicalAddress;\r | |
1333 | UINT32 WatchdogTimerGSIV;\r | |
1334 | UINT32 WatchdogTimerFlags;\r | |
1335 | } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r | |
1336 | \r | |
1337 | ///\r | |
1338 | /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r | |
1339 | ///\r | |
1340 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r | |
1341 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r | |
1342 | #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r | |
1343 | \r | |
1344 | ///\r | |
1345 | /// Boot Error Record Table (BERT)\r | |
1346 | ///\r | |
1347 | typedef struct {\r | |
1348 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1349 | UINT32 BootErrorRegionLength;\r | |
1350 | UINT64 BootErrorRegion;\r | |
1351 | } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;\r | |
1352 | \r | |
1353 | ///\r | |
1354 | /// BERT Version (as defined in ACPI 5.1 spec.)\r | |
1355 | ///\r | |
1356 | #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r | |
1357 | \r | |
1358 | ///\r | |
1359 | /// Boot Error Region Block Status Definition\r | |
1360 | ///\r | |
1361 | typedef struct {\r | |
1362 | UINT32 UncorrectableErrorValid:1;\r | |
1363 | UINT32 CorrectableErrorValid:1;\r | |
1364 | UINT32 MultipleUncorrectableErrors:1;\r | |
1365 | UINT32 MultipleCorrectableErrors:1;\r | |
1366 | UINT32 ErrorDataEntryCount:10;\r | |
1367 | UINT32 Reserved:18;\r | |
1368 | } EFI_ACPI_5_1_ERROR_BLOCK_STATUS;\r | |
1369 | \r | |
1370 | ///\r | |
1371 | /// Boot Error Region Definition\r | |
1372 | ///\r | |
1373 | typedef struct {\r | |
1374 | EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r | |
1375 | UINT32 RawDataOffset;\r | |
1376 | UINT32 RawDataLength;\r | |
1377 | UINT32 DataLength;\r | |
1378 | UINT32 ErrorSeverity;\r | |
1379 | } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;\r | |
1380 | \r | |
1381 | //\r | |
1382 | // Boot Error Severity types\r | |
1383 | //\r | |
1384 | #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00\r | |
1385 | #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01\r | |
1386 | #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02\r | |
1387 | #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03\r | |
1388 | \r | |
1389 | ///\r | |
1390 | /// Generic Error Data Entry Definition\r | |
1391 | ///\r | |
1392 | typedef struct {\r | |
1393 | UINT8 SectionType[16];\r | |
1394 | UINT32 ErrorSeverity;\r | |
1395 | UINT16 Revision;\r | |
1396 | UINT8 ValidationBits;\r | |
1397 | UINT8 Flags;\r | |
1398 | UINT32 ErrorDataLength;\r | |
1399 | UINT8 FruId[16];\r | |
1400 | UINT8 FruText[20];\r | |
1401 | } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r | |
1402 | \r | |
1403 | ///\r | |
1404 | /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)\r | |
1405 | ///\r | |
1406 | #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r | |
1407 | \r | |
1408 | ///\r | |
1409 | /// HEST - Hardware Error Source Table\r | |
1410 | ///\r | |
1411 | typedef struct {\r | |
1412 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1413 | UINT32 ErrorSourceCount;\r | |
1414 | } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r | |
1415 | \r | |
1416 | ///\r | |
1417 | /// HEST Version (as defined in ACPI 5.1 spec.)\r | |
1418 | ///\r | |
1419 | #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r | |
1420 | \r | |
1421 | //\r | |
1422 | // Error Source structure types.\r | |
1423 | //\r | |
1424 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r | |
1425 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r | |
1426 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02\r | |
1427 | #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06\r | |
1428 | #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07\r | |
1429 | #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08\r | |
1430 | #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09\r | |
1431 | \r | |
1432 | //\r | |
1433 | // Error Source structure flags.\r | |
1434 | //\r | |
1435 | #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r | |
1436 | #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r | |
1437 | \r | |
1438 | ///\r | |
1439 | /// IA-32 Architecture Machine Check Exception Structure Definition\r | |
1440 | ///\r | |
1441 | typedef struct {\r | |
1442 | UINT16 Type;\r | |
1443 | UINT16 SourceId;\r | |
1444 | UINT8 Reserved0[2];\r | |
1445 | UINT8 Flags;\r | |
1446 | UINT8 Enabled;\r | |
1447 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1448 | UINT32 MaxSectionsPerRecord;\r | |
1449 | UINT64 GlobalCapabilityInitData;\r | |
1450 | UINT64 GlobalControlInitData;\r | |
1451 | UINT8 NumberOfHardwareBanks;\r | |
1452 | UINT8 Reserved1[7];\r | |
1453 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r | |
1454 | \r | |
1455 | ///\r | |
1456 | /// IA-32 Architecture Machine Check Bank Structure Definition\r | |
1457 | ///\r | |
1458 | typedef struct {\r | |
1459 | UINT8 BankNumber;\r | |
1460 | UINT8 ClearStatusOnInitialization;\r | |
1461 | UINT8 StatusDataFormat;\r | |
1462 | UINT8 Reserved0;\r | |
1463 | UINT32 ControlRegisterMsrAddress;\r | |
1464 | UINT64 ControlInitData;\r | |
1465 | UINT32 StatusRegisterMsrAddress;\r | |
1466 | UINT32 AddressRegisterMsrAddress;\r | |
1467 | UINT32 MiscRegisterMsrAddress;\r | |
1468 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r | |
1469 | \r | |
1470 | ///\r | |
1471 | /// IA-32 Architecture Machine Check Bank Structure MCA data format\r | |
1472 | ///\r | |
1473 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r | |
1474 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r | |
1475 | #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r | |
1476 | \r | |
1477 | //\r | |
1478 | // Hardware Error Notification types. All other values are reserved\r | |
1479 | //\r | |
1480 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r | |
1481 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r | |
1482 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r | |
1483 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r | |
1484 | #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r | |
1485 | \r | |
1486 | ///\r | |
1487 | /// Hardware Error Notification Configuration Write Enable Structure Definition\r | |
1488 | ///\r | |
1489 | typedef struct {\r | |
1490 | UINT16 Type:1;\r | |
1491 | UINT16 PollInterval:1;\r | |
1492 | UINT16 SwitchToPollingThresholdValue:1;\r | |
1493 | UINT16 SwitchToPollingThresholdWindow:1;\r | |
1494 | UINT16 ErrorThresholdValue:1;\r | |
1495 | UINT16 ErrorThresholdWindow:1;\r | |
1496 | UINT16 Reserved:10;\r | |
1497 | } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r | |
1498 | \r | |
1499 | ///\r | |
1500 | /// Hardware Error Notification Structure Definition\r | |
1501 | ///\r | |
1502 | typedef struct {\r | |
1503 | UINT8 Type;\r | |
1504 | UINT8 Length;\r | |
1505 | EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r | |
1506 | UINT32 PollInterval;\r | |
1507 | UINT32 Vector;\r | |
1508 | UINT32 SwitchToPollingThresholdValue;\r | |
1509 | UINT32 SwitchToPollingThresholdWindow;\r | |
1510 | UINT32 ErrorThresholdValue;\r | |
1511 | UINT32 ErrorThresholdWindow;\r | |
1512 | } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r | |
1513 | \r | |
1514 | ///\r | |
1515 | /// IA-32 Architecture Corrected Machine Check Structure Definition\r | |
1516 | ///\r | |
1517 | typedef struct {\r | |
1518 | UINT16 Type;\r | |
1519 | UINT16 SourceId;\r | |
1520 | UINT8 Reserved0[2];\r | |
1521 | UINT8 Flags;\r | |
1522 | UINT8 Enabled;\r | |
1523 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1524 | UINT32 MaxSectionsPerRecord;\r | |
1525 | EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r | |
1526 | UINT8 NumberOfHardwareBanks;\r | |
1527 | UINT8 Reserved1[3];\r | |
1528 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r | |
1529 | \r | |
1530 | ///\r | |
1531 | /// IA-32 Architecture NMI Error Structure Definition\r | |
1532 | ///\r | |
1533 | typedef struct {\r | |
1534 | UINT16 Type;\r | |
1535 | UINT16 SourceId;\r | |
1536 | UINT8 Reserved0[2];\r | |
1537 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1538 | UINT32 MaxSectionsPerRecord;\r | |
1539 | UINT32 MaxRawDataLength;\r | |
1540 | } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r | |
1541 | \r | |
1542 | ///\r | |
1543 | /// PCI Express Root Port AER Structure Definition\r | |
1544 | ///\r | |
1545 | typedef struct {\r | |
1546 | UINT16 Type;\r | |
1547 | UINT16 SourceId;\r | |
1548 | UINT8 Reserved0[2];\r | |
1549 | UINT8 Flags;\r | |
1550 | UINT8 Enabled;\r | |
1551 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1552 | UINT32 MaxSectionsPerRecord;\r | |
1553 | UINT32 Bus;\r | |
1554 | UINT16 Device;\r | |
1555 | UINT16 Function;\r | |
1556 | UINT16 DeviceControl;\r | |
1557 | UINT8 Reserved1[2];\r | |
1558 | UINT32 UncorrectableErrorMask;\r | |
1559 | UINT32 UncorrectableErrorSeverity;\r | |
1560 | UINT32 CorrectableErrorMask;\r | |
1561 | UINT32 AdvancedErrorCapabilitiesAndControl;\r | |
1562 | UINT32 RootErrorCommand;\r | |
1563 | } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r | |
1564 | \r | |
1565 | ///\r | |
1566 | /// PCI Express Device AER Structure Definition\r | |
1567 | ///\r | |
1568 | typedef struct {\r | |
1569 | UINT16 Type;\r | |
1570 | UINT16 SourceId;\r | |
1571 | UINT8 Reserved0[2];\r | |
1572 | UINT8 Flags;\r | |
1573 | UINT8 Enabled;\r | |
1574 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1575 | UINT32 MaxSectionsPerRecord;\r | |
1576 | UINT32 Bus;\r | |
1577 | UINT16 Device;\r | |
1578 | UINT16 Function;\r | |
1579 | UINT16 DeviceControl;\r | |
1580 | UINT8 Reserved1[2];\r | |
1581 | UINT32 UncorrectableErrorMask;\r | |
1582 | UINT32 UncorrectableErrorSeverity;\r | |
1583 | UINT32 CorrectableErrorMask;\r | |
1584 | UINT32 AdvancedErrorCapabilitiesAndControl;\r | |
1585 | } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r | |
1586 | \r | |
1587 | ///\r | |
1588 | /// PCI Express Bridge AER Structure Definition\r | |
1589 | ///\r | |
1590 | typedef struct {\r | |
1591 | UINT16 Type;\r | |
1592 | UINT16 SourceId;\r | |
1593 | UINT8 Reserved0[2];\r | |
1594 | UINT8 Flags;\r | |
1595 | UINT8 Enabled;\r | |
1596 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1597 | UINT32 MaxSectionsPerRecord;\r | |
1598 | UINT32 Bus;\r | |
1599 | UINT16 Device;\r | |
1600 | UINT16 Function;\r | |
1601 | UINT16 DeviceControl;\r | |
1602 | UINT8 Reserved1[2];\r | |
1603 | UINT32 UncorrectableErrorMask;\r | |
1604 | UINT32 UncorrectableErrorSeverity;\r | |
1605 | UINT32 CorrectableErrorMask;\r | |
1606 | UINT32 AdvancedErrorCapabilitiesAndControl;\r | |
1607 | UINT32 SecondaryUncorrectableErrorMask;\r | |
1608 | UINT32 SecondaryUncorrectableErrorSeverity;\r | |
1609 | UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r | |
1610 | } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r | |
1611 | \r | |
1612 | ///\r | |
1613 | /// Generic Hardware Error Source Structure Definition\r | |
1614 | ///\r | |
1615 | typedef struct {\r | |
1616 | UINT16 Type;\r | |
1617 | UINT16 SourceId;\r | |
1618 | UINT16 RelatedSourceId;\r | |
1619 | UINT8 Flags;\r | |
1620 | UINT8 Enabled;\r | |
1621 | UINT32 NumberOfRecordsToPreAllocate;\r | |
1622 | UINT32 MaxSectionsPerRecord;\r | |
1623 | UINT32 MaxRawDataLength;\r | |
1624 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r | |
1625 | EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r | |
1626 | UINT32 ErrorStatusBlockLength;\r | |
1627 | } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r | |
1628 | \r | |
1629 | ///\r | |
1630 | /// Generic Error Status Definition\r | |
1631 | ///\r | |
1632 | typedef struct {\r | |
1633 | EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r | |
1634 | UINT32 RawDataOffset;\r | |
1635 | UINT32 RawDataLength;\r | |
1636 | UINT32 DataLength;\r | |
1637 | UINT32 ErrorSeverity;\r | |
1638 | } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;\r | |
1639 | \r | |
1640 | ///\r | |
1641 | /// ERST - Error Record Serialization Table\r | |
1642 | ///\r | |
1643 | typedef struct {\r | |
1644 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1645 | UINT32 SerializationHeaderSize;\r | |
1646 | UINT8 Reserved0[4];\r | |
1647 | UINT32 InstructionEntryCount;\r | |
1648 | } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r | |
1649 | \r | |
1650 | ///\r | |
1651 | /// ERST Version (as defined in ACPI 5.1 spec.)\r | |
1652 | ///\r | |
1653 | #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r | |
1654 | \r | |
1655 | ///\r | |
1656 | /// ERST Serialization Actions\r | |
1657 | ///\r | |
1658 | #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00\r | |
1659 | #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01\r | |
1660 | #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02\r | |
1661 | #define EFI_ACPI_5_1_ERST_END_OPERATION 0x03\r | |
1662 | #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04\r | |
1663 | #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05\r | |
1664 | #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06\r | |
1665 | #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07\r | |
1666 | #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08\r | |
1667 | #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09\r | |
1668 | #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A\r | |
1669 | #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r | |
1670 | #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r | |
1671 | #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r | |
1672 | #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r | |
1673 | \r | |
1674 | ///\r | |
1675 | /// ERST Action Command Status\r | |
1676 | ///\r | |
1677 | #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00\r | |
1678 | #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r | |
1679 | #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r | |
1680 | #define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03\r | |
1681 | #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r | |
1682 | #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05\r | |
1683 | \r | |
1684 | ///\r | |
1685 | /// ERST Serialization Instructions\r | |
1686 | ///\r | |
1687 | #define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00\r | |
1688 | #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01\r | |
1689 | #define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02\r | |
1690 | #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03\r | |
1691 | #define EFI_ACPI_5_1_ERST_NOOP 0x04\r | |
1692 | #define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05\r | |
1693 | #define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06\r | |
1694 | #define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07\r | |
1695 | #define EFI_ACPI_5_1_ERST_ADD 0x08\r | |
1696 | #define EFI_ACPI_5_1_ERST_SUBTRACT 0x09\r | |
1697 | #define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A\r | |
1698 | #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B\r | |
1699 | #define EFI_ACPI_5_1_ERST_STALL 0x0C\r | |
1700 | #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D\r | |
1701 | #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r | |
1702 | #define EFI_ACPI_5_1_ERST_GOTO 0x0F\r | |
1703 | #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10\r | |
1704 | #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11\r | |
1705 | #define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12\r | |
1706 | \r | |
1707 | ///\r | |
1708 | /// ERST Instruction Flags\r | |
1709 | ///\r | |
1710 | #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01\r | |
1711 | \r | |
1712 | ///\r | |
1713 | /// ERST Serialization Instruction Entry\r | |
1714 | ///\r | |
1715 | typedef struct {\r | |
1716 | UINT8 SerializationAction;\r | |
1717 | UINT8 Instruction;\r | |
1718 | UINT8 Flags;\r | |
1719 | UINT8 Reserved0;\r | |
1720 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r | |
1721 | UINT64 Value;\r | |
1722 | UINT64 Mask;\r | |
1723 | } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r | |
1724 | \r | |
1725 | ///\r | |
1726 | /// EINJ - Error Injection Table\r | |
1727 | ///\r | |
1728 | typedef struct {\r | |
1729 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1730 | UINT32 InjectionHeaderSize;\r | |
1731 | UINT8 InjectionFlags;\r | |
1732 | UINT8 Reserved0[3];\r | |
1733 | UINT32 InjectionEntryCount;\r | |
1734 | } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;\r | |
1735 | \r | |
1736 | ///\r | |
1737 | /// EINJ Version (as defined in ACPI 5.1 spec.)\r | |
1738 | ///\r | |
1739 | #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01\r | |
1740 | \r | |
1741 | ///\r | |
1742 | /// EINJ Error Injection Actions\r | |
1743 | ///\r | |
1744 | #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00\r | |
1745 | #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r | |
1746 | #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02\r | |
1747 | #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03\r | |
1748 | #define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04\r | |
1749 | #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05\r | |
1750 | #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06\r | |
1751 | #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07\r | |
1752 | #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF\r | |
1753 | \r | |
1754 | ///\r | |
1755 | /// EINJ Action Command Status\r | |
1756 | ///\r | |
1757 | #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00\r | |
1758 | #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r | |
1759 | #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02\r | |
1760 | \r | |
1761 | ///\r | |
1762 | /// EINJ Error Type Definition\r | |
1763 | ///\r | |
1764 | #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r | |
1765 | #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r | |
1766 | #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r | |
1767 | #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r | |
1768 | #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r | |
1769 | #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r | |
1770 | #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r | |
1771 | #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r | |
1772 | #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r | |
1773 | #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r | |
1774 | #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r | |
1775 | #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r | |
1776 | \r | |
1777 | ///\r | |
1778 | /// EINJ Injection Instructions\r | |
1779 | ///\r | |
1780 | #define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00\r | |
1781 | #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01\r | |
1782 | #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02\r | |
1783 | #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03\r | |
1784 | #define EFI_ACPI_5_1_EINJ_NOOP 0x04\r | |
1785 | \r | |
1786 | ///\r | |
1787 | /// EINJ Instruction Flags\r | |
1788 | ///\r | |
1789 | #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01\r | |
1790 | \r | |
1791 | ///\r | |
1792 | /// EINJ Injection Instruction Entry\r | |
1793 | ///\r | |
1794 | typedef struct {\r | |
1795 | UINT8 InjectionAction;\r | |
1796 | UINT8 Instruction;\r | |
1797 | UINT8 Flags;\r | |
1798 | UINT8 Reserved0;\r | |
1799 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r | |
1800 | UINT64 Value;\r | |
1801 | UINT64 Mask;\r | |
1802 | } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;\r | |
1803 | \r | |
1804 | ///\r | |
1805 | /// EINJ Trigger Action Table\r | |
1806 | ///\r | |
1807 | typedef struct {\r | |
1808 | UINT32 HeaderSize;\r | |
1809 | UINT32 Revision;\r | |
1810 | UINT32 TableSize;\r | |
1811 | UINT32 EntryCount;\r | |
1812 | } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;\r | |
1813 | \r | |
1814 | ///\r | |
1815 | /// Platform Communications Channel Table (PCCT)\r | |
1816 | ///\r | |
1817 | typedef struct {\r | |
1818 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
1819 | UINT32 Flags;\r | |
1820 | UINT64 Reserved;\r | |
1821 | } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r | |
1822 | \r | |
1823 | ///\r | |
1824 | /// PCCT Version (as defined in ACPI 5.1 spec.)\r | |
1825 | ///\r | |
1826 | #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r | |
1827 | \r | |
1828 | ///\r | |
1829 | /// PCCT Global Flags\r | |
1830 | ///\r | |
1831 | #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0\r | |
1832 | \r | |
1833 | //\r | |
1834 | // PCCT Subspace type\r | |
1835 | //\r | |
1836 | #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r | |
1837 | \r | |
1838 | ///\r | |
1839 | /// PCC Subspace Structure Header\r | |
1840 | ///\r | |
1841 | typedef struct {\r | |
1842 | UINT8 Type;\r | |
1843 | UINT8 Length;\r | |
1844 | } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;\r | |
1845 | \r | |
1846 | ///\r | |
1847 | /// Generic Communications Subspace Structure\r | |
1848 | ///\r | |
1849 | typedef struct {\r | |
1850 | UINT8 Type;\r | |
1851 | UINT8 Length;\r | |
1852 | UINT8 Reserved[6];\r | |
1853 | UINT64 BaseAddress;\r | |
1854 | UINT64 AddressLength;\r | |
1855 | EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r | |
1856 | UINT64 DoorbellPreserve;\r | |
1857 | UINT64 DoorbellWrite;\r | |
1858 | UINT32 NominalLatency;\r | |
1859 | UINT32 MaximumPeriodicAccessRate;\r | |
1860 | UINT16 MinimumRequestTurnaroundTime;\r | |
1861 | } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;\r | |
1862 | \r | |
1863 | ///\r | |
1864 | /// Generic Communications Channel Shared Memory Region\r | |
1865 | ///\r | |
1866 | \r | |
1867 | typedef struct {\r | |
1868 | UINT8 Command;\r | |
1869 | UINT8 Reserved:7;\r | |
1870 | UINT8 GenerateSci:1;\r | |
1871 | } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r | |
1872 | \r | |
1873 | typedef struct {\r | |
1874 | UINT8 CommandComplete:1;\r | |
1875 | UINT8 SciDoorbell:1;\r | |
1876 | UINT8 Error:1;\r | |
9095d37b | 1877 | UINT8 PlatformNotification:1;\r |
a71c80b6 | 1878 | UINT8 Reserved:4;\r |
f449affe JY |
1879 | UINT8 Reserved1;\r |
1880 | } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r | |
1881 | \r | |
1882 | typedef struct {\r | |
1883 | UINT32 Signature;\r | |
1884 | EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r | |
1885 | EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r | |
1886 | } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r | |
1887 | \r | |
1888 | //\r | |
1889 | // Known table signatures\r | |
1890 | //\r | |
1891 | \r | |
1892 | ///\r | |
1893 | /// "RSD PTR " Root System Description Pointer\r | |
1894 | ///\r | |
9095d37b | 1895 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r |
f449affe JY |
1896 | \r |
1897 | ///\r | |
1898 | /// "APIC" Multiple APIC Description Table\r | |
1899 | ///\r | |
1900 | #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r | |
1901 | \r | |
1902 | ///\r | |
1903 | /// "BERT" Boot Error Record Table\r | |
1904 | ///\r | |
1905 | #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r | |
1906 | \r | |
1907 | ///\r | |
1908 | /// "BGRT" Boot Graphics Resource Table\r | |
1909 | ///\r | |
1910 | #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r | |
1911 | \r | |
1912 | ///\r | |
1913 | /// "CPEP" Corrected Platform Error Polling Table\r | |
1914 | ///\r | |
1915 | #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r | |
1916 | \r | |
1917 | ///\r | |
1918 | /// "DSDT" Differentiated System Description Table\r | |
1919 | ///\r | |
1920 | #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r | |
1921 | \r | |
1922 | ///\r | |
1923 | /// "ECDT" Embedded Controller Boot Resources Table\r | |
1924 | ///\r | |
1925 | #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r | |
1926 | \r | |
1927 | ///\r | |
1928 | /// "EINJ" Error Injection Table\r | |
1929 | ///\r | |
1930 | #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r | |
1931 | \r | |
1932 | ///\r | |
1933 | /// "ERST" Error Record Serialization Table\r | |
1934 | ///\r | |
1935 | #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r | |
1936 | \r | |
1937 | ///\r | |
1938 | /// "FACP" Fixed ACPI Description Table\r | |
1939 | ///\r | |
1940 | #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r | |
1941 | \r | |
1942 | ///\r | |
1943 | /// "FACS" Firmware ACPI Control Structure\r | |
1944 | ///\r | |
1945 | #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r | |
1946 | \r | |
1947 | ///\r | |
1948 | /// "FPDT" Firmware Performance Data Table\r | |
1949 | ///\r | |
1950 | #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r | |
1951 | \r | |
1952 | ///\r | |
1953 | /// "GTDT" Generic Timer Description Table\r | |
1954 | ///\r | |
1955 | #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r | |
1956 | \r | |
1957 | ///\r | |
1958 | /// "HEST" Hardware Error Source Table\r | |
1959 | ///\r | |
1960 | #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r | |
1961 | \r | |
1962 | ///\r | |
1963 | /// "MPST" Memory Power State Table\r | |
1964 | ///\r | |
1965 | #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r | |
1966 | \r | |
1967 | ///\r | |
1968 | /// "MSCT" Maximum System Characteristics Table\r | |
1969 | ///\r | |
1970 | #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r | |
1971 | \r | |
1972 | ///\r | |
1973 | /// "PMTT" Platform Memory Topology Table\r | |
1974 | ///\r | |
1975 | #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r | |
1976 | \r | |
1977 | ///\r | |
1978 | /// "PSDT" Persistent System Description Table\r | |
1979 | ///\r | |
1980 | #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r | |
1981 | \r | |
1982 | ///\r | |
1983 | /// "RASF" ACPI RAS Feature Table\r | |
1984 | ///\r | |
1985 | #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r | |
1986 | \r | |
1987 | ///\r | |
1988 | /// "RSDT" Root System Description Table\r | |
1989 | ///\r | |
1990 | #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r | |
1991 | \r | |
1992 | ///\r | |
1993 | /// "SBST" Smart Battery Specification Table\r | |
1994 | ///\r | |
1995 | #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r | |
1996 | \r | |
1997 | ///\r | |
1998 | /// "SLIT" System Locality Information Table\r | |
1999 | ///\r | |
2000 | #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r | |
2001 | \r | |
2002 | ///\r | |
2003 | /// "SRAT" System Resource Affinity Table\r | |
2004 | ///\r | |
2005 | #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r | |
2006 | \r | |
2007 | ///\r | |
2008 | /// "SSDT" Secondary System Description Table\r | |
2009 | ///\r | |
2010 | #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r | |
2011 | \r | |
2012 | ///\r | |
2013 | /// "XSDT" Extended System Description Table\r | |
2014 | ///\r | |
2015 | #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r | |
2016 | \r | |
2017 | ///\r | |
2018 | /// "BOOT" MS Simple Boot Spec\r | |
2019 | ///\r | |
2020 | #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r | |
2021 | \r | |
2022 | ///\r | |
2023 | /// "CSRT" MS Core System Resource Table\r | |
2024 | ///\r | |
2025 | #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r | |
2026 | \r | |
2027 | ///\r | |
2028 | /// "DBG2" MS Debug Port 2 Spec\r | |
2029 | ///\r | |
2030 | #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r | |
2031 | \r | |
2032 | ///\r | |
2033 | /// "DBGP" MS Debug Port Spec\r | |
2034 | ///\r | |
2035 | #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r | |
2036 | \r | |
2037 | ///\r | |
2038 | /// "DMAR" DMA Remapping Table\r | |
2039 | ///\r | |
2040 | #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r | |
2041 | \r | |
2042 | ///\r | |
2043 | /// "DRTM" Dynamic Root of Trust for Measurement Table\r | |
2044 | ///\r | |
2045 | #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r | |
2046 | \r | |
2047 | ///\r | |
2048 | /// "ETDT" Event Timer Description Table\r | |
2049 | ///\r | |
2050 | #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r | |
2051 | \r | |
2052 | ///\r | |
2053 | /// "HPET" IA-PC High Precision Event Timer Table\r | |
2054 | ///\r | |
2055 | #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r | |
2056 | \r | |
2057 | ///\r | |
2058 | /// "iBFT" iSCSI Boot Firmware Table\r | |
2059 | ///\r | |
2060 | #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r | |
2061 | \r | |
2062 | ///\r | |
2063 | /// "IVRS" I/O Virtualization Reporting Structure\r | |
2064 | ///\r | |
2065 | #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r | |
2066 | \r | |
2067 | ///\r | |
2068 | /// "LPIT" Low Power Idle Table\r | |
2069 | ///\r | |
2070 | #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r | |
2071 | \r | |
2072 | ///\r | |
2073 | /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r | |
2074 | ///\r | |
2075 | #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r | |
2076 | \r | |
2077 | ///\r | |
2078 | /// "MCHI" Management Controller Host Interface Table\r | |
2079 | ///\r | |
2080 | #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r | |
2081 | \r | |
2082 | ///\r | |
2083 | /// "MSDM" MS Data Management Table\r | |
2084 | ///\r | |
2085 | #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r | |
2086 | \r | |
2087 | ///\r | |
2088 | /// "SLIC" MS Software Licensing Table Specification\r | |
2089 | ///\r | |
2090 | #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r | |
2091 | \r | |
2092 | ///\r | |
2093 | /// "SPCR" Serial Port Concole Redirection Table\r | |
2094 | ///\r | |
2095 | #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r | |
2096 | \r | |
2097 | ///\r | |
2098 | /// "SPMI" Server Platform Management Interface Table\r | |
2099 | ///\r | |
2100 | #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r | |
2101 | \r | |
2102 | ///\r | |
2103 | /// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r | |
2104 | ///\r | |
2105 | #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r | |
2106 | \r | |
2107 | ///\r | |
2108 | /// "TPM2" Trusted Computing Platform 1 Table\r | |
2109 | ///\r | |
2110 | #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r | |
2111 | \r | |
2112 | ///\r | |
2113 | /// "UEFI" UEFI ACPI Data Table\r | |
2114 | ///\r | |
2115 | #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r | |
2116 | \r | |
2117 | ///\r | |
2118 | /// "WAET" Windows ACPI Emulated Devices Table\r | |
2119 | ///\r | |
2120 | #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r | |
2121 | \r | |
2122 | ///\r | |
2123 | /// "WDAT" Watchdog Action Table\r | |
2124 | ///\r | |
2125 | #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r | |
2126 | \r | |
2127 | ///\r | |
2128 | /// "WDRT" Watchdog Resource Table\r | |
2129 | ///\r | |
2130 | #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r | |
2131 | \r | |
2132 | ///\r | |
2133 | /// "WPBT" MS Platform Binary Table\r | |
2134 | ///\r | |
2135 | #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r | |
2136 | \r | |
2137 | #pragma pack()\r | |
2138 | \r | |
2139 | #endif\r |