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a7ed1e2e | 1 | /** @file\r |
68bf712d | 2 | Industry Standard Definitions of SMBIOS Table Specification v3.6.0.\r |
a7ed1e2e | 3 | \r |
782d0187 | 4 | Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r |
713e4b00 | 5 | (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r |
f06c92a6 | 6 | (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>\r |
28eeb08d | 7 | Copyright (c) 2022, AMD Incorporated. All rights reserved.<BR>\r |
9102518d | 8 | Copyright (c) 1985 - 2022, American Megatrends International LLC.<BR>\r |
9344f092 | 9 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
a7ed1e2e | 10 | \r |
a7ed1e2e | 11 | **/\r |
12 | \r | |
13 | #ifndef __SMBIOS_STANDARD_H__\r | |
14 | #define __SMBIOS_STANDARD_H__\r | |
98cb9ae8 | 15 | \r |
f2d0889f | 16 | ///\r |
17 | /// Reference SMBIOS 2.6, chapter 3.1.2.\r | |
18 | /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r | |
19 | /// use by this specification.\r | |
20 | ///\r | |
2f88bd3a | 21 | #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r |
f2d0889f | 22 | \r |
7ddba202 SZ |
23 | ///\r |
24 | /// Reference SMBIOS 2.7, chapter 6.1.2.\r | |
25 | /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r | |
26 | /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r | |
27 | /// This number is not used for any other purpose by the SMBIOS specification.\r | |
28 | ///\r | |
2f88bd3a | 29 | #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r |
7ddba202 | 30 | \r |
f2d0889f | 31 | ///\r |
af2dc6a7 | 32 | /// Reference SMBIOS 2.6, chapter 3.1.3.\r |
33 | /// Each text string is limited to 64 significant characters due to system MIF limitations.\r | |
7ddba202 SZ |
34 | /// Reference SMBIOS 2.7, chapter 6.1.3.\r |
35 | /// It will have no limit on the length of each individual text string.\r | |
f2d0889f | 36 | ///\r |
2f88bd3a | 37 | #define SMBIOS_STRING_MAX_LENGTH 64\r |
f2d0889f | 38 | \r |
7254d134 JY |
39 | //\r |
40 | // The length of the entire structure table (including all strings) must be reported\r | |
41 | // in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r | |
42 | // which is a WORD field limited to 65,535 bytes.\r | |
43 | //\r | |
2f88bd3a | 44 | #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r |
7254d134 JY |
45 | \r |
46 | //\r | |
47 | // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r | |
48 | //\r | |
2f88bd3a | 49 | #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r |
7254d134 | 50 | \r |
bb7051eb | 51 | //\r |
f06c92a6 | 52 | // SMBIOS type macros which is according to SMBIOS 3.3.0 specification.\r |
bb7051eb | 53 | //\r |
2f88bd3a MK |
54 | #define SMBIOS_TYPE_BIOS_INFORMATION 0\r |
55 | #define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r | |
56 | #define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r | |
57 | #define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r | |
58 | #define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r | |
59 | #define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r | |
60 | #define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r | |
61 | #define SMBIOS_TYPE_CACHE_INFORMATION 7\r | |
62 | #define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r | |
63 | #define SMBIOS_TYPE_SYSTEM_SLOTS 9\r | |
64 | #define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r | |
65 | #define SMBIOS_TYPE_OEM_STRINGS 11\r | |
66 | #define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r | |
67 | #define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r | |
68 | #define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r | |
69 | #define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r | |
70 | #define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r | |
71 | #define SMBIOS_TYPE_MEMORY_DEVICE 17\r | |
72 | #define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r | |
73 | #define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r | |
74 | #define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r | |
75 | #define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r | |
76 | #define SMBIOS_TYPE_PORTABLE_BATTERY 22\r | |
77 | #define SMBIOS_TYPE_SYSTEM_RESET 23\r | |
78 | #define SMBIOS_TYPE_HARDWARE_SECURITY 24\r | |
79 | #define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r | |
80 | #define SMBIOS_TYPE_VOLTAGE_PROBE 26\r | |
81 | #define SMBIOS_TYPE_COOLING_DEVICE 27\r | |
82 | #define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r | |
83 | #define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r | |
84 | #define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r | |
85 | #define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r | |
86 | #define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r | |
87 | #define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r | |
88 | #define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r | |
89 | #define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r | |
90 | #define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r | |
91 | #define SMBIOS_TYPE_MEMORY_CHANNEL 37\r | |
92 | #define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r | |
93 | #define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r | |
94 | #define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r | |
95 | #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r | |
96 | #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r | |
97 | #define SMBIOS_TYPE_TPM_DEVICE 43\r | |
98 | #define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44\r | |
28eeb08d ALA |
99 | #define SMBIOS_TYPE_FIRMWARE_INVENTORY_INFORMATION 45\r |
100 | #define SMBIOS_TYPE_STRING_PROPERTY_INFORMATION 46\r | |
bb7051eb | 101 | \r |
f2d0889f | 102 | ///\r |
103 | /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r | |
9095d37b | 104 | /// Upper-level software that interprets the SMBIOS structure-table should bypass an\r |
f2d0889f | 105 | /// Inactive structure just like a structure type that the software does not recognize.\r |
106 | ///\r | |
2f88bd3a | 107 | #define SMBIOS_TYPE_INACTIVE 0x007E\r |
f2d0889f | 108 | \r |
109 | ///\r | |
110 | /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r | |
111 | /// The end-of-table indicator is used in the last physical structure in a table\r | |
112 | ///\r | |
2f88bd3a | 113 | #define SMBIOS_TYPE_END_OF_TABLE 0x007F\r |
f2d0889f | 114 | \r |
2f88bd3a MK |
115 | #define SMBIOS_OEM_BEGIN 128\r |
116 | #define SMBIOS_OEM_END 255\r | |
bb7051eb MH |
117 | \r |
118 | ///\r | |
119 | /// Types 0 through 127 (7Fh) are reserved for and defined by this\r | |
9095d37b | 120 | /// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r |
bb7051eb | 121 | ///\r |
2f88bd3a | 122 | typedef UINT8 SMBIOS_TYPE;\r |
bb7051eb MH |
123 | \r |
124 | ///\r | |
125 | /// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r | |
126 | /// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r | |
127 | /// Structure function to retrieve a specific structure; the handle numbers are not required to be\r | |
128 | /// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r | |
129 | /// use by this specification.\r | |
130 | /// If the system configuration changes, a previously assigned handle might no longer exist.\r | |
131 | /// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r | |
132 | /// number to another structure.\r | |
133 | ///\r | |
134 | typedef UINT16 SMBIOS_HANDLE;\r | |
135 | \r | |
4135253b | 136 | ///\r |
af2dc6a7 | 137 | /// Smbios Table Entry Point Structure.\r |
4135253b | 138 | ///\r |
766f4bc1 | 139 | #pragma pack(1)\r |
a7ed1e2e | 140 | typedef struct {\r |
2f88bd3a MK |
141 | UINT8 AnchorString[4];\r |
142 | UINT8 EntryPointStructureChecksum;\r | |
143 | UINT8 EntryPointLength;\r | |
144 | UINT8 MajorVersion;\r | |
145 | UINT8 MinorVersion;\r | |
146 | UINT16 MaxStructureSize;\r | |
147 | UINT8 EntryPointRevision;\r | |
148 | UINT8 FormattedArea[5];\r | |
149 | UINT8 IntermediateAnchorString[5];\r | |
150 | UINT8 IntermediateChecksum;\r | |
151 | UINT16 TableLength;\r | |
152 | UINT32 TableAddress;\r | |
153 | UINT16 NumberOfSmbiosStructures;\r | |
154 | UINT8 SmbiosBcdRevision;\r | |
a7ed1e2e | 155 | } SMBIOS_TABLE_ENTRY_POINT;\r |
156 | \r | |
6cd35c62 | 157 | typedef struct {\r |
2f88bd3a MK |
158 | UINT8 AnchorString[5];\r |
159 | UINT8 EntryPointStructureChecksum;\r | |
160 | UINT8 EntryPointLength;\r | |
161 | UINT8 MajorVersion;\r | |
162 | UINT8 MinorVersion;\r | |
163 | UINT8 DocRev;\r | |
164 | UINT8 EntryPointRevision;\r | |
165 | UINT8 Reserved;\r | |
166 | UINT32 TableMaximumSize;\r | |
167 | UINT64 TableAddress;\r | |
6cd35c62 EL |
168 | } SMBIOS_TABLE_3_0_ENTRY_POINT;\r |
169 | \r | |
ec8432e5 | 170 | ///\r |
af2dc6a7 | 171 | /// The Smbios structure header.\r |
ec8432e5 | 172 | ///\r |
a7ed1e2e | 173 | typedef struct {\r |
2f88bd3a MK |
174 | SMBIOS_TYPE Type;\r |
175 | UINT8 Length;\r | |
176 | SMBIOS_HANDLE Handle;\r | |
a7ed1e2e | 177 | } SMBIOS_STRUCTURE;\r |
178 | \r | |
bf7ea009 | 179 | ///\r |
bb7051eb MH |
180 | /// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r |
181 | /// the formatted portion of the structure. This method of returning string information eliminates the need for\r | |
182 | /// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r | |
183 | /// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r | |
184 | /// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r | |
185 | /// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r | |
186 | /// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r | |
187 | /// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r | |
188 | /// references), the formatted section of the structure is followed by two null (00h) BYTES.\r | |
bf7ea009 | 189 | ///\r |
61ce5861 | 190 | typedef UINT8 SMBIOS_TABLE_STRING;\r |
191 | \r | |
98cb9ae8 | 192 | ///\r |
7ddba202 SZ |
193 | /// BIOS Characteristics\r |
194 | /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r | |
98cb9ae8 | 195 | ///\r |
196 | typedef struct {\r | |
2f88bd3a MK |
197 | UINT32 Reserved : 2; ///< Bits 0-1.\r |
198 | UINT32 Unknown : 1;\r | |
199 | UINT32 BiosCharacteristicsNotSupported : 1;\r | |
200 | UINT32 IsaIsSupported : 1;\r | |
201 | UINT32 McaIsSupported : 1;\r | |
202 | UINT32 EisaIsSupported : 1;\r | |
203 | UINT32 PciIsSupported : 1;\r | |
204 | UINT32 PcmciaIsSupported : 1;\r | |
205 | UINT32 PlugAndPlayIsSupported : 1;\r | |
206 | UINT32 ApmIsSupported : 1;\r | |
207 | UINT32 BiosIsUpgradable : 1;\r | |
208 | UINT32 BiosShadowingAllowed : 1;\r | |
209 | UINT32 VlVesaIsSupported : 1;\r | |
210 | UINT32 EscdSupportIsAvailable : 1;\r | |
211 | UINT32 BootFromCdIsSupported : 1;\r | |
212 | UINT32 SelectableBootIsSupported : 1;\r | |
213 | UINT32 RomBiosIsSocketed : 1;\r | |
214 | UINT32 BootFromPcmciaIsSupported : 1;\r | |
215 | UINT32 EDDSpecificationIsSupported : 1;\r | |
216 | UINT32 JapaneseNecFloppyIsSupported : 1;\r | |
217 | UINT32 JapaneseToshibaFloppyIsSupported : 1;\r | |
218 | UINT32 Floppy525_360IsSupported : 1;\r | |
219 | UINT32 Floppy525_12IsSupported : 1;\r | |
220 | UINT32 Floppy35_720IsSupported : 1;\r | |
221 | UINT32 Floppy35_288IsSupported : 1;\r | |
222 | UINT32 PrintScreenIsSupported : 1;\r | |
223 | UINT32 Keyboard8042IsSupported : 1;\r | |
224 | UINT32 SerialIsSupported : 1;\r | |
225 | UINT32 PrinterIsSupported : 1;\r | |
226 | UINT32 CgaMonoIsSupported : 1;\r | |
227 | UINT32 NecPc98 : 1;\r | |
228 | UINT32 ReservedForVendor : 32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r | |
229 | ///< and bits 48-63 reserved for System Vendor.\r | |
98cb9ae8 | 230 | } MISC_BIOS_CHARACTERISTICS;\r |
231 | \r | |
232 | ///\r | |
7ddba202 SZ |
233 | /// BIOS Characteristics Extension Byte 1.\r |
234 | /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r | |
235 | /// within the BIOS Information structure.\r | |
98cb9ae8 | 236 | ///\r |
237 | typedef struct {\r | |
2f88bd3a MK |
238 | UINT8 AcpiIsSupported : 1;\r |
239 | UINT8 UsbLegacyIsSupported : 1;\r | |
240 | UINT8 AgpIsSupported : 1;\r | |
241 | UINT8 I2OBootIsSupported : 1;\r | |
242 | UINT8 Ls120BootIsSupported : 1;\r | |
243 | UINT8 AtapiZipDriveBootIsSupported : 1;\r | |
244 | UINT8 Boot1394IsSupported : 1;\r | |
245 | UINT8 SmartBatteryIsSupported : 1;\r | |
98cb9ae8 | 246 | } MBCE_BIOS_RESERVED;\r |
247 | \r | |
248 | ///\r | |
af2dc6a7 | 249 | /// BIOS Characteristics Extension Byte 2.\r |
7ddba202 | 250 | /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r |
98cb9ae8 | 251 | /// within the BIOS Information structure.\r |
252 | ///\r | |
253 | typedef struct {\r | |
2f88bd3a MK |
254 | UINT8 BiosBootSpecIsSupported : 1;\r |
255 | UINT8 FunctionKeyNetworkBootIsSupported : 1;\r | |
256 | UINT8 TargetContentDistributionEnabled : 1;\r | |
257 | UINT8 UefiSpecificationSupported : 1;\r | |
258 | UINT8 VirtualMachineSupported : 1;\r | |
28eeb08d ALA |
259 | UINT8 ManufacturingModeSupported : 1;\r |
260 | UINT8 ManufacturingModeEnabled : 1;\r | |
261 | UINT8 ExtensionByte2Reserved : 1;\r | |
98cb9ae8 | 262 | } MBCE_SYSTEM_RESERVED;\r |
263 | \r | |
264 | ///\r | |
af2dc6a7 | 265 | /// BIOS Characteristics Extension Bytes.\r |
98cb9ae8 | 266 | ///\r |
267 | typedef struct {\r | |
2f88bd3a MK |
268 | MBCE_BIOS_RESERVED BiosReserved;\r |
269 | MBCE_SYSTEM_RESERVED SystemReserved;\r | |
98cb9ae8 | 270 | } MISC_BIOS_CHARACTERISTICS_EXTENSION;\r |
271 | \r | |
ff6a1f32 SZ |
272 | ///\r |
273 | /// Extended BIOS ROM size.\r | |
274 | ///\r | |
275 | typedef struct {\r | |
2f88bd3a MK |
276 | UINT16 Size : 14;\r |
277 | UINT16 Unit : 2;\r | |
ff6a1f32 SZ |
278 | } EXTENDED_BIOS_ROM_SIZE;\r |
279 | \r | |
4135253b | 280 | ///\r |
af2dc6a7 | 281 | /// BIOS Information (Type 0).\r |
4135253b | 282 | ///\r |
61ce5861 | 283 | typedef struct {\r |
2f88bd3a MK |
284 | SMBIOS_STRUCTURE Hdr;\r |
285 | SMBIOS_TABLE_STRING Vendor;\r | |
286 | SMBIOS_TABLE_STRING BiosVersion;\r | |
287 | UINT16 BiosSegment;\r | |
288 | SMBIOS_TABLE_STRING BiosReleaseDate;\r | |
289 | UINT8 BiosSize;\r | |
290 | MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r | |
291 | UINT8 BIOSCharacteristicsExtensionBytes[2];\r | |
292 | UINT8 SystemBiosMajorRelease;\r | |
293 | UINT8 SystemBiosMinorRelease;\r | |
294 | UINT8 EmbeddedControllerFirmwareMajorRelease;\r | |
295 | UINT8 EmbeddedControllerFirmwareMinorRelease;\r | |
ff6a1f32 SZ |
296 | //\r |
297 | // Add for smbios 3.1.0\r | |
298 | //\r | |
2f88bd3a | 299 | EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r |
61ce5861 | 300 | } SMBIOS_TABLE_TYPE0;\r |
301 | \r | |
98cb9ae8 | 302 | ///\r |
af2dc6a7 | 303 | /// System Wake-up Type.\r |
98cb9ae8 | 304 | ///\r |
9095d37b | 305 | typedef enum {\r |
2f88bd3a MK |
306 | SystemWakeupTypeReserved = 0x00,\r |
307 | SystemWakeupTypeOther = 0x01,\r | |
308 | SystemWakeupTypeUnknown = 0x02,\r | |
309 | SystemWakeupTypeApmTimer = 0x03,\r | |
310 | SystemWakeupTypeModemRing = 0x04,\r | |
311 | SystemWakeupTypeLanRemote = 0x05,\r | |
312 | SystemWakeupTypePowerSwitch = 0x06,\r | |
313 | SystemWakeupTypePciPme = 0x07,\r | |
314 | SystemWakeupTypeAcPowerRestored = 0x08\r | |
98cb9ae8 | 315 | } MISC_SYSTEM_WAKEUP_TYPE;\r |
316 | \r | |
4135253b | 317 | ///\r |
af2dc6a7 | 318 | /// System Information (Type 1).\r |
9095d37b LG |
319 | ///\r |
320 | /// The information in this structure defines attributes of the overall system and is\r | |
98cb9ae8 | 321 | /// intended to be associated with the Component ID group of the system's MIF.\r |
9095d37b | 322 | /// An SMBIOS implementation is associated with a single system instance and contains\r |
98cb9ae8 | 323 | /// one and only one System Information (Type 1) structure.\r |
4135253b | 324 | ///\r |
61ce5861 | 325 | typedef struct {\r |
2f88bd3a MK |
326 | SMBIOS_STRUCTURE Hdr;\r |
327 | SMBIOS_TABLE_STRING Manufacturer;\r | |
328 | SMBIOS_TABLE_STRING ProductName;\r | |
329 | SMBIOS_TABLE_STRING Version;\r | |
330 | SMBIOS_TABLE_STRING SerialNumber;\r | |
331 | GUID Uuid;\r | |
332 | UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r | |
333 | SMBIOS_TABLE_STRING SKUNumber;\r | |
334 | SMBIOS_TABLE_STRING Family;\r | |
61ce5861 | 335 | } SMBIOS_TABLE_TYPE1;\r |
336 | \r | |
98cb9ae8 | 337 | ///\r |
9095d37b | 338 | /// Base Board - Feature Flags.\r |
98cb9ae8 | 339 | ///\r |
340 | typedef struct {\r | |
2f88bd3a MK |
341 | UINT8 Motherboard : 1;\r |
342 | UINT8 RequiresDaughterCard : 1;\r | |
343 | UINT8 Removable : 1;\r | |
344 | UINT8 Replaceable : 1;\r | |
345 | UINT8 HotSwappable : 1;\r | |
346 | UINT8 Reserved : 3;\r | |
98cb9ae8 | 347 | } BASE_BOARD_FEATURE_FLAGS;\r |
348 | \r | |
349 | ///\r | |
af2dc6a7 | 350 | /// Base Board - Board Type.\r |
98cb9ae8 | 351 | ///\r |
9095d37b | 352 | typedef enum {\r |
2f88bd3a MK |
353 | BaseBoardTypeUnknown = 0x1,\r |
354 | BaseBoardTypeOther = 0x2,\r | |
355 | BaseBoardTypeServerBlade = 0x3,\r | |
356 | BaseBoardTypeConnectivitySwitch = 0x4,\r | |
357 | BaseBoardTypeSystemManagementModule = 0x5,\r | |
358 | BaseBoardTypeProcessorModule = 0x6,\r | |
359 | BaseBoardTypeIOModule = 0x7,\r | |
360 | BaseBoardTypeMemoryModule = 0x8,\r | |
361 | BaseBoardTypeDaughterBoard = 0x9,\r | |
362 | BaseBoardTypeMotherBoard = 0xA,\r | |
363 | BaseBoardTypeProcessorMemoryModule = 0xB,\r | |
364 | BaseBoardTypeProcessorIOModule = 0xC,\r | |
365 | BaseBoardTypeInterconnectBoard = 0xD\r | |
98cb9ae8 | 366 | } BASE_BOARD_TYPE;\r |
367 | \r | |
4135253b | 368 | ///\r |
af2dc6a7 | 369 | /// Base Board (or Module) Information (Type 2).\r |
4135253b | 370 | ///\r |
9095d37b | 371 | /// The information in this structure defines attributes of a system baseboard -\r |
98cb9ae8 | 372 | /// for example a motherboard, planar, or server blade or other standard system module.\r |
373 | ///\r | |
61ce5861 | 374 | typedef struct {\r |
2f88bd3a MK |
375 | SMBIOS_STRUCTURE Hdr;\r |
376 | SMBIOS_TABLE_STRING Manufacturer;\r | |
377 | SMBIOS_TABLE_STRING ProductName;\r | |
378 | SMBIOS_TABLE_STRING Version;\r | |
379 | SMBIOS_TABLE_STRING SerialNumber;\r | |
380 | SMBIOS_TABLE_STRING AssetTag;\r | |
381 | BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r | |
382 | SMBIOS_TABLE_STRING LocationInChassis;\r | |
383 | UINT16 ChassisHandle;\r | |
384 | UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r | |
385 | UINT8 NumberOfContainedObjectHandles;\r | |
386 | UINT16 ContainedObjectHandles[1];\r | |
61ce5861 | 387 | } SMBIOS_TABLE_TYPE2;\r |
388 | \r | |
98cb9ae8 | 389 | ///\r |
390 | /// System Enclosure or Chassis Types\r | |
391 | ///\r | |
9095d37b | 392 | typedef enum {\r |
2f88bd3a MK |
393 | MiscChassisTypeOther = 0x01,\r |
394 | MiscChassisTypeUnknown = 0x02,\r | |
395 | MiscChassisTypeDeskTop = 0x03,\r | |
396 | MiscChassisTypeLowProfileDesktop = 0x04,\r | |
397 | MiscChassisTypePizzaBox = 0x05,\r | |
398 | MiscChassisTypeMiniTower = 0x06,\r | |
399 | MiscChassisTypeTower = 0x07,\r | |
400 | MiscChassisTypePortable = 0x08,\r | |
401 | MiscChassisTypeLapTop = 0x09,\r | |
402 | MiscChassisTypeNotebook = 0x0A,\r | |
403 | MiscChassisTypeHandHeld = 0x0B,\r | |
404 | MiscChassisTypeDockingStation = 0x0C,\r | |
405 | MiscChassisTypeAllInOne = 0x0D,\r | |
406 | MiscChassisTypeSubNotebook = 0x0E,\r | |
407 | MiscChassisTypeSpaceSaving = 0x0F,\r | |
408 | MiscChassisTypeLunchBox = 0x10,\r | |
409 | MiscChassisTypeMainServerChassis = 0x11,\r | |
410 | MiscChassisTypeExpansionChassis = 0x12,\r | |
411 | MiscChassisTypeSubChassis = 0x13,\r | |
412 | MiscChassisTypeBusExpansionChassis = 0x14,\r | |
413 | MiscChassisTypePeripheralChassis = 0x15,\r | |
414 | MiscChassisTypeRaidChassis = 0x16,\r | |
415 | MiscChassisTypeRackMountChassis = 0x17,\r | |
416 | MiscChassisTypeSealedCasePc = 0x18,\r | |
417 | MiscChassisMultiSystemChassis = 0x19,\r | |
418 | MiscChassisCompactPCI = 0x1A,\r | |
419 | MiscChassisAdvancedTCA = 0x1B,\r | |
420 | MiscChassisBlade = 0x1C,\r | |
421 | MiscChassisBladeEnclosure = 0x1D,\r | |
422 | MiscChassisTablet = 0x1E,\r | |
423 | MiscChassisConvertible = 0x1F,\r | |
424 | MiscChassisDetachable = 0x20,\r | |
425 | MiscChassisIoTGateway = 0x21,\r | |
426 | MiscChassisEmbeddedPc = 0x22,\r | |
427 | MiscChassisMiniPc = 0x23,\r | |
428 | MiscChassisStickPc = 0x24\r | |
98cb9ae8 | 429 | } MISC_CHASSIS_TYPE;\r |
430 | \r | |
431 | ///\r | |
af2dc6a7 | 432 | /// System Enclosure or Chassis States .\r |
98cb9ae8 | 433 | ///\r |
9095d37b | 434 | typedef enum {\r |
2f88bd3a MK |
435 | ChassisStateOther = 0x01,\r |
436 | ChassisStateUnknown = 0x02,\r | |
437 | ChassisStateSafe = 0x03,\r | |
438 | ChassisStateWarning = 0x04,\r | |
439 | ChassisStateCritical = 0x05,\r | |
440 | ChassisStateNonRecoverable = 0x06\r | |
98cb9ae8 | 441 | } MISC_CHASSIS_STATE;\r |
442 | \r | |
443 | ///\r | |
af2dc6a7 | 444 | /// System Enclosure or Chassis Security Status.\r |
98cb9ae8 | 445 | ///\r |
9095d37b | 446 | typedef enum {\r |
98cb9ae8 | 447 | ChassisSecurityStatusOther = 0x01,\r |
448 | ChassisSecurityStatusUnknown = 0x02,\r | |
449 | ChassisSecurityStatusNone = 0x03,\r | |
450 | ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r | |
451 | ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r | |
452 | } MISC_CHASSIS_SECURITY_STATE;\r | |
453 | \r | |
bf7ea009 | 454 | ///\r |
455 | /// Contained Element record\r | |
456 | ///\r | |
61ce5861 | 457 | typedef struct {\r |
2f88bd3a MK |
458 | UINT8 ContainedElementType;\r |
459 | UINT8 ContainedElementMinimum;\r | |
460 | UINT8 ContainedElementMaximum;\r | |
61ce5861 | 461 | } CONTAINED_ELEMENT;\r |
462 | \r | |
4135253b | 463 | ///\r |
af2dc6a7 | 464 | /// System Enclosure or Chassis (Type 3).\r |
4135253b | 465 | ///\r |
9095d37b LG |
466 | /// The information in this structure defines attributes of the system's mechanical enclosure(s).\r |
467 | /// For example, if a system included a separate enclosure for its peripheral devices,\r | |
98cb9ae8 | 468 | /// two structures would be returned: one for the main, system enclosure and the second for\r |
469 | /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r | |
9095d37b | 470 | /// support the population of the CIM_Chassis class.\r |
98cb9ae8 | 471 | ///\r |
61ce5861 | 472 | typedef struct {\r |
2f88bd3a MK |
473 | SMBIOS_STRUCTURE Hdr;\r |
474 | SMBIOS_TABLE_STRING Manufacturer;\r | |
475 | UINT8 Type;\r | |
476 | SMBIOS_TABLE_STRING Version;\r | |
477 | SMBIOS_TABLE_STRING SerialNumber;\r | |
478 | SMBIOS_TABLE_STRING AssetTag;\r | |
479 | UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
480 | UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
481 | UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
482 | UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r | |
483 | UINT8 OemDefined[4];\r | |
484 | UINT8 Height;\r | |
485 | UINT8 NumberofPowerCords;\r | |
486 | UINT8 ContainedElementCount;\r | |
487 | UINT8 ContainedElementRecordLength;\r | |
f15908aa CP |
488 | //\r |
489 | // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r | |
490 | //\r | |
2f88bd3a | 491 | CONTAINED_ELEMENT ContainedElements[1];\r |
f15908aa CP |
492 | //\r |
493 | // Add for smbios 2.7\r | |
494 | //\r | |
495 | // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r | |
496 | // the structure. Need to reference it by starting at offset 0x15 and adding\r | |
497 | // (ContainedElementCount * ContainedElementRecordLength) bytes.\r | |
498 | //\r | |
499 | // SMBIOS_TABLE_STRING SKUNumber;\r | |
61ce5861 | 500 | } SMBIOS_TABLE_TYPE3;\r |
501 | \r | |
98cb9ae8 | 502 | ///\r |
af2dc6a7 | 503 | /// Processor Information - Processor Type.\r |
98cb9ae8 | 504 | ///\r |
505 | typedef enum {\r | |
506 | ProcessorOther = 0x01,\r | |
507 | ProcessorUnknown = 0x02,\r | |
508 | CentralProcessor = 0x03,\r | |
509 | MathProcessor = 0x04,\r | |
510 | DspProcessor = 0x05,\r | |
511 | VideoProcessor = 0x06\r | |
512 | } PROCESSOR_TYPE_DATA;\r | |
513 | \r | |
514 | ///\r | |
af2dc6a7 | 515 | /// Processor Information - Processor Family.\r |
98cb9ae8 | 516 | ///\r |
517 | typedef enum {\r | |
2f88bd3a MK |
518 | ProcessorFamilyOther = 0x01,\r |
519 | ProcessorFamilyUnknown = 0x02,\r | |
520 | ProcessorFamily8086 = 0x03,\r | |
521 | ProcessorFamily80286 = 0x04,\r | |
522 | ProcessorFamilyIntel386 = 0x05,\r | |
523 | ProcessorFamilyIntel486 = 0x06,\r | |
524 | ProcessorFamily8087 = 0x07,\r | |
525 | ProcessorFamily80287 = 0x08,\r | |
526 | ProcessorFamily80387 = 0x09,\r | |
527 | ProcessorFamily80487 = 0x0A,\r | |
528 | ProcessorFamilyPentium = 0x0B,\r | |
529 | ProcessorFamilyPentiumPro = 0x0C,\r | |
530 | ProcessorFamilyPentiumII = 0x0D,\r | |
531 | ProcessorFamilyPentiumMMX = 0x0E,\r | |
532 | ProcessorFamilyCeleron = 0x0F,\r | |
533 | ProcessorFamilyPentiumIIXeon = 0x10,\r | |
534 | ProcessorFamilyPentiumIII = 0x11,\r | |
535 | ProcessorFamilyM1 = 0x12,\r | |
536 | ProcessorFamilyM2 = 0x13,\r | |
537 | ProcessorFamilyIntelCeleronM = 0x14,\r | |
538 | ProcessorFamilyIntelPentium4Ht = 0x15,\r | |
539 | ProcessorFamilyAmdDuron = 0x18,\r | |
540 | ProcessorFamilyK5 = 0x19,\r | |
541 | ProcessorFamilyK6 = 0x1A,\r | |
542 | ProcessorFamilyK6_2 = 0x1B,\r | |
543 | ProcessorFamilyK6_3 = 0x1C,\r | |
544 | ProcessorFamilyAmdAthlon = 0x1D,\r | |
545 | ProcessorFamilyAmd29000 = 0x1E,\r | |
546 | ProcessorFamilyK6_2Plus = 0x1F,\r | |
547 | ProcessorFamilyPowerPC = 0x20,\r | |
548 | ProcessorFamilyPowerPC601 = 0x21,\r | |
549 | ProcessorFamilyPowerPC603 = 0x22,\r | |
550 | ProcessorFamilyPowerPC603Plus = 0x23,\r | |
551 | ProcessorFamilyPowerPC604 = 0x24,\r | |
552 | ProcessorFamilyPowerPC620 = 0x25,\r | |
553 | ProcessorFamilyPowerPCx704 = 0x26,\r | |
554 | ProcessorFamilyPowerPC750 = 0x27,\r | |
555 | ProcessorFamilyIntelCoreDuo = 0x28,\r | |
556 | ProcessorFamilyIntelCoreDuoMobile = 0x29,\r | |
557 | ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r | |
558 | ProcessorFamilyIntelAtom = 0x2B,\r | |
559 | ProcessorFamilyIntelCoreM = 0x2C,\r | |
560 | ProcessorFamilyIntelCorem3 = 0x2D,\r | |
561 | ProcessorFamilyIntelCorem5 = 0x2E,\r | |
562 | ProcessorFamilyIntelCorem7 = 0x2F,\r | |
563 | ProcessorFamilyAlpha = 0x30,\r | |
564 | ProcessorFamilyAlpha21064 = 0x31,\r | |
565 | ProcessorFamilyAlpha21066 = 0x32,\r | |
566 | ProcessorFamilyAlpha21164 = 0x33,\r | |
567 | ProcessorFamilyAlpha21164PC = 0x34,\r | |
568 | ProcessorFamilyAlpha21164a = 0x35,\r | |
569 | ProcessorFamilyAlpha21264 = 0x36,\r | |
570 | ProcessorFamilyAlpha21364 = 0x37,\r | |
571 | ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r | |
572 | ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r | |
573 | ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r | |
574 | ProcessorFamilyAmdOpteron6100Series = 0x3B,\r | |
575 | ProcessorFamilyAmdOpteron4100Series = 0x3C,\r | |
576 | ProcessorFamilyAmdOpteron6200Series = 0x3D,\r | |
577 | ProcessorFamilyAmdOpteron4200Series = 0x3E,\r | |
578 | ProcessorFamilyAmdFxSeries = 0x3F,\r | |
579 | ProcessorFamilyMips = 0x40,\r | |
580 | ProcessorFamilyMIPSR4000 = 0x41,\r | |
581 | ProcessorFamilyMIPSR4200 = 0x42,\r | |
582 | ProcessorFamilyMIPSR4400 = 0x43,\r | |
583 | ProcessorFamilyMIPSR4600 = 0x44,\r | |
584 | ProcessorFamilyMIPSR10000 = 0x45,\r | |
585 | ProcessorFamilyAmdCSeries = 0x46,\r | |
586 | ProcessorFamilyAmdESeries = 0x47,\r | |
587 | ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r | |
588 | ProcessorFamilyAmdGSeries = 0x49,\r | |
589 | ProcessorFamilyAmdZSeries = 0x4A,\r | |
590 | ProcessorFamilyAmdRSeries = 0x4B,\r | |
591 | ProcessorFamilyAmdOpteron4300 = 0x4C,\r | |
592 | ProcessorFamilyAmdOpteron6300 = 0x4D,\r | |
593 | ProcessorFamilyAmdOpteron3300 = 0x4E,\r | |
594 | ProcessorFamilyAmdFireProSeries = 0x4F,\r | |
595 | ProcessorFamilySparc = 0x50,\r | |
596 | ProcessorFamilySuperSparc = 0x51,\r | |
597 | ProcessorFamilymicroSparcII = 0x52,\r | |
598 | ProcessorFamilymicroSparcIIep = 0x53,\r | |
599 | ProcessorFamilyUltraSparc = 0x54,\r | |
600 | ProcessorFamilyUltraSparcII = 0x55,\r | |
601 | ProcessorFamilyUltraSparcIii = 0x56,\r | |
602 | ProcessorFamilyUltraSparcIII = 0x57,\r | |
603 | ProcessorFamilyUltraSparcIIIi = 0x58,\r | |
604 | ProcessorFamily68040 = 0x60,\r | |
605 | ProcessorFamily68xxx = 0x61,\r | |
606 | ProcessorFamily68000 = 0x62,\r | |
607 | ProcessorFamily68010 = 0x63,\r | |
608 | ProcessorFamily68020 = 0x64,\r | |
609 | ProcessorFamily68030 = 0x65,\r | |
610 | ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r | |
611 | ProcessorFamilyAmdOpteronX1000Series = 0x67,\r | |
612 | ProcessorFamilyAmdOpteronX2000Series = 0x68,\r | |
613 | ProcessorFamilyAmdOpteronASeries = 0x69,\r | |
614 | ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r | |
615 | ProcessorFamilyAmdZen = 0x6B,\r | |
616 | ProcessorFamilyHobbit = 0x70,\r | |
617 | ProcessorFamilyCrusoeTM5000 = 0x78,\r | |
618 | ProcessorFamilyCrusoeTM3000 = 0x79,\r | |
619 | ProcessorFamilyEfficeonTM8000 = 0x7A,\r | |
620 | ProcessorFamilyWeitek = 0x80,\r | |
621 | ProcessorFamilyItanium = 0x82,\r | |
622 | ProcessorFamilyAmdAthlon64 = 0x83,\r | |
623 | ProcessorFamilyAmdOpteron = 0x84,\r | |
624 | ProcessorFamilyAmdSempron = 0x85,\r | |
625 | ProcessorFamilyAmdTurion64Mobile = 0x86,\r | |
626 | ProcessorFamilyDualCoreAmdOpteron = 0x87,\r | |
627 | ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r | |
628 | ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r | |
629 | ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r | |
630 | ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r | |
631 | ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r | |
632 | ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r | |
633 | ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r | |
634 | ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r | |
635 | ProcessorFamilyPARISC = 0x90,\r | |
636 | ProcessorFamilyPaRisc8500 = 0x91,\r | |
637 | ProcessorFamilyPaRisc8000 = 0x92,\r | |
638 | ProcessorFamilyPaRisc7300LC = 0x93,\r | |
639 | ProcessorFamilyPaRisc7200 = 0x94,\r | |
640 | ProcessorFamilyPaRisc7100LC = 0x95,\r | |
641 | ProcessorFamilyPaRisc7100 = 0x96,\r | |
642 | ProcessorFamilyV30 = 0xA0,\r | |
643 | ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r | |
644 | ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r | |
645 | ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r | |
646 | ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r | |
647 | ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r | |
648 | ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r | |
649 | ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r | |
650 | ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r | |
651 | ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r | |
652 | ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r | |
653 | ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r | |
654 | ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r | |
655 | ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r | |
656 | ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r | |
657 | ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r | |
658 | ProcessorFamilyPentiumIIIXeon = 0xB0,\r | |
659 | ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r | |
660 | ProcessorFamilyPentium4 = 0xB2,\r | |
661 | ProcessorFamilyIntelXeon = 0xB3,\r | |
662 | ProcessorFamilyAS400 = 0xB4,\r | |
663 | ProcessorFamilyIntelXeonMP = 0xB5,\r | |
664 | ProcessorFamilyAMDAthlonXP = 0xB6,\r | |
665 | ProcessorFamilyAMDAthlonMP = 0xB7,\r | |
666 | ProcessorFamilyIntelItanium2 = 0xB8,\r | |
667 | ProcessorFamilyIntelPentiumM = 0xB9,\r | |
668 | ProcessorFamilyIntelCeleronD = 0xBA,\r | |
669 | ProcessorFamilyIntelPentiumD = 0xBB,\r | |
670 | ProcessorFamilyIntelPentiumEx = 0xBC,\r | |
671 | ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r | |
672 | ProcessorFamilyReserved = 0xBE,\r | |
673 | ProcessorFamilyIntelCore2 = 0xBF,\r | |
674 | ProcessorFamilyIntelCore2Solo = 0xC0,\r | |
675 | ProcessorFamilyIntelCore2Extreme = 0xC1,\r | |
676 | ProcessorFamilyIntelCore2Quad = 0xC2,\r | |
677 | ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r | |
678 | ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r | |
679 | ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r | |
680 | ProcessorFamilyIntelCoreI7 = 0xC6,\r | |
681 | ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r | |
682 | ProcessorFamilyIBM390 = 0xC8,\r | |
683 | ProcessorFamilyG4 = 0xC9,\r | |
684 | ProcessorFamilyG5 = 0xCA,\r | |
685 | ProcessorFamilyG6 = 0xCB,\r | |
686 | ProcessorFamilyzArchitecture = 0xCC,\r | |
687 | ProcessorFamilyIntelCoreI5 = 0xCD,\r | |
688 | ProcessorFamilyIntelCoreI3 = 0xCE,\r | |
689 | ProcessorFamilyIntelCoreI9 = 0xCF,\r | |
690 | ProcessorFamilyViaC7M = 0xD2,\r | |
691 | ProcessorFamilyViaC7D = 0xD3,\r | |
692 | ProcessorFamilyViaC7 = 0xD4,\r | |
693 | ProcessorFamilyViaEden = 0xD5,\r | |
694 | ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r | |
695 | ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r | |
696 | ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r | |
697 | ProcessorFamilyViaNano = 0xD9,\r | |
698 | ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r | |
699 | ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r | |
700 | ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r | |
701 | ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r | |
702 | ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r | |
703 | ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r | |
704 | ProcessorFamilyAmdOpteron3000Series = 0xE4,\r | |
705 | ProcessorFamilyAmdSempronII = 0xE5,\r | |
706 | ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r | |
707 | ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r | |
708 | ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r | |
709 | ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r | |
710 | ProcessorFamilyAmdAthlonDualCore = 0xEA,\r | |
711 | ProcessorFamilyAmdSempronSI = 0xEB,\r | |
712 | ProcessorFamilyAmdPhenomII = 0xEC,\r | |
713 | ProcessorFamilyAmdAthlonII = 0xED,\r | |
714 | ProcessorFamilySixCoreAmdOpteron = 0xEE,\r | |
715 | ProcessorFamilyAmdSempronM = 0xEF,\r | |
716 | ProcessorFamilyi860 = 0xFA,\r | |
717 | ProcessorFamilyi960 = 0xFB,\r | |
718 | ProcessorFamilyIndicatorFamily2 = 0xFE,\r | |
719 | ProcessorFamilyReserved1 = 0xFF\r | |
98cb9ae8 | 720 | } PROCESSOR_FAMILY_DATA;\r |
721 | \r | |
f9ed6c93 YL |
722 | ///\r |
723 | /// Processor Information2 - Processor Family2.\r | |
724 | ///\r | |
725 | typedef enum {\r | |
68bf712d SN |
726 | ProcessorFamilyARMv7 = 0x0100,\r |
727 | ProcessorFamilyARMv8 = 0x0101,\r | |
728 | ProcessorFamilyARMv9 = 0x0102,\r | |
729 | ProcessorFamilySH3 = 0x0104,\r | |
730 | ProcessorFamilySH4 = 0x0105,\r | |
731 | ProcessorFamilyARM = 0x0118,\r | |
732 | ProcessorFamilyStrongARM = 0x0119,\r | |
733 | ProcessorFamily6x86 = 0x012C,\r | |
734 | ProcessorFamilyMediaGX = 0x012D,\r | |
735 | ProcessorFamilyMII = 0x012E,\r | |
736 | ProcessorFamilyWinChip = 0x0140,\r | |
737 | ProcessorFamilyDSP = 0x015E,\r | |
738 | ProcessorFamilyVideoProcessor = 0x01F4,\r | |
739 | ProcessorFamilyRiscvRV32 = 0x0200,\r | |
740 | ProcessorFamilyRiscVRV64 = 0x0201,\r | |
741 | ProcessorFamilyRiscVRV128 = 0x0202,\r | |
742 | ProcessorFamilyLoongArch = 0x0258,\r | |
743 | ProcessorFamilyLoongson1 = 0x0259,\r | |
744 | ProcessorFamilyLoongson2 = 0x025A,\r | |
745 | ProcessorFamilyLoongson3 = 0x025B,\r | |
746 | ProcessorFamilyLoongson2K = 0x025C,\r | |
747 | ProcessorFamilyLoongson3A = 0x025D,\r | |
748 | ProcessorFamilyLoongson3B = 0x025E,\r | |
749 | ProcessorFamilyLoongson3C = 0x025F,\r | |
750 | ProcessorFamilyLoongson3D = 0x0260,\r | |
751 | ProcessorFamilyLoongson3E = 0x0261,\r | |
752 | ProcessorFamilyDualCoreLoongson2K = 0x0262,\r | |
753 | ProcessorFamilyQuadCoreLoongson3A = 0x026C,\r | |
754 | ProcessorFamilyMultiCoreLoongson3A = 0x026D,\r | |
755 | ProcessorFamilyQuadCoreLoongson3B = 0x026E,\r | |
756 | ProcessorFamilyMultiCoreLoongson3B = 0x026F,\r | |
757 | ProcessorFamilyMultiCoreLoongson3C = 0x0270,\r | |
758 | ProcessorFamilyMultiCoreLoongson3D = 0x0271\r | |
f9ed6c93 YL |
759 | } PROCESSOR_FAMILY2_DATA;\r |
760 | \r | |
98cb9ae8 | 761 | ///\r |
9095d37b | 762 | /// Processor Information - Voltage.\r |
98cb9ae8 | 763 | ///\r |
764 | typedef struct {\r | |
2f88bd3a MK |
765 | UINT8 ProcessorVoltageCapability5V : 1;\r |
766 | UINT8 ProcessorVoltageCapability3_3V : 1;\r | |
767 | UINT8 ProcessorVoltageCapability2_9V : 1;\r | |
768 | UINT8 ProcessorVoltageCapabilityReserved : 1; ///< Bit 3, must be zero.\r | |
769 | UINT8 ProcessorVoltageReserved : 3; ///< Bits 4-6, must be zero.\r | |
770 | UINT8 ProcessorVoltageIndicateLegacy : 1;\r | |
98cb9ae8 | 771 | } PROCESSOR_VOLTAGE;\r |
772 | \r | |
773 | ///\r | |
af2dc6a7 | 774 | /// Processor Information - Processor Upgrade.\r |
98cb9ae8 | 775 | ///\r |
776 | typedef enum {\r | |
2f88bd3a MK |
777 | ProcessorUpgradeOther = 0x01,\r |
778 | ProcessorUpgradeUnknown = 0x02,\r | |
779 | ProcessorUpgradeDaughterBoard = 0x03,\r | |
780 | ProcessorUpgradeZIFSocket = 0x04,\r | |
781 | ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r | |
782 | ProcessorUpgradeNone = 0x06,\r | |
783 | ProcessorUpgradeLIFSocket = 0x07,\r | |
784 | ProcessorUpgradeSlot1 = 0x08,\r | |
785 | ProcessorUpgradeSlot2 = 0x09,\r | |
786 | ProcessorUpgrade370PinSocket = 0x0A,\r | |
787 | ProcessorUpgradeSlotA = 0x0B,\r | |
788 | ProcessorUpgradeSlotM = 0x0C,\r | |
789 | ProcessorUpgradeSocket423 = 0x0D,\r | |
790 | ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r | |
791 | ProcessorUpgradeSocket478 = 0x0F,\r | |
792 | ProcessorUpgradeSocket754 = 0x10,\r | |
793 | ProcessorUpgradeSocket940 = 0x11,\r | |
794 | ProcessorUpgradeSocket939 = 0x12,\r | |
795 | ProcessorUpgradeSocketmPGA604 = 0x13,\r | |
796 | ProcessorUpgradeSocketLGA771 = 0x14,\r | |
797 | ProcessorUpgradeSocketLGA775 = 0x15,\r | |
798 | ProcessorUpgradeSocketS1 = 0x16,\r | |
799 | ProcessorUpgradeAM2 = 0x17,\r | |
800 | ProcessorUpgradeF1207 = 0x18,\r | |
801 | ProcessorSocketLGA1366 = 0x19,\r | |
802 | ProcessorUpgradeSocketG34 = 0x1A,\r | |
803 | ProcessorUpgradeSocketAM3 = 0x1B,\r | |
804 | ProcessorUpgradeSocketC32 = 0x1C,\r | |
805 | ProcessorUpgradeSocketLGA1156 = 0x1D,\r | |
806 | ProcessorUpgradeSocketLGA1567 = 0x1E,\r | |
807 | ProcessorUpgradeSocketPGA988A = 0x1F,\r | |
808 | ProcessorUpgradeSocketBGA1288 = 0x20,\r | |
809 | ProcessorUpgradeSocketrPGA988B = 0x21,\r | |
810 | ProcessorUpgradeSocketBGA1023 = 0x22,\r | |
811 | ProcessorUpgradeSocketBGA1224 = 0x23,\r | |
812 | ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r | |
813 | ProcessorUpgradeSocketLGA1356 = 0x25,\r | |
814 | ProcessorUpgradeSocketLGA2011 = 0x26,\r | |
815 | ProcessorUpgradeSocketFS1 = 0x27,\r | |
816 | ProcessorUpgradeSocketFS2 = 0x28,\r | |
817 | ProcessorUpgradeSocketFM1 = 0x29,\r | |
818 | ProcessorUpgradeSocketFM2 = 0x2A,\r | |
4a228334 | 819 | ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r |
6cd35c62 EL |
820 | ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r |
821 | ProcessorUpgradeSocketLGA1150 = 0x2D,\r | |
822 | ProcessorUpgradeSocketBGA1168 = 0x2E,\r | |
823 | ProcessorUpgradeSocketBGA1234 = 0x2F,\r | |
ff6a1f32 SZ |
824 | ProcessorUpgradeSocketBGA1364 = 0x30,\r |
825 | ProcessorUpgradeSocketAM4 = 0x31,\r | |
826 | ProcessorUpgradeSocketLGA1151 = 0x32,\r | |
827 | ProcessorUpgradeSocketBGA1356 = 0x33,\r | |
828 | ProcessorUpgradeSocketBGA1440 = 0x34,\r | |
829 | ProcessorUpgradeSocketBGA1515 = 0x35,\r | |
830 | ProcessorUpgradeSocketLGA3647_1 = 0x36,\r | |
043026ac | 831 | ProcessorUpgradeSocketSP3 = 0x37,\r |
cfcca3c2 SZ |
832 | ProcessorUpgradeSocketSP3r2 = 0x38,\r |
833 | ProcessorUpgradeSocketLGA2066 = 0x39,\r | |
834 | ProcessorUpgradeSocketBGA1392 = 0x3A,\r | |
835 | ProcessorUpgradeSocketBGA1510 = 0x3B,\r | |
782d0187 SZ |
836 | ProcessorUpgradeSocketBGA1528 = 0x3C,\r |
837 | ProcessorUpgradeSocketLGA4189 = 0x3D,\r | |
838 | ProcessorUpgradeSocketLGA1200 = 0x3E,\r | |
68bf712d SN |
839 | ProcessorUpgradeSocketLGA4677 = 0x3F,\r |
840 | ProcessorUpgradeSocketLGA1700 = 0x40,\r | |
841 | ProcessorUpgradeSocketBGA1744 = 0x41,\r | |
842 | ProcessorUpgradeSocketBGA1781 = 0x42,\r | |
843 | ProcessorUpgradeSocketBGA1211 = 0x43,\r | |
844 | ProcessorUpgradeSocketBGA2422 = 0x44,\r | |
845 | ProcessorUpgradeSocketLGA1211 = 0x45,\r | |
846 | ProcessorUpgradeSocketLGA2422 = 0x46,\r | |
847 | ProcessorUpgradeSocketLGA5773 = 0x47,\r | |
848 | ProcessorUpgradeSocketBGA5773 = 0x48\r | |
98cb9ae8 | 849 | } PROCESSOR_UPGRADE;\r |
850 | \r | |
851 | ///\r | |
852 | /// Processor ID Field Description\r | |
853 | ///\r | |
854 | typedef struct {\r | |
2f88bd3a | 855 | UINT32 ProcessorSteppingId : 4;\r |
68bf712d SN |
856 | UINT32 ProcessorModel : 4;\r |
857 | UINT32 ProcessorFamily : 4;\r | |
858 | UINT32 ProcessorType : 2;\r | |
2f88bd3a | 859 | UINT32 ProcessorReserved1 : 2;\r |
68bf712d SN |
860 | UINT32 ProcessorXModel : 4;\r |
861 | UINT32 ProcessorXFamily : 8;\r | |
2f88bd3a | 862 | UINT32 ProcessorReserved2 : 4;\r |
98cb9ae8 | 863 | } PROCESSOR_SIGNATURE;\r |
864 | \r | |
98cb9ae8 | 865 | typedef struct {\r |
2f88bd3a MK |
866 | UINT32 ProcessorFpu : 1;\r |
867 | UINT32 ProcessorVme : 1;\r | |
868 | UINT32 ProcessorDe : 1;\r | |
869 | UINT32 ProcessorPse : 1;\r | |
870 | UINT32 ProcessorTsc : 1;\r | |
871 | UINT32 ProcessorMsr : 1;\r | |
872 | UINT32 ProcessorPae : 1;\r | |
873 | UINT32 ProcessorMce : 1;\r | |
874 | UINT32 ProcessorCx8 : 1;\r | |
875 | UINT32 ProcessorApic : 1;\r | |
876 | UINT32 ProcessorReserved1 : 1;\r | |
877 | UINT32 ProcessorSep : 1;\r | |
878 | UINT32 ProcessorMtrr : 1;\r | |
879 | UINT32 ProcessorPge : 1;\r | |
880 | UINT32 ProcessorMca : 1;\r | |
881 | UINT32 ProcessorCmov : 1;\r | |
882 | UINT32 ProcessorPat : 1;\r | |
883 | UINT32 ProcessorPse36 : 1;\r | |
884 | UINT32 ProcessorPsn : 1;\r | |
885 | UINT32 ProcessorClfsh : 1;\r | |
886 | UINT32 ProcessorReserved2 : 1;\r | |
887 | UINT32 ProcessorDs : 1;\r | |
888 | UINT32 ProcessorAcpi : 1;\r | |
889 | UINT32 ProcessorMmx : 1;\r | |
890 | UINT32 ProcessorFxsr : 1;\r | |
891 | UINT32 ProcessorSse : 1;\r | |
892 | UINT32 ProcessorSse2 : 1;\r | |
893 | UINT32 ProcessorSs : 1;\r | |
894 | UINT32 ProcessorReserved3 : 1;\r | |
895 | UINT32 ProcessorTm : 1;\r | |
896 | UINT32 ProcessorReserved4 : 2;\r | |
98cb9ae8 | 897 | } PROCESSOR_FEATURE_FLAGS;\r |
898 | \r | |
f06c92a6 | 899 | typedef struct {\r |
2f88bd3a MK |
900 | UINT16 ProcessorReserved1 : 1;\r |
901 | UINT16 ProcessorUnknown : 1;\r | |
902 | UINT16 Processor64BitCapable : 1;\r | |
903 | UINT16 ProcessorMultiCore : 1;\r | |
904 | UINT16 ProcessorHardwareThread : 1;\r | |
905 | UINT16 ProcessorExecuteProtection : 1;\r | |
906 | UINT16 ProcessorEnhancedVirtualization : 1;\r | |
907 | UINT16 ProcessorPowerPerformanceCtrl : 1;\r | |
908 | UINT16 Processor128BitCapable : 1;\r | |
909 | UINT16 ProcessorArm64SocId : 1;\r | |
910 | UINT16 ProcessorReserved2 : 6;\r | |
f06c92a6 AC |
911 | } PROCESSOR_CHARACTERISTIC_FLAGS;\r |
912 | \r | |
4e1f316c RC |
913 | ///\r |
914 | /// Processor Information - Status\r | |
915 | ///\r | |
916 | typedef union {\r | |
917 | struct {\r | |
2f88bd3a MK |
918 | UINT8 CpuStatus : 3; ///< Indicates the status of the processor.\r |
919 | UINT8 Reserved1 : 3; ///< Reserved for future use. Must be set to zero.\r | |
920 | UINT8 SocketPopulated : 1; ///< Indicates if the processor socket is populated or not.\r | |
921 | UINT8 Reserved2 : 1; ///< Reserved for future use. Must be set to zero.\r | |
4e1f316c | 922 | } Bits;\r |
2f88bd3a | 923 | UINT8 Data;\r |
4e1f316c RC |
924 | } PROCESSOR_STATUS_DATA;\r |
925 | \r | |
98cb9ae8 | 926 | typedef struct {\r |
2f88bd3a MK |
927 | PROCESSOR_SIGNATURE Signature;\r |
928 | PROCESSOR_FEATURE_FLAGS FeatureFlags;\r | |
6800ac83 | 929 | } PROCESSOR_ID_DATA;\r |
98cb9ae8 | 930 | \r |
4135253b | 931 | ///\r |
af2dc6a7 | 932 | /// Processor Information (Type 4).\r |
4135253b | 933 | ///\r |
9095d37b LG |
934 | /// The information in this structure defines the attributes of a single processor;\r |
935 | /// a separate structure instance is provided for each system processor socket/slot.\r | |
936 | /// For example, a system with an IntelDX2 processor would have a single\r | |
af2dc6a7 | 937 | /// structure instance, while a system with an IntelSX2 processor would have a structure\r |
9095d37b | 938 | /// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r |
98cb9ae8 | 939 | ///\r |
9095d37b | 940 | typedef struct {\r |
2f88bd3a MK |
941 | SMBIOS_STRUCTURE Hdr;\r |
942 | SMBIOS_TABLE_STRING Socket;\r | |
943 | UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r | |
944 | UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r | |
945 | SMBIOS_TABLE_STRING ProcessorManufacturer;\r | |
946 | PROCESSOR_ID_DATA ProcessorId;\r | |
947 | SMBIOS_TABLE_STRING ProcessorVersion;\r | |
948 | PROCESSOR_VOLTAGE Voltage;\r | |
949 | UINT16 ExternalClock;\r | |
950 | UINT16 MaxSpeed;\r | |
951 | UINT16 CurrentSpeed;\r | |
952 | UINT8 Status;\r | |
953 | UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r | |
954 | UINT16 L1CacheHandle;\r | |
955 | UINT16 L2CacheHandle;\r | |
956 | UINT16 L3CacheHandle;\r | |
957 | SMBIOS_TABLE_STRING SerialNumber;\r | |
958 | SMBIOS_TABLE_STRING AssetTag;\r | |
959 | SMBIOS_TABLE_STRING PartNumber;\r | |
61ce5861 | 960 | //\r |
961 | // Add for smbios 2.5\r | |
962 | //\r | |
2f88bd3a MK |
963 | UINT8 CoreCount;\r |
964 | UINT8 EnabledCoreCount;\r | |
965 | UINT8 ThreadCount;\r | |
966 | UINT16 ProcessorCharacteristics;\r | |
61ce5861 | 967 | //\r |
968 | // Add for smbios 2.6\r | |
969 | //\r | |
2f88bd3a | 970 | UINT16 ProcessorFamily2;\r |
6cd35c62 EL |
971 | //\r |
972 | // Add for smbios 3.0\r | |
973 | //\r | |
2f88bd3a MK |
974 | UINT16 CoreCount2;\r |
975 | UINT16 EnabledCoreCount2;\r | |
976 | UINT16 ThreadCount2;\r | |
68bf712d SN |
977 | //\r |
978 | // Add for smbios 3.6\r | |
979 | //\r | |
980 | UINT16 ThreadEnabled;\r | |
61ce5861 | 981 | } SMBIOS_TABLE_TYPE4;\r |
982 | \r | |
98cb9ae8 | 983 | ///\r |
af2dc6a7 | 984 | /// Memory Controller Error Detecting Method.\r |
98cb9ae8 | 985 | ///\r |
9095d37b | 986 | typedef enum {\r |
98cb9ae8 | 987 | ErrorDetectingMethodOther = 0x01,\r |
988 | ErrorDetectingMethodUnknown = 0x02,\r | |
989 | ErrorDetectingMethodNone = 0x03,\r | |
990 | ErrorDetectingMethodParity = 0x04,\r | |
991 | ErrorDetectingMethod32Ecc = 0x05,\r | |
992 | ErrorDetectingMethod64Ecc = 0x06,\r | |
993 | ErrorDetectingMethod128Ecc = 0x07,\r | |
994 | ErrorDetectingMethodCrc = 0x08\r | |
995 | } MEMORY_ERROR_DETECT_METHOD;\r | |
996 | \r | |
997 | ///\r | |
af2dc6a7 | 998 | /// Memory Controller Error Correcting Capability.\r |
98cb9ae8 | 999 | ///\r |
1000 | typedef struct {\r | |
2f88bd3a MK |
1001 | UINT8 Other : 1;\r |
1002 | UINT8 Unknown : 1;\r | |
1003 | UINT8 None : 1;\r | |
1004 | UINT8 SingleBitErrorCorrect : 1;\r | |
1005 | UINT8 DoubleBitErrorCorrect : 1;\r | |
1006 | UINT8 ErrorScrubbing : 1;\r | |
1007 | UINT8 Reserved : 2;\r | |
98cb9ae8 | 1008 | } MEMORY_ERROR_CORRECT_CAPABILITY;\r |
1009 | \r | |
1010 | ///\r | |
af2dc6a7 | 1011 | /// Memory Controller Information - Interleave Support.\r |
98cb9ae8 | 1012 | ///\r |
9095d37b | 1013 | typedef enum {\r |
98cb9ae8 | 1014 | MemoryInterleaveOther = 0x01,\r |
1015 | MemoryInterleaveUnknown = 0x02,\r | |
1016 | MemoryInterleaveOneWay = 0x03,\r | |
1017 | MemoryInterleaveTwoWay = 0x04,\r | |
1018 | MemoryInterleaveFourWay = 0x05,\r | |
1019 | MemoryInterleaveEightWay = 0x06,\r | |
1020 | MemoryInterleaveSixteenWay = 0x07\r | |
1021 | } MEMORY_SUPPORT_INTERLEAVE_TYPE;\r | |
1022 | \r | |
1023 | ///\r | |
af2dc6a7 | 1024 | /// Memory Controller Information - Memory Speeds.\r |
98cb9ae8 | 1025 | ///\r |
1026 | typedef struct {\r | |
2f88bd3a MK |
1027 | UINT16 Other : 1;\r |
1028 | UINT16 Unknown : 1;\r | |
1029 | UINT16 SeventyNs : 1;\r | |
1030 | UINT16 SixtyNs : 1;\r | |
1031 | UINT16 FiftyNs : 1;\r | |
1032 | UINT16 Reserved : 11;\r | |
98cb9ae8 | 1033 | } MEMORY_SPEED_TYPE;\r |
1034 | \r | |
4135253b | 1035 | ///\r |
af2dc6a7 | 1036 | /// Memory Controller Information (Type 5, Obsolete).\r |
4135253b | 1037 | ///\r |
9095d37b LG |
1038 | /// The information in this structure defines the attributes of the system's memory controller(s)\r |
1039 | /// and the supported attributes of any memory-modules present in the sockets controlled by\r | |
1040 | /// this controller.\r | |
1041 | /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r | |
af2dc6a7 | 1042 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 1043 | /// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r |
1044 | /// choose to implement both memory description types to allow existing DMI browsers\r | |
1045 | /// to properly display the system's memory attributes.\r | |
1046 | ///\r | |
61ce5861 | 1047 | typedef struct {\r |
2f88bd3a MK |
1048 | SMBIOS_STRUCTURE Hdr;\r |
1049 | UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r | |
1050 | MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r | |
1051 | UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r | |
1052 | UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r | |
1053 | UINT8 MaxMemoryModuleSize;\r | |
1054 | MEMORY_SPEED_TYPE SupportSpeed;\r | |
1055 | UINT16 SupportMemoryType;\r | |
1056 | UINT8 MemoryModuleVoltage;\r | |
1057 | UINT8 AssociatedMemorySlotNum;\r | |
1058 | UINT16 MemoryModuleConfigHandles[1];\r | |
61ce5861 | 1059 | } SMBIOS_TABLE_TYPE5;\r |
1060 | \r | |
98cb9ae8 | 1061 | ///\r |
1062 | /// Memory Module Information - Memory Types\r | |
1063 | ///\r | |
1064 | typedef struct {\r | |
2f88bd3a MK |
1065 | UINT16 Other : 1;\r |
1066 | UINT16 Unknown : 1;\r | |
1067 | UINT16 Standard : 1;\r | |
1068 | UINT16 FastPageMode : 1;\r | |
1069 | UINT16 Edo : 1;\r | |
1070 | UINT16 Parity : 1;\r | |
1071 | UINT16 Ecc : 1;\r | |
1072 | UINT16 Simm : 1;\r | |
1073 | UINT16 Dimm : 1;\r | |
1074 | UINT16 BurstEdo : 1;\r | |
1075 | UINT16 Sdram : 1;\r | |
1076 | UINT16 Reserved : 5;\r | |
98cb9ae8 | 1077 | } MEMORY_CURRENT_TYPE;\r |
1078 | \r | |
1079 | ///\r | |
af2dc6a7 | 1080 | /// Memory Module Information - Memory Size.\r |
98cb9ae8 | 1081 | ///\r |
1082 | typedef struct {\r | |
2f88bd3a MK |
1083 | UINT8 InstalledOrEnabledSize : 7; ///< Size (n), where 2**n is the size in MB.\r |
1084 | UINT8 SingleOrDoubleBank : 1;\r | |
98cb9ae8 | 1085 | } MEMORY_INSTALLED_ENABLED_SIZE;\r |
1086 | \r | |
4135253b | 1087 | ///\r |
1088 | /// Memory Module Information (Type 6, Obsolete)\r | |
1089 | ///\r | |
9095d37b | 1090 | /// One Memory Module Information structure is included for each memory-module socket\r |
98cb9ae8 | 1091 | /// in the system. The structure describes the speed, type, size, and error status\r |
9095d37b LG |
1092 | /// of each system memory module. The supported attributes of each module are described\r |
1093 | /// by the "owning" Memory Controller Information structure.\r | |
1094 | /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r | |
af2dc6a7 | 1095 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 1096 | /// and Memory Device (Type 17) structures should be used instead.\r |
1097 | ///\r | |
61ce5861 | 1098 | typedef struct {\r |
2f88bd3a MK |
1099 | SMBIOS_STRUCTURE Hdr;\r |
1100 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
1101 | UINT8 BankConnections;\r | |
1102 | UINT8 CurrentSpeed;\r | |
1103 | MEMORY_CURRENT_TYPE CurrentMemoryType;\r | |
1104 | MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r | |
1105 | MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r | |
1106 | UINT8 ErrorStatus;\r | |
61ce5861 | 1107 | } SMBIOS_TABLE_TYPE6;\r |
1108 | \r | |
98cb9ae8 | 1109 | ///\r |
af2dc6a7 | 1110 | /// Cache Information - SRAM Type.\r |
98cb9ae8 | 1111 | ///\r |
1112 | typedef struct {\r | |
2f88bd3a MK |
1113 | UINT16 Other : 1;\r |
1114 | UINT16 Unknown : 1;\r | |
1115 | UINT16 NonBurst : 1;\r | |
1116 | UINT16 Burst : 1;\r | |
1117 | UINT16 PipelineBurst : 1;\r | |
1118 | UINT16 Synchronous : 1;\r | |
1119 | UINT16 Asynchronous : 1;\r | |
1120 | UINT16 Reserved : 9;\r | |
98cb9ae8 | 1121 | } CACHE_SRAM_TYPE_DATA;\r |
1122 | \r | |
1123 | ///\r | |
af2dc6a7 | 1124 | /// Cache Information - Error Correction Type.\r |
98cb9ae8 | 1125 | ///\r |
1126 | typedef enum {\r | |
1127 | CacheErrorOther = 0x01,\r | |
1128 | CacheErrorUnknown = 0x02,\r | |
1129 | CacheErrorNone = 0x03,\r | |
1130 | CacheErrorParity = 0x04,\r | |
6800ac83 | 1131 | CacheErrorSingleBit = 0x05, ///< ECC\r |
1132 | CacheErrorMultiBit = 0x06 ///< ECC\r | |
98cb9ae8 | 1133 | } CACHE_ERROR_TYPE_DATA;\r |
1134 | \r | |
1135 | ///\r | |
9095d37b | 1136 | /// Cache Information - System Cache Type.\r |
98cb9ae8 | 1137 | ///\r |
1138 | typedef enum {\r | |
1139 | CacheTypeOther = 0x01,\r | |
1140 | CacheTypeUnknown = 0x02,\r | |
1141 | CacheTypeInstruction = 0x03,\r | |
1142 | CacheTypeData = 0x04,\r | |
1143 | CacheTypeUnified = 0x05\r | |
1144 | } CACHE_TYPE_DATA;\r | |
1145 | \r | |
1146 | ///\r | |
9095d37b | 1147 | /// Cache Information - Associativity.\r |
98cb9ae8 | 1148 | ///\r |
1149 | typedef enum {\r | |
1150 | CacheAssociativityOther = 0x01,\r | |
1151 | CacheAssociativityUnknown = 0x02,\r | |
1152 | CacheAssociativityDirectMapped = 0x03,\r | |
1153 | CacheAssociativity2Way = 0x04,\r | |
1154 | CacheAssociativity4Way = 0x05,\r | |
1155 | CacheAssociativityFully = 0x06,\r | |
1156 | CacheAssociativity8Way = 0x07,\r | |
1157 | CacheAssociativity16Way = 0x08,\r | |
3507ab19 | 1158 | CacheAssociativity12Way = 0x09,\r |
1159 | CacheAssociativity24Way = 0x0A,\r | |
1160 | CacheAssociativity32Way = 0x0B,\r | |
1161 | CacheAssociativity48Way = 0x0C,\r | |
7ddba202 SZ |
1162 | CacheAssociativity64Way = 0x0D,\r |
1163 | CacheAssociativity20Way = 0x0E\r | |
98cb9ae8 | 1164 | } CACHE_ASSOCIATIVITY_DATA;\r |
1165 | \r | |
4135253b | 1166 | ///\r |
af2dc6a7 | 1167 | /// Cache Information (Type 7).\r |
4135253b | 1168 | ///\r |
9095d37b | 1169 | /// The information in this structure defines the attributes of CPU cache device in the system.\r |
98cb9ae8 | 1170 | /// One structure is specified for each such device, whether the device is internal to\r |
1171 | /// or external to the CPU module. Cache modules can be associated with a processor structure\r | |
af2dc6a7 | 1172 | /// in one or two ways, depending on the SMBIOS version.\r |
98cb9ae8 | 1173 | ///\r |
61ce5861 | 1174 | typedef struct {\r |
2f88bd3a MK |
1175 | SMBIOS_STRUCTURE Hdr;\r |
1176 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
1177 | UINT16 CacheConfiguration;\r | |
1178 | UINT16 MaximumCacheSize;\r | |
1179 | UINT16 InstalledSize;\r | |
1180 | CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r | |
1181 | CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r | |
1182 | UINT8 CacheSpeed;\r | |
1183 | UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r | |
1184 | UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r | |
1185 | UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r | |
ff6a1f32 SZ |
1186 | //\r |
1187 | // Add for smbios 3.1.0\r | |
1188 | //\r | |
2f88bd3a MK |
1189 | UINT32 MaximumCacheSize2;\r |
1190 | UINT32 InstalledSize2;\r | |
61ce5861 | 1191 | } SMBIOS_TABLE_TYPE7;\r |
1192 | \r | |
98cb9ae8 | 1193 | ///\r |
9095d37b | 1194 | /// Port Connector Information - Connector Types.\r |
98cb9ae8 | 1195 | ///\r |
1196 | typedef enum {\r | |
2f88bd3a MK |
1197 | PortConnectorTypeNone = 0x00,\r |
1198 | PortConnectorTypeCentronics = 0x01,\r | |
1199 | PortConnectorTypeMiniCentronics = 0x02,\r | |
1200 | PortConnectorTypeProprietary = 0x03,\r | |
1201 | PortConnectorTypeDB25Male = 0x04,\r | |
1202 | PortConnectorTypeDB25Female = 0x05,\r | |
1203 | PortConnectorTypeDB15Male = 0x06,\r | |
1204 | PortConnectorTypeDB15Female = 0x07,\r | |
1205 | PortConnectorTypeDB9Male = 0x08,\r | |
1206 | PortConnectorTypeDB9Female = 0x09,\r | |
1207 | PortConnectorTypeRJ11 = 0x0A,\r | |
1208 | PortConnectorTypeRJ45 = 0x0B,\r | |
1209 | PortConnectorType50PinMiniScsi = 0x0C,\r | |
1210 | PortConnectorTypeMiniDin = 0x0D,\r | |
1211 | PortConnectorTypeMicroDin = 0x0E,\r | |
1212 | PortConnectorTypePS2 = 0x0F,\r | |
1213 | PortConnectorTypeInfrared = 0x10,\r | |
1214 | PortConnectorTypeHpHil = 0x11,\r | |
1215 | PortConnectorTypeUsb = 0x12,\r | |
1216 | PortConnectorTypeSsaScsi = 0x13,\r | |
1217 | PortConnectorTypeCircularDin8Male = 0x14,\r | |
1218 | PortConnectorTypeCircularDin8Female = 0x15,\r | |
1219 | PortConnectorTypeOnboardIde = 0x16,\r | |
1220 | PortConnectorTypeOnboardFloppy = 0x17,\r | |
1221 | PortConnectorType9PinDualInline = 0x18,\r | |
1222 | PortConnectorType25PinDualInline = 0x19,\r | |
1223 | PortConnectorType50PinDualInline = 0x1A,\r | |
1224 | PortConnectorType68PinDualInline = 0x1B,\r | |
1225 | PortConnectorTypeOnboardSoundInput = 0x1C,\r | |
1226 | PortConnectorTypeMiniCentronicsType14 = 0x1D,\r | |
1227 | PortConnectorTypeMiniCentronicsType26 = 0x1E,\r | |
1228 | PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r | |
1229 | PortConnectorTypeBNC = 0x20,\r | |
1230 | PortConnectorType1394 = 0x21,\r | |
1231 | PortConnectorTypeSasSata = 0x22,\r | |
1232 | PortConnectorTypeUsbTypeC = 0x23,\r | |
1233 | PortConnectorTypePC98 = 0xA0,\r | |
1234 | PortConnectorTypePC98Hireso = 0xA1,\r | |
1235 | PortConnectorTypePCH98 = 0xA2,\r | |
1236 | PortConnectorTypePC98Note = 0xA3,\r | |
1237 | PortConnectorTypePC98Full = 0xA4,\r | |
1238 | PortConnectorTypeOther = 0xFF\r | |
98cb9ae8 | 1239 | } MISC_PORT_CONNECTOR_TYPE;\r |
1240 | \r | |
1241 | ///\r | |
9095d37b | 1242 | /// Port Connector Information - Port Types\r |
98cb9ae8 | 1243 | ///\r |
1244 | typedef enum {\r | |
2f88bd3a MK |
1245 | PortTypeNone = 0x00,\r |
1246 | PortTypeParallelXtAtCompatible = 0x01,\r | |
1247 | PortTypeParallelPortPs2 = 0x02,\r | |
1248 | PortTypeParallelPortEcp = 0x03,\r | |
1249 | PortTypeParallelPortEpp = 0x04,\r | |
1250 | PortTypeParallelPortEcpEpp = 0x05,\r | |
1251 | PortTypeSerialXtAtCompatible = 0x06,\r | |
1252 | PortTypeSerial16450Compatible = 0x07,\r | |
1253 | PortTypeSerial16550Compatible = 0x08,\r | |
1254 | PortTypeSerial16550ACompatible = 0x09,\r | |
1255 | PortTypeScsi = 0x0A,\r | |
1256 | PortTypeMidi = 0x0B,\r | |
1257 | PortTypeJoyStick = 0x0C,\r | |
1258 | PortTypeKeyboard = 0x0D,\r | |
1259 | PortTypeMouse = 0x0E,\r | |
1260 | PortTypeSsaScsi = 0x0F,\r | |
1261 | PortTypeUsb = 0x10,\r | |
1262 | PortTypeFireWire = 0x11,\r | |
1263 | PortTypePcmciaTypeI = 0x12,\r | |
1264 | PortTypePcmciaTypeII = 0x13,\r | |
1265 | PortTypePcmciaTypeIII = 0x14,\r | |
1266 | PortTypeCardBus = 0x15,\r | |
1267 | PortTypeAccessBusPort = 0x16,\r | |
1268 | PortTypeScsiII = 0x17,\r | |
1269 | PortTypeScsiWide = 0x18,\r | |
1270 | PortTypePC98 = 0x19,\r | |
1271 | PortTypePC98Hireso = 0x1A,\r | |
1272 | PortTypePCH98 = 0x1B,\r | |
1273 | PortTypeVideoPort = 0x1C,\r | |
1274 | PortTypeAudioPort = 0x1D,\r | |
1275 | PortTypeModemPort = 0x1E,\r | |
1276 | PortTypeNetworkPort = 0x1F,\r | |
1277 | PortTypeSata = 0x20,\r | |
1278 | PortTypeSas = 0x21,\r | |
1279 | PortTypeMfdp = 0x22, ///< Multi-Function Display Port\r | |
1280 | PortTypeThunderbolt = 0x23,\r | |
1281 | PortType8251Compatible = 0xA0,\r | |
1282 | PortType8251FifoCompatible = 0xA1,\r | |
1283 | PortTypeOther = 0xFF\r | |
98cb9ae8 | 1284 | } MISC_PORT_TYPE;\r |
1285 | \r | |
4135253b | 1286 | ///\r |
af2dc6a7 | 1287 | /// Port Connector Information (Type 8).\r |
4135253b | 1288 | ///\r |
9095d37b LG |
1289 | /// The information in this structure defines the attributes of a system port connector,\r |
1290 | /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r | |
98cb9ae8 | 1291 | /// are provided. One structure is present for each port provided by the system.\r |
1292 | ///\r | |
61ce5861 | 1293 | typedef struct {\r |
2f88bd3a MK |
1294 | SMBIOS_STRUCTURE Hdr;\r |
1295 | SMBIOS_TABLE_STRING InternalReferenceDesignator;\r | |
1296 | UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r | |
1297 | SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r | |
1298 | UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r | |
1299 | UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r | |
61ce5861 | 1300 | } SMBIOS_TABLE_TYPE8;\r |
1301 | \r | |
98cb9ae8 | 1302 | ///\r |
1303 | /// System Slots - Slot Type\r | |
1304 | ///\r | |
1305 | typedef enum {\r | |
fdfbf1fd BCK |
1306 | SlotTypeOther = 0x01,\r |
1307 | SlotTypeUnknown = 0x02,\r | |
1308 | SlotTypeIsa = 0x03,\r | |
1309 | SlotTypeMca = 0x04,\r | |
1310 | SlotTypeEisa = 0x05,\r | |
1311 | SlotTypePci = 0x06,\r | |
1312 | SlotTypePcmcia = 0x07,\r | |
1313 | SlotTypeVlVesa = 0x08,\r | |
1314 | SlotTypeProprietary = 0x09,\r | |
1315 | SlotTypeProcessorCardSlot = 0x0A,\r | |
1316 | SlotTypeProprietaryMemoryCardSlot = 0x0B,\r | |
1317 | SlotTypeIORiserCardSlot = 0x0C,\r | |
1318 | SlotTypeNuBus = 0x0D,\r | |
1319 | SlotTypePci66MhzCapable = 0x0E,\r | |
1320 | SlotTypeAgp = 0x0F,\r | |
1321 | SlotTypeApg2X = 0x10,\r | |
1322 | SlotTypeAgp4X = 0x11,\r | |
1323 | SlotTypePciX = 0x12,\r | |
1324 | SlotTypeAgp8X = 0x13,\r | |
1325 | SlotTypeM2Socket1_DP = 0x14,\r | |
1326 | SlotTypeM2Socket1_SD = 0x15,\r | |
1327 | SlotTypeM2Socket2 = 0x16,\r | |
1328 | SlotTypeM2Socket3 = 0x17,\r | |
1329 | SlotTypeMxmTypeI = 0x18,\r | |
1330 | SlotTypeMxmTypeII = 0x19,\r | |
1331 | SlotTypeMxmTypeIIIStandard = 0x1A,\r | |
1332 | SlotTypeMxmTypeIIIHe = 0x1B,\r | |
1333 | SlotTypeMxmTypeIV = 0x1C,\r | |
1334 | SlotTypeMxm30TypeA = 0x1D,\r | |
1335 | SlotTypeMxm30TypeB = 0x1E,\r | |
1336 | SlotTypePciExpressGen2Sff_8639 = 0x1F,\r | |
1337 | SlotTypePciExpressGen3Sff_8639 = 0x20,\r | |
1338 | SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r | |
1339 | SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r | |
1340 | SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r | |
1341 | SlotTypePCIExpressGen4SFF_8639 = 0x24, ///< U.2\r | |
1342 | SlotTypePCIExpressGen5SFF_8639 = 0x25, ///< U.2\r | |
1343 | SlotTypeOCPNIC30SmallFormFactor = 0x26, ///< SFF\r | |
1344 | SlotTypeOCPNIC30LargeFormFactor = 0x27, ///< LFF\r | |
1345 | SlotTypeOCPNICPriorto30 = 0x28,\r | |
1346 | SlotTypeCXLFlexbus10 = 0x30,\r | |
1347 | SlotTypePC98C20 = 0xA0,\r | |
1348 | SlotTypePC98C24 = 0xA1,\r | |
1349 | SlotTypePC98E = 0xA2,\r | |
1350 | SlotTypePC98LocalBus = 0xA3,\r | |
1351 | SlotTypePC98Card = 0xA4,\r | |
1352 | SlotTypePciExpress = 0xA5,\r | |
1353 | SlotTypePciExpressX1 = 0xA6,\r | |
1354 | SlotTypePciExpressX2 = 0xA7,\r | |
1355 | SlotTypePciExpressX4 = 0xA8,\r | |
1356 | SlotTypePciExpressX8 = 0xA9,\r | |
1357 | SlotTypePciExpressX16 = 0xAA,\r | |
1358 | SlotTypePciExpressGen2 = 0xAB,\r | |
1359 | SlotTypePciExpressGen2X1 = 0xAC,\r | |
1360 | SlotTypePciExpressGen2X2 = 0xAD,\r | |
1361 | SlotTypePciExpressGen2X4 = 0xAE,\r | |
1362 | SlotTypePciExpressGen2X8 = 0xAF,\r | |
1363 | SlotTypePciExpressGen2X16 = 0xB0,\r | |
1364 | SlotTypePciExpressGen3 = 0xB1,\r | |
1365 | SlotTypePciExpressGen3X1 = 0xB2,\r | |
1366 | SlotTypePciExpressGen3X2 = 0xB3,\r | |
1367 | SlotTypePciExpressGen3X4 = 0xB4,\r | |
1368 | SlotTypePciExpressGen3X8 = 0xB5,\r | |
1369 | SlotTypePciExpressGen3X16 = 0xB6,\r | |
1370 | SlotTypePciExpressGen4 = 0xB8,\r | |
1371 | SlotTypePciExpressGen4X1 = 0xB9,\r | |
1372 | SlotTypePciExpressGen4X2 = 0xBA,\r | |
1373 | SlotTypePciExpressGen4X4 = 0xBB,\r | |
1374 | SlotTypePciExpressGen4X8 = 0xBC,\r | |
1375 | SlotTypePciExpressGen4X16 = 0xBD,\r | |
1376 | SlotTypePCIExpressGen5 = 0xBE,\r | |
1377 | SlotTypePCIExpressGen5X1 = 0xBF,\r | |
1378 | SlotTypePCIExpressGen5X2 = 0xC0,\r | |
1379 | SlotTypePCIExpressGen5X4 = 0xC1,\r | |
1380 | SlotTypePCIExpressGen5X8 = 0xC2,\r | |
1381 | SlotTypePCIExpressGen5X16 = 0xC3,\r | |
1382 | SlotTypePCIExpressGen6andBeyond = 0xC4,\r | |
1383 | SlotTypeEnterpriseandDatacenter1UE1FormFactorSlot = 0xC5,\r | |
1384 | SlotTypeEnterpriseandDatacenter3E3FormFactorSlot = 0xC6\r | |
98cb9ae8 | 1385 | } MISC_SLOT_TYPE;\r |
1386 | \r | |
1387 | ///\r | |
af2dc6a7 | 1388 | /// System Slots - Slot Data Bus Width.\r |
98cb9ae8 | 1389 | ///\r |
1390 | typedef enum {\r | |
2f88bd3a MK |
1391 | SlotDataBusWidthOther = 0x01,\r |
1392 | SlotDataBusWidthUnknown = 0x02,\r | |
1393 | SlotDataBusWidth8Bit = 0x03,\r | |
1394 | SlotDataBusWidth16Bit = 0x04,\r | |
1395 | SlotDataBusWidth32Bit = 0x05,\r | |
1396 | SlotDataBusWidth64Bit = 0x06,\r | |
1397 | SlotDataBusWidth128Bit = 0x07,\r | |
1398 | SlotDataBusWidth1X = 0x08, ///< Or X1\r | |
1399 | SlotDataBusWidth2X = 0x09, ///< Or X2\r | |
1400 | SlotDataBusWidth4X = 0x0A, ///< Or X4\r | |
1401 | SlotDataBusWidth8X = 0x0B, ///< Or X8\r | |
1402 | SlotDataBusWidth12X = 0x0C, ///< Or X12\r | |
1403 | SlotDataBusWidth16X = 0x0D, ///< Or X16\r | |
1404 | SlotDataBusWidth32X = 0x0E ///< Or X32\r | |
98cb9ae8 | 1405 | } MISC_SLOT_DATA_BUS_WIDTH;\r |
1406 | \r | |
fdfbf1fd BCK |
1407 | ///\r |
1408 | /// System Slots - Slot Physical Width.\r | |
1409 | ///\r | |
1410 | typedef enum {\r | |
1411 | SlotPhysicalWidthOther = 0x01,\r | |
1412 | SlotPhysicalWidthUnknown = 0x02,\r | |
1413 | SlotPhysicalWidth8Bit = 0x03,\r | |
1414 | SlotPhysicalWidth16Bit = 0x04,\r | |
1415 | SlotPhysicalWidth32Bit = 0x05,\r | |
1416 | SlotPhysicalWidth64Bit = 0x06,\r | |
1417 | SlotPhysicalWidth128Bit = 0x07,\r | |
1418 | SlotPhysicalWidth1X = 0x08, ///< Or X1\r | |
1419 | SlotPhysicalWidth2X = 0x09, ///< Or X2\r | |
1420 | SlotPhysicalWidth4X = 0x0A, ///< Or X4\r | |
1421 | SlotPhysicalWidth8X = 0x0B, ///< Or X8\r | |
1422 | SlotPhysicalWidth12X = 0x0C, ///< Or X12\r | |
1423 | SlotPhysicalWidth16X = 0x0D, ///< Or X16\r | |
1424 | SlotPhysicalWidth32X = 0x0E ///< Or X32\r | |
1425 | } MISC_SLOT_PHYSICAL_WIDTH;\r | |
1426 | \r | |
1427 | ///\r | |
1428 | /// System Slots - Slot Information.\r | |
1429 | ///\r | |
1430 | typedef enum {\r | |
1431 | Others = 0x00,\r | |
1432 | Gen1 = 0x01,\r | |
1433 | Gen2 = 0x01,\r | |
1434 | Gen3 = 0x03,\r | |
1435 | Gen4 = 0x04,\r | |
1436 | Gen5 = 0x05,\r | |
1437 | Gen6 = 0x06\r | |
1438 | } MISC_SLOT_INFORMATION;\r | |
1439 | \r | |
98cb9ae8 | 1440 | ///\r |
af2dc6a7 | 1441 | /// System Slots - Current Usage.\r |
98cb9ae8 | 1442 | ///\r |
1443 | typedef enum {\r | |
2f88bd3a MK |
1444 | SlotUsageOther = 0x01,\r |
1445 | SlotUsageUnknown = 0x02,\r | |
1446 | SlotUsageAvailable = 0x03,\r | |
1447 | SlotUsageInUse = 0x04,\r | |
1448 | SlotUsageUnavailable = 0x05\r | |
98cb9ae8 | 1449 | } MISC_SLOT_USAGE;\r |
1450 | \r | |
1451 | ///\r | |
9095d37b | 1452 | /// System Slots - Slot Length.\r |
98cb9ae8 | 1453 | ///\r |
1454 | typedef enum {\r | |
1455 | SlotLengthOther = 0x01,\r | |
1456 | SlotLengthUnknown = 0x02,\r | |
1457 | SlotLengthShort = 0x03,\r | |
1458 | SlotLengthLong = 0x04\r | |
1459 | } MISC_SLOT_LENGTH;\r | |
1460 | \r | |
1461 | ///\r | |
9095d37b | 1462 | /// System Slots - Slot Characteristics 1.\r |
98cb9ae8 | 1463 | ///\r |
1464 | typedef struct {\r | |
2f88bd3a MK |
1465 | UINT8 CharacteristicsUnknown : 1;\r |
1466 | UINT8 Provides50Volts : 1;\r | |
1467 | UINT8 Provides33Volts : 1;\r | |
1468 | UINT8 SharedSlot : 1;\r | |
1469 | UINT8 PcCard16Supported : 1;\r | |
1470 | UINT8 CardBusSupported : 1;\r | |
1471 | UINT8 ZoomVideoSupported : 1;\r | |
1472 | UINT8 ModemRingResumeSupported : 1;\r | |
98cb9ae8 | 1473 | } MISC_SLOT_CHARACTERISTICS1;\r |
1474 | ///\r | |
9095d37b | 1475 | /// System Slots - Slot Characteristics 2.\r |
98cb9ae8 | 1476 | ///\r |
1477 | typedef struct {\r | |
2f88bd3a MK |
1478 | UINT8 PmeSignalSupported : 1;\r |
1479 | UINT8 HotPlugDevicesSupported : 1;\r | |
1480 | UINT8 SmbusSignalSupported : 1;\r | |
1481 | UINT8 BifurcationSupported : 1;\r | |
1482 | UINT8 AsyncSurpriseRemoval : 1;\r | |
1483 | UINT8 FlexbusSlotCxl10Capable : 1;\r | |
1484 | UINT8 FlexbusSlotCxl20Capable : 1;\r | |
1485 | UINT8 Reserved : 1; ///< Set to 0.\r | |
98cb9ae8 | 1486 | } MISC_SLOT_CHARACTERISTICS2;\r |
1487 | \r | |
28eeb08d ALA |
1488 | ///\r |
1489 | /// System Slots - Slot Height\r | |
1490 | ///\r | |
1491 | typedef enum {\r | |
1492 | SlotHeightNone = 0x00,\r | |
1493 | SlotHeightOther = 0x01,\r | |
1494 | SlotHeightUnknown = 0x02,\r | |
1495 | SlotHeightFullHeight = 0x03,\r | |
1496 | SlotHeightLowProfile = 0x04\r | |
1497 | } MISC_SLOT_HEIGHT;\r | |
1498 | \r | |
cfcca3c2 SZ |
1499 | ///\r |
1500 | /// System Slots - Peer Segment/Bus/Device/Function/Width Groups\r | |
1501 | ///\r | |
1502 | typedef struct {\r | |
2f88bd3a MK |
1503 | UINT16 SegmentGroupNum;\r |
1504 | UINT8 BusNum;\r | |
1505 | UINT8 DevFuncNum;\r | |
1506 | UINT8 DataBusWidth;\r | |
cfcca3c2 SZ |
1507 | } MISC_SLOT_PEER_GROUP;\r |
1508 | \r | |
4135253b | 1509 | ///\r |
1510 | /// System Slots (Type 9)\r | |
1511 | ///\r | |
9095d37b | 1512 | /// The information in this structure defines the attributes of a system slot.\r |
98cb9ae8 | 1513 | /// One structure is provided for each slot in the system.\r |
1514 | ///\r | |
1515 | ///\r | |
61ce5861 | 1516 | typedef struct {\r |
2f88bd3a MK |
1517 | SMBIOS_STRUCTURE Hdr;\r |
1518 | SMBIOS_TABLE_STRING SlotDesignation;\r | |
1519 | UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r | |
1520 | UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r | |
1521 | UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r | |
1522 | UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r | |
1523 | UINT16 SlotID;\r | |
1524 | MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r | |
1525 | MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r | |
61ce5861 | 1526 | //\r |
1527 | // Add for smbios 2.6\r | |
1528 | //\r | |
2f88bd3a MK |
1529 | UINT16 SegmentGroupNum;\r |
1530 | UINT8 BusNum;\r | |
1531 | UINT8 DevFuncNum;\r | |
cfcca3c2 SZ |
1532 | //\r |
1533 | // Add for smbios 3.2\r | |
1534 | //\r | |
2f88bd3a MK |
1535 | UINT8 DataBusWidth;\r |
1536 | UINT8 PeerGroupingCount;\r | |
1537 | MISC_SLOT_PEER_GROUP PeerGroups[1];\r | |
9102518d SN |
1538 | //\r |
1539 | // Since PeerGroups has a variable number of entries, must not define new\r | |
1540 | // fields in the structure. Remaining fields can be referenced using\r | |
1541 | // SMBIOS_TABLE_TYPE9_EXTENDED structure\r | |
1542 | //\r | |
1543 | } SMBIOS_TABLE_TYPE9;\r | |
1544 | \r | |
1545 | ///\r | |
1546 | /// Extended structure for System Slots (Type 9)\r | |
1547 | ///\r | |
1548 | typedef struct {\r | |
885efcd3 | 1549 | //\r |
1550 | // Add for smbios 3.4\r | |
1551 | //\r | |
9102518d SN |
1552 | UINT8 SlotInformation;\r |
1553 | UINT8 SlotPhysicalWidth;\r | |
1554 | UINT16 SlotPitch;\r | |
28eeb08d ALA |
1555 | //\r |
1556 | // Add for smbios 3.5\r | |
1557 | //\r | |
9102518d SN |
1558 | UINT8 SlotHeight; ///< The enumeration value from MISC_SLOT_HEIGHT.\r |
1559 | } SMBIOS_TABLE_TYPE9_EXTENDED;\r | |
61ce5861 | 1560 | \r |
98cb9ae8 | 1561 | ///\r |
9095d37b | 1562 | /// On Board Devices Information - Device Types.\r |
98cb9ae8 | 1563 | ///\r |
1564 | typedef enum {\r | |
1565 | OnBoardDeviceTypeOther = 0x01,\r | |
1566 | OnBoardDeviceTypeUnknown = 0x02,\r | |
1567 | OnBoardDeviceTypeVideo = 0x03,\r | |
1568 | OnBoardDeviceTypeScsiController = 0x04,\r | |
1569 | OnBoardDeviceTypeEthernet = 0x05,\r | |
1570 | OnBoardDeviceTypeTokenRing = 0x06,\r | |
119c1688 SZ |
1571 | OnBoardDeviceTypeSound = 0x07,\r |
1572 | OnBoardDeviceTypePATAController = 0x08,\r | |
1573 | OnBoardDeviceTypeSATAController = 0x09,\r | |
1574 | OnBoardDeviceTypeSASController = 0x0A\r | |
98cb9ae8 | 1575 | } MISC_ONBOARD_DEVICE_TYPE;\r |
1576 | \r | |
bf7ea009 | 1577 | ///\r |
1578 | /// Device Item Entry\r | |
1579 | ///\r | |
61ce5861 | 1580 | typedef struct {\r |
2f88bd3a | 1581 | UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r |
af2dc6a7 | 1582 | ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r |
2f88bd3a | 1583 | SMBIOS_TABLE_STRING DescriptionString;\r |
61ce5861 | 1584 | } DEVICE_STRUCT;\r |
1585 | \r | |
4135253b | 1586 | ///\r |
af2dc6a7 | 1587 | /// On Board Devices Information (Type 10, obsolete).\r |
4135253b | 1588 | ///\r |
9095d37b LG |
1589 | /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r |
1590 | /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r | |
1591 | /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r | |
1592 | /// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r | |
98cb9ae8 | 1593 | /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r |
1594 | /// has some level of control over the enabling of the associated device for use by the system.\r | |
1595 | ///\r | |
61ce5861 | 1596 | typedef struct {\r |
2f88bd3a MK |
1597 | SMBIOS_STRUCTURE Hdr;\r |
1598 | DEVICE_STRUCT Device[1];\r | |
61ce5861 | 1599 | } SMBIOS_TABLE_TYPE10;\r |
1600 | \r | |
4135253b | 1601 | ///\r |
af2dc6a7 | 1602 | /// OEM Strings (Type 11).\r |
9095d37b LG |
1603 | /// This structure contains free form strings defined by the OEM. Examples of this are:\r |
1604 | /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r | |
4135253b | 1605 | ///\r |
61ce5861 | 1606 | typedef struct {\r |
2f88bd3a MK |
1607 | SMBIOS_STRUCTURE Hdr;\r |
1608 | UINT8 StringCount;\r | |
61ce5861 | 1609 | } SMBIOS_TABLE_TYPE11;\r |
1610 | \r | |
4135253b | 1611 | ///\r |
af2dc6a7 | 1612 | /// System Configuration Options (Type 12).\r |
4135253b | 1613 | ///\r |
9095d37b | 1614 | /// This structure contains information required to configure the base board's Jumpers and Switches.\r |
98cb9ae8 | 1615 | ///\r |
61ce5861 | 1616 | typedef struct {\r |
2f88bd3a MK |
1617 | SMBIOS_STRUCTURE Hdr;\r |
1618 | UINT8 StringCount;\r | |
61ce5861 | 1619 | } SMBIOS_TABLE_TYPE12;\r |
1620 | \r | |
4135253b | 1621 | ///\r |
af2dc6a7 | 1622 | /// BIOS Language Information (Type 13).\r |
4135253b | 1623 | ///\r |
9095d37b LG |
1624 | /// The information in this structure defines the installable language attributes of the BIOS.\r |
1625 | ///\r | |
61ce5861 | 1626 | typedef struct {\r |
2f88bd3a MK |
1627 | SMBIOS_STRUCTURE Hdr;\r |
1628 | UINT8 InstallableLanguages;\r | |
1629 | UINT8 Flags;\r | |
1630 | UINT8 Reserved[15];\r | |
1631 | SMBIOS_TABLE_STRING CurrentLanguages;\r | |
61ce5861 | 1632 | } SMBIOS_TABLE_TYPE13;\r |
1633 | \r | |
119c1688 SZ |
1634 | ///\r |
1635 | /// Group Item Entry\r | |
1636 | ///\r | |
1637 | typedef struct {\r | |
2f88bd3a MK |
1638 | UINT8 ItemType;\r |
1639 | UINT16 ItemHandle;\r | |
119c1688 SZ |
1640 | } GROUP_STRUCT;\r |
1641 | \r | |
1642 | ///\r | |
1643 | /// Group Associations (Type 14).\r | |
1644 | ///\r | |
9095d37b LG |
1645 | /// The Group Associations structure is provided for OEMs who want to specify\r |
1646 | /// the arrangement or hierarchy of certain components (including other Group Associations)\r | |
1647 | /// within the system.\r | |
119c1688 SZ |
1648 | ///\r |
1649 | typedef struct {\r | |
2f88bd3a MK |
1650 | SMBIOS_STRUCTURE Hdr;\r |
1651 | SMBIOS_TABLE_STRING GroupName;\r | |
1652 | GROUP_STRUCT Group[1];\r | |
119c1688 SZ |
1653 | } SMBIOS_TABLE_TYPE14;\r |
1654 | \r | |
98cb9ae8 | 1655 | ///\r |
af2dc6a7 | 1656 | /// System Event Log - Event Log Types.\r |
9095d37b | 1657 | ///\r |
98cb9ae8 | 1658 | typedef enum {\r |
2f88bd3a MK |
1659 | EventLogTypeReserved = 0x00,\r |
1660 | EventLogTypeSingleBitECC = 0x01,\r | |
1661 | EventLogTypeMultiBitECC = 0x02,\r | |
1662 | EventLogTypeParityMemErr = 0x03,\r | |
1663 | EventLogTypeBusTimeOut = 0x04,\r | |
1664 | EventLogTypeIOChannelCheck = 0x05,\r | |
1665 | EventLogTypeSoftwareNMI = 0x06,\r | |
1666 | EventLogTypePOSTMemResize = 0x07,\r | |
1667 | EventLogTypePOSTErr = 0x08,\r | |
1668 | EventLogTypePCIParityErr = 0x09,\r | |
1669 | EventLogTypePCISystemErr = 0x0A,\r | |
1670 | EventLogTypeCPUFailure = 0x0B,\r | |
1671 | EventLogTypeEISATimeOut = 0x0C,\r | |
1672 | EventLogTypeMemLogDisabled = 0x0D,\r | |
1673 | EventLogTypeLoggingDisabled = 0x0E,\r | |
1674 | EventLogTypeSysLimitExce = 0x10,\r | |
1675 | EventLogTypeAsyncHWTimer = 0x11,\r | |
1676 | EventLogTypeSysConfigInfo = 0x12,\r | |
1677 | EventLogTypeHDInfo = 0x13,\r | |
1678 | EventLogTypeSysReconfig = 0x14,\r | |
1679 | EventLogTypeUncorrectCPUErr = 0x15,\r | |
1680 | EventLogTypeAreaResetAndClr = 0x16,\r | |
1681 | EventLogTypeSystemBoot = 0x17,\r | |
1682 | EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r | |
1683 | EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r | |
1684 | EventLogTypeEndOfLog = 0xFF\r | |
98cb9ae8 | 1685 | } EVENT_LOG_TYPE_DATA;\r |
1686 | \r | |
1687 | ///\r | |
9095d37b LG |
1688 | /// System Event Log - Variable Data Format Types.\r |
1689 | ///\r | |
98cb9ae8 | 1690 | typedef enum {\r |
2f88bd3a MK |
1691 | EventLogVariableNone = 0x00,\r |
1692 | EventLogVariableHandle = 0x01,\r | |
1693 | EventLogVariableMutilEvent = 0x02,\r | |
1694 | EventLogVariableMutilEventHandle = 0x03,\r | |
1695 | EventLogVariablePOSTResultBitmap = 0x04,\r | |
1696 | EventLogVariableSysManagementType = 0x05,\r | |
1697 | EventLogVariableMutliEventSysManagmentType = 0x06,\r | |
1698 | EventLogVariableUnused = 0x07,\r | |
1699 | EventLogVariableOEMAssigned = 0x80\r | |
55deb978 | 1700 | } EVENT_LOG_VARIABLE_DATA;\r |
98cb9ae8 | 1701 | \r |
98cb9ae8 | 1702 | ///\r |
1703 | /// Event Log Type Descriptors\r | |
1704 | ///\r | |
1705 | typedef struct {\r | |
2f88bd3a MK |
1706 | UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r |
1707 | UINT8 DataFormatType;\r | |
98cb9ae8 | 1708 | } EVENT_LOG_TYPE;\r |
1709 | \r | |
4135253b | 1710 | ///\r |
af2dc6a7 | 1711 | /// System Event Log (Type 15).\r |
4135253b | 1712 | ///\r |
9095d37b LG |
1713 | /// The presence of this structure within the SMBIOS data returned for a system indicates\r |
1714 | /// that the system supports an event log. An event log is a fixed-length area within a\r | |
1715 | /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r | |
1716 | /// record, followed by one or more variable-length log records.\r | |
98cb9ae8 | 1717 | ///\r |
61ce5861 | 1718 | typedef struct {\r |
2f88bd3a MK |
1719 | SMBIOS_STRUCTURE Hdr;\r |
1720 | UINT16 LogAreaLength;\r | |
1721 | UINT16 LogHeaderStartOffset;\r | |
1722 | UINT16 LogDataStartOffset;\r | |
1723 | UINT8 AccessMethod;\r | |
1724 | UINT8 LogStatus;\r | |
1725 | UINT32 LogChangeToken;\r | |
1726 | UINT32 AccessMethodAddress;\r | |
1727 | UINT8 LogHeaderFormat;\r | |
1728 | UINT8 NumberOfSupportedLogTypeDescriptors;\r | |
1729 | UINT8 LengthOfLogTypeDescriptor;\r | |
1730 | EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r | |
61ce5861 | 1731 | } SMBIOS_TABLE_TYPE15;\r |
1732 | \r | |
98cb9ae8 | 1733 | ///\r |
af2dc6a7 | 1734 | /// Physical Memory Array - Location.\r |
98cb9ae8 | 1735 | ///\r |
1736 | typedef enum {\r | |
1737 | MemoryArrayLocationOther = 0x01,\r | |
1738 | MemoryArrayLocationUnknown = 0x02,\r | |
1739 | MemoryArrayLocationSystemBoard = 0x03,\r | |
1740 | MemoryArrayLocationIsaAddonCard = 0x04,\r | |
1741 | MemoryArrayLocationEisaAddonCard = 0x05,\r | |
1742 | MemoryArrayLocationPciAddonCard = 0x06,\r | |
1743 | MemoryArrayLocationMcaAddonCard = 0x07,\r | |
1744 | MemoryArrayLocationPcmciaAddonCard = 0x08,\r | |
1745 | MemoryArrayLocationProprietaryAddonCard = 0x09,\r | |
1746 | MemoryArrayLocationNuBus = 0x0A,\r | |
1747 | MemoryArrayLocationPc98C20AddonCard = 0xA0,\r | |
1748 | MemoryArrayLocationPc98C24AddonCard = 0xA1,\r | |
1749 | MemoryArrayLocationPc98EAddonCard = 0xA2,\r | |
9e50ef63 | 1750 | MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,\r |
885efcd3 | 1751 | MemoryArrayLocationCXLAddonCard = 0xA4\r |
98cb9ae8 | 1752 | } MEMORY_ARRAY_LOCATION;\r |
1753 | \r | |
1754 | ///\r | |
af2dc6a7 | 1755 | /// Physical Memory Array - Use.\r |
98cb9ae8 | 1756 | ///\r |
1757 | typedef enum {\r | |
2f88bd3a MK |
1758 | MemoryArrayUseOther = 0x01,\r |
1759 | MemoryArrayUseUnknown = 0x02,\r | |
1760 | MemoryArrayUseSystemMemory = 0x03,\r | |
1761 | MemoryArrayUseVideoMemory = 0x04,\r | |
1762 | MemoryArrayUseFlashMemory = 0x05,\r | |
1763 | MemoryArrayUseNonVolatileRam = 0x06,\r | |
1764 | MemoryArrayUseCacheMemory = 0x07\r | |
98cb9ae8 | 1765 | } MEMORY_ARRAY_USE;\r |
1766 | \r | |
1767 | ///\r | |
9095d37b | 1768 | /// Physical Memory Array - Error Correction Types.\r |
98cb9ae8 | 1769 | ///\r |
1770 | typedef enum {\r | |
2f88bd3a MK |
1771 | MemoryErrorCorrectionOther = 0x01,\r |
1772 | MemoryErrorCorrectionUnknown = 0x02,\r | |
1773 | MemoryErrorCorrectionNone = 0x03,\r | |
1774 | MemoryErrorCorrectionParity = 0x04,\r | |
1775 | MemoryErrorCorrectionSingleBitEcc = 0x05,\r | |
1776 | MemoryErrorCorrectionMultiBitEcc = 0x06,\r | |
1777 | MemoryErrorCorrectionCrc = 0x07\r | |
98cb9ae8 | 1778 | } MEMORY_ERROR_CORRECTION;\r |
1779 | \r | |
4135253b | 1780 | ///\r |
af2dc6a7 | 1781 | /// Physical Memory Array (Type 16).\r |
4135253b | 1782 | ///\r |
9095d37b LG |
1783 | /// This structure describes a collection of memory devices that operate\r |
1784 | /// together to form a memory address space.\r | |
98cb9ae8 | 1785 | ///\r |
61ce5861 | 1786 | typedef struct {\r |
2f88bd3a MK |
1787 | SMBIOS_STRUCTURE Hdr;\r |
1788 | UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r | |
1789 | UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r | |
1790 | UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r | |
1791 | UINT32 MaximumCapacity;\r | |
1792 | UINT16 MemoryErrorInformationHandle;\r | |
1793 | UINT16 NumberOfMemoryDevices;\r | |
7ddba202 SZ |
1794 | //\r |
1795 | // Add for smbios 2.7\r | |
1796 | //\r | |
2f88bd3a | 1797 | UINT64 ExtendedMaximumCapacity;\r |
61ce5861 | 1798 | } SMBIOS_TABLE_TYPE16;\r |
1799 | \r | |
98cb9ae8 | 1800 | ///\r |
af2dc6a7 | 1801 | /// Memory Device - Form Factor.\r |
98cb9ae8 | 1802 | ///\r |
1803 | typedef enum {\r | |
2f88bd3a MK |
1804 | MemoryFormFactorOther = 0x01,\r |
1805 | MemoryFormFactorUnknown = 0x02,\r | |
1806 | MemoryFormFactorSimm = 0x03,\r | |
1807 | MemoryFormFactorSip = 0x04,\r | |
1808 | MemoryFormFactorChip = 0x05,\r | |
1809 | MemoryFormFactorDip = 0x06,\r | |
1810 | MemoryFormFactorZip = 0x07,\r | |
1811 | MemoryFormFactorProprietaryCard = 0x08,\r | |
1812 | MemoryFormFactorDimm = 0x09,\r | |
1813 | MemoryFormFactorTsop = 0x0A,\r | |
1814 | MemoryFormFactorRowOfChips = 0x0B,\r | |
1815 | MemoryFormFactorRimm = 0x0C,\r | |
1816 | MemoryFormFactorSodimm = 0x0D,\r | |
1817 | MemoryFormFactorSrimm = 0x0E,\r | |
1818 | MemoryFormFactorFbDimm = 0x0F,\r | |
1819 | MemoryFormFactorDie = 0x10\r | |
98cb9ae8 | 1820 | } MEMORY_FORM_FACTOR;\r |
1821 | \r | |
1822 | ///\r | |
1823 | /// Memory Device - Type\r | |
1824 | ///\r | |
1825 | typedef enum {\r | |
2f88bd3a MK |
1826 | MemoryTypeOther = 0x01,\r |
1827 | MemoryTypeUnknown = 0x02,\r | |
1828 | MemoryTypeDram = 0x03,\r | |
1829 | MemoryTypeEdram = 0x04,\r | |
1830 | MemoryTypeVram = 0x05,\r | |
1831 | MemoryTypeSram = 0x06,\r | |
1832 | MemoryTypeRam = 0x07,\r | |
1833 | MemoryTypeRom = 0x08,\r | |
1834 | MemoryTypeFlash = 0x09,\r | |
1835 | MemoryTypeEeprom = 0x0A,\r | |
1836 | MemoryTypeFeprom = 0x0B,\r | |
1837 | MemoryTypeEprom = 0x0C,\r | |
1838 | MemoryTypeCdram = 0x0D,\r | |
1839 | MemoryType3Dram = 0x0E,\r | |
1840 | MemoryTypeSdram = 0x0F,\r | |
1841 | MemoryTypeSgram = 0x10,\r | |
1842 | MemoryTypeRdram = 0x11,\r | |
1843 | MemoryTypeDdr = 0x12,\r | |
1844 | MemoryTypeDdr2 = 0x13,\r | |
1845 | MemoryTypeDdr2FbDimm = 0x14,\r | |
1846 | MemoryTypeDdr3 = 0x18,\r | |
1847 | MemoryTypeFbd2 = 0x19,\r | |
1848 | MemoryTypeDdr4 = 0x1A,\r | |
1849 | MemoryTypeLpddr = 0x1B,\r | |
1850 | MemoryTypeLpddr2 = 0x1C,\r | |
1851 | MemoryTypeLpddr3 = 0x1D,\r | |
1852 | MemoryTypeLpddr4 = 0x1E,\r | |
1853 | MemoryTypeLogicalNonVolatileDevice = 0x1F,\r | |
1854 | MemoryTypeHBM = 0x20,\r | |
1855 | MemoryTypeHBM2 = 0x21,\r | |
1856 | MemoryTypeDdr5 = 0x22,\r | |
68bf712d SN |
1857 | MemoryTypeLpddr5 = 0x23,\r |
1858 | MemoryTypeHBM3 = 0x24\r | |
98cb9ae8 | 1859 | } MEMORY_DEVICE_TYPE;\r |
1860 | \r | |
cfcca3c2 SZ |
1861 | ///\r |
1862 | /// Memory Device - Type Detail\r | |
1863 | ///\r | |
98cb9ae8 | 1864 | typedef struct {\r |
2f88bd3a MK |
1865 | UINT16 Reserved : 1;\r |
1866 | UINT16 Other : 1;\r | |
1867 | UINT16 Unknown : 1;\r | |
1868 | UINT16 FastPaged : 1;\r | |
1869 | UINT16 StaticColumn : 1;\r | |
1870 | UINT16 PseudoStatic : 1;\r | |
1871 | UINT16 Rambus : 1;\r | |
1872 | UINT16 Synchronous : 1;\r | |
1873 | UINT16 Cmos : 1;\r | |
1874 | UINT16 Edo : 1;\r | |
1875 | UINT16 WindowDram : 1;\r | |
1876 | UINT16 CacheDram : 1;\r | |
1877 | UINT16 Nonvolatile : 1;\r | |
1878 | UINT16 Registered : 1;\r | |
1879 | UINT16 Unbuffered : 1;\r | |
1880 | UINT16 LrDimm : 1;\r | |
98cb9ae8 | 1881 | } MEMORY_DEVICE_TYPE_DETAIL;\r |
1882 | \r | |
cfcca3c2 SZ |
1883 | ///\r |
1884 | /// Memory Device - Memory Technology\r | |
1885 | ///\r | |
1886 | typedef enum {\r | |
2f88bd3a MK |
1887 | MemoryTechnologyOther = 0x01,\r |
1888 | MemoryTechnologyUnknown = 0x02,\r | |
1889 | MemoryTechnologyDram = 0x03,\r | |
1890 | MemoryTechnologyNvdimmN = 0x04,\r | |
1891 | MemoryTechnologyNvdimmF = 0x05,\r | |
1892 | MemoryTechnologyNvdimmP = 0x06,\r | |
4b7edd78 ZG |
1893 | //\r |
1894 | // This definition is updated to represent Intel\r | |
885efcd3 | 1895 | // Optane DC Persistent Memory in SMBIOS spec 3.4.0\r |
4b7edd78 | 1896 | //\r |
2f88bd3a | 1897 | MemoryTechnologyIntelOptanePersistentMemory = 0x07\r |
cfcca3c2 SZ |
1898 | } MEMORY_DEVICE_TECHNOLOGY;\r |
1899 | \r | |
1900 | ///\r | |
1901 | /// Memory Device - Memory Operating Mode Capability\r | |
1902 | ///\r | |
1903 | typedef union {\r | |
1904 | ///\r | |
1905 | /// Individual bit fields\r | |
1906 | ///\r | |
1907 | struct {\r | |
2f88bd3a MK |
1908 | UINT16 Reserved : 1; ///< Set to 0.\r |
1909 | UINT16 Other : 1;\r | |
1910 | UINT16 Unknown : 1;\r | |
1911 | UINT16 VolatileMemory : 1;\r | |
1912 | UINT16 ByteAccessiblePersistentMemory : 1;\r | |
1913 | UINT16 BlockAccessiblePersistentMemory : 1;\r | |
1914 | UINT16 Reserved2 : 10; ///< Set to 0.\r | |
cfcca3c2 SZ |
1915 | } Bits;\r |
1916 | ///\r | |
1917 | /// All bit fields as a 16-bit value\r | |
1918 | ///\r | |
2f88bd3a | 1919 | UINT16 Uint16;\r |
cfcca3c2 SZ |
1920 | } MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;\r |
1921 | \r | |
4135253b | 1922 | ///\r |
af2dc6a7 | 1923 | /// Memory Device (Type 17).\r |
4135253b | 1924 | ///\r |
9095d37b | 1925 | /// This structure describes a single memory device that is part of\r |
98cb9ae8 | 1926 | /// a larger Physical Memory Array (Type 16).\r |
9095d37b LG |
1927 | /// Note: If a system includes memory-device sockets, the SMBIOS implementation\r |
1928 | /// includes a Memory Device structure instance for each slot, whether or not the\r | |
98cb9ae8 | 1929 | /// socket is currently populated.\r |
1930 | ///\r | |
61ce5861 | 1931 | typedef struct {\r |
2f88bd3a MK |
1932 | SMBIOS_STRUCTURE Hdr;\r |
1933 | UINT16 MemoryArrayHandle;\r | |
1934 | UINT16 MemoryErrorInformationHandle;\r | |
1935 | UINT16 TotalWidth;\r | |
1936 | UINT16 DataWidth;\r | |
1937 | UINT16 Size;\r | |
1938 | UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r | |
1939 | UINT8 DeviceSet;\r | |
1940 | SMBIOS_TABLE_STRING DeviceLocator;\r | |
1941 | SMBIOS_TABLE_STRING BankLocator;\r | |
1942 | UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r | |
1943 | MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r | |
1944 | UINT16 Speed;\r | |
1945 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1946 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1947 | SMBIOS_TABLE_STRING AssetTag;\r | |
1948 | SMBIOS_TABLE_STRING PartNumber;\r | |
61ce5861 | 1949 | //\r |
1950 | // Add for smbios 2.6\r | |
9095d37b | 1951 | //\r |
2f88bd3a | 1952 | UINT8 Attributes;\r |
7ddba202 SZ |
1953 | //\r |
1954 | // Add for smbios 2.7\r | |
1955 | //\r | |
2f88bd3a | 1956 | UINT32 ExtendedSize;\r |
cfcca3c2 SZ |
1957 | //\r |
1958 | // Keep using name "ConfiguredMemoryClockSpeed" for compatibility\r | |
1959 | // although this field is renamed from "Configured Memory Clock Speed"\r | |
1960 | // to "Configured Memory Speed" in smbios 3.2.0.\r | |
1961 | //\r | |
2f88bd3a | 1962 | UINT16 ConfiguredMemoryClockSpeed;\r |
4a228334 EL |
1963 | //\r |
1964 | // Add for smbios 2.8.0\r | |
1965 | //\r | |
2f88bd3a MK |
1966 | UINT16 MinimumVoltage;\r |
1967 | UINT16 MaximumVoltage;\r | |
1968 | UINT16 ConfiguredVoltage;\r | |
cfcca3c2 SZ |
1969 | //\r |
1970 | // Add for smbios 3.2.0\r | |
1971 | //\r | |
2f88bd3a MK |
1972 | UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r |
1973 | MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;\r | |
1974 | SMBIOS_TABLE_STRING FirmwareVersion;\r | |
1975 | UINT16 ModuleManufacturerID;\r | |
1976 | UINT16 ModuleProductID;\r | |
1977 | UINT16 MemorySubsystemControllerManufacturerID;\r | |
1978 | UINT16 MemorySubsystemControllerProductID;\r | |
1979 | UINT64 NonVolatileSize;\r | |
1980 | UINT64 VolatileSize;\r | |
1981 | UINT64 CacheSize;\r | |
1982 | UINT64 LogicalSize;\r | |
67ead55b MC |
1983 | //\r |
1984 | // Add for smbios 3.3.0\r | |
1985 | //\r | |
2f88bd3a MK |
1986 | UINT32 ExtendedSpeed;\r |
1987 | UINT32 ExtendedConfiguredMemorySpeed;\r | |
61ce5861 | 1988 | } SMBIOS_TABLE_TYPE17;\r |
1989 | \r | |
98cb9ae8 | 1990 | ///\r |
9095d37b | 1991 | /// 32-bit Memory Error Information - Error Type.\r |
98cb9ae8 | 1992 | ///\r |
9095d37b | 1993 | typedef enum {\r |
2f88bd3a MK |
1994 | MemoryErrorOther = 0x01,\r |
1995 | MemoryErrorUnknown = 0x02,\r | |
1996 | MemoryErrorOk = 0x03,\r | |
1997 | MemoryErrorBadRead = 0x04,\r | |
1998 | MemoryErrorParity = 0x05,\r | |
1999 | MemoryErrorSigleBit = 0x06,\r | |
2000 | MemoryErrorDoubleBit = 0x07,\r | |
2001 | MemoryErrorMultiBit = 0x08,\r | |
2002 | MemoryErrorNibble = 0x09,\r | |
2003 | MemoryErrorChecksum = 0x0A,\r | |
2004 | MemoryErrorCrc = 0x0B,\r | |
2005 | MemoryErrorCorrectSingleBit = 0x0C,\r | |
2006 | MemoryErrorCorrected = 0x0D,\r | |
2007 | MemoryErrorUnCorrectable = 0x0E\r | |
98cb9ae8 | 2008 | } MEMORY_ERROR_TYPE;\r |
2009 | \r | |
2010 | ///\r | |
9095d37b | 2011 | /// 32-bit Memory Error Information - Error Granularity.\r |
98cb9ae8 | 2012 | ///\r |
9095d37b | 2013 | typedef enum {\r |
2f88bd3a MK |
2014 | MemoryGranularityOther = 0x01,\r |
2015 | MemoryGranularityOtherUnknown = 0x02,\r | |
2016 | MemoryGranularityDeviceLevel = 0x03,\r | |
2017 | MemoryGranularityMemPartitionLevel = 0x04\r | |
98cb9ae8 | 2018 | } MEMORY_ERROR_GRANULARITY;\r |
2019 | \r | |
2020 | ///\r | |
9095d37b | 2021 | /// 32-bit Memory Error Information - Error Operation.\r |
98cb9ae8 | 2022 | ///\r |
9095d37b | 2023 | typedef enum {\r |
2f88bd3a MK |
2024 | MemoryErrorOperationOther = 0x01,\r |
2025 | MemoryErrorOperationUnknown = 0x02,\r | |
2026 | MemoryErrorOperationRead = 0x03,\r | |
2027 | MemoryErrorOperationWrite = 0x04,\r | |
2028 | MemoryErrorOperationPartialWrite = 0x05\r | |
98cb9ae8 | 2029 | } MEMORY_ERROR_OPERATION;\r |
2030 | \r | |
4135253b | 2031 | ///\r |
af2dc6a7 | 2032 | /// 32-bit Memory Error Information (Type 18).\r |
9095d37b LG |
2033 | ///\r |
2034 | /// This structure identifies the specifics of an error that might be detected\r | |
98cb9ae8 | 2035 | /// within a Physical Memory Array.\r |
4135253b | 2036 | ///\r |
61ce5861 | 2037 | typedef struct {\r |
2f88bd3a MK |
2038 | SMBIOS_STRUCTURE Hdr;\r |
2039 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r | |
2040 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
2041 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
2042 | UINT32 VendorSyndrome;\r | |
2043 | UINT32 MemoryArrayErrorAddress;\r | |
2044 | UINT32 DeviceErrorAddress;\r | |
2045 | UINT32 ErrorResolution;\r | |
61ce5861 | 2046 | } SMBIOS_TABLE_TYPE18;\r |
2047 | \r | |
4135253b | 2048 | ///\r |
af2dc6a7 | 2049 | /// Memory Array Mapped Address (Type 19).\r |
4135253b | 2050 | ///\r |
9095d37b | 2051 | /// This structure provides the address mapping for a Physical Memory Array.\r |
98cb9ae8 | 2052 | /// One structure is present for each contiguous address range described.\r |
2053 | ///\r | |
61ce5861 | 2054 | typedef struct {\r |
2f88bd3a MK |
2055 | SMBIOS_STRUCTURE Hdr;\r |
2056 | UINT32 StartingAddress;\r | |
2057 | UINT32 EndingAddress;\r | |
2058 | UINT16 MemoryArrayHandle;\r | |
2059 | UINT8 PartitionWidth;\r | |
7ddba202 SZ |
2060 | //\r |
2061 | // Add for smbios 2.7\r | |
2062 | //\r | |
2f88bd3a MK |
2063 | UINT64 ExtendedStartingAddress;\r |
2064 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 2065 | } SMBIOS_TABLE_TYPE19;\r |
2066 | \r | |
4135253b | 2067 | ///\r |
af2dc6a7 | 2068 | /// Memory Device Mapped Address (Type 20).\r |
4135253b | 2069 | ///\r |
9095d37b LG |
2070 | /// This structure maps memory address space usually to a device-level granularity.\r |
2071 | /// One structure is present for each contiguous address range described.\r | |
98cb9ae8 | 2072 | ///\r |
61ce5861 | 2073 | typedef struct {\r |
2f88bd3a MK |
2074 | SMBIOS_STRUCTURE Hdr;\r |
2075 | UINT32 StartingAddress;\r | |
2076 | UINT32 EndingAddress;\r | |
2077 | UINT16 MemoryDeviceHandle;\r | |
2078 | UINT16 MemoryArrayMappedAddressHandle;\r | |
2079 | UINT8 PartitionRowPosition;\r | |
2080 | UINT8 InterleavePosition;\r | |
2081 | UINT8 InterleavedDataDepth;\r | |
7ddba202 SZ |
2082 | //\r |
2083 | // Add for smbios 2.7\r | |
2084 | //\r | |
2f88bd3a MK |
2085 | UINT64 ExtendedStartingAddress;\r |
2086 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 2087 | } SMBIOS_TABLE_TYPE20;\r |
2088 | \r | |
98cb9ae8 | 2089 | ///\r |
2090 | /// Built-in Pointing Device - Type\r | |
2091 | ///\r | |
2092 | typedef enum {\r | |
2f88bd3a MK |
2093 | PointingDeviceTypeOther = 0x01,\r |
2094 | PointingDeviceTypeUnknown = 0x02,\r | |
2095 | PointingDeviceTypeMouse = 0x03,\r | |
2096 | PointingDeviceTypeTrackBall = 0x04,\r | |
2097 | PointingDeviceTypeTrackPoint = 0x05,\r | |
2098 | PointingDeviceTypeGlidePoint = 0x06,\r | |
2099 | PointingDeviceTouchPad = 0x07,\r | |
2100 | PointingDeviceTouchScreen = 0x08,\r | |
2101 | PointingDeviceOpticalSensor = 0x09\r | |
98cb9ae8 | 2102 | } BUILTIN_POINTING_DEVICE_TYPE;\r |
2103 | \r | |
2104 | ///\r | |
af2dc6a7 | 2105 | /// Built-in Pointing Device - Interface.\r |
98cb9ae8 | 2106 | ///\r |
2107 | typedef enum {\r | |
2f88bd3a MK |
2108 | PointingDeviceInterfaceOther = 0x01,\r |
2109 | PointingDeviceInterfaceUnknown = 0x02,\r | |
2110 | PointingDeviceInterfaceSerial = 0x03,\r | |
2111 | PointingDeviceInterfacePs2 = 0x04,\r | |
2112 | PointingDeviceInterfaceInfrared = 0x05,\r | |
2113 | PointingDeviceInterfaceHpHil = 0x06,\r | |
2114 | PointingDeviceInterfaceBusMouse = 0x07,\r | |
2115 | PointingDeviceInterfaceADB = 0x08,\r | |
2116 | PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r | |
2117 | PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r | |
28eeb08d ALA |
2118 | PointingDeviceInterfaceUsb = 0xA2,\r |
2119 | PointingDeviceInterfaceI2c = 0xA3,\r | |
2120 | PointingDeviceInterfaceSpi = 0xA4\r | |
98cb9ae8 | 2121 | } BUILTIN_POINTING_DEVICE_INTERFACE;\r |
2122 | \r | |
4135253b | 2123 | ///\r |
af2dc6a7 | 2124 | /// Built-in Pointing Device (Type 21).\r |
4135253b | 2125 | ///\r |
9095d37b | 2126 | /// This structure describes the attributes of the built-in pointing device for the\r |
af2dc6a7 | 2127 | /// system. The presence of this structure does not imply that the built-in\r |
9095d37b | 2128 | /// pointing device is active for the system's use!\r |
98cb9ae8 | 2129 | ///\r |
61ce5861 | 2130 | typedef struct {\r |
2f88bd3a MK |
2131 | SMBIOS_STRUCTURE Hdr;\r |
2132 | UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r | |
2133 | UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r | |
2134 | UINT8 NumberOfButtons;\r | |
61ce5861 | 2135 | } SMBIOS_TABLE_TYPE21;\r |
2136 | \r | |
98cb9ae8 | 2137 | ///\r |
2138 | /// Portable Battery - Device Chemistry\r | |
2139 | ///\r | |
9095d37b | 2140 | typedef enum {\r |
2f88bd3a MK |
2141 | PortableBatteryDeviceChemistryOther = 0x01,\r |
2142 | PortableBatteryDeviceChemistryUnknown = 0x02,\r | |
2143 | PortableBatteryDeviceChemistryLeadAcid = 0x03,\r | |
2144 | PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r | |
2145 | PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r | |
2146 | PortableBatteryDeviceChemistryLithiumIon = 0x06,\r | |
2147 | PortableBatteryDeviceChemistryZincAir = 0x07,\r | |
2148 | PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r | |
98cb9ae8 | 2149 | } PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r |
2150 | \r | |
4135253b | 2151 | ///\r |
af2dc6a7 | 2152 | /// Portable Battery (Type 22).\r |
4135253b | 2153 | ///\r |
9095d37b LG |
2154 | /// This structure describes the attributes of the portable battery(s) for the system.\r |
2155 | /// The structure contains the static attributes for the group. Each structure describes\r | |
1f9f8414 | 2156 | /// a single battery pack's attributes.\r |
98cb9ae8 | 2157 | ///\r |
61ce5861 | 2158 | typedef struct {\r |
2f88bd3a MK |
2159 | SMBIOS_STRUCTURE Hdr;\r |
2160 | SMBIOS_TABLE_STRING Location;\r | |
2161 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2162 | SMBIOS_TABLE_STRING ManufactureDate;\r | |
2163 | SMBIOS_TABLE_STRING SerialNumber;\r | |
2164 | SMBIOS_TABLE_STRING DeviceName;\r | |
2165 | UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r | |
2166 | UINT16 DeviceCapacity;\r | |
2167 | UINT16 DesignVoltage;\r | |
2168 | SMBIOS_TABLE_STRING SBDSVersionNumber;\r | |
2169 | UINT8 MaximumErrorInBatteryData;\r | |
2170 | UINT16 SBDSSerialNumber;\r | |
2171 | UINT16 SBDSManufactureDate;\r | |
2172 | SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r | |
2173 | UINT8 DesignCapacityMultiplier;\r | |
2174 | UINT32 OEMSpecific;\r | |
61ce5861 | 2175 | } SMBIOS_TABLE_TYPE22;\r |
2176 | \r | |
4135253b | 2177 | ///\r |
2178 | /// System Reset (Type 23)\r | |
2179 | ///\r | |
9095d37b | 2180 | /// This structure describes whether Automatic System Reset functions enabled (Status).\r |
98cb9ae8 | 2181 | /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r |
9095d37b LG |
2182 | /// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r |
2183 | /// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r | |
2184 | /// the system will re-boot according to the Boot Option at Limit.\r | |
98cb9ae8 | 2185 | ///\r |
61ce5861 | 2186 | typedef struct {\r |
2f88bd3a MK |
2187 | SMBIOS_STRUCTURE Hdr;\r |
2188 | UINT8 Capabilities;\r | |
2189 | UINT16 ResetCount;\r | |
2190 | UINT16 ResetLimit;\r | |
2191 | UINT16 TimerInterval;\r | |
2192 | UINT16 Timeout;\r | |
61ce5861 | 2193 | } SMBIOS_TABLE_TYPE23;\r |
2194 | \r | |
4135253b | 2195 | ///\r |
af2dc6a7 | 2196 | /// Hardware Security (Type 24).\r |
4135253b | 2197 | ///\r |
9095d37b | 2198 | /// This structure describes the system-wide hardware security settings.\r |
98cb9ae8 | 2199 | ///\r |
61ce5861 | 2200 | typedef struct {\r |
2f88bd3a MK |
2201 | SMBIOS_STRUCTURE Hdr;\r |
2202 | UINT8 HardwareSecuritySettings;\r | |
61ce5861 | 2203 | } SMBIOS_TABLE_TYPE24;\r |
2204 | \r | |
4135253b | 2205 | ///\r |
af2dc6a7 | 2206 | /// System Power Controls (Type 25).\r |
4135253b | 2207 | ///\r |
9095d37b LG |
2208 | /// This structure describes the attributes for controlling the main power supply to the system.\r |
2209 | /// Software that interprets this structure uses the month, day, hour, minute, and second values\r | |
2210 | /// to determine the number of seconds until the next power-on of the system. The presence of\r | |
2211 | /// this structure implies that a timed power-on facility is available for the system.\r | |
98cb9ae8 | 2212 | ///\r |
61ce5861 | 2213 | typedef struct {\r |
2f88bd3a MK |
2214 | SMBIOS_STRUCTURE Hdr;\r |
2215 | UINT8 NextScheduledPowerOnMonth;\r | |
2216 | UINT8 NextScheduledPowerOnDayOfMonth;\r | |
2217 | UINT8 NextScheduledPowerOnHour;\r | |
2218 | UINT8 NextScheduledPowerOnMinute;\r | |
2219 | UINT8 NextScheduledPowerOnSecond;\r | |
61ce5861 | 2220 | } SMBIOS_TABLE_TYPE25;\r |
2221 | \r | |
98cb9ae8 | 2222 | ///\r |
af2dc6a7 | 2223 | /// Voltage Probe - Location and Status.\r |
98cb9ae8 | 2224 | ///\r |
2225 | typedef struct {\r | |
2f88bd3a MK |
2226 | UINT8 VoltageProbeSite : 5;\r |
2227 | UINT8 VoltageProbeStatus : 3;\r | |
98cb9ae8 | 2228 | } MISC_VOLTAGE_PROBE_LOCATION;\r |
2229 | \r | |
4135253b | 2230 | ///\r |
2231 | /// Voltage Probe (Type 26)\r | |
2232 | ///\r | |
9095d37b | 2233 | /// This describes the attributes for a voltage probe in the system.\r |
98cb9ae8 | 2234 | /// Each structure describes a single voltage probe.\r |
2235 | ///\r | |
61ce5861 | 2236 | typedef struct {\r |
2f88bd3a MK |
2237 | SMBIOS_STRUCTURE Hdr;\r |
2238 | SMBIOS_TABLE_STRING Description;\r | |
2239 | MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r | |
2240 | UINT16 MaximumValue;\r | |
2241 | UINT16 MinimumValue;\r | |
2242 | UINT16 Resolution;\r | |
2243 | UINT16 Tolerance;\r | |
2244 | UINT16 Accuracy;\r | |
2245 | UINT32 OEMDefined;\r | |
2246 | UINT16 NominalValue;\r | |
61ce5861 | 2247 | } SMBIOS_TABLE_TYPE26;\r |
2248 | \r | |
98cb9ae8 | 2249 | ///\r |
af2dc6a7 | 2250 | /// Cooling Device - Device Type and Status.\r |
98cb9ae8 | 2251 | ///\r |
2252 | typedef struct {\r | |
2f88bd3a MK |
2253 | UINT8 CoolingDevice : 5;\r |
2254 | UINT8 CoolingDeviceStatus : 3;\r | |
98cb9ae8 | 2255 | } MISC_COOLING_DEVICE_TYPE;\r |
2256 | \r | |
4135253b | 2257 | ///\r |
2258 | /// Cooling Device (Type 27)\r | |
2259 | ///\r | |
9095d37b LG |
2260 | /// This structure describes the attributes for a cooling device in the system.\r |
2261 | /// Each structure describes a single cooling device.\r | |
2262 | ///\r | |
61ce5861 | 2263 | typedef struct {\r |
2f88bd3a MK |
2264 | SMBIOS_STRUCTURE Hdr;\r |
2265 | UINT16 TemperatureProbeHandle;\r | |
2266 | MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r | |
2267 | UINT8 CoolingUnitGroup;\r | |
2268 | UINT32 OEMDefined;\r | |
2269 | UINT16 NominalSpeed;\r | |
7ddba202 SZ |
2270 | //\r |
2271 | // Add for smbios 2.7\r | |
2272 | //\r | |
2f88bd3a | 2273 | SMBIOS_TABLE_STRING Description;\r |
61ce5861 | 2274 | } SMBIOS_TABLE_TYPE27;\r |
2275 | \r | |
98cb9ae8 | 2276 | ///\r |
af2dc6a7 | 2277 | /// Temperature Probe - Location and Status.\r |
98cb9ae8 | 2278 | ///\r |
2279 | typedef struct {\r | |
2f88bd3a MK |
2280 | UINT8 TemperatureProbeSite : 5;\r |
2281 | UINT8 TemperatureProbeStatus : 3;\r | |
98cb9ae8 | 2282 | } MISC_TEMPERATURE_PROBE_LOCATION;\r |
2283 | \r | |
4135253b | 2284 | ///\r |
af2dc6a7 | 2285 | /// Temperature Probe (Type 28).\r |
4135253b | 2286 | ///\r |
9095d37b LG |
2287 | /// This structure describes the attributes for a temperature probe in the system.\r |
2288 | /// Each structure describes a single temperature probe.\r | |
98cb9ae8 | 2289 | ///\r |
61ce5861 | 2290 | typedef struct {\r |
2f88bd3a MK |
2291 | SMBIOS_STRUCTURE Hdr;\r |
2292 | SMBIOS_TABLE_STRING Description;\r | |
2293 | MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r | |
2294 | UINT16 MaximumValue;\r | |
2295 | UINT16 MinimumValue;\r | |
2296 | UINT16 Resolution;\r | |
2297 | UINT16 Tolerance;\r | |
2298 | UINT16 Accuracy;\r | |
2299 | UINT32 OEMDefined;\r | |
2300 | UINT16 NominalValue;\r | |
61ce5861 | 2301 | } SMBIOS_TABLE_TYPE28;\r |
2302 | \r | |
98cb9ae8 | 2303 | ///\r |
af2dc6a7 | 2304 | /// Electrical Current Probe - Location and Status.\r |
98cb9ae8 | 2305 | ///\r |
2306 | typedef struct {\r | |
2f88bd3a MK |
2307 | UINT8 ElectricalCurrentProbeSite : 5;\r |
2308 | UINT8 ElectricalCurrentProbeStatus : 3;\r | |
98cb9ae8 | 2309 | } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r |
2310 | \r | |
4135253b | 2311 | ///\r |
af2dc6a7 | 2312 | /// Electrical Current Probe (Type 29).\r |
4135253b | 2313 | ///\r |
98cb9ae8 | 2314 | /// This structure describes the attributes for an electrical current probe in the system.\r |
9095d37b | 2315 | /// Each structure describes a single electrical current probe.\r |
98cb9ae8 | 2316 | ///\r |
61ce5861 | 2317 | typedef struct {\r |
2f88bd3a MK |
2318 | SMBIOS_STRUCTURE Hdr;\r |
2319 | SMBIOS_TABLE_STRING Description;\r | |
2320 | MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r | |
2321 | UINT16 MaximumValue;\r | |
2322 | UINT16 MinimumValue;\r | |
2323 | UINT16 Resolution;\r | |
2324 | UINT16 Tolerance;\r | |
2325 | UINT16 Accuracy;\r | |
2326 | UINT32 OEMDefined;\r | |
2327 | UINT16 NominalValue;\r | |
61ce5861 | 2328 | } SMBIOS_TABLE_TYPE29;\r |
2329 | \r | |
4135253b | 2330 | ///\r |
af2dc6a7 | 2331 | /// Out-of-Band Remote Access (Type 30).\r |
4135253b | 2332 | ///\r |
9095d37b LG |
2333 | /// This structure describes the attributes and policy settings of a hardware facility\r |
2334 | /// that may be used to gain remote access to a hardware system when the operating system\r | |
2335 | /// is not available due to power-down status, hardware failures, or boot failures.\r | |
98cb9ae8 | 2336 | ///\r |
61ce5861 | 2337 | typedef struct {\r |
2f88bd3a MK |
2338 | SMBIOS_STRUCTURE Hdr;\r |
2339 | SMBIOS_TABLE_STRING ManufacturerName;\r | |
2340 | UINT8 Connections;\r | |
61ce5861 | 2341 | } SMBIOS_TABLE_TYPE30;\r |
2342 | \r | |
4135253b | 2343 | ///\r |
af2dc6a7 | 2344 | /// Boot Integrity Services (BIS) Entry Point (Type 31).\r |
4135253b | 2345 | ///\r |
9095d37b LG |
2346 | /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r |
2347 | ///\r | |
61ce5861 | 2348 | typedef struct {\r |
2f88bd3a MK |
2349 | SMBIOS_STRUCTURE Hdr;\r |
2350 | UINT8 Checksum;\r | |
2351 | UINT8 Reserved1;\r | |
2352 | UINT16 Reserved2;\r | |
2353 | UINT32 BisEntry16;\r | |
2354 | UINT32 BisEntry32;\r | |
2355 | UINT64 Reserved3;\r | |
2356 | UINT32 Reserved4;\r | |
61ce5861 | 2357 | } SMBIOS_TABLE_TYPE31;\r |
2358 | \r | |
98cb9ae8 | 2359 | ///\r |
af2dc6a7 | 2360 | /// System Boot Information - System Boot Status.\r |
98cb9ae8 | 2361 | ///\r |
2362 | typedef enum {\r | |
2f88bd3a MK |
2363 | BootInformationStatusNoError = 0x00,\r |
2364 | BootInformationStatusNoBootableMedia = 0x01,\r | |
2365 | BootInformationStatusNormalOSFailedLoading = 0x02,\r | |
2366 | BootInformationStatusFirmwareDetectedFailure = 0x03,\r | |
2367 | BootInformationStatusOSDetectedFailure = 0x04,\r | |
2368 | BootInformationStatusUserRequestedBoot = 0x05,\r | |
2369 | BootInformationStatusSystemSecurityViolation = 0x06,\r | |
2370 | BootInformationStatusPreviousRequestedImage = 0x07,\r | |
2371 | BootInformationStatusWatchdogTimerExpired = 0x08,\r | |
2372 | BootInformationStatusStartReserved = 0x09,\r | |
2373 | BootInformationStatusStartOemSpecific = 0x80,\r | |
2374 | BootInformationStatusStartProductSpecific = 0xC0\r | |
98cb9ae8 | 2375 | } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r |
2376 | \r | |
4135253b | 2377 | ///\r |
af2dc6a7 | 2378 | /// System Boot Information (Type 32).\r |
4135253b | 2379 | ///\r |
9095d37b LG |
2380 | /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r |
2381 | /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r | |
2382 | /// application via this structure. When used in the PXE environment, for example,\r | |
2383 | /// this code identifies the reason the PXE was initiated and can be used by boot-image\r | |
2384 | /// software to further automate an enterprise's PXE sessions. For example, an enterprise\r | |
2385 | /// could choose to automatically download a hardware-diagnostic image to a client whose\r | |
98cb9ae8 | 2386 | /// reason code indicated either a firmware- or operating system-detected hardware failure.\r |
2387 | ///\r | |
61ce5861 | 2388 | typedef struct {\r |
2f88bd3a MK |
2389 | SMBIOS_STRUCTURE Hdr;\r |
2390 | UINT8 Reserved[6];\r | |
2391 | UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r | |
61ce5861 | 2392 | } SMBIOS_TABLE_TYPE32;\r |
2393 | \r | |
4135253b | 2394 | ///\r |
af2dc6a7 | 2395 | /// 64-bit Memory Error Information (Type 33).\r |
4135253b | 2396 | ///\r |
9095d37b | 2397 | /// This structure describes an error within a Physical Memory Array,\r |
98cb9ae8 | 2398 | /// when the error address is above 4G (0xFFFFFFFF).\r |
9095d37b | 2399 | ///\r |
61ce5861 | 2400 | typedef struct {\r |
2f88bd3a MK |
2401 | SMBIOS_STRUCTURE Hdr;\r |
2402 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r | |
2403 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
2404 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
2405 | UINT32 VendorSyndrome;\r | |
2406 | UINT64 MemoryArrayErrorAddress;\r | |
2407 | UINT64 DeviceErrorAddress;\r | |
2408 | UINT32 ErrorResolution;\r | |
61ce5861 | 2409 | } SMBIOS_TABLE_TYPE33;\r |
2410 | \r | |
98cb9ae8 | 2411 | ///\r |
9095d37b | 2412 | /// Management Device - Type.\r |
98cb9ae8 | 2413 | ///\r |
2414 | typedef enum {\r | |
2f88bd3a MK |
2415 | ManagementDeviceTypeOther = 0x01,\r |
2416 | ManagementDeviceTypeUnknown = 0x02,\r | |
2417 | ManagementDeviceTypeLm75 = 0x03,\r | |
2418 | ManagementDeviceTypeLm78 = 0x04,\r | |
2419 | ManagementDeviceTypeLm79 = 0x05,\r | |
2420 | ManagementDeviceTypeLm80 = 0x06,\r | |
2421 | ManagementDeviceTypeLm81 = 0x07,\r | |
2422 | ManagementDeviceTypeAdm9240 = 0x08,\r | |
2423 | ManagementDeviceTypeDs1780 = 0x09,\r | |
2424 | ManagementDeviceTypeMaxim1617 = 0x0A,\r | |
2425 | ManagementDeviceTypeGl518Sm = 0x0B,\r | |
2426 | ManagementDeviceTypeW83781D = 0x0C,\r | |
2427 | ManagementDeviceTypeHt82H791 = 0x0D\r | |
98cb9ae8 | 2428 | } MISC_MANAGEMENT_DEVICE_TYPE;\r |
2429 | \r | |
2430 | ///\r | |
9095d37b | 2431 | /// Management Device - Address Type.\r |
98cb9ae8 | 2432 | ///\r |
2433 | typedef enum {\r | |
2434 | ManagementDeviceAddressTypeOther = 0x01,\r | |
2435 | ManagementDeviceAddressTypeUnknown = 0x02,\r | |
2436 | ManagementDeviceAddressTypeIOPort = 0x03,\r | |
2437 | ManagementDeviceAddressTypeMemory = 0x04,\r | |
2438 | ManagementDeviceAddressTypeSmbus = 0x05\r | |
2439 | } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r | |
2440 | \r | |
4135253b | 2441 | ///\r |
af2dc6a7 | 2442 | /// Management Device (Type 34).\r |
4135253b | 2443 | ///\r |
9095d37b | 2444 | /// The information in this structure defines the attributes of a Management Device.\r |
98cb9ae8 | 2445 | /// A Management Device might control one or more fans or voltage, current, or temperature\r |
2446 | /// probes as defined by one or more Management Device Component structures.\r | |
2447 | ///\r | |
61ce5861 | 2448 | typedef struct {\r |
2f88bd3a MK |
2449 | SMBIOS_STRUCTURE Hdr;\r |
2450 | SMBIOS_TABLE_STRING Description;\r | |
2451 | UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r | |
2452 | UINT32 Address;\r | |
2453 | UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r | |
61ce5861 | 2454 | } SMBIOS_TABLE_TYPE34;\r |
2455 | \r | |
4135253b | 2456 | ///\r |
2457 | /// Management Device Component (Type 35)\r | |
2458 | ///\r | |
9095d37b LG |
2459 | /// This structure associates a cooling device or environmental probe with structures\r |
2460 | /// that define the controlling hardware device and (optionally) the component's thresholds.\r | |
98cb9ae8 | 2461 | ///\r |
61ce5861 | 2462 | typedef struct {\r |
2f88bd3a MK |
2463 | SMBIOS_STRUCTURE Hdr;\r |
2464 | SMBIOS_TABLE_STRING Description;\r | |
2465 | UINT16 ManagementDeviceHandle;\r | |
2466 | UINT16 ComponentHandle;\r | |
2467 | UINT16 ThresholdHandle;\r | |
61ce5861 | 2468 | } SMBIOS_TABLE_TYPE35;\r |
2469 | \r | |
4135253b | 2470 | ///\r |
af2dc6a7 | 2471 | /// Management Device Threshold Data (Type 36).\r |
4135253b | 2472 | ///\r |
9095d37b LG |
2473 | /// The information in this structure defines threshold information for\r |
2474 | /// a component (probe or cooling-unit) contained within a Management Device.\r | |
98cb9ae8 | 2475 | ///\r |
61ce5861 | 2476 | typedef struct {\r |
2f88bd3a MK |
2477 | SMBIOS_STRUCTURE Hdr;\r |
2478 | UINT16 LowerThresholdNonCritical;\r | |
2479 | UINT16 UpperThresholdNonCritical;\r | |
2480 | UINT16 LowerThresholdCritical;\r | |
2481 | UINT16 UpperThresholdCritical;\r | |
2482 | UINT16 LowerThresholdNonRecoverable;\r | |
2483 | UINT16 UpperThresholdNonRecoverable;\r | |
61ce5861 | 2484 | } SMBIOS_TABLE_TYPE36;\r |
2485 | \r | |
bf7ea009 | 2486 | ///\r |
af2dc6a7 | 2487 | /// Memory Channel Entry.\r |
bf7ea009 | 2488 | ///\r |
61ce5861 | 2489 | typedef struct {\r |
2f88bd3a MK |
2490 | UINT8 DeviceLoad;\r |
2491 | UINT16 DeviceHandle;\r | |
61ce5861 | 2492 | } MEMORY_DEVICE;\r |
2493 | \r | |
98cb9ae8 | 2494 | ///\r |
af2dc6a7 | 2495 | /// Memory Channel - Channel Type.\r |
98cb9ae8 | 2496 | ///\r |
2497 | typedef enum {\r | |
2f88bd3a MK |
2498 | MemoryChannelTypeOther = 0x01,\r |
2499 | MemoryChannelTypeUnknown = 0x02,\r | |
2500 | MemoryChannelTypeRambus = 0x03,\r | |
2501 | MemoryChannelTypeSyncLink = 0x04\r | |
98cb9ae8 | 2502 | } MEMORY_CHANNEL_TYPE;\r |
2503 | \r | |
4135253b | 2504 | ///\r |
2505 | /// Memory Channel (Type 37)\r | |
2506 | ///\r | |
98cb9ae8 | 2507 | /// The information in this structure provides the correlation between a Memory Channel\r |
9095d37b | 2508 | /// and its associated Memory Devices. Each device presents one or more loads to the channel.\r |
af2dc6a7 | 2509 | /// The sum of all device loads cannot exceed the channel's defined maximum.\r |
98cb9ae8 | 2510 | ///\r |
61ce5861 | 2511 | typedef struct {\r |
2f88bd3a MK |
2512 | SMBIOS_STRUCTURE Hdr;\r |
2513 | UINT8 ChannelType;\r | |
2514 | UINT8 MaximumChannelLoad;\r | |
2515 | UINT8 MemoryDeviceCount;\r | |
2516 | MEMORY_DEVICE MemoryDevice[1];\r | |
61ce5861 | 2517 | } SMBIOS_TABLE_TYPE37;\r |
2518 | \r | |
98cb9ae8 | 2519 | ///\r |
2520 | /// IPMI Device Information - BMC Interface Type\r | |
2521 | ///\r | |
2522 | typedef enum {\r | |
2f88bd3a MK |
2523 | IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r |
2524 | IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r | |
2525 | IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r | |
2526 | IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r | |
2527 | IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface\r | |
98cb9ae8 | 2528 | } BMC_INTERFACE_TYPE;\r |
2529 | \r | |
4135253b | 2530 | ///\r |
af2dc6a7 | 2531 | /// IPMI Device Information (Type 38).\r |
4135253b | 2532 | ///\r |
7ddba202 | 2533 | /// The information in this structure defines the attributes of an\r |
98cb9ae8 | 2534 | /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r |
7ddba202 SZ |
2535 | ///\r |
2536 | /// The Type 42 structure can also be used to describe a physical management controller\r | |
2537 | /// host interface and one or more protocols that share that interface. If IPMI is not\r | |
2538 | /// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r | |
2539 | /// Providing Type 38 is recommended for backward compatibility.\r | |
2540 | ///\r | |
61ce5861 | 2541 | typedef struct {\r |
2f88bd3a MK |
2542 | SMBIOS_STRUCTURE Hdr;\r |
2543 | UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r | |
2544 | UINT8 IPMISpecificationRevision;\r | |
2545 | UINT8 I2CSlaveAddress;\r | |
2546 | UINT8 NVStorageDeviceAddress;\r | |
2547 | UINT64 BaseAddress;\r | |
2548 | UINT8 BaseAddressModifier_InterruptInfo;\r | |
2549 | UINT8 InterruptNumber;\r | |
61ce5861 | 2550 | } SMBIOS_TABLE_TYPE38;\r |
2551 | \r | |
98cb9ae8 | 2552 | ///\r |
af2dc6a7 | 2553 | /// System Power Supply - Power Supply Characteristics.\r |
98cb9ae8 | 2554 | ///\r |
2555 | typedef struct {\r | |
2f88bd3a MK |
2556 | UINT16 PowerSupplyHotReplaceable : 1;\r |
2557 | UINT16 PowerSupplyPresent : 1;\r | |
2558 | UINT16 PowerSupplyUnplugged : 1;\r | |
2559 | UINT16 InputVoltageRangeSwitch : 4;\r | |
2560 | UINT16 PowerSupplyStatus : 3;\r | |
2561 | UINT16 PowerSupplyType : 4;\r | |
2562 | UINT16 Reserved : 2;\r | |
98cb9ae8 | 2563 | } SYS_POWER_SUPPLY_CHARACTERISTICS;\r |
2564 | \r | |
4135253b | 2565 | ///\r |
af2dc6a7 | 2566 | /// System Power Supply (Type 39).\r |
4135253b | 2567 | ///\r |
7ddba202 SZ |
2568 | /// This structure identifies attributes of a system power supply. One instance\r |
2569 | /// of this record is present for each possible power supply in a system.\r | |
98cb9ae8 | 2570 | ///\r |
61ce5861 | 2571 | typedef struct {\r |
2f88bd3a MK |
2572 | SMBIOS_STRUCTURE Hdr;\r |
2573 | UINT8 PowerUnitGroup;\r | |
2574 | SMBIOS_TABLE_STRING Location;\r | |
2575 | SMBIOS_TABLE_STRING DeviceName;\r | |
2576 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2577 | SMBIOS_TABLE_STRING SerialNumber;\r | |
2578 | SMBIOS_TABLE_STRING AssetTagNumber;\r | |
2579 | SMBIOS_TABLE_STRING ModelPartNumber;\r | |
2580 | SMBIOS_TABLE_STRING RevisionLevel;\r | |
2581 | UINT16 MaxPowerCapacity;\r | |
2582 | SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r | |
2583 | UINT16 InputVoltageProbeHandle;\r | |
2584 | UINT16 CoolingDeviceHandle;\r | |
2585 | UINT16 InputCurrentProbeHandle;\r | |
61ce5861 | 2586 | } SMBIOS_TABLE_TYPE39;\r |
2587 | \r | |
bf7ea009 | 2588 | ///\r |
9095d37b | 2589 | /// Additional Information Entry Format.\r |
bf7ea009 | 2590 | ///\r |
9095d37b | 2591 | typedef struct {\r |
2f88bd3a MK |
2592 | UINT8 EntryLength;\r |
2593 | UINT16 ReferencedHandle;\r | |
2594 | UINT8 ReferencedOffset;\r | |
2595 | SMBIOS_TABLE_STRING EntryString;\r | |
2596 | UINT8 Value[1];\r | |
cfcca3c2 | 2597 | } ADDITIONAL_INFORMATION_ENTRY;\r |
61ce5861 | 2598 | \r |
4135253b | 2599 | ///\r |
af2dc6a7 | 2600 | /// Additional Information (Type 40).\r |
4135253b | 2601 | ///\r |
9095d37b LG |
2602 | /// This structure is intended to provide additional information for handling unspecified\r |
2603 | /// enumerated values and interim field updates in another structure.\r | |
98cb9ae8 | 2604 | ///\r |
61ce5861 | 2605 | typedef struct {\r |
2f88bd3a MK |
2606 | SMBIOS_STRUCTURE Hdr;\r |
2607 | UINT8 NumberOfAdditionalInformationEntries;\r | |
2608 | ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r | |
61ce5861 | 2609 | } SMBIOS_TABLE_TYPE40;\r |
2610 | \r | |
98cb9ae8 | 2611 | ///\r |
af2dc6a7 | 2612 | /// Onboard Devices Extended Information - Onboard Device Types.\r |
98cb9ae8 | 2613 | ///\r |
2f88bd3a | 2614 | typedef enum {\r |
98cb9ae8 | 2615 | OnBoardDeviceExtendedTypeOther = 0x01,\r |
2616 | OnBoardDeviceExtendedTypeUnknown = 0x02,\r | |
2617 | OnBoardDeviceExtendedTypeVideo = 0x03,\r | |
2618 | OnBoardDeviceExtendedTypeScsiController = 0x04,\r | |
2619 | OnBoardDeviceExtendedTypeEthernet = 0x05,\r | |
2620 | OnBoardDeviceExtendedTypeTokenRing = 0x06,\r | |
2621 | OnBoardDeviceExtendedTypeSound = 0x07,\r | |
2622 | OnBoardDeviceExtendedTypePATAController = 0x08,\r | |
2623 | OnBoardDeviceExtendedTypeSATAController = 0x09,\r | |
28eeb08d ALA |
2624 | OnBoardDeviceExtendedTypeSASController = 0x0A,\r |
2625 | OnBoardDeviceExtendedTypeWirelessLAN = 0x0B,\r | |
2626 | OnBoardDeviceExtendedTypeBluetooth = 0x0C,\r | |
2627 | OnBoardDeviceExtendedTypeWWAN = 0x0D,\r | |
2628 | OnBoardDeviceExtendedTypeeMMC = 0x0E,\r | |
2629 | OnBoardDeviceExtendedTypeNvme = 0x0F,\r | |
2630 | OnBoardDeviceExtendedTypeUfc = 0x10\r | |
98cb9ae8 | 2631 | } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r |
2632 | \r | |
4135253b | 2633 | ///\r |
af2dc6a7 | 2634 | /// Onboard Devices Extended Information (Type 41).\r |
4135253b | 2635 | ///\r |
9095d37b LG |
2636 | /// The information in this structure defines the attributes of devices that\r |
2637 | /// are onboard (soldered onto) a system element, usually the baseboard.\r | |
2638 | /// In general, an entry in this table implies that the BIOS has some level of\r | |
2639 | /// control over the enabling of the associated device for use by the system.\r | |
98cb9ae8 | 2640 | ///\r |
61ce5861 | 2641 | typedef struct {\r |
2f88bd3a MK |
2642 | SMBIOS_STRUCTURE Hdr;\r |
2643 | SMBIOS_TABLE_STRING ReferenceDesignation;\r | |
2644 | UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r | |
2645 | UINT8 DeviceTypeInstance;\r | |
2646 | UINT16 SegmentGroupNum;\r | |
2647 | UINT8 BusNum;\r | |
2648 | UINT8 DevFuncNum;\r | |
61ce5861 | 2649 | } SMBIOS_TABLE_TYPE41;\r |
2650 | \r | |
78ab44cb AC |
2651 | ///\r |
2652 | /// Management Controller Host Interface - Protocol Record Data Format.\r | |
2653 | ///\r | |
2654 | typedef struct {\r | |
2f88bd3a MK |
2655 | UINT8 ProtocolType;\r |
2656 | UINT8 ProtocolTypeDataLen;\r | |
2657 | UINT8 ProtocolTypeData[1];\r | |
78ab44cb AC |
2658 | } MC_HOST_INTERFACE_PROTOCOL_RECORD;\r |
2659 | \r | |
043026ac SZ |
2660 | ///\r |
2661 | /// Management Controller Host Interface - Interface Types.\r | |
2662 | /// 00h - 3Fh: MCTP Host Interfaces\r | |
2663 | ///\r | |
2f88bd3a MK |
2664 | typedef enum {\r |
2665 | MCHostInterfaceTypeNetworkHostInterface = 0x40,\r | |
2666 | MCHostInterfaceTypeOemDefined = 0xF0\r | |
043026ac SZ |
2667 | } MC_HOST_INTERFACE_TYPE;\r |
2668 | \r | |
2669 | ///\r | |
2670 | /// Management Controller Host Interface - Protocol Types.\r | |
2671 | ///\r | |
2f88bd3a MK |
2672 | typedef enum {\r |
2673 | MCHostInterfaceProtocolTypeIPMI = 0x02,\r | |
2674 | MCHostInterfaceProtocolTypeMCTP = 0x03,\r | |
2675 | MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r | |
2676 | MCHostInterfaceProtocolTypeOemDefined = 0xF0\r | |
043026ac SZ |
2677 | } MC_HOST_INTERFACE_PROTOCOL_TYPE;\r |
2678 | \r | |
7ddba202 SZ |
2679 | ///\r |
2680 | /// Management Controller Host Interface (Type 42).\r | |
2681 | ///\r | |
2682 | /// The information in this structure defines the attributes of a Management\r | |
2683 | /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r | |
2684 | ///\r | |
2685 | /// Type 42 should be used for management controller host interfaces that use protocols\r | |
2686 | /// other than IPMI or that use multiple protocols on a single host interface type.\r | |
2687 | ///\r | |
2688 | /// This structure should also be provided if IPMI is shared with other protocols\r | |
2689 | /// over the same interface hardware. If IPMI is not shared with other protocols,\r | |
2690 | /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r | |
2691 | /// recommended for backward compatibility. The structures are not required to\r | |
2692 | /// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r | |
2693 | /// simultaneously to provide backward compatibility with IPMI applications or drivers\r | |
2694 | /// that do not yet recognize the Type 42 structure.\r | |
2695 | ///\r | |
2696 | typedef struct {\r | |
2f88bd3a MK |
2697 | SMBIOS_STRUCTURE Hdr;\r |
2698 | UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r | |
2699 | UINT8 InterfaceTypeSpecificDataLength;\r | |
2700 | UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes\r | |
7ddba202 SZ |
2701 | } SMBIOS_TABLE_TYPE42;\r |
2702 | \r | |
f06c92a6 AC |
2703 | ///\r |
2704 | /// Processor Specific Block - Processor Architecture Type\r | |
2705 | ///\r | |
2f88bd3a | 2706 | typedef enum {\r |
68bf712d SN |
2707 | ProcessorSpecificBlockArchTypeReserved = 0x00,\r |
2708 | ProcessorSpecificBlockArchTypeIa32 = 0x01,\r | |
2709 | ProcessorSpecificBlockArchTypeX64 = 0x02,\r | |
2710 | ProcessorSpecificBlockArchTypeItanium = 0x03,\r | |
2711 | ProcessorSpecificBlockArchTypeAarch32 = 0x04,\r | |
2712 | ProcessorSpecificBlockArchTypeAarch64 = 0x05,\r | |
2713 | ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,\r | |
2714 | ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,\r | |
2715 | ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08,\r | |
2716 | ProcessorSpecificBlockArchTypeLoongArch32 = 0x09,\r | |
2717 | ProcessorSpecificBlockArchTypeLoongArch64 = 0x0A\r | |
f06c92a6 AC |
2718 | } PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;\r |
2719 | \r | |
2720 | ///\r | |
2721 | /// Processor Specific Block is the standard container of processor-specific data.\r | |
2722 | ///\r | |
2723 | typedef struct {\r | |
2f88bd3a MK |
2724 | UINT8 Length;\r |
2725 | UINT8 ProcessorArchType;\r | |
f06c92a6 AC |
2726 | ///\r |
2727 | /// Below followed by Processor-specific data\r | |
2728 | ///\r | |
2729 | ///\r | |
2730 | } PROCESSOR_SPECIFIC_BLOCK;\r | |
2731 | \r | |
2732 | ///\r | |
2733 | /// Processor Additional Information(Type 44).\r | |
2734 | ///\r | |
2735 | /// The information in this structure defines the processor additional information in case\r | |
2736 | /// SMBIOS type 4 is not sufficient to describe processor characteristics.\r | |
2737 | /// The SMBIOS type 44 structure has a reference handle field to link back to the related\r | |
2738 | /// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the\r | |
2739 | /// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,\r | |
2740 | /// SMBIOS type 44 structures describe different core-specific information.\r | |
2741 | ///\r | |
2742 | /// SMBIOS type 44 defines the standard header for the processor-specific block, while the\r | |
2743 | /// contents of processor-specific data are maintained by processor\r | |
2744 | /// architecture workgroups or vendors in separate documents.\r | |
2745 | ///\r | |
2746 | typedef struct {\r | |
2f88bd3a MK |
2747 | SMBIOS_STRUCTURE Hdr;\r |
2748 | SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4\r | |
f06c92a6 AC |
2749 | ///\r |
2750 | /// Below followed by Processor-specific block\r | |
2751 | ///\r | |
2f88bd3a | 2752 | PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;\r |
f06c92a6 AC |
2753 | } SMBIOS_TABLE_TYPE44;\r |
2754 | \r | |
713e4b00 LA |
2755 | ///\r |
2756 | /// TPM Device (Type 43).\r | |
2757 | ///\r | |
2758 | typedef struct {\r | |
2f88bd3a MK |
2759 | SMBIOS_STRUCTURE Hdr;\r |
2760 | UINT8 VendorID[4];\r | |
2761 | UINT8 MajorSpecVersion;\r | |
2762 | UINT8 MinorSpecVersion;\r | |
2763 | UINT32 FirmwareVersion1;\r | |
2764 | UINT32 FirmwareVersion2;\r | |
2765 | SMBIOS_TABLE_STRING Description;\r | |
2766 | UINT64 Characteristics;\r | |
2767 | UINT32 OemDefined;\r | |
713e4b00 LA |
2768 | } SMBIOS_TABLE_TYPE43;\r |
2769 | \r | |
28eeb08d ALA |
2770 | ///\r |
2771 | /// Firmware Inventory Version Format Type (Type 45).\r | |
2772 | ///\r | |
2773 | typedef enum {\r | |
2774 | VersionFormatTypeFreeForm = 0x00,\r | |
2775 | VersionFormatTypeMajorMinor = 0x01,\r | |
2776 | VersionFormatType32BitHex = 0x02,\r | |
2777 | VersionFormatType64BitHex = 0x03,\r | |
2778 | VersionFormatTypeReserved = 0x04, /// 0x04 - 0x7F are reserved\r | |
2779 | VersionFormatTypeOem = 0x80 /// 0x80 - 0xFF are BIOS Vendor/OEM-specific\r | |
2780 | } FIRMWARE_INVENTORY_VERSION_FORMAT_TYPE;\r | |
2781 | \r | |
2782 | ///\r | |
2783 | /// Firmware Inventory Firmware Id Format Type (Type 45).\r | |
2784 | ///\r | |
2785 | typedef enum {\r | |
2786 | FirmwareIdFormatTypeFreeForm = 0x00,\r | |
2787 | FirmwareIdFormatTypeUuid = 0x01,\r | |
2788 | FirmwareIdFormatTypeReserved = 0x04, /// 0x04 - 0x7F are reserved\r | |
2789 | InventoryFirmwareIdFormatTypeOem = 0x80 /// 0x80 - 0xFF are BIOS Vendor/OEM-specific\r | |
2790 | } FIRMWARE_INVENTORY_FIRMWARE_ID_FORMAT_TYPE;\r | |
2791 | \r | |
2792 | ///\r | |
2793 | /// Firmware Inventory Firmware Characteristics (Type 45).\r | |
2794 | ///\r | |
9102518d SN |
2795 | typedef struct {\r |
2796 | UINT16 Updatable : 1;\r | |
2797 | UINT16 WriteProtected : 1;\r | |
2798 | UINT16 Reserved : 14;\r | |
2799 | } FIRMWARE_CHARACTERISTICS;\r | |
28eeb08d ALA |
2800 | \r |
2801 | ///\r | |
2802 | /// Firmware Inventory State Information (Type 45).\r | |
2803 | ///\r | |
2804 | typedef enum {\r | |
2805 | FirmwareInventoryStateOther = 0x01,\r | |
2806 | FirmwareInventoryStateUnknown = 0x02,\r | |
2807 | FirmwareInventoryStateDisabled = 0x03,\r | |
2808 | FirmwareInventoryStateEnabled = 0x04,\r | |
2809 | FirmwareInventoryStateAbsent = 0x05,\r | |
2810 | FirmwareInventoryStateStandbyOffline = 0x06,\r | |
2811 | FirmwareInventoryStateStandbySpare = 0x07,\r | |
9102518d | 2812 | FirmwareInventoryStateUnavailableOffline = 0x08\r |
28eeb08d ALA |
2813 | } FIRMWARE_INVENTORY_STATE;\r |
2814 | \r | |
2815 | ///\r | |
2816 | /// Firmware Inventory Information (Type 45)\r | |
2817 | ///\r | |
2818 | /// The information in this structure defines an inventory of firmware\r | |
2819 | /// components in the system. This can include firmware components such as\r | |
2820 | /// BIOS, BMC, as well as firmware for other devices in the system.\r | |
2821 | /// The information can be used by software to display the firmware inventory\r | |
2822 | /// in a uniform manner. It can also be used by a management controller,\r | |
2823 | /// such as a BMC, for remote system management.\r | |
2824 | /// This structure is not intended to replace other standard programmatic\r | |
2825 | /// interfaces for firmware updates.\r | |
2826 | /// One Type 45 structure is provided for each firmware component.\r | |
2827 | ///\r | |
2828 | typedef struct {\r | |
9102518d SN |
2829 | SMBIOS_STRUCTURE Hdr;\r |
2830 | SMBIOS_TABLE_STRING FirmwareComponentName;\r | |
2831 | SMBIOS_TABLE_STRING FirmwareVersion;\r | |
2832 | UINT8 FirmwareVersionFormat; ///< The enumeration value from FIRMWARE_INVENTORY_VERSION_FORMAT_TYPE\r | |
2833 | SMBIOS_TABLE_STRING FirmwareId;\r | |
2834 | UINT8 FirmwareIdFormat; ///< The enumeration value from FIRMWARE_INVENTORY_FIRMWARE_ID_FORMAT_TYPE.\r | |
2835 | SMBIOS_TABLE_STRING ReleaseDate;\r | |
2836 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2837 | SMBIOS_TABLE_STRING LowestSupportedVersion;\r | |
2838 | UINT64 ImageSize;\r | |
2839 | FIRMWARE_CHARACTERISTICS Characteristics;\r | |
2840 | UINT8 State; ///< The enumeration value from FIRMWARE_INVENTORY_STATE.\r | |
2841 | UINT8 AssociatedComponentCount;\r | |
28eeb08d ALA |
2842 | ///\r |
2843 | /// zero or n-number of handles depends on AssociatedComponentCount\r | |
2844 | /// handles are of type SMBIOS_HANDLE\r | |
2845 | ///\r | |
2846 | } SMBIOS_TABLE_TYPE45;\r | |
2847 | \r | |
2848 | ///\r | |
2849 | /// String Property IDs (Type 46).\r | |
2850 | ///\r | |
2851 | typedef enum {\r | |
2852 | StringPropertyIdNone = 0x0000,\r | |
2853 | StringPropertyIdDevicePath = 0x0001,\r | |
2854 | StringPropertyIdReserved = 0x0002, /// Reserved 0x0002 - 0x7FFF\r | |
2855 | StringPropertyIdBiosVendor = 0x8000, /// BIOS vendor 0x8000 - 0xBFFF\r | |
2856 | StringPropertyIdOem = 0xC000 /// OEM range 0xC000 - 0xFFFF\r | |
2857 | } STRING_PROPERTY_ID;\r | |
2858 | \r | |
2859 | ///\r | |
2860 | /// This structure defines a string property for another structure.\r | |
2861 | /// This allows adding string properties that are common to several structures\r | |
2862 | /// without having to modify the definitions of these structures.\r | |
2863 | /// Multiple type 46 structures can add string properties to the same\r | |
2864 | /// parent structure.\r | |
2865 | ///\r | |
2866 | typedef struct {\r | |
9102518d SN |
2867 | SMBIOS_STRUCTURE Hdr;\r |
2868 | UINT16 StringPropertyId; ///< The enumeration value from STRING_PROPERTY_ID.\r | |
2869 | SMBIOS_TABLE_STRING StringPropertyValue;\r | |
2870 | SMBIOS_HANDLE ParentHandle;\r | |
28eeb08d ALA |
2871 | } SMBIOS_TABLE_TYPE46;\r |
2872 | \r | |
4135253b | 2873 | ///\r |
2874 | /// Inactive (Type 126)\r | |
2875 | ///\r | |
61ce5861 | 2876 | typedef struct {\r |
2f88bd3a | 2877 | SMBIOS_STRUCTURE Hdr;\r |
61ce5861 | 2878 | } SMBIOS_TABLE_TYPE126;\r |
2879 | \r | |
4135253b | 2880 | ///\r |
2881 | /// End-of-Table (Type 127)\r | |
2882 | ///\r | |
61ce5861 | 2883 | typedef struct {\r |
2f88bd3a | 2884 | SMBIOS_STRUCTURE Hdr;\r |
61ce5861 | 2885 | } SMBIOS_TABLE_TYPE127;\r |
2886 | \r | |
4135253b | 2887 | ///\r |
af2dc6a7 | 2888 | /// Union of all the possible SMBIOS record types.\r |
4135253b | 2889 | ///\r |
61ce5861 | 2890 | typedef union {\r |
2f88bd3a MK |
2891 | SMBIOS_STRUCTURE *Hdr;\r |
2892 | SMBIOS_TABLE_TYPE0 *Type0;\r | |
2893 | SMBIOS_TABLE_TYPE1 *Type1;\r | |
2894 | SMBIOS_TABLE_TYPE2 *Type2;\r | |
2895 | SMBIOS_TABLE_TYPE3 *Type3;\r | |
2896 | SMBIOS_TABLE_TYPE4 *Type4;\r | |
2897 | SMBIOS_TABLE_TYPE5 *Type5;\r | |
2898 | SMBIOS_TABLE_TYPE6 *Type6;\r | |
2899 | SMBIOS_TABLE_TYPE7 *Type7;\r | |
2900 | SMBIOS_TABLE_TYPE8 *Type8;\r | |
2901 | SMBIOS_TABLE_TYPE9 *Type9;\r | |
2902 | SMBIOS_TABLE_TYPE10 *Type10;\r | |
2903 | SMBIOS_TABLE_TYPE11 *Type11;\r | |
2904 | SMBIOS_TABLE_TYPE12 *Type12;\r | |
2905 | SMBIOS_TABLE_TYPE13 *Type13;\r | |
2906 | SMBIOS_TABLE_TYPE14 *Type14;\r | |
2907 | SMBIOS_TABLE_TYPE15 *Type15;\r | |
2908 | SMBIOS_TABLE_TYPE16 *Type16;\r | |
2909 | SMBIOS_TABLE_TYPE17 *Type17;\r | |
2910 | SMBIOS_TABLE_TYPE18 *Type18;\r | |
2911 | SMBIOS_TABLE_TYPE19 *Type19;\r | |
2912 | SMBIOS_TABLE_TYPE20 *Type20;\r | |
2913 | SMBIOS_TABLE_TYPE21 *Type21;\r | |
2914 | SMBIOS_TABLE_TYPE22 *Type22;\r | |
2915 | SMBIOS_TABLE_TYPE23 *Type23;\r | |
2916 | SMBIOS_TABLE_TYPE24 *Type24;\r | |
2917 | SMBIOS_TABLE_TYPE25 *Type25;\r | |
2918 | SMBIOS_TABLE_TYPE26 *Type26;\r | |
2919 | SMBIOS_TABLE_TYPE27 *Type27;\r | |
2920 | SMBIOS_TABLE_TYPE28 *Type28;\r | |
2921 | SMBIOS_TABLE_TYPE29 *Type29;\r | |
2922 | SMBIOS_TABLE_TYPE30 *Type30;\r | |
2923 | SMBIOS_TABLE_TYPE31 *Type31;\r | |
2924 | SMBIOS_TABLE_TYPE32 *Type32;\r | |
2925 | SMBIOS_TABLE_TYPE33 *Type33;\r | |
2926 | SMBIOS_TABLE_TYPE34 *Type34;\r | |
2927 | SMBIOS_TABLE_TYPE35 *Type35;\r | |
2928 | SMBIOS_TABLE_TYPE36 *Type36;\r | |
2929 | SMBIOS_TABLE_TYPE37 *Type37;\r | |
2930 | SMBIOS_TABLE_TYPE38 *Type38;\r | |
2931 | SMBIOS_TABLE_TYPE39 *Type39;\r | |
2932 | SMBIOS_TABLE_TYPE40 *Type40;\r | |
2933 | SMBIOS_TABLE_TYPE41 *Type41;\r | |
2934 | SMBIOS_TABLE_TYPE42 *Type42;\r | |
2935 | SMBIOS_TABLE_TYPE43 *Type43;\r | |
2936 | SMBIOS_TABLE_TYPE44 *Type44;\r | |
28eeb08d ALA |
2937 | SMBIOS_TABLE_TYPE45 *Type45;\r |
2938 | SMBIOS_TABLE_TYPE46 *Type46;\r | |
2f88bd3a MK |
2939 | SMBIOS_TABLE_TYPE126 *Type126;\r |
2940 | SMBIOS_TABLE_TYPE127 *Type127;\r | |
2941 | UINT8 *Raw;\r | |
61ce5861 | 2942 | } SMBIOS_STRUCTURE_POINTER;\r |
2943 | \r | |
766f4bc1 | 2944 | #pragma pack()\r |
2945 | \r | |
a7ed1e2e | 2946 | #endif\r |