]>
Commit | Line | Data |
---|---|---|
6bfbb5f0 | 1 | ## @file\r |
34b0820e | 2 | # Base Library implementation.\r |
85ea851e | 3 | #\r |
0aac2f77 | 4 | # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>\r |
bb817c56 | 5 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
807e2604 | 6 | # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r |
7601b251 | 7 | # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r |
e1f414b6 | 8 | #\r |
9344f092 | 9 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e1f414b6 | 10 | #\r |
11 | #\r | |
6bfbb5f0 | 12 | ##\r |
e1f414b6 | 13 | \r |
e1f414b6 | 14 | [Defines]\r |
15 | INF_VERSION = 0x00010005\r | |
16 | BASE_NAME = BaseLib\r | |
c92c1790 | 17 | MODULE_UNI_FILE = BaseLib.uni\r |
e1f414b6 | 18 | FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30\r |
19 | MODULE_TYPE = BASE\r | |
88a75d26 | 20 | VERSION_STRING = 1.1\r |
9095d37b | 21 | LIBRARY_CLASS = BaseLib\r |
e1f414b6 | 22 | \r |
e1f414b6 | 23 | #\r |
7601b251 | 24 | # VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64\r |
e1f414b6 | 25 | #\r |
26 | \r | |
6bfbb5f0 | 27 | [Sources]\r |
e1f414b6 | 28 | CheckSum.c\r |
29 | SwitchStack.c\r | |
30 | SwapBytes64.c\r | |
31 | SwapBytes32.c\r | |
32 | SwapBytes16.c\r | |
33 | LongJump.c\r | |
34 | SetJump.c\r | |
35 | RShiftU64.c\r | |
36 | RRotU64.c\r | |
37 | RRotU32.c\r | |
38 | MultU64x64.c\r | |
39 | MultU64x32.c\r | |
40 | MultS64x64.c\r | |
41 | ModU64x32.c\r | |
42 | LShiftU64.c\r | |
43 | LRotU64.c\r | |
44 | LRotU32.c\r | |
45 | LowBitSet64.c\r | |
46 | LowBitSet32.c\r | |
47 | HighBitSet64.c\r | |
48 | HighBitSet32.c\r | |
49 | GetPowerOfTwo64.c\r | |
50 | GetPowerOfTwo32.c\r | |
51 | DivU64x64Remainder.c\r | |
52 | DivU64x32Remainder.c\r | |
53 | DivU64x32.c\r | |
54 | DivS64x64Remainder.c\r | |
55 | ARShiftU64.c\r | |
56 | BitField.c\r | |
57 | CpuDeadLoop.c\r | |
58 | Cpu.c\r | |
59 | LinkedList.c\r | |
c058d59f | 60 | SafeString.c\r |
e1f414b6 | 61 | String.c\r |
ae591c14 | 62 | FilePaths.c\r |
e1f414b6 | 63 | BaseLibInternals.h\r |
e1f414b6 | 64 | \r |
65 | [Sources.Ia32]\r | |
364a5474 | 66 | Ia32/WriteTr.nasm\r |
2ecd8299 | 67 | Ia32/Lfence.nasm\r |
364a5474 | 68 | \r |
9095d37b LG |
69 | Ia32/Wbinvd.c | MSFT\r |
70 | Ia32/WriteMm7.c | MSFT\r | |
71 | Ia32/WriteMm6.c | MSFT\r | |
72 | Ia32/WriteMm5.c | MSFT\r | |
73 | Ia32/WriteMm4.c | MSFT\r | |
74 | Ia32/WriteMm3.c | MSFT\r | |
75 | Ia32/WriteMm2.c | MSFT\r | |
76 | Ia32/WriteMm1.c | MSFT\r | |
77 | Ia32/WriteMm0.c | MSFT\r | |
78 | Ia32/WriteLdtr.c | MSFT\r | |
79 | Ia32/WriteIdtr.c | MSFT\r | |
80 | Ia32/WriteGdtr.c | MSFT\r | |
81 | Ia32/WriteDr7.c | MSFT\r | |
82 | Ia32/WriteDr6.c | MSFT\r | |
83 | Ia32/WriteDr5.c | MSFT\r | |
84 | Ia32/WriteDr4.c | MSFT\r | |
85 | Ia32/WriteDr3.c | MSFT\r | |
86 | Ia32/WriteDr2.c | MSFT\r | |
87 | Ia32/WriteDr1.c | MSFT\r | |
88 | Ia32/WriteDr0.c | MSFT\r | |
89 | Ia32/WriteCr4.c | MSFT\r | |
90 | Ia32/WriteCr3.c | MSFT\r | |
91 | Ia32/WriteCr2.c | MSFT\r | |
92 | Ia32/WriteCr0.c | MSFT\r | |
93 | Ia32/WriteMsr64.c | MSFT\r | |
94 | Ia32/SwapBytes64.c | MSFT\r | |
9095d37b LG |
95 | Ia32/RRotU64.c | MSFT\r |
96 | Ia32/RShiftU64.c | MSFT\r | |
97 | Ia32/ReadPmc.c | MSFT\r | |
98 | Ia32/ReadTsc.c | MSFT\r | |
99 | Ia32/ReadLdtr.c | MSFT\r | |
100 | Ia32/ReadIdtr.c | MSFT\r | |
101 | Ia32/ReadGdtr.c | MSFT\r | |
102 | Ia32/ReadTr.c | MSFT\r | |
103 | Ia32/ReadSs.c | MSFT\r | |
104 | Ia32/ReadGs.c | MSFT\r | |
105 | Ia32/ReadFs.c | MSFT\r | |
106 | Ia32/ReadEs.c | MSFT\r | |
107 | Ia32/ReadDs.c | MSFT\r | |
108 | Ia32/ReadCs.c | MSFT\r | |
109 | Ia32/ReadMsr64.c | MSFT\r | |
110 | Ia32/ReadMm7.c | MSFT\r | |
111 | Ia32/ReadMm6.c | MSFT\r | |
112 | Ia32/ReadMm5.c | MSFT\r | |
113 | Ia32/ReadMm4.c | MSFT\r | |
114 | Ia32/ReadMm3.c | MSFT\r | |
115 | Ia32/ReadMm2.c | MSFT\r | |
116 | Ia32/ReadMm1.c | MSFT\r | |
117 | Ia32/ReadMm0.c | MSFT\r | |
118 | Ia32/ReadEflags.c | MSFT\r | |
119 | Ia32/ReadDr7.c | MSFT\r | |
120 | Ia32/ReadDr6.c | MSFT\r | |
121 | Ia32/ReadDr5.c | MSFT\r | |
122 | Ia32/ReadDr4.c | MSFT\r | |
123 | Ia32/ReadDr3.c | MSFT\r | |
124 | Ia32/ReadDr2.c | MSFT\r | |
125 | Ia32/ReadDr1.c | MSFT\r | |
126 | Ia32/ReadDr0.c | MSFT\r | |
127 | Ia32/ReadCr4.c | MSFT\r | |
128 | Ia32/ReadCr3.c | MSFT\r | |
129 | Ia32/ReadCr2.c | MSFT\r | |
130 | Ia32/ReadCr0.c | MSFT\r | |
131 | Ia32/Mwait.c | MSFT\r | |
132 | Ia32/Monitor.c | MSFT\r | |
133 | Ia32/ModU64x32.c | MSFT\r | |
134 | Ia32/MultU64x64.c | MSFT\r | |
135 | Ia32/MultU64x32.c | MSFT\r | |
136 | Ia32/LShiftU64.c | MSFT\r | |
137 | Ia32/LRotU64.c | MSFT\r | |
9095d37b LG |
138 | Ia32/Invd.c | MSFT\r |
139 | Ia32/FxRestore.c | MSFT\r | |
140 | Ia32/FxSave.c | MSFT\r | |
141 | Ia32/FlushCacheLine.c | MSFT\r | |
142 | Ia32/EnablePaging32.c | MSFT\r | |
143 | Ia32/EnableInterrupts.c | MSFT\r | |
144 | Ia32/EnableDisableInterrupts.c | MSFT\r | |
9095d37b LG |
145 | Ia32/DivU64x32Remainder.c | MSFT\r |
146 | Ia32/DivU64x32.c | MSFT\r | |
147 | Ia32/DisablePaging32.c | MSFT\r | |
148 | Ia32/DisableInterrupts.c | MSFT\r | |
149 | Ia32/CpuPause.c | MSFT\r | |
150 | Ia32/CpuIdEx.c | MSFT\r | |
151 | Ia32/CpuId.c | MSFT\r | |
152 | Ia32/CpuBreakpoint.c | MSFT\r | |
153 | Ia32/ARShiftU64.c | MSFT\r | |
9f4f2f0e | 154 | Ia32/EnableCache.c | MSFT\r |
155 | Ia32/DisableCache.c | MSFT\r | |
d074a8e1 | 156 | \r |
d074a8e1 | 157 | \r |
cf683fed | 158 | Ia32/GccInline.c | GCC\r |
5b7255e3 | 159 | Ia32/Thunk16.nasm\r |
cb44f80a | 160 | Ia32/EnableDisableInterrupts.nasm| GCC\r |
5b7255e3 | 161 | Ia32/EnablePaging64.nasm\r |
7e08bace | 162 | Ia32/DisablePaging32.nasm| GCC\r |
4fc416a6 | 163 | Ia32/EnablePaging32.nasm| GCC\r |
c3a324ff | 164 | Ia32/Mwait.nasm| GCC\r |
fdf359f3 | 165 | Ia32/Monitor.nasm| GCC\r |
c7f75a99 | 166 | Ia32/CpuIdEx.nasm| GCC\r |
3357f083 | 167 | Ia32/CpuId.nasm| GCC\r |
174232fa SZ |
168 | Ia32/LongJump.nasm\r |
169 | Ia32/SetJump.nasm\r | |
1d3324f9 | 170 | Ia32/SwapBytes64.nasm| GCC\r |
5b7255e3 | 171 | Ia32/DivU64x64Remainder.nasm\r |
fb79aa01 | 172 | Ia32/DivU64x32Remainder.nasm| GCC\r |
fd890f59 | 173 | Ia32/ModU64x32.nasm| GCC\r |
fe4b3b4b | 174 | Ia32/DivU64x32.nasm| GCC\r |
f15f4aef | 175 | Ia32/MultU64x64.nasm| GCC\r |
f8b4c87c | 176 | Ia32/MultU64x32.nasm| GCC\r |
7905d234 | 177 | Ia32/RRotU64.nasm| GCC\r |
c41d8eb0 | 178 | Ia32/LRotU64.nasm| GCC\r |
649509ef | 179 | Ia32/ARShiftU64.nasm| GCC\r |
a2cc2aa7 | 180 | Ia32/RShiftU64.nasm| GCC\r |
76a77878 | 181 | Ia32/LShiftU64.nasm| GCC\r |
22327b5a | 182 | Ia32/EnableCache.nasm| GCC\r |
b204f668 | 183 | Ia32/DisableCache.nasm| GCC\r |
5b7255e3 | 184 | Ia32/RdRand.nasm\r |
d074a8e1 | 185 | \r |
bb40027d | 186 | Ia32/DivS64x64Remainder.c\r |
bab427db | 187 | Ia32/InternalSwitchStack.c | MSFT\r |
65960189 | 188 | Ia32/InternalSwitchStack.nasm | GCC\r |
e1f414b6 | 189 | Ia32/Non-existing.c\r |
190 | Unaligned.c\r | |
b26978d3 | 191 | X86WriteIdtr.c\r |
192 | X86WriteGdtr.c\r | |
193 | X86Thunk.c\r | |
194 | X86ReadIdtr.c\r | |
195 | X86ReadGdtr.c\r | |
196 | X86Msr.c\r | |
c756ce80 | 197 | X86MemoryFence.c | MSFT\r |
b26978d3 | 198 | X86GetInterruptState.c\r |
199 | X86FxSave.c\r | |
200 | X86FxRestore.c\r | |
201 | X86EnablePaging64.c\r | |
202 | X86EnablePaging32.c\r | |
203 | X86DisablePaging64.c\r | |
204 | X86DisablePaging32.c\r | |
9ec9a7a5 | 205 | X86RdRand.c\r |
8596c140 | 206 | X86PatchInstruction.c\r |
d9f1cac5 | 207 | X86SpeculationBarrier.c\r |
e1f414b6 | 208 | \r |
209 | [Sources.X64]\r | |
6655cbf1 | 210 | X64/Thunk16.nasm\r |
9f6bfc11 | 211 | X64/CpuIdEx.nasm\r |
fd5eb53d | 212 | X64/CpuId.nasm\r |
56244b92 | 213 | X64/LongJump.nasm\r |
e3d50cc4 | 214 | X64/SetJump.nasm\r |
ed1e7222 | 215 | X64/SwitchStack.nasm\r |
a91d8309 | 216 | X64/EnableCache.nasm\r |
c1d82295 | 217 | X64/DisableCache.nasm\r |
364a5474 | 218 | X64/WriteTr.nasm\r |
2ecd8299 | 219 | X64/Lfence.nasm\r |
d074a8e1 | 220 | \r |
9095d37b LG |
221 | X64/CpuBreakpoint.c | MSFT\r |
222 | X64/WriteMsr64.c | MSFT\r | |
223 | X64/ReadMsr64.c | MSFT\r | |
345068d6 | 224 | X64/CpuPause.nasm| MSFT\r |
10f8b8d1 | 225 | X64/DisableInterrupts.nasm| MSFT\r |
4f66e999 | 226 | X64/EnableInterrupts.nasm| MSFT\r |
6a4d3fed | 227 | X64/FlushCacheLine.nasm| MSFT\r |
e53f8184 | 228 | X64/Invd.nasm| MSFT\r |
079f75d5 | 229 | X64/Wbinvd.nasm| MSFT\r |
fe945935 | 230 | X64/Mwait.nasm| MSFT\r |
4a9ae789 | 231 | X64/Monitor.nasm| MSFT\r |
3dbb4a70 | 232 | X64/ReadPmc.nasm| MSFT\r |
1119b2ac | 233 | X64/ReadTsc.nasm| MSFT\r |
37753fa0 | 234 | X64/WriteMm7.nasm| MSFT\r |
114fc827 | 235 | X64/WriteMm6.nasm| MSFT\r |
6c9c6ce8 | 236 | X64/WriteMm5.nasm| MSFT\r |
7c8fa338 | 237 | X64/WriteMm4.nasm| MSFT\r |
f3175833 | 238 | X64/WriteMm3.nasm| MSFT\r |
dd432baa | 239 | X64/WriteMm2.nasm| MSFT\r |
1322928f | 240 | X64/WriteMm1.nasm| MSFT\r |
24946626 | 241 | X64/WriteMm0.nasm| MSFT\r |
90e30b11 | 242 | X64/ReadMm7.nasm| MSFT\r |
103db15c | 243 | X64/ReadMm6.nasm| MSFT\r |
3566b815 | 244 | X64/ReadMm5.nasm| MSFT\r |
adafb84b | 245 | X64/ReadMm4.nasm| MSFT\r |
c936112a | 246 | X64/ReadMm3.nasm| MSFT\r |
434363ce | 247 | X64/ReadMm2.nasm| MSFT\r |
b13e693e | 248 | X64/ReadMm1.nasm| MSFT\r |
29384370 | 249 | X64/ReadMm0.nasm| MSFT\r |
ac94856d | 250 | X64/FxRestore.nasm| MSFT\r |
fe3034ba | 251 | X64/FxSave.nasm| MSFT\r |
0a6729da | 252 | X64/WriteLdtr.nasm| MSFT\r |
f80180f9 | 253 | X64/ReadLdtr.nasm| MSFT\r |
8cf392dd | 254 | X64/WriteIdtr.nasm| MSFT\r |
20bd7f34 | 255 | X64/ReadIdtr.nasm| MSFT\r |
0339e057 | 256 | X64/WriteGdtr.nasm| MSFT\r |
33ba62ac | 257 | X64/ReadGdtr.nasm| MSFT\r |
9967c4b0 | 258 | X64/ReadTr.nasm| MSFT\r |
fbc9a910 | 259 | X64/ReadSs.nasm| MSFT\r |
3c8d7412 | 260 | X64/ReadGs.nasm| MSFT\r |
0401a03e | 261 | X64/ReadFs.nasm| MSFT\r |
8a63e4e9 | 262 | X64/ReadEs.nasm| MSFT\r |
c892afaf | 263 | X64/ReadDs.nasm| MSFT\r |
b56da74a | 264 | X64/ReadCs.nasm| MSFT\r |
b09957b7 | 265 | X64/WriteDr7.nasm| MSFT\r |
689759d6 | 266 | X64/WriteDr6.nasm| MSFT\r |
0490028c | 267 | X64/WriteDr5.nasm| MSFT\r |
5874dd6b | 268 | X64/WriteDr4.nasm| MSFT\r |
7b8be919 | 269 | X64/WriteDr3.nasm| MSFT\r |
30fa9c79 | 270 | X64/WriteDr2.nasm| MSFT\r |
f3594c83 | 271 | X64/WriteDr1.nasm| MSFT\r |
aa5bfdcb | 272 | X64/WriteDr0.nasm| MSFT\r |
dea86a29 | 273 | X64/ReadDr7.nasm| MSFT\r |
41535500 | 274 | X64/ReadDr6.nasm| MSFT\r |
9aa2efaa | 275 | X64/ReadDr5.nasm| MSFT\r |
b03d993a | 276 | X64/ReadDr4.nasm| MSFT\r |
e8ad4030 | 277 | X64/ReadDr3.nasm| MSFT\r |
7df38fad | 278 | X64/ReadDr2.nasm| MSFT\r |
3fca763f | 279 | X64/ReadDr1.nasm| MSFT\r |
cb509ade | 280 | X64/ReadDr0.nasm| MSFT\r |
9f91893f | 281 | X64/WriteCr4.nasm| MSFT\r |
4dac999f | 282 | X64/WriteCr3.nasm| MSFT\r |
94a5acc9 | 283 | X64/WriteCr2.nasm| MSFT\r |
b2a22733 | 284 | X64/WriteCr0.nasm| MSFT\r |
656a75da | 285 | X64/ReadCr4.nasm| MSFT\r |
f08409a7 | 286 | X64/ReadCr3.nasm| MSFT\r |
bcdc107c | 287 | X64/ReadCr2.nasm| MSFT\r |
63a21006 | 288 | X64/ReadCr0.nasm| MSFT\r |
5401d5be | 289 | X64/ReadEflags.nasm| MSFT\r |
d074a8e1 | 290 | \r |
d074a8e1 | 291 | \r |
e1f414b6 | 292 | X64/Non-existing.c\r |
293 | Math64.c\r | |
294 | Unaligned.c\r | |
b26978d3 | 295 | X86WriteIdtr.c\r |
296 | X86WriteGdtr.c\r | |
297 | X86Thunk.c\r | |
298 | X86ReadIdtr.c\r | |
299 | X86ReadGdtr.c\r | |
300 | X86Msr.c\r | |
2653bb43 | 301 | X86MemoryFence.c | MSFT\r |
b26978d3 | 302 | X86GetInterruptState.c\r |
303 | X86FxSave.c\r | |
304 | X86FxRestore.c\r | |
305 | X86EnablePaging64.c\r | |
306 | X86EnablePaging32.c\r | |
307 | X86DisablePaging64.c\r | |
308 | X86DisablePaging32.c\r | |
9ec9a7a5 | 309 | X86RdRand.c\r |
8596c140 | 310 | X86PatchInstruction.c\r |
d9f1cac5 | 311 | X86SpeculationBarrier.c\r |
cf683fed | 312 | X64/GccInline.c | GCC\r |
5b7255e3 SZ |
313 | X64/EnableDisableInterrupts.nasm\r |
314 | X64/DisablePaging64.nasm\r | |
315 | X64/RdRand.nasm\r | |
9095d37b | 316 | ChkStkGcc.c | GCC\r |
e1f414b6 | 317 | \r |
e1f414b6 | 318 | [Sources.EBC]\r |
e1f414b6 | 319 | Ebc/CpuBreakpoint.c\r |
320 | Ebc/SetJumpLongJump.c\r | |
321 | Ebc/SwitchStack.c\r | |
d9f1cac5 | 322 | Ebc/SpeculationBarrier.c\r |
e1f414b6 | 323 | Unaligned.c\r |
324 | Math64.c\r | |
325 | \r | |
4b5f371b | 326 | [Sources.ARM]\r |
327 | Arm/InternalSwitchStack.c\r | |
328 | Arm/Unaligned.c\r | |
30939ff2 PB |
329 | Math64.c | RVCT\r |
330 | Math64.c | MSFT\r | |
331 | \r | |
4b5f371b | 332 | Arm/SwitchStack.asm | RVCT\r |
333 | Arm/SetJumpLongJump.asm | RVCT\r | |
334 | Arm/DisableInterrupts.asm | RVCT\r | |
335 | Arm/EnableInterrupts.asm | RVCT\r | |
336 | Arm/GetInterruptsState.asm | RVCT\r | |
337 | Arm/CpuPause.asm | RVCT\r | |
703f1d09 | 338 | Arm/CpuBreakpoint.asm | RVCT\r |
8c1e7951 | 339 | Arm/MemoryFence.asm | RVCT\r |
c0959b44 | 340 | Arm/SpeculationBarrier.S | RVCT\r |
30939ff2 PB |
341 | \r |
342 | Arm/SwitchStack.asm | MSFT\r | |
343 | Arm/SetJumpLongJump.asm | MSFT\r | |
344 | Arm/DisableInterrupts.asm | MSFT\r | |
345 | Arm/EnableInterrupts.asm | MSFT\r | |
346 | Arm/GetInterruptsState.asm | MSFT\r | |
347 | Arm/CpuPause.asm | MSFT\r | |
348 | Arm/CpuBreakpoint.asm | MSFT\r | |
349 | Arm/MemoryFence.asm | MSFT\r | |
c0959b44 | 350 | Arm/SpeculationBarrier.asm | MSFT\r |
30939ff2 | 351 | \r |
703f1d09 | 352 | Arm/Math64.S | GCC\r |
08068159 | 353 | Arm/SwitchStack.S | GCC\r |
4b5f371b | 354 | Arm/EnableInterrupts.S | GCC\r |
355 | Arm/DisableInterrupts.S | GCC\r | |
7f22d351 | 356 | Arm/GetInterruptsState.S | GCC\r |
4b5f371b | 357 | Arm/SetJumpLongJump.S | GCC\r |
358 | Arm/CpuBreakpoint.S | GCC\r | |
8c1e7951 | 359 | Arm/MemoryFence.S | GCC\r |
c0959b44 | 360 | Arm/SpeculationBarrier.S | GCC\r |
4b5f371b | 361 | \r |
807e2604 HL |
362 | [Sources.AARCH64]\r |
363 | Arm/InternalSwitchStack.c\r | |
364 | Arm/Unaligned.c\r | |
365 | Math64.c\r | |
366 | \r | |
8c1e7951 | 367 | AArch64/MemoryFence.S | GCC\r |
807e2604 HL |
368 | AArch64/SwitchStack.S | GCC\r |
369 | AArch64/EnableInterrupts.S | GCC\r | |
370 | AArch64/DisableInterrupts.S | GCC\r | |
371 | AArch64/GetInterruptsState.S | GCC\r | |
372 | AArch64/SetJumpLongJump.S | GCC\r | |
373 | AArch64/CpuBreakpoint.S | GCC\r | |
c0959b44 | 374 | AArch64/SpeculationBarrier.S | GCC\r |
807e2604 | 375 | \r |
da351bdb PB |
376 | AArch64/MemoryFence.asm | MSFT\r |
377 | AArch64/SwitchStack.asm | MSFT\r | |
378 | AArch64/EnableInterrupts.asm | MSFT\r | |
379 | AArch64/DisableInterrupts.asm | MSFT\r | |
380 | AArch64/GetInterruptsState.asm | MSFT\r | |
381 | AArch64/SetJumpLongJump.asm | MSFT\r | |
382 | AArch64/CpuBreakpoint.asm | MSFT\r | |
c0959b44 | 383 | AArch64/SpeculationBarrier.asm | MSFT\r |
da351bdb | 384 | \r |
7601b251 AC |
385 | [Sources.RISCV64]\r |
386 | Math64.c\r | |
387 | Unaligned.c\r | |
388 | RiscV64/InternalSwitchStack.c\r | |
389 | RiscV64/CpuBreakpoint.c\r | |
390 | RiscV64/GetInterruptState.c\r | |
391 | RiscV64/DisableInterrupts.c\r | |
392 | RiscV64/EnableInterrupts.c\r | |
393 | RiscV64/CpuPause.c\r | |
394 | RiscV64/RiscVSetJumpLongJump.S | GCC\r | |
395 | RiscV64/RiscVCpuBreakpoint.S | GCC\r | |
396 | RiscV64/RiscVCpuPause.S | GCC\r | |
397 | RiscV64/RiscVInterrupt.S | GCC\r | |
398 | RiscV64/FlushCache.S | GCC\r | |
399 | \r | |
e1f414b6 | 400 | [Packages]\r |
401 | MdePkg/MdePkg.dec\r | |
402 | \r | |
e1f414b6 | 403 | [LibraryClasses]\r |
404 | PcdLib\r | |
e1f414b6 | 405 | DebugLib\r |
406 | BaseMemoryLib\r | |
407 | \r | |
1081f624 | 408 | [Pcd]\r |
c92c1790 LG |
409 | gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength ## SOMETIMES_CONSUMES\r |
410 | gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## SOMETIMES_CONSUMES\r | |
411 | gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength ## SOMETIMES_CONSUMES\r | |
0aac2f77 | 412 | gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask ## SOMETIMES_CONSUMES\r |
aec74656 | 413 | gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType ## SOMETIMES_CONSUMES\r |
da03183c LE |
414 | \r |
415 | [FeaturePcd]\r | |
c92c1790 | 416 | gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList ## CONSUMES\r |