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e1f414b6 | 1 | /** @file\r |
2 | Declaration of internal functions in BaseLib.\r | |
3 | \r | |
127010dd | 4 | Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r |
bb817c56 | 5 | This program and the accompanying materials\r |
e1f414b6 | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
127010dd | 8 | http://opensource.org/licenses/bsd-license.php.\r |
e1f414b6 | 9 | \r |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
e1f414b6 | 13 | **/\r |
14 | \r | |
15 | #ifndef __BASE_LIB_INTERNALS__\r | |
16 | #define __BASE_LIB_INTERNALS__\r | |
17 | \r | |
f734a10a A |
18 | #include <Base.h>\r |
19 | #include <Library/BaseLib.h>\r | |
20 | #include <Library/BaseMemoryLib.h>\r | |
21 | #include <Library/DebugLib.h>\r | |
f734a10a A |
22 | #include <Library/PcdLib.h>\r |
23 | \r | |
e1f414b6 | 24 | //\r |
25 | // Math functions\r | |
26 | //\r | |
27 | \r | |
28 | /**\r | |
29 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits\r | |
30 | are filled with zeros. The shifted value is returned.\r | |
31 | \r | |
32 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
33 | low Count bits are set to zero. The shifted value is returned.\r | |
34 | \r | |
35 | @param Operand The 64-bit operand to shift left.\r | |
36 | @param Count The number of bits to shift left.\r | |
37 | \r | |
38 | @return Operand << Count\r | |
39 | \r | |
40 | **/\r | |
41 | UINT64\r | |
42 | EFIAPI\r | |
43 | InternalMathLShiftU64 (\r | |
44 | IN UINT64 Operand,\r | |
45 | IN UINTN Count\r | |
46 | );\r | |
47 | \r | |
48 | /**\r | |
127010dd | 49 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits\r |
e1f414b6 | 50 | are filled with zeros. The shifted value is returned.\r |
51 | \r | |
52 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
53 | high Count bits are set to zero. The shifted value is returned.\r | |
54 | \r | |
55 | @param Operand The 64-bit operand to shift right.\r | |
56 | @param Count The number of bits to shift right.\r | |
57 | \r | |
58 | @return Operand >> Count\r | |
59 | \r | |
60 | **/\r | |
61 | UINT64\r | |
62 | EFIAPI\r | |
63 | InternalMathRShiftU64 (\r | |
64 | IN UINT64 Operand,\r | |
65 | IN UINTN Count\r | |
66 | );\r | |
67 | \r | |
68 | /**\r | |
69 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits\r | |
70 | are filled with original integer's bit 63. The shifted value is returned.\r | |
71 | \r | |
72 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
73 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
74 | \r | |
75 | @param Operand The 64-bit operand to shift right.\r | |
76 | @param Count The number of bits to shift right.\r | |
77 | \r | |
78 | @return Operand arithmetically shifted right by Count\r | |
79 | \r | |
80 | **/\r | |
81 | UINT64\r | |
82 | EFIAPI\r | |
83 | InternalMathARShiftU64 (\r | |
84 | IN UINT64 Operand,\r | |
85 | IN UINTN Count\r | |
86 | );\r | |
87 | \r | |
88 | /**\r | |
89 | Rotates a 64-bit integer left between 0 and 63 bits, filling\r | |
90 | the low bits with the high bits that were rotated.\r | |
91 | \r | |
92 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
127010dd | 93 | low Count bits are filled with the high Count bits of Operand. The rotated\r |
e1f414b6 | 94 | value is returned.\r |
95 | \r | |
96 | @param Operand The 64-bit operand to rotate left.\r | |
97 | @param Count The number of bits to rotate left.\r | |
98 | \r | |
99 | @return Operand <<< Count\r | |
100 | \r | |
101 | **/\r | |
102 | UINT64\r | |
103 | EFIAPI\r | |
104 | InternalMathLRotU64 (\r | |
105 | IN UINT64 Operand,\r | |
106 | IN UINTN Count\r | |
107 | );\r | |
108 | \r | |
109 | /**\r | |
110 | Rotates a 64-bit integer right between 0 and 63 bits, filling\r | |
111 | the high bits with the high low bits that were rotated.\r | |
112 | \r | |
113 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
127010dd | 114 | The high Count bits are filled with the low Count bits of Operand. The rotated\r |
e1f414b6 | 115 | value is returned.\r |
116 | \r | |
117 | @param Operand The 64-bit operand to rotate right.\r | |
118 | @param Count The number of bits to rotate right.\r | |
119 | \r | |
120 | @return Operand >>> Count\r | |
121 | \r | |
122 | **/\r | |
123 | UINT64\r | |
124 | EFIAPI\r | |
125 | InternalMathRRotU64 (\r | |
126 | IN UINT64 Operand,\r | |
127 | IN UINTN Count\r | |
128 | );\r | |
129 | \r | |
130 | /**\r | |
131 | Switches the endianess of a 64-bit integer.\r | |
132 | \r | |
133 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
134 | from little endian to big endian or vice versa. The byte swapped value is\r | |
135 | returned.\r | |
136 | \r | |
137 | @param Operand A 64-bit unsigned value.\r | |
138 | \r | |
24dcb5e5 | 139 | @return The byte swapped Operand.\r |
e1f414b6 | 140 | \r |
141 | **/\r | |
142 | UINT64\r | |
143 | EFIAPI\r | |
144 | InternalMathSwapBytes64 (\r | |
145 | IN UINT64 Operand\r | |
146 | );\r | |
147 | \r | |
148 | /**\r | |
127010dd | 149 | Multiplies a 64-bit unsigned integer by a 32-bit unsigned integer\r |
e1f414b6 | 150 | and generates a 64-bit unsigned result.\r |
151 | \r | |
127010dd | 152 | This function multiplies the 64-bit unsigned value Multiplicand by the 32-bit\r |
e1f414b6 | 153 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r |
154 | bit unsigned result is returned.\r | |
155 | \r | |
156 | @param Multiplicand A 64-bit unsigned value.\r | |
157 | @param Multiplier A 32-bit unsigned value.\r | |
158 | \r | |
159 | @return Multiplicand * Multiplier\r | |
160 | \r | |
161 | **/\r | |
162 | UINT64\r | |
163 | EFIAPI\r | |
164 | InternalMathMultU64x32 (\r | |
165 | IN UINT64 Multiplicand,\r | |
166 | IN UINT32 Multiplier\r | |
167 | );\r | |
168 | \r | |
169 | /**\r | |
127010dd | 170 | Multiplies a 64-bit unsigned integer by a 64-bit unsigned integer\r |
e1f414b6 | 171 | and generates a 64-bit unsigned result.\r |
172 | \r | |
173 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
174 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
175 | bit unsigned result is returned.\r | |
176 | \r | |
177 | @param Multiplicand A 64-bit unsigned value.\r | |
178 | @param Multiplier A 64-bit unsigned value.\r | |
179 | \r | |
180 | @return Multiplicand * Multiplier\r | |
181 | \r | |
182 | **/\r | |
183 | UINT64\r | |
184 | EFIAPI\r | |
185 | InternalMathMultU64x64 (\r | |
186 | IN UINT64 Multiplicand,\r | |
187 | IN UINT64 Multiplier\r | |
188 | );\r | |
189 | \r | |
190 | /**\r | |
191 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
192 | generates a 64-bit unsigned result.\r | |
193 | \r | |
194 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
195 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
196 | function returns the 64-bit unsigned quotient.\r | |
197 | \r | |
24dcb5e5 | 198 | @param Dividend A 64-bit unsigned value.\r |
e1f414b6 | 199 | @param Divisor A 32-bit unsigned value.\r |
200 | \r | |
201 | @return Dividend / Divisor\r | |
202 | \r | |
203 | **/\r | |
204 | UINT64\r | |
205 | EFIAPI\r | |
206 | InternalMathDivU64x32 (\r | |
207 | IN UINT64 Dividend,\r | |
208 | IN UINT32 Divisor\r | |
209 | );\r | |
210 | \r | |
211 | /**\r | |
212 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
213 | generates a 32-bit unsigned remainder.\r | |
214 | \r | |
215 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
216 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
217 | returns the 32-bit unsigned remainder.\r | |
218 | \r | |
219 | @param Dividend A 64-bit unsigned value.\r | |
220 | @param Divisor A 32-bit unsigned value.\r | |
221 | \r | |
222 | @return Dividend % Divisor\r | |
223 | \r | |
224 | **/\r | |
225 | UINT32\r | |
226 | EFIAPI\r | |
227 | InternalMathModU64x32 (\r | |
228 | IN UINT64 Dividend,\r | |
229 | IN UINT32 Divisor\r | |
230 | );\r | |
231 | \r | |
232 | /**\r | |
233 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
234 | generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
235 | \r | |
236 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
237 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
238 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
239 | This function returns the 64-bit unsigned quotient.\r | |
240 | \r | |
241 | @param Dividend A 64-bit unsigned value.\r | |
242 | @param Divisor A 32-bit unsigned value.\r | |
243 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
244 | optional and may be NULL.\r | |
245 | \r | |
246 | @return Dividend / Divisor\r | |
247 | \r | |
248 | **/\r | |
249 | UINT64\r | |
250 | EFIAPI\r | |
251 | InternalMathDivRemU64x32 (\r | |
252 | IN UINT64 Dividend,\r | |
253 | IN UINT32 Divisor,\r | |
42eedea9 | 254 | OUT UINT32 *Remainder OPTIONAL\r |
e1f414b6 | 255 | );\r |
256 | \r | |
257 | /**\r | |
258 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
259 | generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
260 | \r | |
261 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
262 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
263 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
264 | This function returns the 64-bit unsigned quotient.\r | |
265 | \r | |
266 | @param Dividend A 64-bit unsigned value.\r | |
267 | @param Divisor A 64-bit unsigned value.\r | |
268 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
269 | optional and may be NULL.\r | |
270 | \r | |
271 | @return Dividend / Divisor\r | |
272 | \r | |
273 | **/\r | |
274 | UINT64\r | |
275 | EFIAPI\r | |
276 | InternalMathDivRemU64x64 (\r | |
277 | IN UINT64 Dividend,\r | |
278 | IN UINT64 Divisor,\r | |
42eedea9 | 279 | OUT UINT64 *Remainder OPTIONAL\r |
e1f414b6 | 280 | );\r |
281 | \r | |
282 | /**\r | |
283 | Divides a 64-bit signed integer by a 64-bit signed integer and\r | |
24dcb5e5 | 284 | generates a 64-bit signed result and an optional 64-bit signed remainder.\r |
e1f414b6 | 285 | \r |
24dcb5e5 | 286 | This function divides the 64-bit signed value Dividend by the 64-bit\r |
287 | signed value Divisor and generates a 64-bit signed quotient. If Remainder\r | |
288 | is not NULL, then the 64-bit signed remainder is returned in Remainder.\r | |
289 | This function returns the 64-bit signed quotient.\r | |
e1f414b6 | 290 | \r |
291 | @param Dividend A 64-bit signed value.\r | |
292 | @param Divisor A 64-bit signed value.\r | |
293 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
294 | optional and may be NULL.\r | |
295 | \r | |
296 | @return Dividend / Divisor\r | |
297 | \r | |
298 | **/\r | |
299 | INT64\r | |
38bbd3d9 | 300 | EFIAPI\r |
e1f414b6 | 301 | InternalMathDivRemS64x64 (\r |
302 | IN INT64 Dividend,\r | |
303 | IN INT64 Divisor,\r | |
304 | OUT INT64 *Remainder OPTIONAL\r | |
7e43ed89 | 305 | );\r |
e1f414b6 | 306 | \r |
307 | /**\r | |
308 | Transfers control to a function starting with a new stack.\r | |
309 | \r | |
310 | Transfers control to the function specified by EntryPoint using the\r | |
311 | new stack specified by NewStack and passing in the parameters specified\r | |
312 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
313 | be NULL. The function EntryPoint must never return.\r | |
314 | Marker will be ignored on IA-32, x64, and EBC.\r | |
315 | IPF CPUs expect one additional parameter of type VOID * that specifies\r | |
316 | the new backing store pointer.\r | |
317 | \r | |
318 | If EntryPoint is NULL, then ASSERT().\r | |
319 | If NewStack is NULL, then ASSERT().\r | |
320 | \r | |
321 | @param EntryPoint A pointer to function to call with the new stack.\r | |
322 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
323 | function.\r | |
324 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
325 | function.\r | |
326 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
327 | function.\r | |
328 | @param Marker VA_LIST marker for the variable argument list.\r | |
329 | \r | |
330 | **/\r | |
331 | VOID\r | |
332 | EFIAPI\r | |
333 | InternalSwitchStack (\r | |
334 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
335 | IN VOID *Context1, OPTIONAL\r | |
336 | IN VOID *Context2, OPTIONAL\r | |
337 | IN VOID *NewStack,\r | |
338 | IN VA_LIST Marker\r | |
339 | );\r | |
340 | \r | |
341 | \r | |
342 | /**\r | |
24dcb5e5 | 343 | Worker function that locates the Node in the List.\r |
e1f414b6 | 344 | \r |
345 | By searching the List, finds the location of the Node in List. At the same time,\r | |
346 | verifies the validity of this list.\r | |
347 | \r | |
348 | If List is NULL, then ASSERT().\r | |
349 | If List->ForwardLink is NULL, then ASSERT().\r | |
350 | If List->backLink is NULL, then ASSERT().\r | |
351 | If Node is NULL, then ASSERT();\r | |
a71865b1 | 352 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
e1f414b6 | 353 | of nodes in ListHead, including the ListHead node, is greater than or\r |
354 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
355 | \r | |
356 | @param List A pointer to a node in a linked list.\r | |
357 | @param Node A pointer to one nod.\r | |
358 | \r | |
127010dd | 359 | @retval TRUE Node is in List.\r |
360 | @retval FALSE Node isn't in List, or List is invalid.\r | |
e1f414b6 | 361 | \r |
362 | **/\r | |
363 | BOOLEAN\r | |
38bbd3d9 | 364 | EFIAPI\r |
e1f414b6 | 365 | IsNodeInList (\r |
366 | IN CONST LIST_ENTRY *List,\r | |
367 | IN CONST LIST_ENTRY *Node\r | |
368 | );\r | |
369 | \r | |
e1f414b6 | 370 | /**\r |
24dcb5e5 | 371 | Worker function that returns a bit field from Operand.\r |
e1f414b6 | 372 | \r |
373 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
374 | \r | |
375 | @param Operand Operand on which to perform the bitfield operation.\r | |
376 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
377 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
378 | \r | |
379 | @return The bit field read.\r | |
380 | \r | |
381 | **/\r | |
28ca72bc | 382 | UINTN\r |
38bbd3d9 | 383 | EFIAPI\r |
e1f414b6 | 384 | BitFieldReadUint (\r |
28ca72bc | 385 | IN UINTN Operand,\r |
e1f414b6 | 386 | IN UINTN StartBit,\r |
387 | IN UINTN EndBit\r | |
388 | );\r | |
389 | \r | |
390 | \r | |
391 | /**\r | |
392 | Worker function that reads a bit field from Operand, performs a bitwise OR,\r | |
393 | and returns the result.\r | |
394 | \r | |
395 | Performs a bitwise OR between the bit field specified by StartBit and EndBit\r | |
396 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
397 | preserved. The new value is returned.\r | |
398 | \r | |
399 | @param Operand Operand on which to perform the bitfield operation.\r | |
400 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
401 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
402 | @param OrData The value to OR with the read value from the value\r | |
403 | \r | |
404 | @return The new value.\r | |
405 | \r | |
406 | **/\r | |
28ca72bc | 407 | UINTN\r |
38bbd3d9 | 408 | EFIAPI\r |
e1f414b6 | 409 | BitFieldOrUint (\r |
28ca72bc | 410 | IN UINTN Operand,\r |
e1f414b6 | 411 | IN UINTN StartBit,\r |
412 | IN UINTN EndBit,\r | |
28ca72bc | 413 | IN UINTN OrData\r |
e1f414b6 | 414 | );\r |
415 | \r | |
416 | \r | |
417 | /**\r | |
418 | Worker function that reads a bit field from Operand, performs a bitwise AND,\r | |
419 | and returns the result.\r | |
420 | \r | |
421 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
422 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
423 | preserved. The new value is returned.\r | |
424 | \r | |
425 | @param Operand Operand on which to perform the bitfield operation.\r | |
426 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
427 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
428 | @param AndData The value to And with the read value from the value\r | |
429 | \r | |
430 | @return The new value.\r | |
431 | \r | |
432 | **/\r | |
28ca72bc | 433 | UINTN\r |
38bbd3d9 | 434 | EFIAPI\r |
e1f414b6 | 435 | BitFieldAndUint (\r |
28ca72bc | 436 | IN UINTN Operand,\r |
e1f414b6 | 437 | IN UINTN StartBit,\r |
438 | IN UINTN EndBit,\r | |
28ca72bc | 439 | IN UINTN AndData\r |
e1f414b6 | 440 | );\r |
441 | \r | |
442 | \r | |
443 | /**\r | |
444 | Worker function that checks ASSERT condition for JumpBuffer\r | |
445 | \r | |
446 | Checks ASSERT condition for JumpBuffer.\r | |
447 | \r | |
448 | If JumpBuffer is NULL, then ASSERT().\r | |
449 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
450 | \r | |
451 | @param JumpBuffer A pointer to CPU context buffer.\r | |
452 | \r | |
453 | **/\r | |
454 | VOID\r | |
38bbd3d9 | 455 | EFIAPI\r |
e1f414b6 | 456 | InternalAssertJumpBuffer (\r |
457 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
458 | );\r | |
459 | \r | |
460 | \r | |
461 | /**\r | |
462 | Restores the CPU context that was saved with SetJump().\r | |
463 | \r | |
464 | Restores the CPU context from the buffer specified by JumpBuffer.\r | |
465 | This function never returns to the caller.\r | |
466 | Instead is resumes execution based on the state of JumpBuffer.\r | |
467 | \r | |
468 | @param JumpBuffer A pointer to CPU context buffer.\r | |
469 | @param Value The value to return when the SetJump() context is restored.\r | |
470 | \r | |
471 | **/\r | |
472 | VOID\r | |
473 | EFIAPI\r | |
474 | InternalLongJump (\r | |
475 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
476 | IN UINTN Value\r | |
477 | );\r | |
478 | \r | |
479 | \r | |
480 | //\r | |
481 | // Ia32 and x64 specific functions\r | |
482 | //\r | |
483 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r | |
484 | \r | |
485 | /**\r | |
486 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
487 | \r | |
488 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
030cd1a2 | 489 | function is only available on IA-32 and x64.\r |
e1f414b6 | 490 | \r |
127010dd | 491 | @param Gdtr The pointer to a GDTR descriptor.\r |
e1f414b6 | 492 | \r |
493 | **/\r | |
494 | VOID\r | |
495 | EFIAPI\r | |
496 | InternalX86ReadGdtr (\r | |
497 | OUT IA32_DESCRIPTOR *Gdtr\r | |
498 | );\r | |
499 | \r | |
500 | /**\r | |
501 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
502 | \r | |
503 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
030cd1a2 | 504 | only available on IA-32 and x64.\r |
e1f414b6 | 505 | \r |
127010dd | 506 | @param Gdtr The pointer to a GDTR descriptor.\r |
e1f414b6 | 507 | \r |
508 | **/\r | |
509 | VOID\r | |
510 | EFIAPI\r | |
511 | InternalX86WriteGdtr (\r | |
512 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
513 | );\r | |
514 | \r | |
515 | /**\r | |
516 | Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
517 | \r | |
518 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
030cd1a2 | 519 | function is only available on IA-32 and x64.\r |
e1f414b6 | 520 | \r |
127010dd | 521 | @param Idtr The pointer to an IDTR descriptor.\r |
e1f414b6 | 522 | \r |
523 | **/\r | |
524 | VOID\r | |
525 | EFIAPI\r | |
526 | InternalX86ReadIdtr (\r | |
527 | OUT IA32_DESCRIPTOR *Idtr\r | |
528 | );\r | |
529 | \r | |
530 | /**\r | |
531 | Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
532 | \r | |
533 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
030cd1a2 | 534 | only available on IA-32 and x64.\r |
e1f414b6 | 535 | \r |
127010dd | 536 | @param Idtr The pointer to an IDTR descriptor.\r |
e1f414b6 | 537 | \r |
538 | **/\r | |
539 | VOID\r | |
540 | EFIAPI\r | |
541 | InternalX86WriteIdtr (\r | |
542 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
543 | );\r | |
544 | \r | |
545 | /**\r | |
546 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
547 | \r | |
548 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
549 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
030cd1a2 | 550 | available on IA-32 and x64.\r |
e1f414b6 | 551 | \r |
127010dd | 552 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
e1f414b6 | 553 | \r |
554 | **/\r | |
555 | VOID\r | |
556 | EFIAPI\r | |
557 | InternalX86FxSave (\r | |
558 | OUT IA32_FX_BUFFER *Buffer\r | |
559 | );\r | |
560 | \r | |
561 | /**\r | |
562 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
563 | \r | |
564 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
565 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
030cd1a2 | 566 | only available on IA-32 and x64.\r |
e1f414b6 | 567 | \r |
127010dd | 568 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
e1f414b6 | 569 | \r |
570 | **/\r | |
571 | VOID\r | |
572 | EFIAPI\r | |
573 | InternalX86FxRestore (\r | |
574 | IN CONST IA32_FX_BUFFER *Buffer\r | |
575 | );\r | |
576 | \r | |
577 | /**\r | |
578 | Enables the 32-bit paging mode on the CPU.\r | |
579 | \r | |
580 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
581 | must be properly initialized prior to calling this service. This function\r | |
582 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
583 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
584 | transferred to the function specified by EntryPoint using the new stack\r | |
585 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
586 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
587 | EntryPoint must never return.\r | |
588 | \r | |
589 | There are a number of constraints that must be followed before calling this\r | |
590 | function:\r | |
591 | 1) Interrupts must be disabled.\r | |
592 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
593 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
594 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
595 | descriptors.\r | |
596 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
597 | is complete, and those page tables must guarantee that the pages for this\r | |
598 | function and the stack are identity mapped.\r | |
599 | \r | |
600 | @param EntryPoint A pointer to function to call with the new stack after\r | |
601 | paging is enabled.\r | |
602 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
603 | function as the first parameter after paging is enabled.\r | |
604 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
605 | function as the second parameter after paging is enabled.\r | |
606 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
607 | function after paging is enabled.\r | |
608 | \r | |
609 | **/\r | |
610 | VOID\r | |
611 | EFIAPI\r | |
612 | InternalX86EnablePaging32 (\r | |
613 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
614 | IN VOID *Context1, OPTIONAL\r | |
615 | IN VOID *Context2, OPTIONAL\r | |
616 | IN VOID *NewStack\r | |
617 | );\r | |
618 | \r | |
619 | /**\r | |
620 | Disables the 32-bit paging mode on the CPU.\r | |
621 | \r | |
622 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
623 | mode. This function assumes the current execution mode is 32-paged protected\r | |
624 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
625 | is disabled, control is transferred to the function specified by EntryPoint\r | |
626 | using the new stack specified by NewStack and passing in the parameters\r | |
627 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
628 | may be NULL. The function EntryPoint must never return.\r | |
629 | \r | |
630 | There are a number of constraints that must be followed before calling this\r | |
631 | function:\r | |
632 | 1) Interrupts must be disabled.\r | |
633 | 2) The caller must be in 32-bit paged mode.\r | |
634 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
635 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
636 | this function and the stack are identity mapped.\r | |
637 | \r | |
638 | @param EntryPoint A pointer to function to call with the new stack after\r | |
639 | paging is disabled.\r | |
640 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
641 | function as the first parameter after paging is disabled.\r | |
642 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
643 | function as the second parameter after paging is\r | |
644 | disabled.\r | |
645 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
646 | function after paging is disabled.\r | |
647 | \r | |
648 | **/\r | |
649 | VOID\r | |
650 | EFIAPI\r | |
651 | InternalX86DisablePaging32 (\r | |
652 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
653 | IN VOID *Context1, OPTIONAL\r | |
654 | IN VOID *Context2, OPTIONAL\r | |
655 | IN VOID *NewStack\r | |
656 | );\r | |
657 | \r | |
658 | /**\r | |
659 | Enables the 64-bit paging mode on the CPU.\r | |
660 | \r | |
661 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
662 | must be properly initialized prior to calling this service. This function\r | |
663 | assumes the current execution mode is 32-bit protected mode with flat\r | |
664 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
665 | paging mode is enabled, control is transferred to the function specified by\r | |
666 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
667 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
668 | optional and may be 0. The function EntryPoint must never return.\r | |
669 | \r | |
670 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
671 | is called. The descriptor in the GDT that this selector\r | |
672 | references must be setup for long mode.\r | |
673 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
674 | the new stack after paging is enabled.\r | |
675 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
676 | the EntryPoint function as the first parameter after\r | |
677 | paging is enabled.\r | |
678 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
679 | the EntryPoint function as the second parameter after\r | |
680 | paging is enabled.\r | |
681 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
682 | the EntryPoint function after paging is enabled.\r | |
683 | \r | |
684 | **/\r | |
685 | VOID\r | |
686 | EFIAPI\r | |
687 | InternalX86EnablePaging64 (\r | |
688 | IN UINT16 Cs,\r | |
689 | IN UINT64 EntryPoint,\r | |
690 | IN UINT64 Context1, OPTIONAL\r | |
691 | IN UINT64 Context2, OPTIONAL\r | |
692 | IN UINT64 NewStack\r | |
693 | );\r | |
694 | \r | |
695 | /**\r | |
696 | Disables the 64-bit paging mode on the CPU.\r | |
697 | \r | |
698 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
699 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
030cd1a2 | 700 | This function is only available on x64. After the 64-bit paging mode is\r |
e1f414b6 | 701 | disabled, control is transferred to the function specified by EntryPoint\r |
702 | using the new stack specified by NewStack and passing in the parameters\r | |
703 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
704 | may be 0. The function EntryPoint must never return.\r | |
705 | \r | |
706 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
707 | is called. The descriptor in the GDT that this selector\r | |
708 | references must be setup for 32-bit protected mode.\r | |
709 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
710 | the new stack after paging is disabled.\r | |
711 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
712 | the EntryPoint function as the first parameter after\r | |
713 | paging is disabled.\r | |
714 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
715 | the EntryPoint function as the second parameter after\r | |
716 | paging is disabled.\r | |
717 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
718 | the EntryPoint function after paging is disabled.\r | |
719 | \r | |
720 | **/\r | |
721 | VOID\r | |
722 | EFIAPI\r | |
723 | InternalX86DisablePaging64 (\r | |
724 | IN UINT16 Cs,\r | |
725 | IN UINT32 EntryPoint,\r | |
726 | IN UINT32 Context1, OPTIONAL\r | |
727 | IN UINT32 Context2, OPTIONAL\r | |
728 | IN UINT32 NewStack\r | |
729 | );\r | |
730 | \r | |
731 | \r | |
732 | #elif defined (MDE_CPU_IPF)\r | |
733 | //\r | |
734 | //\r | |
735 | // IPF specific functions\r | |
736 | //\r | |
737 | \r | |
aad6137d | 738 | /**\r |
739 | Reads control register DCR.\r | |
740 | \r | |
741 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 742 | when its parameter Index is IPF_CONTROL_REGISTER_DCR.\r |
aad6137d | 743 | \r |
744 | @return The 64-bit control register DCR.\r | |
745 | \r | |
746 | **/\r | |
747 | UINT64\r | |
748 | EFIAPI\r | |
749 | AsmReadControlRegisterDcr (\r | |
750 | VOID\r | |
751 | );\r | |
752 | \r | |
753 | \r | |
754 | /**\r | |
755 | Reads control register ITM.\r | |
756 | \r | |
757 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 758 | when its parameter Index is IPF_CONTROL_REGISTER_ITM.\r |
aad6137d | 759 | \r |
760 | @return The 64-bit control register ITM.\r | |
761 | \r | |
762 | **/\r | |
763 | UINT64\r | |
764 | EFIAPI\r | |
765 | AsmReadControlRegisterItm (\r | |
766 | VOID\r | |
767 | );\r | |
768 | \r | |
769 | \r | |
770 | /**\r | |
771 | Reads control register IVA.\r | |
772 | \r | |
773 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 774 | when its parameter Index is IPF_CONTROL_REGISTER_IVA.\r |
aad6137d | 775 | \r |
776 | @return The 64-bit control register IVA.\r | |
777 | \r | |
778 | **/\r | |
779 | UINT64\r | |
780 | EFIAPI\r | |
781 | AsmReadControlRegisterIva (\r | |
782 | VOID\r | |
783 | );\r | |
784 | \r | |
785 | \r | |
786 | /**\r | |
787 | Reads control register PTA.\r | |
788 | \r | |
789 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 790 | when its parameter Index is IPF_CONTROL_REGISTER_PTA.\r |
aad6137d | 791 | \r |
792 | @return The 64-bit control register PTA.\r | |
793 | \r | |
794 | **/\r | |
795 | UINT64\r | |
796 | EFIAPI\r | |
797 | AsmReadControlRegisterPta (\r | |
798 | VOID\r | |
799 | );\r | |
800 | \r | |
801 | \r | |
802 | /**\r | |
803 | Reads control register IPSR.\r | |
804 | \r | |
805 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 806 | when its parameter Index is IPF_CONTROL_REGISTER_IPSR.\r |
aad6137d | 807 | \r |
808 | @return The 64-bit control register IPSR.\r | |
809 | \r | |
810 | **/\r | |
811 | UINT64\r | |
812 | EFIAPI\r | |
813 | AsmReadControlRegisterIpsr (\r | |
814 | VOID\r | |
815 | );\r | |
816 | \r | |
817 | \r | |
818 | /**\r | |
819 | Reads control register ISR.\r | |
820 | \r | |
821 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 822 | when its parameter Index is IPF_CONTROL_REGISTER_ISR.\r |
aad6137d | 823 | \r |
824 | @return The 64-bit control register ISR.\r | |
825 | \r | |
826 | **/\r | |
827 | UINT64\r | |
828 | EFIAPI\r | |
829 | AsmReadControlRegisterIsr (\r | |
830 | VOID\r | |
831 | );\r | |
832 | \r | |
833 | \r | |
834 | /**\r | |
835 | Reads control register IIP.\r | |
836 | \r | |
837 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 838 | when its parameter Index is IPF_CONTROL_REGISTER_IIP.\r |
aad6137d | 839 | \r |
840 | @return The 64-bit control register IIP.\r | |
841 | \r | |
842 | **/\r | |
843 | UINT64\r | |
844 | EFIAPI\r | |
845 | AsmReadControlRegisterIip (\r | |
846 | VOID\r | |
847 | );\r | |
848 | \r | |
849 | \r | |
850 | /**\r | |
851 | Reads control register IFA.\r | |
852 | \r | |
853 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 854 | when its parameter Index is IPF_CONTROL_REGISTER_IFA.\r |
aad6137d | 855 | \r |
856 | @return The 64-bit control register IFA.\r | |
857 | \r | |
858 | **/\r | |
859 | UINT64\r | |
860 | EFIAPI\r | |
861 | AsmReadControlRegisterIfa (\r | |
862 | VOID\r | |
863 | );\r | |
864 | \r | |
865 | \r | |
866 | /**\r | |
867 | Reads control register ITIR.\r | |
868 | \r | |
869 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 870 | when its parameter Index is IPF_CONTROL_REGISTER_ITIR.\r |
aad6137d | 871 | \r |
872 | @return The 64-bit control register ITIR.\r | |
873 | \r | |
874 | **/\r | |
875 | UINT64\r | |
876 | EFIAPI\r | |
877 | AsmReadControlRegisterItir (\r | |
878 | VOID\r | |
879 | );\r | |
880 | \r | |
881 | \r | |
882 | /**\r | |
883 | Reads control register IIPA.\r | |
884 | \r | |
885 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 886 | when its parameter Index is IPF_CONTROL_REGISTER_IIPA.\r |
aad6137d | 887 | \r |
888 | @return The 64-bit control register IIPA.\r | |
889 | \r | |
890 | **/\r | |
891 | UINT64\r | |
892 | EFIAPI\r | |
893 | AsmReadControlRegisterIipa (\r | |
894 | VOID\r | |
895 | );\r | |
896 | \r | |
897 | \r | |
898 | /**\r | |
899 | Reads control register IFS.\r | |
900 | \r | |
901 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 902 | when its parameter Index is IPF_CONTROL_REGISTER_IFS.\r |
aad6137d | 903 | \r |
904 | @return The 64-bit control register IFS.\r | |
905 | \r | |
906 | **/\r | |
907 | UINT64\r | |
908 | EFIAPI\r | |
909 | AsmReadControlRegisterIfs (\r | |
910 | VOID\r | |
911 | );\r | |
912 | \r | |
913 | \r | |
914 | /**\r | |
915 | Reads control register IIM.\r | |
916 | \r | |
917 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 918 | when its parameter Index is IPF_CONTROL_REGISTER_IIM.\r |
aad6137d | 919 | \r |
920 | @return The 64-bit control register IIM.\r | |
921 | \r | |
922 | **/\r | |
923 | UINT64\r | |
924 | EFIAPI\r | |
925 | AsmReadControlRegisterIim (\r | |
926 | VOID\r | |
927 | );\r | |
928 | \r | |
929 | \r | |
930 | /**\r | |
931 | Reads control register IHA.\r | |
932 | \r | |
933 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 934 | when its parameter Index is IPF_CONTROL_REGISTER_IHA.\r |
aad6137d | 935 | \r |
936 | @return The 64-bit control register IHA.\r | |
937 | \r | |
938 | **/\r | |
939 | UINT64\r | |
940 | EFIAPI\r | |
941 | AsmReadControlRegisterIha (\r | |
942 | VOID\r | |
943 | );\r | |
944 | \r | |
945 | \r | |
946 | /**\r | |
947 | Reads control register LID.\r | |
948 | \r | |
949 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 950 | when its parameter Index is IPF_CONTROL_REGISTER_LID.\r |
aad6137d | 951 | \r |
952 | @return The 64-bit control register LID.\r | |
953 | \r | |
954 | **/\r | |
955 | UINT64\r | |
956 | EFIAPI\r | |
957 | AsmReadControlRegisterLid (\r | |
958 | VOID\r | |
959 | );\r | |
960 | \r | |
961 | \r | |
962 | /**\r | |
963 | Reads control register IVR.\r | |
964 | \r | |
965 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 966 | when its parameter Index is IPF_CONTROL_REGISTER_IVR.\r |
aad6137d | 967 | \r |
968 | @return The 64-bit control register IVR.\r | |
969 | \r | |
970 | **/\r | |
971 | UINT64\r | |
972 | EFIAPI\r | |
973 | AsmReadControlRegisterIvr (\r | |
974 | VOID\r | |
975 | );\r | |
976 | \r | |
977 | \r | |
978 | /**\r | |
979 | Reads control register TPR.\r | |
980 | \r | |
981 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 982 | when its parameter Index is IPF_CONTROL_REGISTER_TPR.\r |
aad6137d | 983 | \r |
984 | @return The 64-bit control register TPR.\r | |
985 | \r | |
986 | **/\r | |
987 | UINT64\r | |
988 | EFIAPI\r | |
989 | AsmReadControlRegisterTpr (\r | |
990 | VOID\r | |
991 | );\r | |
992 | \r | |
993 | \r | |
994 | /**\r | |
995 | Reads control register EOI.\r | |
996 | \r | |
997 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 998 | when its parameter Index is IPF_CONTROL_REGISTER_EOI.\r |
aad6137d | 999 | \r |
1000 | @return The 64-bit control register EOI.\r | |
1001 | \r | |
1002 | **/\r | |
1003 | UINT64\r | |
1004 | EFIAPI\r | |
1005 | AsmReadControlRegisterEoi (\r | |
1006 | VOID\r | |
1007 | );\r | |
1008 | \r | |
1009 | \r | |
1010 | /**\r | |
1011 | Reads control register IRR0.\r | |
1012 | \r | |
1013 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1014 | when its parameter Index is IPF_CONTROL_REGISTER_IRR0.\r |
aad6137d | 1015 | \r |
1016 | @return The 64-bit control register IRR0.\r | |
1017 | \r | |
1018 | **/\r | |
1019 | UINT64\r | |
1020 | EFIAPI\r | |
1021 | AsmReadControlRegisterIrr0 (\r | |
1022 | VOID\r | |
1023 | );\r | |
1024 | \r | |
1025 | \r | |
1026 | /**\r | |
1027 | Reads control register IRR1.\r | |
1028 | \r | |
1029 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1030 | when its parameter Index is IPF_CONTROL_REGISTER_IRR1.\r |
aad6137d | 1031 | \r |
1032 | @return The 64-bit control register IRR1.\r | |
1033 | \r | |
1034 | **/\r | |
1035 | UINT64\r | |
1036 | EFIAPI\r | |
1037 | AsmReadControlRegisterIrr1 (\r | |
1038 | VOID\r | |
1039 | );\r | |
1040 | \r | |
1041 | \r | |
1042 | /**\r | |
1043 | Reads control register IRR2.\r | |
1044 | \r | |
1045 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1046 | when its parameter Index is IPF_CONTROL_REGISTER_IRR2.\r |
aad6137d | 1047 | \r |
1048 | @return The 64-bit control register IRR2.\r | |
1049 | \r | |
1050 | **/\r | |
1051 | UINT64\r | |
1052 | EFIAPI\r | |
1053 | AsmReadControlRegisterIrr2 (\r | |
1054 | VOID\r | |
1055 | );\r | |
1056 | \r | |
1057 | \r | |
1058 | /**\r | |
1059 | Reads control register IRR3.\r | |
1060 | \r | |
1061 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1062 | when its parameter Index is IPF_CONTROL_REGISTER_IRR3.\r |
aad6137d | 1063 | \r |
1064 | @return The 64-bit control register IRR3.\r | |
1065 | \r | |
1066 | **/\r | |
1067 | UINT64\r | |
1068 | EFIAPI\r | |
1069 | AsmReadControlRegisterIrr3 (\r | |
1070 | VOID\r | |
1071 | );\r | |
1072 | \r | |
1073 | \r | |
1074 | /**\r | |
1075 | Reads control register ITV.\r | |
1076 | \r | |
1077 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1078 | when its parameter Index is IPF_CONTROL_REGISTER_ITV.\r |
aad6137d | 1079 | \r |
1080 | @return The 64-bit control register ITV.\r | |
1081 | \r | |
1082 | **/\r | |
1083 | UINT64\r | |
1084 | EFIAPI\r | |
1085 | AsmReadControlRegisterItv (\r | |
1086 | VOID\r | |
1087 | );\r | |
1088 | \r | |
1089 | \r | |
1090 | /**\r | |
1091 | Reads control register PMV.\r | |
1092 | \r | |
1093 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1094 | when its parameter Index is IPF_CONTROL_REGISTER_PMV.\r |
aad6137d | 1095 | \r |
1096 | @return The 64-bit control register PMV.\r | |
1097 | \r | |
1098 | **/\r | |
1099 | UINT64\r | |
1100 | EFIAPI\r | |
1101 | AsmReadControlRegisterPmv (\r | |
1102 | VOID\r | |
1103 | );\r | |
1104 | \r | |
1105 | \r | |
1106 | /**\r | |
1107 | Reads control register CMCV.\r | |
1108 | \r | |
1109 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1110 | when its parameter Index is IPF_CONTROL_REGISTER_CMCV.\r |
aad6137d | 1111 | \r |
1112 | @return The 64-bit control register CMCV.\r | |
1113 | \r | |
1114 | **/\r | |
1115 | UINT64\r | |
1116 | EFIAPI\r | |
1117 | AsmReadControlRegisterCmcv (\r | |
1118 | VOID\r | |
1119 | );\r | |
1120 | \r | |
1121 | \r | |
1122 | /**\r | |
1123 | Reads control register LRR0.\r | |
1124 | \r | |
1125 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1126 | when its parameter Index is IPF_CONTROL_REGISTER_LRR0.\r |
aad6137d | 1127 | \r |
1128 | @return The 64-bit control register LRR0.\r | |
1129 | \r | |
1130 | **/\r | |
1131 | UINT64\r | |
1132 | EFIAPI\r | |
1133 | AsmReadControlRegisterLrr0 (\r | |
1134 | VOID\r | |
1135 | );\r | |
1136 | \r | |
1137 | \r | |
1138 | /**\r | |
1139 | Reads control register LRR1.\r | |
1140 | \r | |
1141 | This is a worker function for AsmReadControlRegister()\r | |
127010dd | 1142 | when its parameter Index is IPF_CONTROL_REGISTER_LRR1.\r |
aad6137d | 1143 | \r |
1144 | @return The 64-bit control register LRR1.\r | |
1145 | \r | |
1146 | **/\r | |
1147 | UINT64\r | |
1148 | EFIAPI\r | |
1149 | AsmReadControlRegisterLrr1 (\r | |
1150 | VOID\r | |
1151 | );\r | |
1152 | \r | |
1153 | \r | |
1154 | /**\r | |
1155 | Reads application register K0.\r | |
1156 | \r | |
1157 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1158 | when its parameter Index is IPF_APPLICATION_REGISTER_K0.\r |
aad6137d | 1159 | \r |
1160 | @return The 64-bit application register K0.\r | |
1161 | \r | |
1162 | **/\r | |
1163 | UINT64\r | |
1164 | EFIAPI\r | |
1165 | AsmReadApplicationRegisterK0 (\r | |
1166 | VOID\r | |
1167 | );\r | |
1168 | \r | |
1169 | \r | |
1170 | \r | |
1171 | /**\r | |
1172 | Reads application register K1.\r | |
1173 | \r | |
1174 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1175 | when its parameter Index is IPF_APPLICATION_REGISTER_K1.\r |
aad6137d | 1176 | \r |
1177 | @return The 64-bit application register K1.\r | |
1178 | \r | |
1179 | **/\r | |
1180 | UINT64\r | |
1181 | EFIAPI\r | |
1182 | AsmReadApplicationRegisterK1 (\r | |
1183 | VOID\r | |
1184 | );\r | |
1185 | \r | |
1186 | \r | |
1187 | /**\r | |
1188 | Reads application register K2.\r | |
1189 | \r | |
1190 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1191 | when its parameter Index is IPF_APPLICATION_REGISTER_K2.\r |
aad6137d | 1192 | \r |
1193 | @return The 64-bit application register K2.\r | |
1194 | \r | |
1195 | **/\r | |
1196 | UINT64\r | |
1197 | EFIAPI\r | |
1198 | AsmReadApplicationRegisterK2 (\r | |
1199 | VOID\r | |
1200 | );\r | |
1201 | \r | |
1202 | \r | |
1203 | /**\r | |
1204 | Reads application register K3.\r | |
1205 | \r | |
1206 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1207 | when its parameter Index is IPF_APPLICATION_REGISTER_K3.\r |
aad6137d | 1208 | \r |
1209 | @return The 64-bit application register K3.\r | |
1210 | \r | |
1211 | **/\r | |
1212 | UINT64\r | |
1213 | EFIAPI\r | |
1214 | AsmReadApplicationRegisterK3 (\r | |
1215 | VOID\r | |
1216 | );\r | |
1217 | \r | |
1218 | \r | |
1219 | /**\r | |
1220 | Reads application register K4.\r | |
1221 | \r | |
1222 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1223 | when its parameter Index is IPF_APPLICATION_REGISTER_K4.\r |
aad6137d | 1224 | \r |
1225 | @return The 64-bit application register K4.\r | |
1226 | \r | |
1227 | **/\r | |
1228 | UINT64\r | |
1229 | EFIAPI\r | |
1230 | AsmReadApplicationRegisterK4 (\r | |
1231 | VOID\r | |
1232 | );\r | |
1233 | \r | |
1234 | \r | |
1235 | /**\r | |
1236 | Reads application register K5.\r | |
1237 | \r | |
1238 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1239 | when its parameter Index is IPF_APPLICATION_REGISTER_K5.\r |
aad6137d | 1240 | \r |
1241 | @return The 64-bit application register K5.\r | |
1242 | \r | |
1243 | **/\r | |
1244 | UINT64\r | |
1245 | EFIAPI\r | |
1246 | AsmReadApplicationRegisterK5 (\r | |
1247 | VOID\r | |
1248 | );\r | |
1249 | \r | |
1250 | \r | |
1251 | /**\r | |
1252 | Reads application register K6.\r | |
1253 | \r | |
1254 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1255 | when its parameter Index is IPF_APPLICATION_REGISTER_K6.\r |
aad6137d | 1256 | \r |
1257 | @return The 64-bit application register K6.\r | |
1258 | \r | |
1259 | **/\r | |
1260 | UINT64\r | |
1261 | EFIAPI\r | |
1262 | AsmReadApplicationRegisterK6 (\r | |
1263 | VOID\r | |
1264 | );\r | |
1265 | \r | |
1266 | \r | |
1267 | /**\r | |
1268 | Reads application register K7.\r | |
1269 | \r | |
1270 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1271 | when its parameter Index is IPF_APPLICATION_REGISTER_K7.\r |
aad6137d | 1272 | \r |
1273 | @return The 64-bit application register K7.\r | |
1274 | \r | |
1275 | **/\r | |
1276 | UINT64\r | |
1277 | EFIAPI\r | |
1278 | AsmReadApplicationRegisterK7 (\r | |
1279 | VOID\r | |
1280 | );\r | |
1281 | \r | |
1282 | \r | |
1283 | /**\r | |
1284 | Reads application register RSC.\r | |
1285 | \r | |
1286 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1287 | when its parameter Index is IPF_APPLICATION_REGISTER_RSC.\r |
aad6137d | 1288 | \r |
1289 | @return The 64-bit application register RSC.\r | |
1290 | \r | |
1291 | **/\r | |
1292 | UINT64\r | |
1293 | EFIAPI\r | |
1294 | AsmReadApplicationRegisterRsc (\r | |
1295 | VOID\r | |
1296 | );\r | |
1297 | \r | |
1298 | \r | |
1299 | /**\r | |
1300 | Reads application register BSP.\r | |
1301 | \r | |
1302 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1303 | when its parameter Index is IPF_APPLICATION_REGISTER_BSP.\r |
aad6137d | 1304 | \r |
1305 | @return The 64-bit application register BSP.\r | |
1306 | \r | |
1307 | **/\r | |
1308 | UINT64\r | |
1309 | EFIAPI\r | |
1310 | AsmReadApplicationRegisterBsp (\r | |
1311 | VOID\r | |
1312 | );\r | |
1313 | \r | |
1314 | \r | |
1315 | /**\r | |
1316 | Reads application register BSPSTORE.\r | |
1317 | \r | |
1318 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1319 | when its parameter Index is IPF_APPLICATION_REGISTER_BSPSTORE.\r |
aad6137d | 1320 | \r |
1321 | @return The 64-bit application register BSPSTORE.\r | |
1322 | \r | |
1323 | **/\r | |
1324 | UINT64\r | |
1325 | EFIAPI\r | |
1326 | AsmReadApplicationRegisterBspstore (\r | |
1327 | VOID\r | |
1328 | );\r | |
1329 | \r | |
1330 | \r | |
1331 | /**\r | |
1332 | Reads application register RNAT.\r | |
1333 | \r | |
1334 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1335 | when its parameter Index is IPF_APPLICATION_REGISTER_RNAT.\r |
aad6137d | 1336 | \r |
1337 | @return The 64-bit application register RNAT.\r | |
1338 | \r | |
1339 | **/\r | |
1340 | UINT64\r | |
1341 | EFIAPI\r | |
1342 | AsmReadApplicationRegisterRnat (\r | |
1343 | VOID\r | |
1344 | );\r | |
1345 | \r | |
1346 | \r | |
1347 | /**\r | |
1348 | Reads application register FCR.\r | |
1349 | \r | |
1350 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1351 | when its parameter Index is IPF_APPLICATION_REGISTER_FCR.\r |
aad6137d | 1352 | \r |
1353 | @return The 64-bit application register FCR.\r | |
1354 | \r | |
1355 | **/\r | |
1356 | UINT64\r | |
1357 | EFIAPI\r | |
1358 | AsmReadApplicationRegisterFcr (\r | |
1359 | VOID\r | |
1360 | );\r | |
1361 | \r | |
1362 | \r | |
1363 | /**\r | |
1364 | Reads application register EFLAG.\r | |
1365 | \r | |
1366 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1367 | when its parameter Index is IPF_APPLICATION_REGISTER_EFLAG.\r |
aad6137d | 1368 | \r |
1369 | @return The 64-bit application register EFLAG.\r | |
1370 | \r | |
1371 | **/\r | |
1372 | UINT64\r | |
1373 | EFIAPI\r | |
1374 | AsmReadApplicationRegisterEflag (\r | |
1375 | VOID\r | |
1376 | );\r | |
1377 | \r | |
1378 | \r | |
1379 | /**\r | |
1380 | Reads application register CSD.\r | |
1381 | \r | |
1382 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1383 | when its parameter Index is IPF_APPLICATION_REGISTER_CSD.\r |
aad6137d | 1384 | \r |
1385 | @return The 64-bit application register CSD.\r | |
1386 | \r | |
1387 | **/\r | |
1388 | UINT64\r | |
1389 | EFIAPI\r | |
1390 | AsmReadApplicationRegisterCsd (\r | |
1391 | VOID\r | |
1392 | );\r | |
1393 | \r | |
1394 | \r | |
1395 | /**\r | |
1396 | Reads application register SSD.\r | |
1397 | \r | |
1398 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1399 | when its parameter Index is IPF_APPLICATION_REGISTER_SSD.\r |
aad6137d | 1400 | \r |
1401 | @return The 64-bit application register SSD.\r | |
1402 | \r | |
1403 | **/\r | |
1404 | UINT64\r | |
1405 | EFIAPI\r | |
1406 | AsmReadApplicationRegisterSsd (\r | |
1407 | VOID\r | |
1408 | );\r | |
1409 | \r | |
1410 | \r | |
1411 | /**\r | |
1412 | Reads application register CFLG.\r | |
1413 | \r | |
1414 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1415 | when its parameter Index is IPF_APPLICATION_REGISTER_CFLG.\r |
aad6137d | 1416 | \r |
1417 | @return The 64-bit application register CFLG.\r | |
1418 | \r | |
1419 | **/\r | |
1420 | UINT64\r | |
1421 | EFIAPI\r | |
1422 | AsmReadApplicationRegisterCflg (\r | |
1423 | VOID\r | |
1424 | );\r | |
1425 | \r | |
1426 | \r | |
1427 | /**\r | |
1428 | Reads application register FSR.\r | |
1429 | \r | |
1430 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1431 | when its parameter Index is IPF_APPLICATION_REGISTER_FSR.\r |
aad6137d | 1432 | \r |
1433 | @return The 64-bit application register FSR.\r | |
1434 | \r | |
1435 | **/\r | |
1436 | UINT64\r | |
1437 | EFIAPI\r | |
1438 | AsmReadApplicationRegisterFsr (\r | |
1439 | VOID\r | |
1440 | );\r | |
1441 | \r | |
1442 | \r | |
1443 | /**\r | |
1444 | Reads application register FIR.\r | |
1445 | \r | |
1446 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1447 | when its parameter Index is IPF_APPLICATION_REGISTER_FIR.\r |
aad6137d | 1448 | \r |
1449 | @return The 64-bit application register FIR.\r | |
1450 | \r | |
1451 | **/\r | |
1452 | UINT64\r | |
1453 | EFIAPI\r | |
1454 | AsmReadApplicationRegisterFir (\r | |
1455 | VOID\r | |
1456 | );\r | |
1457 | \r | |
1458 | \r | |
1459 | /**\r | |
1460 | Reads application register FDR.\r | |
1461 | \r | |
1462 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1463 | when its parameter Index is IPF_APPLICATION_REGISTER_FDR.\r |
aad6137d | 1464 | \r |
1465 | @return The 64-bit application register FDR.\r | |
1466 | \r | |
1467 | **/\r | |
1468 | UINT64\r | |
1469 | EFIAPI\r | |
1470 | AsmReadApplicationRegisterFdr (\r | |
1471 | VOID\r | |
1472 | );\r | |
1473 | \r | |
1474 | \r | |
1475 | /**\r | |
1476 | Reads application register CCV.\r | |
1477 | \r | |
1478 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1479 | when its parameter Index is IPF_APPLICATION_REGISTER_CCV.\r |
aad6137d | 1480 | \r |
1481 | @return The 64-bit application register CCV.\r | |
1482 | \r | |
1483 | **/\r | |
1484 | UINT64\r | |
1485 | EFIAPI\r | |
1486 | AsmReadApplicationRegisterCcv (\r | |
1487 | VOID\r | |
1488 | );\r | |
1489 | \r | |
1490 | \r | |
1491 | /**\r | |
1492 | Reads application register UNAT.\r | |
1493 | \r | |
1494 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1495 | when its parameter Index is IPF_APPLICATION_REGISTER_UNAT.\r |
aad6137d | 1496 | \r |
1497 | @return The 64-bit application register UNAT.\r | |
1498 | \r | |
1499 | **/\r | |
1500 | UINT64\r | |
1501 | EFIAPI\r | |
1502 | AsmReadApplicationRegisterUnat (\r | |
1503 | VOID\r | |
1504 | );\r | |
1505 | \r | |
1506 | \r | |
1507 | /**\r | |
1508 | Reads application register FPSR.\r | |
1509 | \r | |
1510 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1511 | when its parameter Index is IPF_APPLICATION_REGISTER_FPSR.\r |
aad6137d | 1512 | \r |
1513 | @return The 64-bit application register FPSR.\r | |
1514 | \r | |
1515 | **/\r | |
1516 | UINT64\r | |
1517 | EFIAPI\r | |
1518 | AsmReadApplicationRegisterFpsr (\r | |
1519 | VOID\r | |
1520 | );\r | |
1521 | \r | |
1522 | \r | |
1523 | /**\r | |
1524 | Reads application register ITC.\r | |
1525 | \r | |
1526 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1527 | when its parameter Index is IPF_APPLICATION_REGISTER_ITC.\r |
aad6137d | 1528 | \r |
1529 | @return The 64-bit application register ITC.\r | |
1530 | \r | |
1531 | **/\r | |
1532 | UINT64\r | |
1533 | EFIAPI\r | |
1534 | AsmReadApplicationRegisterItc (\r | |
1535 | VOID\r | |
1536 | );\r | |
1537 | \r | |
1538 | \r | |
1539 | /**\r | |
1540 | Reads application register PFS.\r | |
1541 | \r | |
1542 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1543 | when its parameter Index is IPF_APPLICATION_REGISTER_PFS.\r |
aad6137d | 1544 | \r |
1545 | @return The 64-bit application register PFS.\r | |
1546 | \r | |
1547 | **/\r | |
1548 | UINT64\r | |
1549 | EFIAPI\r | |
1550 | AsmReadApplicationRegisterPfs (\r | |
1551 | VOID\r | |
1552 | );\r | |
1553 | \r | |
1554 | \r | |
1555 | /**\r | |
1556 | Reads application register LC.\r | |
1557 | \r | |
1558 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1559 | when its parameter Index is IPF_APPLICATION_REGISTER_LC.\r |
aad6137d | 1560 | \r |
1561 | @return The 64-bit application register LC.\r | |
1562 | \r | |
1563 | **/\r | |
1564 | UINT64\r | |
1565 | EFIAPI\r | |
1566 | AsmReadApplicationRegisterLc (\r | |
1567 | VOID\r | |
1568 | );\r | |
1569 | \r | |
1570 | \r | |
1571 | /**\r | |
1572 | Reads application register EC.\r | |
1573 | \r | |
1574 | This is a worker function for AsmReadApplicationRegister()\r | |
127010dd | 1575 | when its parameter Index is IPF_APPLICATION_REGISTER_EC.\r |
aad6137d | 1576 | \r |
1577 | @return The 64-bit application register EC.\r | |
1578 | \r | |
1579 | **/\r | |
1580 | UINT64\r | |
1581 | EFIAPI\r | |
1582 | AsmReadApplicationRegisterEc (\r | |
1583 | VOID\r | |
1584 | );\r | |
1585 | \r | |
1586 | \r | |
1587 | \r | |
e1f414b6 | 1588 | /**\r |
1589 | Transfers control to a function starting with a new stack.\r | |
1590 | \r | |
1591 | Transfers control to the function specified by EntryPoint using the new stack\r | |
1592 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
1593 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
1594 | EntryPoint must never return.\r | |
1595 | \r | |
1596 | If EntryPoint is NULL, then ASSERT().\r | |
1597 | If NewStack is NULL, then ASSERT().\r | |
1598 | \r | |
1599 | @param EntryPoint A pointer to function to call with the new stack.\r | |
1600 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
1601 | function.\r | |
1602 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
1603 | function.\r | |
1604 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
1605 | function.\r | |
1606 | @param NewBsp A pointer to the new memory location for RSE backing\r | |
1607 | store.\r | |
1608 | \r | |
1609 | **/\r | |
1610 | VOID\r | |
1611 | EFIAPI\r | |
1612 | AsmSwitchStackAndBackingStore (\r | |
1613 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
1614 | IN VOID *Context1, OPTIONAL\r | |
1615 | IN VOID *Context2, OPTIONAL\r | |
1616 | IN VOID *NewStack,\r | |
1617 | IN VOID *NewBsp\r | |
1618 | );\r | |
287f4f47 | 1619 | \r |
1620 | /**\r | |
1621 | Internal worker function to invalidate a range of instruction cache lines\r | |
1622 | in the cache coherency domain of the calling CPU.\r | |
1623 | \r | |
1624 | Internal worker function to invalidate the instruction cache lines specified\r | |
1625 | by Address and Length. If Address is not aligned on a cache line boundary,\r | |
1626 | then entire instruction cache line containing Address is invalidated. If\r | |
1627 | Address + Length is not aligned on a cache line boundary, then the entire\r | |
1628 | instruction cache line containing Address + Length -1 is invalidated. This\r | |
1629 | function may choose to invalidate the entire instruction cache if that is more\r | |
1630 | efficient than invalidating the specified range. If Length is 0, the no instruction\r | |
1631 | cache lines are invalidated. Address is returned.\r | |
1632 | This function is only available on IPF.\r | |
1633 | \r | |
1634 | @param Address The base address of the instruction cache lines to\r | |
1635 | invalidate. If the CPU is in a physical addressing mode, then\r | |
1636 | Address is a physical address. If the CPU is in a virtual\r | |
1637 | addressing mode, then Address is a virtual address.\r | |
1638 | \r | |
1639 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
1640 | \r | |
1641 | @return Address\r | |
1642 | \r | |
1643 | **/\r | |
1644 | VOID *\r | |
1645 | EFIAPI\r | |
1646 | InternalFlushCacheRange (\r | |
1647 | IN VOID *Address,\r | |
1648 | IN UINTN Length\r | |
1649 | );\r | |
1650 | \r | |
e1f414b6 | 1651 | #else\r |
1652 | \r | |
1653 | #endif\r | |
1654 | \r | |
1655 | #endif\r |