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1 | /** @file\r |
2 | Pending Break feature.\r | |
3 | \r | |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "CpuCommonFeatures.h"\r | |
16 | \r | |
17 | /**\r | |
18 | Detects if Pending Break feature supported on current processor.\r | |
19 | \r | |
20 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
21 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
22 | structure for the CPU executing this function.\r | |
23 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
24 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
25 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
26 | RegisterCpuFeature().\r | |
27 | \r | |
28 | @retval TRUE Pending Break feature is supported.\r | |
29 | @retval FALSE Pending Break feature is not supported.\r | |
30 | \r | |
31 | @note This service could be called by BSP/APs.\r | |
32 | **/\r | |
33 | BOOLEAN\r | |
34 | EFIAPI\r | |
35 | PendingBreakSupport (\r | |
36 | IN UINTN ProcessorNumber,\r | |
37 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
38 | IN VOID *ConfigData OPTIONAL\r | |
39 | )\r | |
40 | {\r | |
41 | if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
42 | IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
43 | IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
44 | IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r | |
45 | IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r | |
46 | return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE == 1);\r | |
47 | }\r | |
48 | return FALSE;\r | |
49 | }\r | |
50 | \r | |
51 | /**\r | |
52 | Initializes Pending Break feature to specific state.\r | |
53 | \r | |
54 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
55 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
56 | structure for the CPU executing this function.\r | |
57 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
58 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
59 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
60 | RegisterCpuFeature().\r | |
61 | @param[in] State If TRUE, then the Pending Break feature must be enabled.\r | |
62 | If FALSE, then the Pending Break feature must be disabled.\r | |
63 | \r | |
64 | @retval RETURN_SUCCESS Pending Break feature is initialized.\r | |
65 | \r | |
66 | @note This service could be called by BSP only.\r | |
67 | **/\r | |
68 | RETURN_STATUS\r | |
69 | EFIAPI\r | |
70 | PendingBreakInitialize (\r | |
71 | IN UINTN ProcessorNumber,\r | |
72 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
73 | IN VOID *ConfigData, OPTIONAL\r | |
74 | IN BOOLEAN State\r | |
75 | )\r | |
76 | {\r | |
77 | //\r | |
78 | // ATOM, CORE2, CORE, PENTIUM_4 and IS_PENTIUM_M_PROCESSOR have the same MSR index,\r | |
79 | // Simply use MSR_ATOM_IA32_MISC_ENABLE here\r | |
80 | //\r | |
81 | CPU_REGISTER_TABLE_WRITE_FIELD (\r | |
82 | ProcessorNumber,\r | |
83 | Msr,\r | |
84 | MSR_ATOM_IA32_MISC_ENABLE,\r | |
85 | MSR_ATOM_IA32_MISC_ENABLE_REGISTER,\r | |
86 | Bits.FERR,\r | |
87 | (State) ? 1 : 0\r | |
88 | );\r | |
89 | return RETURN_SUCCESS;\r | |
90 | }\r |