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[mirror_edk2.git] / Vlv2TbltDevicePkg / Library / CpuIA32Lib / X64 / Cpu.asm
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DW		 1\r
2TITLE Cpu.asm: Assembly code for the x64 resources\r
3\r
4;\r
5; This file contains an 'Intel Sample Driver' and is\r
6; licensed for Intel CPUs and chipsets under the terms of your\r
7; license agreement with Intel or your vendor. This file may\r
8; be modified by the user, subject to additional terms of the\r
9; license agreement\r
10;\r
11;\r
12; Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
13; \r\r
14; This program and the accompanying materials are licensed and made available under\r\r
15; the terms and conditions of the BSD License that accompanies this distribution. \r\r
16; The full text of the license may be found at \r\r
17; http://opensource.org/licenses/bsd-license.php. \r\r
18; \r\r
19; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
20; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
21; \r\r
22;\r
23;\r
24;\r
25;\r
26;* Module Name:\r
27;*\r
28;* Cpu.asm\r
29;*\r
30;* Abstract:\r
31;*\r
32;------------------------------------------------------------------------------\r
33\r
34text SEGMENT\r
35\r
36\r
37;------------------------------------------------------------------------------\r
38; VOID\r
39; EfiHalt (\r
40; VOID\r
41; )\r
42;------------------------------------------------------------------------------\r
43EfiHalt PROC PUBLIC\r
44 hlt\r
45 ret\r
46EfiHalt ENDP\r
47\r
48\r
49;------------------------------------------------------------------------------\r
50; VOID\r
51; EfiWbinvd (\r
52; VOID\r
53; )\r
54;------------------------------------------------------------------------------\r
55EfiWbinvd PROC PUBLIC\r
56 wbinvd\r
57 ret\r
58EfiWbinvd ENDP\r
59\r
60\r
61;------------------------------------------------------------------------------\r
62; VOID\r
63; EfiInvd (\r
64; VOID\r
65; )\r
66;------------------------------------------------------------------------------\r
67EfiInvd PROC PUBLIC\r
68 invd\r
69 ret\r
70EfiInvd ENDP\r
71\r
72;------------------------------------------------------------------------------\r
73; VOID\r
74; EfiCpuid (\r
75; IN UINT32 RegisterInEax, // rcx\r
76; OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx\r
77; )\r
78;------------------------------------------------------------------------------\r
79EfiCpuid PROC PUBLIC\r
80 push rbx\r
81\r
82 mov r8, rdx ; r8 = *Reg\r
83 mov rax, rcx ; RegisterInEax\r
84 cpuid\r
85 cmp r8, 0\r
86 je _Exit\r
87 mov [r8 + 0], eax ; Reg->RegEax\r
88 mov [r8 + 4], ebx ; Reg->RegEbx\r
89 mov [r8 + 8], ecx ; Reg->RegEcx\r
90 mov [r8 + 12], edx ; Reg->RegEdx\r
91\r
92_Exit:\r
93 pop rbx\r
94 ret\r
95EfiCpuid ENDP\r
96\r
97;------------------------------------------------------------------------------\r
98; UINT64\r
99; EfiReadMsr (\r
100; IN UINT32 Index, // rcx\r
101; )\r
102;------------------------------------------------------------------------------\r
103EfiReadMsr PROC PUBLIC\r
104 rdmsr\r
105 sal rdx, 32 ; edx:eax -> rax\r
106 or rax, rdx ; rax = edx:eax\r
107 ret\r
108EfiReadMsr ENDP\r
109\r
110;------------------------------------------------------------------------------\r
111; VOID\r
112; EfiWriteMsr (\r
113; IN UINT32 Index, // rcx\r
114; IN UINT64 Value // rdx\r
115; )\r
116;------------------------------------------------------------------------------\r
117EfiWriteMsr PROC PUBLIC\r
118 mov rax, rdx ; rdx = Value\r
119 sar rdx, 32 ; convert rdx to edx upper 32-bits\r
120 wrmsr ; wrmsr[ecx] result = edx:eax\r
121 ret\r
122EfiWriteMsr ENDP\r
123\r
124\r
125;------------------------------------------------------------------------------\r
126; UINT64\r
127; EfiReadTsc (\r
128; VOID\r
129; );\r
130;------------------------------------------------------------------------------\r
131EfiReadTsc PROC PUBLIC\r
132 rdtsc\r
133 shl rax, 32\r
134 shrd rax, rdx, 32\r
135 ret\r
136EfiReadTsc ENDP\r
137\r
138;------------------------------------------------------------------------------\r
139; VOID\r
140; EfiDisableCache (\r
141; VOID\r
142; );\r
143;------------------------------------------------------------------------------\r
144EfiDisableCache PROC PUBLIC\r
145; added a check to see if cache is already disabled. If it is, then skip.\r
146 mov rax, cr0\r
147 and rax, 060000000h\r
148 cmp rax, 0\r
149 jne @f\r
150 mov rax, cr0\r
151 or rax, 060000000h\r
152 mov cr0, rax\r
153 wbinvd\r
154@@:\r
155 ret\r
156EfiDisableCache ENDP\r
157\r
158;------------------------------------------------------------------------------\r
159; VOID\r
160; EfiEnableCache (\r
161; VOID\r
162; );\r
163;------------------------------------------------------------------------------\r
164EfiEnableCache PROC PUBLIC\r
165 wbinvd\r
166 mov rax, cr0\r
167 and rax, 09fffffffh\r
168 mov cr0, rax\r
169 ret\r
170EfiEnableCache ENDP\r
171\r
172;------------------------------------------------------------------------------\r
173; UINTN\r
174; EfiGetEflags (\r
175; VOID\r
176; );\r
177;------------------------------------------------------------------------------\r
178EfiGetEflags PROC PUBLIC\r
179 pushfq\r
180 pop rax\r
181 ret\r
182EfiGetEflags ENDP\r
183\r
184;------------------------------------------------------------------------------\r
185; VOID\r
186; EfiDisableInterrupts (\r
187; VOID\r
188; );\r
189;------------------------------------------------------------------------------\r
190EfiDisableInterrupts PROC PUBLIC\r
191 cli\r
192 ret\r
193EfiDisableInterrupts ENDP\r
194\r
195;------------------------------------------------------------------------------\r
196; VOID\r
197; EfiEnableInterrupts (\r
198; VOID\r
199; );\r
200;------------------------------------------------------------------------------\r
201EfiEnableInterrupts PROC PUBLIC\r
202 sti\r
203 ret\r
204EfiEnableInterrupts ENDP\r
205;------------------------------------------------------------------------------\r
206; VOID\r
207; EfiCpuidExt (\r
208; IN UINT32 RegisterInEax,\r
209; IN UINT32 CacheLevel,\r
210; OUT EFI_CPUID_REGISTER *Regs\r
211; )\r
212;------------------------------------------------------------------------------\r
213EfiCpuidExt PROC PUBLIC\r
214 push rbx\r
215 mov rax, rcx ; rax = RegisterInEax\r
216 mov rcx, rdx ; rcx = CacheLevel\r
217\r
218 cpuid\r
219 mov [r8 + 0 ], eax ; Reg->RegEax\r
220 mov [r8 + 4 ], ebx ; Reg->RegEbx\r
221 mov [r8 + 8 ], ecx ; Reg->RegEcx\r
222 mov [r8 + 12], edx ; Reg->RegEdx\r
223\r
224 pop rbx\r
225 ret\r
226EfiCpuidExt ENDP\r
227END\r
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