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powerpc/pseries: Restore default security feature flags on setup
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CommitLineData
1da177e4 1/*
033ef338 2 * 64-bit pSeries and RS/6000 setup code.
1da177e4
LT
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
62d60e9f 19#include <linux/cpu.h>
1da177e4
LT
20#include <linux/errno.h>
21#include <linux/sched.h>
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/stddef.h>
25#include <linux/unistd.h>
1da177e4 26#include <linux/user.h>
1da177e4
LT
27#include <linux/tty.h>
28#include <linux/major.h>
29#include <linux/interrupt.h>
30#include <linux/reboot.h>
31#include <linux/init.h>
32#include <linux/ioport.h>
33#include <linux/console.h>
34#include <linux/pci.h>
cebb2b15 35#include <linux/utsname.h>
1da177e4 36#include <linux/adb.h>
4b16f8e2 37#include <linux/export.h>
1da177e4
LT
38#include <linux/delay.h>
39#include <linux/irq.h>
40#include <linux/seq_file.h>
41#include <linux/root_dev.h>
1cf3d8b3 42#include <linux/of.h>
705a7b47 43#include <linux/of_pci.h>
1da177e4
LT
44
45#include <asm/mmu.h>
46#include <asm/processor.h>
47#include <asm/io.h>
48#include <asm/pgtable.h>
49#include <asm/prom.h>
50#include <asm/rtas.h>
51#include <asm/pci-bridge.h>
52#include <asm/iommu.h>
53#include <asm/dma.h>
54#include <asm/machdep.h>
55#include <asm/irq.h>
56#include <asm/time.h>
57#include <asm/nvram.h>
180a3362 58#include <asm/pmc.h>
0b05ac6e 59#include <asm/xics.h>
d387899f 60#include <asm/ppc-pci.h>
69a80d3f
PM
61#include <asm/i8259.h>
62#include <asm/udbg.h>
2249ca9d 63#include <asm/smp.h>
577830b0 64#include <asm/firmware.h>
bed59275 65#include <asm/eeh.h>
bf99de36 66#include <asm/reg.h>
212bebb4 67#include <asm/plpar_wrappers.h>
d81d8258 68#include <asm/kexec.h>
38e9d36b 69#include <asm/isa-bridge.h>
2342a214 70#include <asm/security_features.h>
1da177e4 71
577830b0 72#include "pseries.h"
a1218720 73
81f14997
RJ
74int CMO_PrPSP = -1;
75int CMO_SecPSP = -1;
e589a440 76unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
d617a402 77EXPORT_SYMBOL(CMO_PageSize);
1da177e4 78
1da177e4
LT
79int fwnmi_active; /* TRUE if an FWNMI handler is present */
80
8446196a 81static void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
82{
83 struct device_node *root;
84 const char *model = "";
85
86 root = of_find_node_by_path("/");
87 if (root)
e2eb6392 88 model = of_get_property(root, "model", NULL);
1da177e4
LT
89 seq_printf(m, "machine\t\t: CHRP %s\n", model);
90 of_node_put(root);
3a4c2601
AK
91 if (radix_enabled())
92 seq_printf(m, "MMU\t\t: Radix\n");
93 else
94 seq_printf(m, "MMU\t\t: Hash\n");
1da177e4
LT
95}
96
97/* Initialize firmware assisted non-maskable interrupts if
98 * the firmware supports this feature.
1da177e4
LT
99 */
100static void __init fwnmi_init(void)
101{
8c4f1f29
ME
102 unsigned long system_reset_addr, machine_check_addr;
103
1da177e4
LT
104 int ibm_nmi_register = rtas_token("ibm,nmi-register");
105 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
106 return;
8c4f1f29
ME
107
108 /* If the kernel's not linked at zero we point the firmware at low
109 * addresses anyway, and use a trampoline to get to the real code. */
110 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
111 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
112
113 if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
114 machine_check_addr))
1da177e4
LT
115 fwnmi_active = 1;
116}
117
bd0b9ac4 118static void pseries_8259_cascade(struct irq_desc *desc)
b9e5b4e6 119{
ec775d0e 120 struct irq_chip *chip = irq_desc_get_chip(desc);
35a84c2f 121 unsigned int cascade_irq = i8259_irq();
79f26c26 122
ef24ba70 123 if (cascade_irq)
7d12e780 124 generic_handle_irq(cascade_irq);
79f26c26
LB
125
126 chip->irq_eoi(&desc->irq_data);
b9e5b4e6
BH
127}
128
30d6ad25 129static void __init pseries_setup_i8259_cascade(void)
032ace7e
ME
130{
131 struct device_node *np, *old, *found = NULL;
30d6ad25 132 unsigned int cascade;
032ace7e
ME
133 const u32 *addrp;
134 unsigned long intack = 0;
30d6ad25 135 int naddr;
032ace7e 136
30d6ad25 137 for_each_node_by_type(np, "interrupt-controller") {
032ace7e
ME
138 if (of_device_is_compatible(np, "chrp,iic")) {
139 found = np;
140 break;
141 }
30d6ad25
ME
142 }
143
032ace7e 144 if (found == NULL) {
30d6ad25 145 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
032ace7e
ME
146 return;
147 }
30d6ad25 148
032ace7e 149 cascade = irq_of_parse_and_map(found, 0);
ef24ba70 150 if (!cascade) {
30d6ad25 151 printk(KERN_ERR "pic: failed to map cascade interrupt");
032ace7e
ME
152 return;
153 }
30d6ad25 154 pr_debug("pic: cascade mapped to irq %d\n", cascade);
032ace7e
ME
155
156 for (old = of_node_get(found); old != NULL ; old = np) {
157 np = of_get_parent(old);
158 of_node_put(old);
159 if (np == NULL)
160 break;
161 if (strcmp(np->name, "pci") != 0)
162 continue;
163 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
164 if (addrp == NULL)
165 continue;
166 naddr = of_n_addr_cells(np);
167 intack = addrp[naddr-1];
168 if (naddr > 1)
169 intack |= ((unsigned long)addrp[naddr-2]) << 32;
170 }
171 if (intack)
30d6ad25 172 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
032ace7e
ME
173 i8259_init(found, intack);
174 of_node_put(found);
ec775d0e 175 irq_set_chained_handler(cascade, pseries_8259_cascade);
032ace7e
ME
176}
177
e7da5dac 178static void __init pseries_init_irq(void)
032ace7e 179{
0b05ac6e 180 xics_init();
30d6ad25 181 pseries_setup_i8259_cascade();
032ace7e
ME
182}
183
180a3362
ME
184static void pseries_lpar_enable_pmcs(void)
185{
186 unsigned long set, reset;
187
180a3362
ME
188 set = 1UL << 63;
189 reset = 0;
190 plpar_hcall_norets(H_PERFMON, set, reset);
180a3362
ME
191}
192
f5242e5a 193static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
2eb4afb6 194{
f5242e5a 195 struct of_reconfig_data *rd = data;
ea0f8acf
GS
196 struct device_node *parent, *np = rd->dn;
197 struct pci_dn *pdn;
2eb4afb6
KG
198 int err = NOTIFY_OK;
199
200 switch (action) {
1cf3d8b3 201 case OF_RECONFIG_ATTACH_NODE:
ea0f8acf
GS
202 parent = of_get_parent(np);
203 pdn = parent ? PCI_DN(parent) : NULL;
8cc7581c 204 if (pdn)
d8f66f41 205 pci_add_device_node_info(pdn->phb, np);
ea0f8acf
GS
206
207 of_node_put(parent);
2eb4afb6 208 break;
590c7567 209 case OF_RECONFIG_DETACH_NODE:
ea0f8acf
GS
210 pdn = PCI_DN(np);
211 if (pdn)
212 list_del(&pdn->list);
590c7567 213 break;
2eb4afb6
KG
214 default:
215 err = NOTIFY_DONE;
216 break;
217 }
218 return err;
219}
220
221static struct notifier_block pci_dn_reconfig_nb = {
222 .notifier_call = pci_dn_reconfig_notifier,
223};
224
af442a1b
NA
225struct kmem_cache *dtl_cache;
226
abf917cd 227#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
cf9efce0
PM
228/*
229 * Allocate space for the dispatch trace log for all possible cpus
230 * and register the buffers with the hypervisor. This is used for
231 * computing time stolen by the hypervisor.
232 */
233static int alloc_dispatch_logs(void)
234{
235 int cpu, ret;
236 struct paca_struct *pp;
237 struct dtl_entry *dtl;
238
239 if (!firmware_has_feature(FW_FEATURE_SPLPAR))
240 return 0;
241
af442a1b 242 if (!dtl_cache)
127493d5 243 return 0;
127493d5 244
cf9efce0
PM
245 for_each_possible_cpu(cpu) {
246 pp = &paca[cpu];
127493d5 247 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
cf9efce0
PM
248 if (!dtl) {
249 pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
250 cpu);
251 pr_warn("Stolen time statistics will be unreliable\n");
252 break;
253 }
254
255 pp->dtl_ridx = 0;
256 pp->dispatch_log = dtl;
257 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
258 pp->dtl_curr = dtl;
259 }
260
261 /* Register the DTL for the current (boot) cpu */
262 dtl = get_paca()->dispatch_log;
263 get_paca()->dtl_ridx = 0;
264 get_paca()->dtl_curr = dtl;
265 get_paca()->lppaca_ptr->dtl_idx = 0;
266
267 /* hypervisor reads buffer length from this field */
7ffcf8ec 268 dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
cf9efce0
PM
269 ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
270 if (ret)
711ef84e
AB
271 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
272 "with %d\n", smp_processor_id(),
273 hard_smp_processor_id(), ret);
cf9efce0
PM
274 get_paca()->lppaca_ptr->dtl_enable_mask = 2;
275
276 return 0;
277}
abf917cd 278#else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
af442a1b
NA
279static inline int alloc_dispatch_logs(void)
280{
281 return 0;
282}
abf917cd 283#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
cf9efce0 284
af442a1b
NA
285static int alloc_dispatch_log_kmem_cache(void)
286{
287 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
288 DISPATCH_LOG_BYTES, 0, NULL);
289 if (!dtl_cache) {
290 pr_warn("Failed to create dispatch trace log buffer cache\n");
291 pr_warn("Stolen time statistics will be unreliable\n");
292 return 0;
293 }
294
295 return alloc_dispatch_logs();
296}
8e83e905 297machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
af442a1b 298
363edbe2 299static void pseries_lpar_idle(void)
e179816c 300{
d8c6ad31
NP
301 /*
302 * Default handler to go into low thread priority and possibly
027dfac6 303 * low power mode by ceding processor to hypervisor
e179816c 304 */
d8c6ad31
NP
305
306 /* Indicate to hypervisor that we are idle. */
307 get_lppaca()->idle = 1;
308
309 /*
310 * Yield the processor to the hypervisor. We return if
311 * an external interrupt occurs (which are driven prior
312 * to returning here) or if a prod occurs from another
313 * processor. When returning here, external interrupts
314 * are enabled.
315 */
316 cede_processor();
317
318 get_lppaca()->idle = 0;
e179816c
DD
319}
320
fc8effa4
IM
321/*
322 * Enable relocation on during exceptions. This has partition wide scope and
323 * may take a while to complete, if it takes longer than one second we will
324 * just give up rather than wasting any more time on this - if that turns out
325 * to ever be a problem in practice we can move this into a kernel thread to
326 * finish off the process later in boot.
327 */
d3cbff1b 328void pseries_enable_reloc_on_exc(void)
fc8effa4
IM
329{
330 long rc;
331 unsigned int delay, total_delay = 0;
332
333 while (1) {
334 rc = enable_reloc_on_exceptions();
d3cbff1b
BH
335 if (!H_IS_LONG_BUSY(rc)) {
336 if (rc == H_P2) {
337 pr_info("Relocation on exceptions not"
338 " supported\n");
339 } else if (rc != H_SUCCESS) {
340 pr_warn("Unable to enable relocation"
341 " on exceptions: %ld\n", rc);
342 }
343 break;
344 }
fc8effa4
IM
345
346 delay = get_longbusy_msecs(rc);
347 total_delay += delay;
348 if (total_delay > 1000) {
349 pr_warn("Warning: Giving up waiting to enable "
350 "relocation on exceptions (%u msec)!\n",
351 total_delay);
d3cbff1b 352 return;
fc8effa4
IM
353 }
354
355 mdelay(delay);
356 }
357}
d3cbff1b 358EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
fc8effa4 359
d3cbff1b 360void pseries_disable_reloc_on_exc(void)
cedddd81
IM
361{
362 long rc;
363
364 while (1) {
365 rc = disable_reloc_on_exceptions();
366 if (!H_IS_LONG_BUSY(rc))
d3cbff1b 367 break;
cedddd81
IM
368 mdelay(get_longbusy_msecs(rc));
369 }
d3cbff1b
BH
370 if (rc != H_SUCCESS)
371 pr_warning("Warning: Failed to disable relocation on "
372 "exceptions: %ld\n", rc);
cedddd81 373}
d3cbff1b 374EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
cedddd81 375
da665885 376#ifdef CONFIG_KEXEC_CORE
cedddd81
IM
377static void pSeries_machine_kexec(struct kimage *image)
378{
d3cbff1b
BH
379 if (firmware_has_feature(FW_FEATURE_SET_MODE))
380 pseries_disable_reloc_on_exc();
cedddd81
IM
381
382 default_machine_kexec(image);
383}
384#endif
385
e844b1ee 386#ifdef __LITTLE_ENDIAN__
d3cbff1b 387void pseries_big_endian_exceptions(void)
e844b1ee
AB
388{
389 long rc;
390
391 while (1) {
392 rc = enable_big_endian_exceptions();
393 if (!H_IS_LONG_BUSY(rc))
d3cbff1b 394 break;
e844b1ee
AB
395 mdelay(get_longbusy_msecs(rc));
396 }
d3cbff1b
BH
397
398 /*
399 * At this point it is unlikely panic() will get anything
400 * out to the user, since this is called very late in kexec
401 * but at least this will stop us from continuing on further
402 * and creating an even more difficult to debug situation.
403 *
404 * There is a known problem when kdump'ing, if cpus are offline
405 * the above call will fail. Rather than panicking again, keep
406 * going and hope the kdump kernel is also little endian, which
407 * it usually is.
408 */
409 if (rc && !kdump_in_progress())
410 panic("Could not enable big endian exceptions");
e844b1ee
AB
411}
412
d3cbff1b 413void pseries_little_endian_exceptions(void)
e844b1ee
AB
414{
415 long rc;
416
417 while (1) {
418 rc = enable_little_endian_exceptions();
419 if (!H_IS_LONG_BUSY(rc))
d3cbff1b 420 break;
e844b1ee
AB
421 mdelay(get_longbusy_msecs(rc));
422 }
d3cbff1b
BH
423 if (rc) {
424 ppc_md.progress("H_SET_MODE LE exception fail", 0);
425 panic("Could not enable little endian exceptions");
426 }
e844b1ee
AB
427}
428#endif
429
bdc728a8
DA
430static void __init find_and_init_phbs(void)
431{
432 struct device_node *node;
433 struct pci_controller *phb;
434 struct device_node *root = of_find_node_by_path("/");
435
436 for_each_child_of_node(root, node) {
437 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
438 strcmp(node->type, "pciex") != 0))
439 continue;
440
441 phb = pcibios_alloc_controller(node);
442 if (!phb)
443 continue;
444 rtas_setup_phb(phb);
445 pci_process_bridge_OF_ranges(phb, node, 0);
446 isa_bridge_find_early(phb);
38ae9ec4 447 phb->controller_ops = pseries_pci_controller_ops;
bdc728a8
DA
448 }
449
450 of_node_put(root);
bdc728a8
DA
451
452 /*
453 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
454 * in chosen.
455 */
705a7b47 456 of_pci_check_probe_only();
bdc728a8
DA
457}
458
2342a214
ME
459static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
460{
c78497ae
MFO
461 /*
462 * The features below are disabled by default, so we instead look to see
463 * if firmware has *enabled* them, and set them if so.
464 */
2342a214
ME
465 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
466 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
467
468 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
469 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
470
471 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
472 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
473
474 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
475 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
476
477 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
478 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
479
480 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
481 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
482
483 /*
484 * The features below are enabled by default, so we instead look to see
485 * if firmware has *disabled* them, and clear them if so.
486 */
b941b7d9 487 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
2342a214
ME
488 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
489
b941b7d9 490 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
2342a214
ME
491 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
492
b941b7d9 493 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
2342a214
ME
494 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
495}
496
23dd53e7 497static void pseries_setup_rfi_flush(void)
ad7b3c45 498{
6972e2cb 499 struct h_cpu_char_result result;
ab39f962 500 enum l1d_flush_type types;
ad7b3c45 501 bool enable;
6972e2cb 502 long rc;
ad7b3c45 503
c78497ae
MFO
504 /*
505 * Set features to the defaults assumed by init_cpu_char_feature_flags()
506 * so it can set/clear again any features that might have changed after
507 * migration, and in case the hypercall fails and it is not even called.
508 */
509 powerpc_security_features = SEC_FTR_DEFAULT;
510
6972e2cb 511 rc = plpar_get_cpu_characteristics(&result);
053baf34 512 if (rc == H_SUCCESS)
2342a214
ME
513 init_cpu_char_feature_flags(&result);
514
2342a214
ME
515 /*
516 * We're the guest so this doesn't apply to us, clear it to simplify
517 * handling of it elsewhere.
518 */
519 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
520
053baf34
ME
521 types = L1D_FLUSH_FALLBACK;
522
523 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
524 types |= L1D_FLUSH_MTTRIG;
525
526 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
527 types |= L1D_FLUSH_ORI;
528
529 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
530 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
531
ab39f962 532 setup_rfi_flush(types, enable);
ad7b3c45
AM
533}
534
0ebfff14
BH
535static void __init pSeries_setup_arch(void)
536{
b71d47c1 537 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
a934904d 538
0ebfff14 539 /* Discover PIC type and setup ppc_md accordingly */
86425bed 540 smp_init_pseries();
e7da5dac 541
0ebfff14 542
1da177e4
LT
543 /* openpic global configuration register (64-bit format). */
544 /* openpic Interrupt Source Unit pointer (64-bit format). */
545 /* python0 facility area (mmio) (64-bit format) REAL address. */
546
547 /* init to some ~sane value until calibrate_delay() runs */
548 loops_per_jiffy = 50000000;
549
1da177e4
LT
550 fwnmi_init();
551
23dd53e7 552 pseries_setup_rfi_flush();
ad7b3c45 553
446957ba 554 /* By default, only probe PCI (can be overridden by rtas_pci) */
673c9756 555 pci_add_flags(PCI_PROBE_ONLY);
3c13be01 556
1da177e4
LT
557 /* Find and initialize PCI host bridges */
558 init_pci_config_tokens();
1da177e4 559 find_and_init_phbs();
1cf3d8b3 560 of_reconfig_notifier_register(&pci_dn_reconfig_nb);
1da177e4 561
1da177e4
LT
562 pSeries_nvram_init();
563
363edbe2 564 if (firmware_has_feature(FW_FEATURE_LPAR)) {
8d15a3e5 565 vpa_init(boot_cpuid);
363edbe2 566 ppc_md.power_save = pseries_lpar_idle;
180a3362 567 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
363edbe2
VS
568 } else {
569 /* No special idle routine */
180a3362 570 ppc_md.enable_pmcs = power4_enable_pmcs;
363edbe2 571 }
fc8effa4 572
d82fb31a 573 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
1da177e4
LT
574}
575
576static int __init pSeries_init_panel(void)
577{
578 /* Manually leave the kernel version on the panel. */
983d8a6d 579#ifdef __BIG_ENDIAN__
1da177e4 580 ppc_md.progress("Linux ppc64\n", 0);
983d8a6d
TB
581#else
582 ppc_md.progress("Linux ppc64le\n", 0);
583#endif
96b644bd 584 ppc_md.progress(init_utsname()->version, 0);
1da177e4
LT
585
586 return 0;
587}
f86d6b9b 588machine_arch_initcall(pseries, pSeries_init_panel);
1da177e4 589
4474ef05 590static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
cab0af98 591{
76032de8 592 return plpar_hcall_norets(H_SET_DABR, dabr);
cab0af98
ME
593}
594
4474ef05 595static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
76032de8 596{
4474ef05
MN
597 /* Have to set at least one bit in the DABRX according to PAPR */
598 if (dabrx == 0 && dabr == 0)
599 dabrx = DABRX_USER;
600 /* PAPR says we can only set kernel and user bits */
cd144573 601 dabrx &= DABRX_KERNEL | DABRX_USER;
4474ef05
MN
602
603 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
76032de8 604}
1da177e4 605
bf99de36
MN
606static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
607{
608 /* PAPR says we can't set HYP */
609 dawrx &= ~DAWRX_HYP;
610
611 return plapr_set_watchpoint0(dawr, dawrx);
612}
613
e46de429
RJ
614#define CMO_CHARACTERISTICS_TOKEN 44
615#define CMO_MAXLENGTH 1026
616
9ee820fa
BK
617void pSeries_coalesce_init(void)
618{
619 struct hvcall_mpp_x_data mpp_x_data;
620
621 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
622 powerpc_firmware_features |= FW_FEATURE_XCMO;
623 else
624 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
625}
626
e46de429
RJ
627/**
628 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
629 * handle that here. (Stolen from parse_system_parameter_string)
630 */
e51df2c1 631static void pSeries_cmo_feature_init(void)
e46de429
RJ
632{
633 char *ptr, *key, *value, *end;
634 int call_status;
e589a440 635 int page_order = IOMMU_PAGE_SHIFT_4K;
e46de429
RJ
636
637 pr_debug(" -> fw_cmo_feature_init()\n");
638 spin_lock(&rtas_data_buf_lock);
639 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
640 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
641 NULL,
642 CMO_CHARACTERISTICS_TOKEN,
643 __pa(rtas_data_buf),
644 RTAS_DATA_BUF_SIZE);
645
646 if (call_status != 0) {
647 spin_unlock(&rtas_data_buf_lock);
648 pr_debug("CMO not available\n");
649 pr_debug(" <- fw_cmo_feature_init()\n");
650 return;
651 }
652
653 end = rtas_data_buf + CMO_MAXLENGTH - 2;
654 ptr = rtas_data_buf + 2; /* step over strlen value */
655 key = value = ptr;
656
657 while (*ptr && (ptr <= end)) {
658 /* Separate the key and value by replacing '=' with '\0' and
659 * point the value at the string after the '='
660 */
661 if (ptr[0] == '=') {
662 ptr[0] = '\0';
663 value = ptr + 1;
664 } else if (ptr[0] == '\0' || ptr[0] == ',') {
665 /* Terminate the string containing the key/value pair */
666 ptr[0] = '\0';
667
668 if (key == value) {
669 pr_debug("Malformed key/value pair\n");
670 /* Never found a '=', end processing */
671 break;
672 }
673
81f14997
RJ
674 if (0 == strcmp(key, "CMOPageSize"))
675 page_order = simple_strtol(value, NULL, 10);
676 else if (0 == strcmp(key, "PrPSP"))
677 CMO_PrPSP = simple_strtol(value, NULL, 10);
e46de429 678 else if (0 == strcmp(key, "SecPSP"))
81f14997 679 CMO_SecPSP = simple_strtol(value, NULL, 10);
e46de429
RJ
680 value = key = ptr + 1;
681 }
682 ptr++;
683 }
684
81f14997
RJ
685 /* Page size is returned as the power of 2 of the page size,
686 * convert to the page size in bytes before returning
687 */
688 CMO_PageSize = 1 << page_order;
689 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
690
691 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
e46de429 692 pr_info("CMO enabled\n");
81f14997
RJ
693 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
694 CMO_SecPSP);
e46de429 695 powerpc_firmware_features |= FW_FEATURE_CMO;
9ee820fa 696 pSeries_coalesce_init();
e46de429 697 } else
81f14997
RJ
698 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
699 CMO_SecPSP);
e46de429
RJ
700 spin_unlock(&rtas_data_buf_lock);
701 pr_debug(" <- fw_cmo_feature_init()\n");
702}
703
1da177e4
LT
704/*
705 * Early initialization. Relocation is on but do not reference unbolted pages
706 */
f2d57694 707static void __init pseries_init(void)
1da177e4 708{
f2d57694 709 pr_debug(" -> pseries_init()\n");
1da177e4 710
4d2bb3f5 711#ifdef CONFIG_HVC_CONSOLE
57cfb814 712 if (firmware_has_feature(FW_FEATURE_LPAR))
4d2bb3f5
BH
713 hvc_vio_init_early();
714#endif
06c88766 715 if (firmware_has_feature(FW_FEATURE_XDABR))
76032de8 716 ppc_md.set_dabr = pseries_set_xdabr;
06c88766
MN
717 else if (firmware_has_feature(FW_FEATURE_DABR))
718 ppc_md.set_dabr = pseries_set_dabr;
1da177e4 719
bf99de36
MN
720 if (firmware_has_feature(FW_FEATURE_SET_MODE))
721 ppc_md.set_dawr = pseries_set_dawr;
722
e46de429 723 pSeries_cmo_feature_init();
1da177e4
LT
724 iommu_init_early_pSeries();
725
f2d57694 726 pr_debug(" <- pseries_init()\n");
1da177e4
LT
727}
728
9178ba29
AG
729/**
730 * pseries_power_off - tell firmware about how to power off the system.
731 *
732 * This function calls either the power-off rtas token in normal cases
733 * or the ibm,power-off-ups token (if present & requested) in case of
734 * a power failure. If power-off token is used, power on will only be
735 * possible with power button press. If ibm,power-off-ups token is used
736 * it will allow auto poweron after power is restored.
737 */
738static void pseries_power_off(void)
739{
740 int rc;
741 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
742
743 if (rtas_flash_term_hook)
744 rtas_flash_term_hook(SYS_POWER_OFF);
745
746 if (rtas_poweron_auto == 0 ||
747 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
748 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
749 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
750 } else {
751 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
752 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
753 }
754 for (;;);
755}
756
e8222502
BH
757static int __init pSeries_probe(void)
758{
406b0b6a 759 const char *dtype = of_get_property(of_root, "device_type", NULL);
5773bbcd 760
e8222502
BH
761 if (dtype == NULL)
762 return 0;
763 if (strcmp(dtype, "chrp"))
1da177e4
LT
764 return 0;
765
133dda1e
AB
766 /* Cell blades firmware claims to be chrp while it's not. Until this
767 * is fixed, we need to avoid those here.
768 */
406b0b6a
BH
769 if (of_machine_is_compatible("IBM,CPBW-1.0") ||
770 of_machine_is_compatible("IBM,CBEA"))
133dda1e
AB
771 return 0;
772
9178ba29
AG
773 pm_power_off = pseries_power_off;
774
f7ebf352
ME
775 pr_debug("Machine is%s LPAR !\n",
776 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
57cfb814 777
f2d57694
BH
778 pseries_init();
779
1da177e4
LT
780 return 1;
781}
782
4267292b
PM
783static int pSeries_pci_probe_mode(struct pci_bus *bus)
784{
57cfb814 785 if (firmware_has_feature(FW_FEATURE_LPAR))
4267292b
PM
786 return PCI_PROBE_DEVTREE;
787 return PCI_PROBE_NORMAL;
788}
789
38ae9ec4
DA
790struct pci_controller_ops pseries_pci_controller_ops = {
791 .probe_mode = pSeries_pci_probe_mode,
792};
793
e8222502
BH
794define_machine(pseries) {
795 .name = "pSeries",
1da177e4
LT
796 .probe = pSeries_probe,
797 .setup_arch = pSeries_setup_arch,
e7da5dac 798 .init_IRQ = pseries_init_irq,
0dd194d0 799 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
800 .log_error = pSeries_log_error,
801 .pcibios_fixup = pSeries_final_fixup,
f4fcbbe9 802 .restart = rtas_restart,
f4fcbbe9 803 .halt = rtas_halt,
773bf9c4
AB
804 .get_boot_time = rtas_get_boot_time,
805 .get_rtc_time = rtas_get_rtc_time,
806 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 807 .calibrate_decr = generic_calibrate_decr,
6566c6f1 808 .progress = rtas_progress,
1da177e4
LT
809 .system_reset_exception = pSeries_system_reset_exception,
810 .machine_check_exception = pSeries_machine_check_exception,
da665885 811#ifdef CONFIG_KEXEC_CORE
cedddd81 812 .machine_kexec = pSeries_machine_kexec,
d739d2ca 813 .kexec_cpu_down = pseries_kexec_cpu_down,
cedddd81 814#endif
a5d86257
AB
815#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
816 .memory_block_size = pseries_memory_block_size,
817#endif
1da177e4 818};