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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
c47c1b1f | 4 | #include <asm/page.h> |
1adcaafe | 5 | #include <asm/e820.h> |
c47c1b1f | 6 | |
8d19c99f | 7 | #include <asm/pgtable_types.h> |
b2bc2731 | 8 | |
8a7b12f7 | 9 | /* |
10 | * Macro to mark a page protection value as UC- | |
11 | */ | |
d85f3334 JG |
12 | #define pgprot_noncached(prot) \ |
13 | ((boot_cpu_data.x86 > 3) \ | |
14 | ? (__pgprot(pgprot_val(prot) | \ | |
15 | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ | |
8a7b12f7 | 16 | : (prot)) |
17 | ||
4614139c | 18 | #ifndef __ASSEMBLY__ |
55a6ca25 PA |
19 | #include <asm/x86_init.h> |
20 | ||
ef6bea6d | 21 | void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); |
e1a58320 SS |
22 | void ptdump_walk_pgd_level_checkwx(void); |
23 | ||
24 | #ifdef CONFIG_DEBUG_WX | |
25 | #define debug_checkwx() ptdump_walk_pgd_level_checkwx() | |
26 | #else | |
27 | #define debug_checkwx() do { } while (0) | |
28 | #endif | |
ef6bea6d | 29 | |
8405b122 JF |
30 | /* |
31 | * ZERO_PAGE is a global shared page that is always zero: used | |
32 | * for zero-mapped memory areas etc.. | |
33 | */ | |
277d5b40 AK |
34 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
35 | __visible; | |
8405b122 JF |
36 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
37 | ||
e3ed910d JF |
38 | extern spinlock_t pgd_lock; |
39 | extern struct list_head pgd_list; | |
8405b122 | 40 | |
617d34d9 JF |
41 | extern struct mm_struct *pgd_page_get_mm(struct page *page); |
42 | ||
54321d94 JF |
43 | #ifdef CONFIG_PARAVIRT |
44 | #include <asm/paravirt.h> | |
45 | #else /* !CONFIG_PARAVIRT */ | |
46 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
47 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
2609ae6d | 48 | #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) |
54321d94 | 49 | |
54321d94 JF |
50 | #define set_pte_atomic(ptep, pte) \ |
51 | native_set_pte_atomic(ptep, pte) | |
52 | ||
53 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
54 | ||
55 | #ifndef __PAGETABLE_PUD_FOLDED | |
56 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | |
57 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
58 | #endif | |
59 | ||
60 | #ifndef set_pud | |
61 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
62 | #endif | |
63 | ||
64 | #ifndef __PAGETABLE_PMD_FOLDED | |
65 | #define pud_clear(pud) native_pud_clear(pud) | |
66 | #endif | |
67 | ||
68 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
69 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
70 | ||
71 | #define pte_update(mm, addr, ptep) do { } while (0) | |
54321d94 | 72 | |
54321d94 JF |
73 | #define pgd_val(x) native_pgd_val(x) |
74 | #define __pgd(x) native_make_pgd(x) | |
75 | ||
76 | #ifndef __PAGETABLE_PUD_FOLDED | |
77 | #define pud_val(x) native_pud_val(x) | |
78 | #define __pud(x) native_make_pud(x) | |
79 | #endif | |
80 | ||
81 | #ifndef __PAGETABLE_PMD_FOLDED | |
82 | #define pmd_val(x) native_pmd_val(x) | |
83 | #define __pmd(x) native_make_pmd(x) | |
84 | #endif | |
85 | ||
86 | #define pte_val(x) native_pte_val(x) | |
87 | #define __pte(x) native_make_pte(x) | |
88 | ||
224101ed JF |
89 | #define arch_end_context_switch(prev) do {} while(0) |
90 | ||
54321d94 JF |
91 | #endif /* CONFIG_PARAVIRT */ |
92 | ||
4614139c JF |
93 | /* |
94 | * The following only work if pte_present() is true. | |
95 | * Undefined behaviour if not.. | |
96 | */ | |
3cbaeafe JP |
97 | static inline int pte_dirty(pte_t pte) |
98 | { | |
a15af1c9 | 99 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
100 | } |
101 | ||
a927cb83 DH |
102 | |
103 | static inline u32 read_pkru(void) | |
104 | { | |
105 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
106 | return __read_pkru(); | |
107 | return 0; | |
108 | } | |
109 | ||
9e90199c XG |
110 | static inline void write_pkru(u32 pkru) |
111 | { | |
112 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
113 | __write_pkru(pkru); | |
114 | } | |
115 | ||
3cbaeafe JP |
116 | static inline int pte_young(pte_t pte) |
117 | { | |
a15af1c9 | 118 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
119 | } |
120 | ||
c164e038 KS |
121 | static inline int pmd_dirty(pmd_t pmd) |
122 | { | |
123 | return pmd_flags(pmd) & _PAGE_DIRTY; | |
124 | } | |
3cbaeafe | 125 | |
f2d6bfe9 JW |
126 | static inline int pmd_young(pmd_t pmd) |
127 | { | |
128 | return pmd_flags(pmd) & _PAGE_ACCESSED; | |
129 | } | |
130 | ||
3cbaeafe JP |
131 | static inline int pte_write(pte_t pte) |
132 | { | |
a15af1c9 | 133 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
134 | } |
135 | ||
3cbaeafe JP |
136 | static inline int pte_huge(pte_t pte) |
137 | { | |
a15af1c9 | 138 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
139 | } |
140 | ||
3cbaeafe JP |
141 | static inline int pte_global(pte_t pte) |
142 | { | |
a15af1c9 | 143 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
144 | } |
145 | ||
146 | static inline int pte_exec(pte_t pte) | |
147 | { | |
a15af1c9 | 148 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
149 | } |
150 | ||
7e675137 NP |
151 | static inline int pte_special(pte_t pte) |
152 | { | |
c819f37e | 153 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
154 | } |
155 | ||
91030ca1 HD |
156 | static inline unsigned long pte_pfn(pte_t pte) |
157 | { | |
158 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
159 | } | |
160 | ||
087975b0 AM |
161 | static inline unsigned long pmd_pfn(pmd_t pmd) |
162 | { | |
f70abb0f | 163 | return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; |
087975b0 AM |
164 | } |
165 | ||
0ee364eb MG |
166 | static inline unsigned long pud_pfn(pud_t pud) |
167 | { | |
f70abb0f | 168 | return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT; |
0ee364eb MG |
169 | } |
170 | ||
91030ca1 HD |
171 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
172 | ||
3cbaeafe JP |
173 | static inline int pmd_large(pmd_t pte) |
174 | { | |
027ef6c8 | 175 | return pmd_flags(pte) & _PAGE_PSE; |
3cbaeafe JP |
176 | } |
177 | ||
f2d6bfe9 | 178 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
f2d6bfe9 JW |
179 | static inline int pmd_trans_huge(pmd_t pmd) |
180 | { | |
5c7fb56e | 181 | return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; |
f2d6bfe9 | 182 | } |
4b7167b9 | 183 | |
fd8cfd30 | 184 | #define has_transparent_hugepage has_transparent_hugepage |
4b7167b9 AA |
185 | static inline int has_transparent_hugepage(void) |
186 | { | |
16bf9226 | 187 | return boot_cpu_has(X86_FEATURE_PSE); |
4b7167b9 | 188 | } |
5c7fb56e DW |
189 | |
190 | #ifdef __HAVE_ARCH_PTE_DEVMAP | |
191 | static inline int pmd_devmap(pmd_t pmd) | |
192 | { | |
193 | return !!(pmd_val(pmd) & _PAGE_DEVMAP); | |
194 | } | |
195 | #endif | |
f2d6bfe9 JW |
196 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
197 | ||
6522869c JF |
198 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) |
199 | { | |
200 | pteval_t v = native_pte_val(pte); | |
201 | ||
202 | return native_make_pte(v | set); | |
203 | } | |
204 | ||
205 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | |
206 | { | |
207 | pteval_t v = native_pte_val(pte); | |
208 | ||
209 | return native_make_pte(v & ~clear); | |
210 | } | |
211 | ||
3cbaeafe JP |
212 | static inline pte_t pte_mkclean(pte_t pte) |
213 | { | |
6522869c | 214 | return pte_clear_flags(pte, _PAGE_DIRTY); |
3cbaeafe JP |
215 | } |
216 | ||
217 | static inline pte_t pte_mkold(pte_t pte) | |
218 | { | |
6522869c | 219 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
220 | } |
221 | ||
222 | static inline pte_t pte_wrprotect(pte_t pte) | |
223 | { | |
6522869c | 224 | return pte_clear_flags(pte, _PAGE_RW); |
3cbaeafe JP |
225 | } |
226 | ||
227 | static inline pte_t pte_mkexec(pte_t pte) | |
228 | { | |
6522869c | 229 | return pte_clear_flags(pte, _PAGE_NX); |
3cbaeafe JP |
230 | } |
231 | ||
232 | static inline pte_t pte_mkdirty(pte_t pte) | |
233 | { | |
0f8975ec | 234 | return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
3cbaeafe JP |
235 | } |
236 | ||
237 | static inline pte_t pte_mkyoung(pte_t pte) | |
238 | { | |
6522869c | 239 | return pte_set_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
240 | } |
241 | ||
242 | static inline pte_t pte_mkwrite(pte_t pte) | |
243 | { | |
6522869c | 244 | return pte_set_flags(pte, _PAGE_RW); |
3cbaeafe JP |
245 | } |
246 | ||
247 | static inline pte_t pte_mkhuge(pte_t pte) | |
248 | { | |
6522869c | 249 | return pte_set_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
250 | } |
251 | ||
252 | static inline pte_t pte_clrhuge(pte_t pte) | |
253 | { | |
6522869c | 254 | return pte_clear_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
255 | } |
256 | ||
257 | static inline pte_t pte_mkglobal(pte_t pte) | |
258 | { | |
6522869c | 259 | return pte_set_flags(pte, _PAGE_GLOBAL); |
3cbaeafe JP |
260 | } |
261 | ||
262 | static inline pte_t pte_clrglobal(pte_t pte) | |
263 | { | |
6522869c | 264 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
3cbaeafe | 265 | } |
4614139c | 266 | |
7e675137 NP |
267 | static inline pte_t pte_mkspecial(pte_t pte) |
268 | { | |
6522869c | 269 | return pte_set_flags(pte, _PAGE_SPECIAL); |
7e675137 NP |
270 | } |
271 | ||
01c8f1c4 DW |
272 | static inline pte_t pte_mkdevmap(pte_t pte) |
273 | { | |
274 | return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); | |
275 | } | |
276 | ||
f2d6bfe9 JW |
277 | static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) |
278 | { | |
279 | pmdval_t v = native_pmd_val(pmd); | |
280 | ||
281 | return __pmd(v | set); | |
282 | } | |
283 | ||
284 | static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) | |
285 | { | |
286 | pmdval_t v = native_pmd_val(pmd); | |
287 | ||
288 | return __pmd(v & ~clear); | |
289 | } | |
290 | ||
291 | static inline pmd_t pmd_mkold(pmd_t pmd) | |
292 | { | |
293 | return pmd_clear_flags(pmd, _PAGE_ACCESSED); | |
294 | } | |
295 | ||
590a471c MK |
296 | static inline pmd_t pmd_mkclean(pmd_t pmd) |
297 | { | |
298 | return pmd_clear_flags(pmd, _PAGE_DIRTY); | |
299 | } | |
300 | ||
f2d6bfe9 JW |
301 | static inline pmd_t pmd_wrprotect(pmd_t pmd) |
302 | { | |
303 | return pmd_clear_flags(pmd, _PAGE_RW); | |
304 | } | |
305 | ||
306 | static inline pmd_t pmd_mkdirty(pmd_t pmd) | |
307 | { | |
0f8975ec | 308 | return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
f2d6bfe9 JW |
309 | } |
310 | ||
f25748e3 DW |
311 | static inline pmd_t pmd_mkdevmap(pmd_t pmd) |
312 | { | |
313 | return pmd_set_flags(pmd, _PAGE_DEVMAP); | |
314 | } | |
315 | ||
f2d6bfe9 JW |
316 | static inline pmd_t pmd_mkhuge(pmd_t pmd) |
317 | { | |
318 | return pmd_set_flags(pmd, _PAGE_PSE); | |
319 | } | |
320 | ||
321 | static inline pmd_t pmd_mkyoung(pmd_t pmd) | |
322 | { | |
323 | return pmd_set_flags(pmd, _PAGE_ACCESSED); | |
324 | } | |
325 | ||
326 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | |
327 | { | |
328 | return pmd_set_flags(pmd, _PAGE_RW); | |
329 | } | |
330 | ||
331 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
332 | { | |
21d9ee3e | 333 | return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); |
f2d6bfe9 JW |
334 | } |
335 | ||
2bf01f9f | 336 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
0f8975ec PE |
337 | static inline int pte_soft_dirty(pte_t pte) |
338 | { | |
339 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
340 | } | |
341 | ||
342 | static inline int pmd_soft_dirty(pmd_t pmd) | |
343 | { | |
344 | return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; | |
345 | } | |
346 | ||
347 | static inline pte_t pte_mksoft_dirty(pte_t pte) | |
348 | { | |
349 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
350 | } | |
351 | ||
352 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
353 | { | |
354 | return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); | |
355 | } | |
356 | ||
a7b76174 MS |
357 | static inline pte_t pte_clear_soft_dirty(pte_t pte) |
358 | { | |
359 | return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); | |
360 | } | |
361 | ||
362 | static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) | |
363 | { | |
364 | return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); | |
365 | } | |
366 | ||
2bf01f9f CG |
367 | #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ |
368 | ||
b534816b JF |
369 | /* |
370 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | |
371 | * can use those bits for other purposes, so leave them be. | |
372 | */ | |
373 | static inline pgprotval_t massage_pgprot(pgprot_t pgprot) | |
374 | { | |
375 | pgprotval_t protval = pgprot_val(pgprot); | |
376 | ||
377 | if (protval & _PAGE_PRESENT) | |
378 | protval &= __supported_pte_mask; | |
379 | ||
380 | return protval; | |
381 | } | |
382 | ||
6fdc05d4 JF |
383 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) |
384 | { | |
b534816b JF |
385 | return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | |
386 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
387 | } |
388 | ||
389 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
390 | { | |
b534816b JF |
391 | return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | |
392 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
393 | } |
394 | ||
38472311 IM |
395 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
396 | { | |
397 | pteval_t val = pte_val(pte); | |
398 | ||
399 | /* | |
400 | * Chop off the NX bit (if present), and add the NX portion of | |
401 | * the newprot (if present): | |
402 | */ | |
1c12c4cf | 403 | val &= _PAGE_CHG_MASK; |
b534816b | 404 | val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; |
38472311 IM |
405 | |
406 | return __pte(val); | |
407 | } | |
408 | ||
c489f125 JW |
409 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
410 | { | |
411 | pmdval_t val = pmd_val(pmd); | |
412 | ||
413 | val &= _HPAGE_CHG_MASK; | |
414 | val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; | |
415 | ||
416 | return __pmd(val); | |
417 | } | |
418 | ||
1c12c4cf VP |
419 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
420 | #define pgprot_modify pgprot_modify | |
421 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
422 | { | |
423 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
424 | pgprotval_t addbits = pgprot_val(newprot); | |
425 | return __pgprot(preservebits | addbits); | |
426 | } | |
427 | ||
bbac8c6d TK |
428 | #define pte_pgprot(x) __pgprot(pte_flags(x)) |
429 | #define pmd_pgprot(x) __pgprot(pmd_flags(x)) | |
430 | #define pud_pgprot(x) __pgprot(pud_flags(x)) | |
c6ca18eb | 431 | |
b534816b | 432 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
1e8e23bc | 433 | |
1adcaafe | 434 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
d85f3334 JG |
435 | enum page_cache_mode pcm, |
436 | enum page_cache_mode new_pcm) | |
afc7d20c | 437 | { |
1adcaafe | 438 | /* |
55a6ca25 | 439 | * PAT type is always WB for untracked ranges, so no need to check. |
1adcaafe | 440 | */ |
8a271389 | 441 | if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) |
1adcaafe SS |
442 | return 1; |
443 | ||
afc7d20c | 444 | /* |
445 | * Certain new memtypes are not allowed with certain | |
446 | * requested memtype: | |
447 | * - request is uncached, return cannot be write-back | |
448 | * - request is write-combine, return cannot be write-back | |
ecb2feba TK |
449 | * - request is write-through, return cannot be write-back |
450 | * - request is write-through, return cannot be write-combine | |
afc7d20c | 451 | */ |
d85f3334 JG |
452 | if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && |
453 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
454 | (pcm == _PAGE_CACHE_MODE_WC && | |
ecb2feba TK |
455 | new_pcm == _PAGE_CACHE_MODE_WB) || |
456 | (pcm == _PAGE_CACHE_MODE_WT && | |
457 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
458 | (pcm == _PAGE_CACHE_MODE_WT && | |
459 | new_pcm == _PAGE_CACHE_MODE_WC)) { | |
afc7d20c | 460 | return 0; |
461 | } | |
462 | ||
463 | return 1; | |
464 | } | |
465 | ||
458a3e64 TH |
466 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
467 | pte_t *populate_extra_pte(unsigned long vaddr); | |
4614139c JF |
468 | #endif /* __ASSEMBLY__ */ |
469 | ||
96a388de | 470 | #ifdef CONFIG_X86_32 |
a1ce3928 | 471 | # include <asm/pgtable_32.h> |
96a388de | 472 | #else |
a1ce3928 | 473 | # include <asm/pgtable_64.h> |
96a388de | 474 | #endif |
6c386655 | 475 | |
aca159db | 476 | #ifndef __ASSEMBLY__ |
f476961c | 477 | #include <linux/mm_types.h> |
fa0f281c | 478 | #include <linux/mmdebug.h> |
4cbeb51b | 479 | #include <linux/log2.h> |
aca159db | 480 | |
a034a010 JF |
481 | static inline int pte_none(pte_t pte) |
482 | { | |
483 | return !pte.pte; | |
484 | } | |
485 | ||
8de01da3 JF |
486 | #define __HAVE_ARCH_PTE_SAME |
487 | static inline int pte_same(pte_t a, pte_t b) | |
488 | { | |
489 | return a.pte == b.pte; | |
490 | } | |
491 | ||
7c683851 | 492 | static inline int pte_present(pte_t a) |
c46a7c81 MG |
493 | { |
494 | return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); | |
495 | } | |
496 | ||
3565fce3 DW |
497 | #ifdef __HAVE_ARCH_PTE_DEVMAP |
498 | static inline int pte_devmap(pte_t a) | |
499 | { | |
500 | return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; | |
501 | } | |
502 | #endif | |
503 | ||
2c3cf556 | 504 | #define pte_accessible pte_accessible |
20841405 | 505 | static inline bool pte_accessible(struct mm_struct *mm, pte_t a) |
2c3cf556 | 506 | { |
20841405 RR |
507 | if (pte_flags(a) & _PAGE_PRESENT) |
508 | return true; | |
509 | ||
21d9ee3e | 510 | if ((pte_flags(a) & _PAGE_PROTNONE) && |
20841405 RR |
511 | mm_tlb_flush_pending(mm)) |
512 | return true; | |
513 | ||
514 | return false; | |
2c3cf556 RR |
515 | } |
516 | ||
eb63657e | 517 | static inline int pte_hidden(pte_t pte) |
dfec072e | 518 | { |
eb63657e | 519 | return pte_flags(pte) & _PAGE_HIDDEN; |
dfec072e VN |
520 | } |
521 | ||
649e8ef6 JF |
522 | static inline int pmd_present(pmd_t pmd) |
523 | { | |
027ef6c8 AA |
524 | /* |
525 | * Checking for _PAGE_PSE is needed too because | |
526 | * split_huge_page will temporarily clear the present bit (but | |
527 | * the _PAGE_PSE flag will remain set at all times while the | |
528 | * _PAGE_PRESENT bit is clear). | |
529 | */ | |
21d9ee3e | 530 | return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); |
649e8ef6 JF |
531 | } |
532 | ||
e7bb4b6d MG |
533 | #ifdef CONFIG_NUMA_BALANCING |
534 | /* | |
535 | * These work without NUMA balancing but the kernel does not care. See the | |
536 | * comment in include/asm-generic/pgtable.h | |
537 | */ | |
538 | static inline int pte_protnone(pte_t pte) | |
539 | { | |
e3a1f6ca DV |
540 | return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
541 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
542 | } |
543 | ||
544 | static inline int pmd_protnone(pmd_t pmd) | |
545 | { | |
e3a1f6ca DV |
546 | return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
547 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
548 | } |
549 | #endif /* CONFIG_NUMA_BALANCING */ | |
550 | ||
4fea801a JF |
551 | static inline int pmd_none(pmd_t pmd) |
552 | { | |
553 | /* Only check low word on 32-bit platforms, since it might be | |
554 | out of sync with upper half. */ | |
26c8e317 | 555 | return (unsigned long)native_pmd_val(pmd) == 0; |
4fea801a JF |
556 | } |
557 | ||
3ffb3564 JF |
558 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
559 | { | |
f70abb0f | 560 | return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); |
3ffb3564 JF |
561 | } |
562 | ||
e5f7f202 IM |
563 | /* |
564 | * Currently stuck as a macro due to indirect forward reference to | |
565 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
566 | */ | |
f70abb0f TK |
567 | #define pmd_page(pmd) \ |
568 | pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT) | |
20063ca4 | 569 | |
e24d7eee JF |
570 | /* |
571 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | |
572 | * | |
573 | * this macro returns the index of the entry in the pmd page which would | |
574 | * control the given virtual address | |
575 | */ | |
ce0c0f9e | 576 | static inline unsigned long pmd_index(unsigned long address) |
e24d7eee JF |
577 | { |
578 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | |
579 | } | |
580 | ||
97e2817d JF |
581 | /* |
582 | * Conversion functions: convert a page and protection to a page entry, | |
583 | * and a page entry and page directory to the page they refer to. | |
584 | * | |
585 | * (Currently stuck as a macro because of indirect forward reference | |
586 | * to linux/mm.h:page_to_nid()) | |
587 | */ | |
588 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | |
589 | ||
346309cf JF |
590 | /* |
591 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | |
592 | * | |
593 | * this function returns the index of the entry in the pte page which would | |
594 | * control the given virtual address | |
595 | */ | |
ce0c0f9e | 596 | static inline unsigned long pte_index(unsigned long address) |
346309cf JF |
597 | { |
598 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); | |
599 | } | |
600 | ||
3fbc2444 JF |
601 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
602 | { | |
603 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); | |
604 | } | |
605 | ||
99510238 JF |
606 | static inline int pmd_bad(pmd_t pmd) |
607 | { | |
18a7a199 | 608 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; |
99510238 JF |
609 | } |
610 | ||
cc290ca3 JF |
611 | static inline unsigned long pages_to_mb(unsigned long npg) |
612 | { | |
613 | return npg >> (20 - PAGE_SHIFT); | |
614 | } | |
615 | ||
98233368 | 616 | #if CONFIG_PGTABLE_LEVELS > 2 |
deb79cfb JF |
617 | static inline int pud_none(pud_t pud) |
618 | { | |
26c8e317 | 619 | return native_pud_val(pud) == 0; |
deb79cfb JF |
620 | } |
621 | ||
5ba7c913 JF |
622 | static inline int pud_present(pud_t pud) |
623 | { | |
18a7a199 | 624 | return pud_flags(pud) & _PAGE_PRESENT; |
5ba7c913 | 625 | } |
6fff47e3 JF |
626 | |
627 | static inline unsigned long pud_page_vaddr(pud_t pud) | |
628 | { | |
f70abb0f | 629 | return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud)); |
6fff47e3 | 630 | } |
f476961c | 631 | |
e5f7f202 IM |
632 | /* |
633 | * Currently stuck as a macro due to indirect forward reference to | |
634 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
635 | */ | |
f70abb0f TK |
636 | #define pud_page(pud) \ |
637 | pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT) | |
01ade20d JF |
638 | |
639 | /* Find an entry in the second-level page table.. */ | |
640 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | |
641 | { | |
642 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | |
643 | } | |
3180fba0 | 644 | |
3f6cbef1 JF |
645 | static inline int pud_large(pud_t pud) |
646 | { | |
e2f5bda9 | 647 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == |
3f6cbef1 JF |
648 | (_PAGE_PSE | _PAGE_PRESENT); |
649 | } | |
a61bb29a JF |
650 | |
651 | static inline int pud_bad(pud_t pud) | |
652 | { | |
18a7a199 | 653 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; |
a61bb29a | 654 | } |
e2f5bda9 JF |
655 | #else |
656 | static inline int pud_large(pud_t pud) | |
657 | { | |
658 | return 0; | |
659 | } | |
98233368 | 660 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ |
5ba7c913 | 661 | |
98233368 | 662 | #if CONFIG_PGTABLE_LEVELS > 3 |
9f38d7e8 JF |
663 | static inline int pgd_present(pgd_t pgd) |
664 | { | |
18a7a199 | 665 | return pgd_flags(pgd) & _PAGE_PRESENT; |
9f38d7e8 | 666 | } |
c5f040b1 JF |
667 | |
668 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | |
669 | { | |
670 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | |
671 | } | |
777cba16 | 672 | |
e5f7f202 IM |
673 | /* |
674 | * Currently stuck as a macro due to indirect forward reference to | |
675 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
676 | */ | |
677 | #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) | |
7cfb8102 JF |
678 | |
679 | /* to find an entry in a page-table-directory. */ | |
ce0c0f9e | 680 | static inline unsigned long pud_index(unsigned long address) |
7cfb8102 JF |
681 | { |
682 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | |
683 | } | |
3d081b18 JF |
684 | |
685 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) | |
686 | { | |
687 | return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); | |
688 | } | |
30f10316 JF |
689 | |
690 | static inline int pgd_bad(pgd_t pgd) | |
691 | { | |
18a7a199 | 692 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; |
30f10316 | 693 | } |
7325cc2e JF |
694 | |
695 | static inline int pgd_none(pgd_t pgd) | |
696 | { | |
26c8e317 | 697 | return !native_pgd_val(pgd); |
7325cc2e | 698 | } |
98233368 | 699 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ |
9f38d7e8 | 700 | |
4614139c JF |
701 | #endif /* __ASSEMBLY__ */ |
702 | ||
fb15a9b3 JF |
703 | /* |
704 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
705 | * | |
706 | * this macro returns the index of the entry in the pgd page which would | |
707 | * control the given virtual address | |
708 | */ | |
709 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
710 | ||
711 | /* | |
712 | * pgd_offset() returns a (pgd_t *) | |
713 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
714 | */ | |
715 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
716 | /* | |
717 | * a shortcut which implies the use of the kernel's pgd, instead | |
718 | * of a process's | |
719 | */ | |
720 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
721 | ||
722 | ||
68db065c JF |
723 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
724 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
725 | ||
195466dc JF |
726 | #ifndef __ASSEMBLY__ |
727 | ||
2c1b284e | 728 | extern int direct_gbpages; |
22ddfcaa | 729 | void init_mem_mapping(void); |
8d57470d | 730 | void early_alloc_pgt_buf(void); |
2c1b284e | 731 | |
4891645e JF |
732 | /* local pte updates need not use xchg for locking */ |
733 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
734 | { | |
735 | pte_t res = *ptep; | |
736 | ||
737 | /* Pure native function needs no input for mm, addr */ | |
738 | native_pte_clear(NULL, 0, ptep); | |
739 | return res; | |
740 | } | |
741 | ||
f2d6bfe9 JW |
742 | static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) |
743 | { | |
744 | pmd_t res = *pmdp; | |
745 | ||
746 | native_pmd_clear(pmdp); | |
747 | return res; | |
748 | } | |
749 | ||
4891645e JF |
750 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, |
751 | pte_t *ptep , pte_t pte) | |
752 | { | |
753 | native_set_pte(ptep, pte); | |
754 | } | |
755 | ||
0a47de52 AA |
756 | static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, |
757 | pmd_t *pmdp , pmd_t pmd) | |
758 | { | |
759 | native_set_pmd(pmdp, pmd); | |
760 | } | |
761 | ||
195466dc JF |
762 | #ifndef CONFIG_PARAVIRT |
763 | /* | |
764 | * Rules for using pte_update - it must be called after any PTE update which | |
765 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
766 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
767 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
768 | * transitions, which means this hook should only be called for user PTEs. | |
769 | * This hook implies a P->P protection or access change has taken place, which | |
d6ccc3ec | 770 | * requires a subsequent TLB flush. |
195466dc JF |
771 | */ |
772 | #define pte_update(mm, addr, ptep) do { } while (0) | |
195466dc JF |
773 | #endif |
774 | ||
195466dc JF |
775 | /* |
776 | * We only update the dirty/accessed state if we set | |
777 | * the dirty bit by hand in the kernel, since the hardware | |
778 | * will do the accessed bit for us, and we don't want to | |
779 | * race with other CPU's that might be updating the dirty | |
780 | * bit at the same time. | |
781 | */ | |
bea41808 JF |
782 | struct vm_area_struct; |
783 | ||
195466dc | 784 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
785 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
786 | unsigned long address, pte_t *ptep, | |
787 | pte_t entry, int dirty); | |
195466dc JF |
788 | |
789 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
790 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
791 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
792 | |
793 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
794 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
795 | unsigned long address, pte_t *ptep); | |
195466dc JF |
796 | |
797 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
798 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
799 | pte_t *ptep) | |
195466dc JF |
800 | { |
801 | pte_t pte = native_ptep_get_and_clear(ptep); | |
802 | pte_update(mm, addr, ptep); | |
803 | return pte; | |
804 | } | |
805 | ||
806 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
807 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
808 | unsigned long addr, pte_t *ptep, | |
809 | int full) | |
195466dc JF |
810 | { |
811 | pte_t pte; | |
812 | if (full) { | |
813 | /* | |
814 | * Full address destruction in progress; paravirt does not | |
815 | * care about updates and native needs no locking | |
816 | */ | |
817 | pte = native_local_ptep_get_and_clear(ptep); | |
818 | } else { | |
819 | pte = ptep_get_and_clear(mm, addr, ptep); | |
820 | } | |
821 | return pte; | |
822 | } | |
823 | ||
824 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
825 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
826 | unsigned long addr, pte_t *ptep) | |
195466dc | 827 | { |
d8d89827 | 828 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
829 | pte_update(mm, addr, ptep); |
830 | } | |
831 | ||
2ac13462 | 832 | #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) |
61c77326 | 833 | |
f2d6bfe9 JW |
834 | #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) |
835 | ||
836 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
837 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
838 | unsigned long address, pmd_t *pmdp, | |
839 | pmd_t entry, int dirty); | |
840 | ||
841 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
842 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
843 | unsigned long addr, pmd_t *pmdp); | |
844 | ||
845 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
846 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
847 | unsigned long address, pmd_t *pmdp); | |
848 | ||
849 | ||
f2d6bfe9 JW |
850 | #define __HAVE_ARCH_PMD_WRITE |
851 | static inline int pmd_write(pmd_t pmd) | |
852 | { | |
853 | return pmd_flags(pmd) & _PAGE_RW; | |
854 | } | |
855 | ||
8809aa2d AK |
856 | #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR |
857 | static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, | |
f2d6bfe9 JW |
858 | pmd_t *pmdp) |
859 | { | |
d6ccc3ec | 860 | return native_pmdp_get_and_clear(pmdp); |
f2d6bfe9 JW |
861 | } |
862 | ||
863 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT | |
864 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
865 | unsigned long addr, pmd_t *pmdp) | |
866 | { | |
867 | clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); | |
f2d6bfe9 JW |
868 | } |
869 | ||
85958b46 JF |
870 | /* |
871 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
872 | * | |
873 | * dst - pointer to pgd range anwhere on a pgd page | |
874 | * src - "" | |
875 | * count - the number of pgds to copy. | |
876 | * | |
877 | * dst and src can be on the same page, but the range must not overlap, | |
878 | * and must not cross a page boundary. | |
879 | */ | |
880 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
881 | { | |
882 | memcpy(dst, src, count * sizeof(pgd_t)); | |
883 | } | |
884 | ||
4cbeb51b DH |
885 | #define PTE_SHIFT ilog2(PTRS_PER_PTE) |
886 | static inline int page_level_shift(enum pg_level level) | |
887 | { | |
888 | return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; | |
889 | } | |
890 | static inline unsigned long page_level_size(enum pg_level level) | |
891 | { | |
892 | return 1UL << page_level_shift(level); | |
893 | } | |
894 | static inline unsigned long page_level_mask(enum pg_level level) | |
895 | { | |
896 | return ~(page_level_size(level) - 1); | |
897 | } | |
85958b46 | 898 | |
602e0186 KS |
899 | /* |
900 | * The x86 doesn't have any external MMU info: the kernel page | |
901 | * tables contain all the necessary information. | |
902 | */ | |
903 | static inline void update_mmu_cache(struct vm_area_struct *vma, | |
904 | unsigned long addr, pte_t *ptep) | |
905 | { | |
906 | } | |
907 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | |
908 | unsigned long addr, pmd_t *pmd) | |
909 | { | |
910 | } | |
85958b46 | 911 | |
2bf01f9f | 912 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
fa0f281c CG |
913 | static inline pte_t pte_swp_mksoft_dirty(pte_t pte) |
914 | { | |
fa0f281c CG |
915 | return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
916 | } | |
917 | ||
918 | static inline int pte_swp_soft_dirty(pte_t pte) | |
919 | { | |
fa0f281c CG |
920 | return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; |
921 | } | |
922 | ||
923 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | |
924 | { | |
fa0f281c CG |
925 | return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
926 | } | |
2bf01f9f | 927 | #endif |
fa0f281c | 928 | |
33a709b2 DH |
929 | #define PKRU_AD_BIT 0x1 |
930 | #define PKRU_WD_BIT 0x2 | |
84594296 | 931 | #define PKRU_BITS_PER_PKEY 2 |
33a709b2 DH |
932 | |
933 | static inline bool __pkru_allows_read(u32 pkru, u16 pkey) | |
934 | { | |
84594296 | 935 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
936 | return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits)); |
937 | } | |
938 | ||
939 | static inline bool __pkru_allows_write(u32 pkru, u16 pkey) | |
940 | { | |
84594296 | 941 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
942 | /* |
943 | * Access-disable disables writes too so we need to check | |
944 | * both bits here. | |
945 | */ | |
946 | return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits)); | |
947 | } | |
948 | ||
949 | static inline u16 pte_flags_pkey(unsigned long pte_flags) | |
950 | { | |
951 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS | |
952 | /* ifdef to avoid doing 59-bit shift on 32-bit values */ | |
953 | return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; | |
954 | #else | |
955 | return 0; | |
956 | #endif | |
957 | } | |
958 | ||
195466dc JF |
959 | #include <asm-generic/pgtable.h> |
960 | #endif /* __ASSEMBLY__ */ | |
961 | ||
1965aae3 | 962 | #endif /* _ASM_X86_PGTABLE_H */ |