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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
da34e65c | 17 | #include "qapi/error.h" |
33c11879 PB |
18 | #include "qemu-common.h" |
19 | #include "cpu.h" | |
022c62cb PB |
20 | #include "exec/memory.h" |
21 | #include "exec/address-spaces.h" | |
22 | #include "exec/ioport.h" | |
409ddd01 | 23 | #include "qapi/visitor.h" |
1de7afc9 | 24 | #include "qemu/bitops.h" |
8c56c1a5 | 25 | #include "qemu/error-report.h" |
2c9b15ca | 26 | #include "qom/object.h" |
55d5d048 | 27 | #include "trace.h" |
093bc2cd | 28 | |
022c62cb | 29 | #include "exec/memory-internal.h" |
220c3ebd | 30 | #include "exec/ram_addr.h" |
8c56c1a5 | 31 | #include "sysemu/kvm.h" |
e1c57ab8 | 32 | #include "sysemu/sysemu.h" |
67d95c15 | 33 | |
d197063f PB |
34 | //#define DEBUG_UNASSIGNED |
35 | ||
22bde714 JK |
36 | static unsigned memory_region_transaction_depth; |
37 | static bool memory_region_update_pending; | |
4dc56152 | 38 | static bool ioeventfd_update_pending; |
7664e80c AK |
39 | static bool global_dirty_log = false; |
40 | ||
72e22d2f AK |
41 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
42 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 43 | |
0d673e36 AK |
44 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
45 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
46 | ||
093bc2cd AK |
47 | typedef struct AddrRange AddrRange; |
48 | ||
8417cebf | 49 | /* |
c9cdaa3a | 50 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
51 | * (large MemoryRegion::alias_offset). |
52 | */ | |
093bc2cd | 53 | struct AddrRange { |
08dafab4 AK |
54 | Int128 start; |
55 | Int128 size; | |
093bc2cd AK |
56 | }; |
57 | ||
08dafab4 | 58 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
59 | { |
60 | return (AddrRange) { start, size }; | |
61 | } | |
62 | ||
63 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
64 | { | |
08dafab4 | 65 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
66 | } |
67 | ||
08dafab4 | 68 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 69 | { |
08dafab4 | 70 | return int128_add(r.start, r.size); |
093bc2cd AK |
71 | } |
72 | ||
08dafab4 | 73 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 74 | { |
08dafab4 | 75 | int128_addto(&range.start, delta); |
093bc2cd AK |
76 | return range; |
77 | } | |
78 | ||
08dafab4 AK |
79 | static bool addrrange_contains(AddrRange range, Int128 addr) |
80 | { | |
81 | return int128_ge(addr, range.start) | |
82 | && int128_lt(addr, addrrange_end(range)); | |
83 | } | |
84 | ||
093bc2cd AK |
85 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
86 | { | |
08dafab4 AK |
87 | return addrrange_contains(r1, r2.start) |
88 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
89 | } |
90 | ||
91 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
92 | { | |
08dafab4 AK |
93 | Int128 start = int128_max(r1.start, r2.start); |
94 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
95 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
96 | } |
97 | ||
0e0d36b4 AK |
98 | enum ListenerDirection { Forward, Reverse }; |
99 | ||
7376e582 AK |
100 | static bool memory_listener_match(MemoryListener *listener, |
101 | MemoryRegionSection *section) | |
102 | { | |
103 | return !listener->address_space_filter | |
104 | || listener->address_space_filter == section->address_space; | |
105 | } | |
106 | ||
107 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ | |
0e0d36b4 AK |
108 | do { \ |
109 | MemoryListener *_listener; \ | |
110 | \ | |
111 | switch (_direction) { \ | |
112 | case Forward: \ | |
113 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
114 | if (_listener->_callback) { \ |
115 | _listener->_callback(_listener, ##_args); \ | |
116 | } \ | |
0e0d36b4 AK |
117 | } \ |
118 | break; \ | |
119 | case Reverse: \ | |
120 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
121 | memory_listeners, link) { \ | |
975aefe0 AK |
122 | if (_listener->_callback) { \ |
123 | _listener->_callback(_listener, ##_args); \ | |
124 | } \ | |
0e0d36b4 AK |
125 | } \ |
126 | break; \ | |
127 | default: \ | |
128 | abort(); \ | |
129 | } \ | |
130 | } while (0) | |
131 | ||
7376e582 AK |
132 | #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \ |
133 | do { \ | |
134 | MemoryListener *_listener; \ | |
135 | \ | |
136 | switch (_direction) { \ | |
137 | case Forward: \ | |
138 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
139 | if (_listener->_callback \ |
140 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
141 | _listener->_callback(_listener, _section, ##_args); \ |
142 | } \ | |
143 | } \ | |
144 | break; \ | |
145 | case Reverse: \ | |
146 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
147 | memory_listeners, link) { \ | |
975aefe0 AK |
148 | if (_listener->_callback \ |
149 | && memory_listener_match(_listener, _section)) { \ | |
7376e582 AK |
150 | _listener->_callback(_listener, _section, ##_args); \ |
151 | } \ | |
152 | } \ | |
153 | break; \ | |
154 | default: \ | |
155 | abort(); \ | |
156 | } \ | |
157 | } while (0) | |
158 | ||
dfde4e6e | 159 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 160 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
7376e582 | 161 | MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
0e0d36b4 | 162 | .mr = (fr)->mr, \ |
f6790af6 | 163 | .address_space = (as), \ |
0e0d36b4 | 164 | .offset_within_region = (fr)->offset_in_region, \ |
052e87b0 | 165 | .size = (fr)->addr.size, \ |
0e0d36b4 | 166 | .offset_within_address_space = int128_get64((fr)->addr.start), \ |
7a8499e8 | 167 | .readonly = (fr)->readonly, \ |
b2dfd71c | 168 | }), ##_args) |
0e0d36b4 | 169 | |
093bc2cd AK |
170 | struct CoalescedMemoryRange { |
171 | AddrRange addr; | |
172 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
173 | }; | |
174 | ||
3e9d69e7 AK |
175 | struct MemoryRegionIoeventfd { |
176 | AddrRange addr; | |
177 | bool match_data; | |
178 | uint64_t data; | |
753d5e14 | 179 | EventNotifier *e; |
3e9d69e7 AK |
180 | }; |
181 | ||
182 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
183 | MemoryRegionIoeventfd b) | |
184 | { | |
08dafab4 | 185 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 186 | return true; |
08dafab4 | 187 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 188 | return false; |
08dafab4 | 189 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 190 | return true; |
08dafab4 | 191 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
192 | return false; |
193 | } else if (a.match_data < b.match_data) { | |
194 | return true; | |
195 | } else if (a.match_data > b.match_data) { | |
196 | return false; | |
197 | } else if (a.match_data) { | |
198 | if (a.data < b.data) { | |
199 | return true; | |
200 | } else if (a.data > b.data) { | |
201 | return false; | |
202 | } | |
203 | } | |
753d5e14 | 204 | if (a.e < b.e) { |
3e9d69e7 | 205 | return true; |
753d5e14 | 206 | } else if (a.e > b.e) { |
3e9d69e7 AK |
207 | return false; |
208 | } | |
209 | return false; | |
210 | } | |
211 | ||
212 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
213 | MemoryRegionIoeventfd b) | |
214 | { | |
215 | return !memory_region_ioeventfd_before(a, b) | |
216 | && !memory_region_ioeventfd_before(b, a); | |
217 | } | |
218 | ||
093bc2cd AK |
219 | typedef struct FlatRange FlatRange; |
220 | typedef struct FlatView FlatView; | |
221 | ||
222 | /* Range of memory in the global map. Addresses are absolute. */ | |
223 | struct FlatRange { | |
224 | MemoryRegion *mr; | |
a8170e5e | 225 | hwaddr offset_in_region; |
093bc2cd | 226 | AddrRange addr; |
5a583347 | 227 | uint8_t dirty_log_mask; |
b138e654 | 228 | bool romd_mode; |
fb1cd6f9 | 229 | bool readonly; |
093bc2cd AK |
230 | }; |
231 | ||
232 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
233 | * order. | |
234 | */ | |
235 | struct FlatView { | |
374f2981 | 236 | struct rcu_head rcu; |
856d7245 | 237 | unsigned ref; |
093bc2cd AK |
238 | FlatRange *ranges; |
239 | unsigned nr; | |
240 | unsigned nr_allocated; | |
241 | }; | |
242 | ||
cc31e6e7 AK |
243 | typedef struct AddressSpaceOps AddressSpaceOps; |
244 | ||
093bc2cd AK |
245 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
246 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
247 | ||
093bc2cd AK |
248 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
249 | { | |
250 | return a->mr == b->mr | |
251 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 252 | && a->offset_in_region == b->offset_in_region |
b138e654 | 253 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 254 | && a->readonly == b->readonly; |
093bc2cd AK |
255 | } |
256 | ||
257 | static void flatview_init(FlatView *view) | |
258 | { | |
856d7245 | 259 | view->ref = 1; |
093bc2cd AK |
260 | view->ranges = NULL; |
261 | view->nr = 0; | |
262 | view->nr_allocated = 0; | |
263 | } | |
264 | ||
265 | /* Insert a range into a given position. Caller is responsible for maintaining | |
266 | * sorting order. | |
267 | */ | |
268 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
269 | { | |
270 | if (view->nr == view->nr_allocated) { | |
271 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 272 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
273 | view->nr_allocated * sizeof(*view->ranges)); |
274 | } | |
275 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
276 | (view->nr - pos) * sizeof(FlatRange)); | |
277 | view->ranges[pos] = *range; | |
dfde4e6e | 278 | memory_region_ref(range->mr); |
093bc2cd AK |
279 | ++view->nr; |
280 | } | |
281 | ||
282 | static void flatview_destroy(FlatView *view) | |
283 | { | |
dfde4e6e PB |
284 | int i; |
285 | ||
286 | for (i = 0; i < view->nr; i++) { | |
287 | memory_region_unref(view->ranges[i].mr); | |
288 | } | |
7267c094 | 289 | g_free(view->ranges); |
a9a0c06d | 290 | g_free(view); |
093bc2cd AK |
291 | } |
292 | ||
856d7245 PB |
293 | static void flatview_ref(FlatView *view) |
294 | { | |
295 | atomic_inc(&view->ref); | |
296 | } | |
297 | ||
298 | static void flatview_unref(FlatView *view) | |
299 | { | |
300 | if (atomic_fetch_dec(&view->ref) == 1) { | |
301 | flatview_destroy(view); | |
302 | } | |
303 | } | |
304 | ||
3d8e6bf9 AK |
305 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
306 | { | |
08dafab4 | 307 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 308 | && r1->mr == r2->mr |
08dafab4 AK |
309 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
310 | r1->addr.size), | |
311 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 312 | && r1->dirty_log_mask == r2->dirty_log_mask |
b138e654 | 313 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 314 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
315 | } |
316 | ||
8508e024 | 317 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
318 | static void flatview_simplify(FlatView *view) |
319 | { | |
320 | unsigned i, j; | |
321 | ||
322 | i = 0; | |
323 | while (i < view->nr) { | |
324 | j = i + 1; | |
325 | while (j < view->nr | |
326 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 327 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
328 | ++j; |
329 | } | |
330 | ++i; | |
331 | memmove(&view->ranges[i], &view->ranges[j], | |
332 | (view->nr - j) * sizeof(view->ranges[j])); | |
333 | view->nr -= j - i; | |
334 | } | |
335 | } | |
336 | ||
e7342aa3 PB |
337 | static bool memory_region_big_endian(MemoryRegion *mr) |
338 | { | |
339 | #ifdef TARGET_WORDS_BIGENDIAN | |
340 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
341 | #else | |
342 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
343 | #endif | |
344 | } | |
345 | ||
e11ef3d1 PB |
346 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
347 | { | |
348 | #ifdef TARGET_WORDS_BIGENDIAN | |
349 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
350 | #else | |
351 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
352 | #endif | |
353 | } | |
354 | ||
355 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
356 | { | |
357 | if (memory_region_wrong_endianness(mr)) { | |
358 | switch (size) { | |
359 | case 1: | |
360 | break; | |
361 | case 2: | |
362 | *data = bswap16(*data); | |
363 | break; | |
364 | case 4: | |
365 | *data = bswap32(*data); | |
366 | break; | |
367 | case 8: | |
368 | *data = bswap64(*data); | |
369 | break; | |
370 | default: | |
371 | abort(); | |
372 | } | |
373 | } | |
374 | } | |
375 | ||
4779dc1d HB |
376 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
377 | { | |
378 | MemoryRegion *root; | |
379 | hwaddr abs_addr = offset; | |
380 | ||
381 | abs_addr += mr->addr; | |
382 | for (root = mr; root->container; ) { | |
383 | root = root->container; | |
384 | abs_addr += root->addr; | |
385 | } | |
386 | ||
387 | return abs_addr; | |
388 | } | |
389 | ||
5a68be94 HB |
390 | static int get_cpu_index(void) |
391 | { | |
392 | if (current_cpu) { | |
393 | return current_cpu->cpu_index; | |
394 | } | |
395 | return -1; | |
396 | } | |
397 | ||
cc05c43a PM |
398 | static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
399 | hwaddr addr, | |
400 | uint64_t *value, | |
401 | unsigned size, | |
402 | unsigned shift, | |
403 | uint64_t mask, | |
404 | MemTxAttrs attrs) | |
405 | { | |
406 | uint64_t tmp; | |
407 | ||
408 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
23d92d68 | 409 | if (mr->subpage) { |
5a68be94 | 410 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
411 | } else if (mr == &io_mem_notdirty) { |
412 | /* Accesses to code which has previously been translated into a TB show | |
413 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
414 | * MemoryRegion. */ | |
415 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
416 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
417 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 418 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 419 | } |
cc05c43a PM |
420 | *value |= (tmp & mask) << shift; |
421 | return MEMTX_OK; | |
422 | } | |
423 | ||
424 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, | |
ce5d2f33 PB |
425 | hwaddr addr, |
426 | uint64_t *value, | |
427 | unsigned size, | |
428 | unsigned shift, | |
cc05c43a PM |
429 | uint64_t mask, |
430 | MemTxAttrs attrs) | |
ce5d2f33 | 431 | { |
ce5d2f33 PB |
432 | uint64_t tmp; |
433 | ||
cc05c43a | 434 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 435 | if (mr->subpage) { |
5a68be94 | 436 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
437 | } else if (mr == &io_mem_notdirty) { |
438 | /* Accesses to code which has previously been translated into a TB show | |
439 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
440 | * MemoryRegion. */ | |
441 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
442 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
443 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 444 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 445 | } |
ce5d2f33 | 446 | *value |= (tmp & mask) << shift; |
cc05c43a | 447 | return MEMTX_OK; |
ce5d2f33 PB |
448 | } |
449 | ||
cc05c43a PM |
450 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
451 | hwaddr addr, | |
452 | uint64_t *value, | |
453 | unsigned size, | |
454 | unsigned shift, | |
455 | uint64_t mask, | |
456 | MemTxAttrs attrs) | |
164a4dcd | 457 | { |
cc05c43a PM |
458 | uint64_t tmp = 0; |
459 | MemTxResult r; | |
164a4dcd | 460 | |
cc05c43a | 461 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 462 | if (mr->subpage) { |
5a68be94 | 463 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
464 | } else if (mr == &io_mem_notdirty) { |
465 | /* Accesses to code which has previously been translated into a TB show | |
466 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
467 | * MemoryRegion. */ | |
468 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
469 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
470 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 471 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 472 | } |
164a4dcd | 473 | *value |= (tmp & mask) << shift; |
cc05c43a | 474 | return r; |
164a4dcd AK |
475 | } |
476 | ||
cc05c43a PM |
477 | static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
478 | hwaddr addr, | |
479 | uint64_t *value, | |
480 | unsigned size, | |
481 | unsigned shift, | |
482 | uint64_t mask, | |
483 | MemTxAttrs attrs) | |
ce5d2f33 | 484 | { |
ce5d2f33 PB |
485 | uint64_t tmp; |
486 | ||
487 | tmp = (*value >> shift) & mask; | |
23d92d68 | 488 | if (mr->subpage) { |
5a68be94 | 489 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
490 | } else if (mr == &io_mem_notdirty) { |
491 | /* Accesses to code which has previously been translated into a TB show | |
492 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
493 | * MemoryRegion. */ | |
494 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
495 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
496 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 497 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 498 | } |
ce5d2f33 | 499 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
cc05c43a | 500 | return MEMTX_OK; |
ce5d2f33 PB |
501 | } |
502 | ||
cc05c43a PM |
503 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
504 | hwaddr addr, | |
505 | uint64_t *value, | |
506 | unsigned size, | |
507 | unsigned shift, | |
508 | uint64_t mask, | |
509 | MemTxAttrs attrs) | |
164a4dcd | 510 | { |
164a4dcd AK |
511 | uint64_t tmp; |
512 | ||
513 | tmp = (*value >> shift) & mask; | |
23d92d68 | 514 | if (mr->subpage) { |
5a68be94 | 515 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
516 | } else if (mr == &io_mem_notdirty) { |
517 | /* Accesses to code which has previously been translated into a TB show | |
518 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
519 | * MemoryRegion. */ | |
520 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
521 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
522 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 523 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 524 | } |
164a4dcd | 525 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 526 | return MEMTX_OK; |
164a4dcd AK |
527 | } |
528 | ||
cc05c43a PM |
529 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
530 | hwaddr addr, | |
531 | uint64_t *value, | |
532 | unsigned size, | |
533 | unsigned shift, | |
534 | uint64_t mask, | |
535 | MemTxAttrs attrs) | |
536 | { | |
537 | uint64_t tmp; | |
538 | ||
cc05c43a | 539 | tmp = (*value >> shift) & mask; |
23d92d68 | 540 | if (mr->subpage) { |
5a68be94 | 541 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
542 | } else if (mr == &io_mem_notdirty) { |
543 | /* Accesses to code which has previously been translated into a TB show | |
544 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
545 | * MemoryRegion. */ | |
546 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
547 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
548 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 549 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 550 | } |
cc05c43a PM |
551 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
552 | } | |
553 | ||
554 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
555 | uint64_t *value, |
556 | unsigned size, | |
557 | unsigned access_size_min, | |
558 | unsigned access_size_max, | |
cc05c43a PM |
559 | MemTxResult (*access)(MemoryRegion *mr, |
560 | hwaddr addr, | |
561 | uint64_t *value, | |
562 | unsigned size, | |
563 | unsigned shift, | |
564 | uint64_t mask, | |
565 | MemTxAttrs attrs), | |
566 | MemoryRegion *mr, | |
567 | MemTxAttrs attrs) | |
164a4dcd AK |
568 | { |
569 | uint64_t access_mask; | |
570 | unsigned access_size; | |
571 | unsigned i; | |
cc05c43a | 572 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
573 | |
574 | if (!access_size_min) { | |
575 | access_size_min = 1; | |
576 | } | |
577 | if (!access_size_max) { | |
578 | access_size_max = 4; | |
579 | } | |
ce5d2f33 PB |
580 | |
581 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
582 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
583 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
584 | if (memory_region_big_endian(mr)) { |
585 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
586 | r |= access(mr, addr + i, value, access_size, |
587 | (size - access_size - i) * 8, access_mask, attrs); | |
e7342aa3 PB |
588 | } |
589 | } else { | |
590 | for (i = 0; i < size; i += access_size) { | |
cc05c43a PM |
591 | r |= access(mr, addr + i, value, access_size, i * 8, |
592 | access_mask, attrs); | |
e7342aa3 | 593 | } |
164a4dcd | 594 | } |
cc05c43a | 595 | return r; |
164a4dcd AK |
596 | } |
597 | ||
e2177955 AK |
598 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
599 | { | |
0d673e36 AK |
600 | AddressSpace *as; |
601 | ||
feca4ac1 PB |
602 | while (mr->container) { |
603 | mr = mr->container; | |
e2177955 | 604 | } |
0d673e36 AK |
605 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
606 | if (mr == as->root) { | |
607 | return as; | |
608 | } | |
e2177955 | 609 | } |
eed2bacf | 610 | return NULL; |
e2177955 AK |
611 | } |
612 | ||
093bc2cd AK |
613 | /* Render a memory region into the global view. Ranges in @view obscure |
614 | * ranges in @mr. | |
615 | */ | |
616 | static void render_memory_region(FlatView *view, | |
617 | MemoryRegion *mr, | |
08dafab4 | 618 | Int128 base, |
fb1cd6f9 AK |
619 | AddrRange clip, |
620 | bool readonly) | |
093bc2cd AK |
621 | { |
622 | MemoryRegion *subregion; | |
623 | unsigned i; | |
a8170e5e | 624 | hwaddr offset_in_region; |
08dafab4 AK |
625 | Int128 remain; |
626 | Int128 now; | |
093bc2cd AK |
627 | FlatRange fr; |
628 | AddrRange tmp; | |
629 | ||
6bba19ba AK |
630 | if (!mr->enabled) { |
631 | return; | |
632 | } | |
633 | ||
08dafab4 | 634 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 635 | readonly |= mr->readonly; |
093bc2cd AK |
636 | |
637 | tmp = addrrange_make(base, mr->size); | |
638 | ||
639 | if (!addrrange_intersects(tmp, clip)) { | |
640 | return; | |
641 | } | |
642 | ||
643 | clip = addrrange_intersection(tmp, clip); | |
644 | ||
645 | if (mr->alias) { | |
08dafab4 AK |
646 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
647 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 648 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
649 | return; |
650 | } | |
651 | ||
652 | /* Render subregions in priority order. */ | |
653 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 654 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
655 | } |
656 | ||
14a3c10a | 657 | if (!mr->terminates) { |
093bc2cd AK |
658 | return; |
659 | } | |
660 | ||
08dafab4 | 661 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
662 | base = clip.start; |
663 | remain = clip.size; | |
664 | ||
2eb74e1a | 665 | fr.mr = mr; |
6f6a5ef3 | 666 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
b138e654 | 667 | fr.romd_mode = mr->romd_mode; |
2eb74e1a PC |
668 | fr.readonly = readonly; |
669 | ||
093bc2cd | 670 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
671 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
672 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
673 | continue; |
674 | } | |
08dafab4 AK |
675 | if (int128_lt(base, view->ranges[i].addr.start)) { |
676 | now = int128_min(remain, | |
677 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
678 | fr.offset_in_region = offset_in_region; |
679 | fr.addr = addrrange_make(base, now); | |
680 | flatview_insert(view, i, &fr); | |
681 | ++i; | |
08dafab4 AK |
682 | int128_addto(&base, now); |
683 | offset_in_region += int128_get64(now); | |
684 | int128_subfrom(&remain, now); | |
093bc2cd | 685 | } |
d26a8cae AK |
686 | now = int128_sub(int128_min(int128_add(base, remain), |
687 | addrrange_end(view->ranges[i].addr)), | |
688 | base); | |
689 | int128_addto(&base, now); | |
690 | offset_in_region += int128_get64(now); | |
691 | int128_subfrom(&remain, now); | |
093bc2cd | 692 | } |
08dafab4 | 693 | if (int128_nz(remain)) { |
093bc2cd AK |
694 | fr.offset_in_region = offset_in_region; |
695 | fr.addr = addrrange_make(base, remain); | |
696 | flatview_insert(view, i, &fr); | |
697 | } | |
698 | } | |
699 | ||
700 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 701 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 702 | { |
a9a0c06d | 703 | FlatView *view; |
093bc2cd | 704 | |
a9a0c06d PB |
705 | view = g_new(FlatView, 1); |
706 | flatview_init(view); | |
093bc2cd | 707 | |
83f3c251 | 708 | if (mr) { |
a9a0c06d | 709 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
710 | addrrange_make(int128_zero(), int128_2_64()), false); |
711 | } | |
a9a0c06d | 712 | flatview_simplify(view); |
093bc2cd AK |
713 | |
714 | return view; | |
715 | } | |
716 | ||
3e9d69e7 AK |
717 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
718 | MemoryRegionIoeventfd *fds_new, | |
719 | unsigned fds_new_nb, | |
720 | MemoryRegionIoeventfd *fds_old, | |
721 | unsigned fds_old_nb) | |
722 | { | |
723 | unsigned iold, inew; | |
80a1ea37 AK |
724 | MemoryRegionIoeventfd *fd; |
725 | MemoryRegionSection section; | |
3e9d69e7 AK |
726 | |
727 | /* Generate a symmetric difference of the old and new fd sets, adding | |
728 | * and deleting as necessary. | |
729 | */ | |
730 | ||
731 | iold = inew = 0; | |
732 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
733 | if (iold < fds_old_nb | |
734 | && (inew == fds_new_nb | |
735 | || memory_region_ioeventfd_before(fds_old[iold], | |
736 | fds_new[inew]))) { | |
80a1ea37 AK |
737 | fd = &fds_old[iold]; |
738 | section = (MemoryRegionSection) { | |
f6790af6 | 739 | .address_space = as, |
80a1ea37 | 740 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 741 | .size = fd->addr.size, |
80a1ea37 AK |
742 | }; |
743 | MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, | |
753d5e14 | 744 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
745 | ++iold; |
746 | } else if (inew < fds_new_nb | |
747 | && (iold == fds_old_nb | |
748 | || memory_region_ioeventfd_before(fds_new[inew], | |
749 | fds_old[iold]))) { | |
80a1ea37 AK |
750 | fd = &fds_new[inew]; |
751 | section = (MemoryRegionSection) { | |
f6790af6 | 752 | .address_space = as, |
80a1ea37 | 753 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 754 | .size = fd->addr.size, |
80a1ea37 AK |
755 | }; |
756 | MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, | |
753d5e14 | 757 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
758 | ++inew; |
759 | } else { | |
760 | ++iold; | |
761 | ++inew; | |
762 | } | |
763 | } | |
764 | } | |
765 | ||
856d7245 PB |
766 | static FlatView *address_space_get_flatview(AddressSpace *as) |
767 | { | |
768 | FlatView *view; | |
769 | ||
374f2981 PB |
770 | rcu_read_lock(); |
771 | view = atomic_rcu_read(&as->current_map); | |
856d7245 | 772 | flatview_ref(view); |
374f2981 | 773 | rcu_read_unlock(); |
856d7245 PB |
774 | return view; |
775 | } | |
776 | ||
3e9d69e7 AK |
777 | static void address_space_update_ioeventfds(AddressSpace *as) |
778 | { | |
99e86347 | 779 | FlatView *view; |
3e9d69e7 AK |
780 | FlatRange *fr; |
781 | unsigned ioeventfd_nb = 0; | |
782 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
783 | AddrRange tmp; | |
784 | unsigned i; | |
785 | ||
856d7245 | 786 | view = address_space_get_flatview(as); |
99e86347 | 787 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
788 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
789 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
790 | int128_sub(fr->addr.start, |
791 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
792 | if (addrrange_intersects(fr->addr, tmp)) { |
793 | ++ioeventfd_nb; | |
7267c094 | 794 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
795 | ioeventfd_nb * sizeof(*ioeventfds)); |
796 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
797 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
798 | } | |
799 | } | |
800 | } | |
801 | ||
802 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
803 | as->ioeventfds, as->ioeventfd_nb); | |
804 | ||
7267c094 | 805 | g_free(as->ioeventfds); |
3e9d69e7 AK |
806 | as->ioeventfds = ioeventfds; |
807 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 808 | flatview_unref(view); |
3e9d69e7 AK |
809 | } |
810 | ||
b8af1afb | 811 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
812 | const FlatView *old_view, |
813 | const FlatView *new_view, | |
b8af1afb | 814 | bool adding) |
093bc2cd | 815 | { |
093bc2cd AK |
816 | unsigned iold, inew; |
817 | FlatRange *frold, *frnew; | |
093bc2cd AK |
818 | |
819 | /* Generate a symmetric difference of the old and new memory maps. | |
820 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
821 | */ | |
822 | iold = inew = 0; | |
a9a0c06d PB |
823 | while (iold < old_view->nr || inew < new_view->nr) { |
824 | if (iold < old_view->nr) { | |
825 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
826 | } else { |
827 | frold = NULL; | |
828 | } | |
a9a0c06d PB |
829 | if (inew < new_view->nr) { |
830 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
831 | } else { |
832 | frnew = NULL; | |
833 | } | |
834 | ||
835 | if (frold | |
836 | && (!frnew | |
08dafab4 AK |
837 | || int128_lt(frold->addr.start, frnew->addr.start) |
838 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 839 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 840 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 841 | |
b8af1afb | 842 | if (!adding) { |
72e22d2f | 843 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
844 | } |
845 | ||
093bc2cd AK |
846 | ++iold; |
847 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 848 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 849 | |
b8af1afb | 850 | if (adding) { |
50c1e149 | 851 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
852 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
853 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
854 | frold->dirty_log_mask, | |
855 | frnew->dirty_log_mask); | |
856 | } | |
857 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
858 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
859 | frold->dirty_log_mask, | |
860 | frnew->dirty_log_mask); | |
b8af1afb | 861 | } |
5a583347 AK |
862 | } |
863 | ||
093bc2cd AK |
864 | ++iold; |
865 | ++inew; | |
093bc2cd AK |
866 | } else { |
867 | /* In new */ | |
868 | ||
b8af1afb | 869 | if (adding) { |
72e22d2f | 870 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
871 | } |
872 | ||
093bc2cd AK |
873 | ++inew; |
874 | } | |
875 | } | |
b8af1afb AK |
876 | } |
877 | ||
878 | ||
879 | static void address_space_update_topology(AddressSpace *as) | |
880 | { | |
856d7245 | 881 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 882 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
883 | |
884 | address_space_update_topology_pass(as, old_view, new_view, false); | |
885 | address_space_update_topology_pass(as, old_view, new_view, true); | |
886 | ||
374f2981 PB |
887 | /* Writes are protected by the BQL. */ |
888 | atomic_rcu_set(&as->current_map, new_view); | |
889 | call_rcu(old_view, flatview_unref, rcu); | |
856d7245 PB |
890 | |
891 | /* Note that all the old MemoryRegions are still alive up to this | |
892 | * point. This relieves most MemoryListeners from the need to | |
893 | * ref/unref the MemoryRegions they get---unless they use them | |
894 | * outside the iothread mutex, in which case precise reference | |
895 | * counting is necessary. | |
896 | */ | |
897 | flatview_unref(old_view); | |
898 | ||
3e9d69e7 | 899 | address_space_update_ioeventfds(as); |
093bc2cd AK |
900 | } |
901 | ||
4ef4db86 AK |
902 | void memory_region_transaction_begin(void) |
903 | { | |
bb880ded | 904 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
905 | ++memory_region_transaction_depth; |
906 | } | |
907 | ||
4dc56152 GA |
908 | static void memory_region_clear_pending(void) |
909 | { | |
910 | memory_region_update_pending = false; | |
911 | ioeventfd_update_pending = false; | |
912 | } | |
913 | ||
4ef4db86 AK |
914 | void memory_region_transaction_commit(void) |
915 | { | |
0d673e36 AK |
916 | AddressSpace *as; |
917 | ||
4ef4db86 AK |
918 | assert(memory_region_transaction_depth); |
919 | --memory_region_transaction_depth; | |
4dc56152 GA |
920 | if (!memory_region_transaction_depth) { |
921 | if (memory_region_update_pending) { | |
922 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 923 | |
4dc56152 GA |
924 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
925 | address_space_update_topology(as); | |
926 | } | |
02e2b95f | 927 | |
4dc56152 GA |
928 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
929 | } else if (ioeventfd_update_pending) { | |
930 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
931 | address_space_update_ioeventfds(as); | |
932 | } | |
933 | } | |
934 | memory_region_clear_pending(); | |
935 | } | |
4ef4db86 AK |
936 | } |
937 | ||
545e92e0 AK |
938 | static void memory_region_destructor_none(MemoryRegion *mr) |
939 | { | |
940 | } | |
941 | ||
942 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
943 | { | |
f1060c55 | 944 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
945 | } |
946 | ||
d0a9b5bc AK |
947 | static void memory_region_destructor_rom_device(MemoryRegion *mr) |
948 | { | |
f1060c55 | 949 | qemu_ram_free(mr->ram_block); |
d0a9b5bc AK |
950 | } |
951 | ||
b4fefef9 PC |
952 | static bool memory_region_need_escape(char c) |
953 | { | |
954 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
955 | } | |
956 | ||
957 | static char *memory_region_escape_name(const char *name) | |
958 | { | |
959 | const char *p; | |
960 | char *escaped, *q; | |
961 | uint8_t c; | |
962 | size_t bytes = 0; | |
963 | ||
964 | for (p = name; *p; p++) { | |
965 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
966 | } | |
967 | if (bytes == p - name) { | |
968 | return g_memdup(name, bytes + 1); | |
969 | } | |
970 | ||
971 | escaped = g_malloc(bytes + 1); | |
972 | for (p = name, q = escaped; *p; p++) { | |
973 | c = *p; | |
974 | if (unlikely(memory_region_need_escape(c))) { | |
975 | *q++ = '\\'; | |
976 | *q++ = 'x'; | |
977 | *q++ = "0123456789abcdef"[c >> 4]; | |
978 | c = "0123456789abcdef"[c & 15]; | |
979 | } | |
980 | *q++ = c; | |
981 | } | |
982 | *q = 0; | |
983 | return escaped; | |
984 | } | |
985 | ||
093bc2cd | 986 | void memory_region_init(MemoryRegion *mr, |
2c9b15ca | 987 | Object *owner, |
093bc2cd AK |
988 | const char *name, |
989 | uint64_t size) | |
990 | { | |
22a893e4 | 991 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); |
08dafab4 AK |
992 | mr->size = int128_make64(size); |
993 | if (size == UINT64_MAX) { | |
994 | mr->size = int128_2_64(); | |
995 | } | |
302fa283 | 996 | mr->name = g_strdup(name); |
612263cf | 997 | mr->owner = owner; |
58eaa217 | 998 | mr->ram_block = NULL; |
b4fefef9 PC |
999 | |
1000 | if (name) { | |
843ef73a PC |
1001 | char *escaped_name = memory_region_escape_name(name); |
1002 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
1003 | |
1004 | if (!owner) { | |
1005 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1006 | } | |
1007 | ||
843ef73a | 1008 | object_property_add_child(owner, name_array, OBJECT(mr), &error_abort); |
b4fefef9 | 1009 | object_unref(OBJECT(mr)); |
843ef73a PC |
1010 | g_free(name_array); |
1011 | g_free(escaped_name); | |
b4fefef9 PC |
1012 | } |
1013 | } | |
1014 | ||
d7bce999 EB |
1015 | static void memory_region_get_addr(Object *obj, Visitor *v, const char *name, |
1016 | void *opaque, Error **errp) | |
409ddd01 PC |
1017 | { |
1018 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1019 | uint64_t value = mr->addr; | |
1020 | ||
51e72bc1 | 1021 | visit_type_uint64(v, name, &value, errp); |
409ddd01 PC |
1022 | } |
1023 | ||
d7bce999 EB |
1024 | static void memory_region_get_container(Object *obj, Visitor *v, |
1025 | const char *name, void *opaque, | |
1026 | Error **errp) | |
409ddd01 PC |
1027 | { |
1028 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1029 | gchar *path = (gchar *)""; | |
1030 | ||
1031 | if (mr->container) { | |
1032 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1033 | } | |
51e72bc1 | 1034 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1035 | if (mr->container) { |
1036 | g_free(path); | |
1037 | } | |
1038 | } | |
1039 | ||
1040 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1041 | const char *part) | |
1042 | { | |
1043 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1044 | ||
1045 | return OBJECT(mr->container); | |
1046 | } | |
1047 | ||
d7bce999 EB |
1048 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1049 | const char *name, void *opaque, | |
1050 | Error **errp) | |
d33382da PC |
1051 | { |
1052 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1053 | int32_t value = mr->priority; | |
1054 | ||
51e72bc1 | 1055 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1056 | } |
1057 | ||
d7bce999 EB |
1058 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1059 | void *opaque, Error **errp) | |
52aef7bb PC |
1060 | { |
1061 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1062 | uint64_t value = memory_region_size(mr); | |
1063 | ||
51e72bc1 | 1064 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1065 | } |
1066 | ||
b4fefef9 PC |
1067 | static void memory_region_initfn(Object *obj) |
1068 | { | |
1069 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1070 | ObjectProperty *op; |
b4fefef9 PC |
1071 | |
1072 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1073 | mr->enabled = true; |
5f9a5ea1 | 1074 | mr->romd_mode = true; |
196ea131 | 1075 | mr->global_locking = true; |
545e92e0 | 1076 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1077 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1078 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1079 | |
1080 | op = object_property_add(OBJECT(mr), "container", | |
1081 | "link<" TYPE_MEMORY_REGION ">", | |
1082 | memory_region_get_container, | |
1083 | NULL, /* memory_region_set_container */ | |
1084 | NULL, NULL, &error_abort); | |
1085 | op->resolve = memory_region_resolve_container; | |
1086 | ||
1087 | object_property_add(OBJECT(mr), "addr", "uint64", | |
1088 | memory_region_get_addr, | |
1089 | NULL, /* memory_region_set_addr */ | |
1090 | NULL, NULL, &error_abort); | |
d33382da PC |
1091 | object_property_add(OBJECT(mr), "priority", "uint32", |
1092 | memory_region_get_priority, | |
1093 | NULL, /* memory_region_set_priority */ | |
1094 | NULL, NULL, &error_abort); | |
52aef7bb PC |
1095 | object_property_add(OBJECT(mr), "size", "uint64", |
1096 | memory_region_get_size, | |
1097 | NULL, /* memory_region_set_size, */ | |
1098 | NULL, NULL, &error_abort); | |
093bc2cd AK |
1099 | } |
1100 | ||
b018ddf6 PB |
1101 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1102 | unsigned size) | |
1103 | { | |
1104 | #ifdef DEBUG_UNASSIGNED | |
1105 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1106 | #endif | |
4917cf44 AF |
1107 | if (current_cpu != NULL) { |
1108 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 1109 | } |
68a7439a | 1110 | return 0; |
b018ddf6 PB |
1111 | } |
1112 | ||
1113 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1114 | uint64_t val, unsigned size) | |
1115 | { | |
1116 | #ifdef DEBUG_UNASSIGNED | |
1117 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1118 | #endif | |
4917cf44 AF |
1119 | if (current_cpu != NULL) { |
1120 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 1121 | } |
b018ddf6 PB |
1122 | } |
1123 | ||
d197063f PB |
1124 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
1125 | unsigned size, bool is_write) | |
1126 | { | |
1127 | return false; | |
1128 | } | |
1129 | ||
1130 | const MemoryRegionOps unassigned_mem_ops = { | |
1131 | .valid.accepts = unassigned_mem_accepts, | |
1132 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1133 | }; | |
1134 | ||
d2702032 PB |
1135 | bool memory_region_access_valid(MemoryRegion *mr, |
1136 | hwaddr addr, | |
1137 | unsigned size, | |
1138 | bool is_write) | |
093bc2cd | 1139 | { |
a014ed07 PB |
1140 | int access_size_min, access_size_max; |
1141 | int access_size, i; | |
897fa7cf | 1142 | |
093bc2cd AK |
1143 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
1144 | return false; | |
1145 | } | |
1146 | ||
a014ed07 | 1147 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
1148 | return true; |
1149 | } | |
1150 | ||
a014ed07 PB |
1151 | access_size_min = mr->ops->valid.min_access_size; |
1152 | if (!mr->ops->valid.min_access_size) { | |
1153 | access_size_min = 1; | |
1154 | } | |
1155 | ||
1156 | access_size_max = mr->ops->valid.max_access_size; | |
1157 | if (!mr->ops->valid.max_access_size) { | |
1158 | access_size_max = 4; | |
1159 | } | |
1160 | ||
1161 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
1162 | for (i = 0; i < size; i += access_size) { | |
1163 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
1164 | is_write)) { | |
1165 | return false; | |
1166 | } | |
093bc2cd | 1167 | } |
a014ed07 | 1168 | |
093bc2cd AK |
1169 | return true; |
1170 | } | |
1171 | ||
cc05c43a PM |
1172 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1173 | hwaddr addr, | |
1174 | uint64_t *pval, | |
1175 | unsigned size, | |
1176 | MemTxAttrs attrs) | |
093bc2cd | 1177 | { |
cc05c43a | 1178 | *pval = 0; |
093bc2cd | 1179 | |
ce5d2f33 | 1180 | if (mr->ops->read) { |
cc05c43a PM |
1181 | return access_with_adjusted_size(addr, pval, size, |
1182 | mr->ops->impl.min_access_size, | |
1183 | mr->ops->impl.max_access_size, | |
1184 | memory_region_read_accessor, | |
1185 | mr, attrs); | |
1186 | } else if (mr->ops->read_with_attrs) { | |
1187 | return access_with_adjusted_size(addr, pval, size, | |
1188 | mr->ops->impl.min_access_size, | |
1189 | mr->ops->impl.max_access_size, | |
1190 | memory_region_read_with_attrs_accessor, | |
1191 | mr, attrs); | |
ce5d2f33 | 1192 | } else { |
cc05c43a PM |
1193 | return access_with_adjusted_size(addr, pval, size, 1, 4, |
1194 | memory_region_oldmmio_read_accessor, | |
1195 | mr, attrs); | |
74901c3b | 1196 | } |
093bc2cd AK |
1197 | } |
1198 | ||
3b643495 PM |
1199 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1200 | hwaddr addr, | |
1201 | uint64_t *pval, | |
1202 | unsigned size, | |
1203 | MemTxAttrs attrs) | |
a621f38d | 1204 | { |
cc05c43a PM |
1205 | MemTxResult r; |
1206 | ||
791af8c8 PB |
1207 | if (!memory_region_access_valid(mr, addr, size, false)) { |
1208 | *pval = unassigned_mem_read(mr, addr, size); | |
cc05c43a | 1209 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1210 | } |
a621f38d | 1211 | |
cc05c43a | 1212 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
791af8c8 | 1213 | adjust_endianness(mr, pval, size); |
cc05c43a | 1214 | return r; |
a621f38d | 1215 | } |
093bc2cd | 1216 | |
8c56c1a5 PF |
1217 | /* Return true if an eventfd was signalled */ |
1218 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1219 | hwaddr addr, | |
1220 | uint64_t data, | |
1221 | unsigned size, | |
1222 | MemTxAttrs attrs) | |
1223 | { | |
1224 | MemoryRegionIoeventfd ioeventfd = { | |
1225 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1226 | .data = data, | |
1227 | }; | |
1228 | unsigned i; | |
1229 | ||
1230 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1231 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1232 | ioeventfd.e = mr->ioeventfds[i].e; | |
1233 | ||
1234 | if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) { | |
1235 | event_notifier_set(ioeventfd.e); | |
1236 | return true; | |
1237 | } | |
1238 | } | |
1239 | ||
1240 | return false; | |
1241 | } | |
1242 | ||
3b643495 PM |
1243 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1244 | hwaddr addr, | |
1245 | uint64_t data, | |
1246 | unsigned size, | |
1247 | MemTxAttrs attrs) | |
a621f38d | 1248 | { |
897fa7cf | 1249 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 1250 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1251 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1252 | } |
1253 | ||
a621f38d AK |
1254 | adjust_endianness(mr, &data, size); |
1255 | ||
8c56c1a5 PF |
1256 | if ((!kvm_eventfds_enabled()) && |
1257 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1258 | return MEMTX_OK; | |
1259 | } | |
1260 | ||
ce5d2f33 | 1261 | if (mr->ops->write) { |
cc05c43a PM |
1262 | return access_with_adjusted_size(addr, &data, size, |
1263 | mr->ops->impl.min_access_size, | |
1264 | mr->ops->impl.max_access_size, | |
1265 | memory_region_write_accessor, mr, | |
1266 | attrs); | |
1267 | } else if (mr->ops->write_with_attrs) { | |
1268 | return | |
1269 | access_with_adjusted_size(addr, &data, size, | |
1270 | mr->ops->impl.min_access_size, | |
1271 | mr->ops->impl.max_access_size, | |
1272 | memory_region_write_with_attrs_accessor, | |
1273 | mr, attrs); | |
ce5d2f33 | 1274 | } else { |
cc05c43a PM |
1275 | return access_with_adjusted_size(addr, &data, size, 1, 4, |
1276 | memory_region_oldmmio_write_accessor, | |
1277 | mr, attrs); | |
74901c3b | 1278 | } |
093bc2cd AK |
1279 | } |
1280 | ||
093bc2cd | 1281 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1282 | Object *owner, |
093bc2cd AK |
1283 | const MemoryRegionOps *ops, |
1284 | void *opaque, | |
1285 | const char *name, | |
1286 | uint64_t size) | |
1287 | { | |
2c9b15ca | 1288 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1289 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1290 | mr->opaque = opaque; |
14a3c10a | 1291 | mr->terminates = true; |
093bc2cd AK |
1292 | } |
1293 | ||
1294 | void memory_region_init_ram(MemoryRegion *mr, | |
2c9b15ca | 1295 | Object *owner, |
093bc2cd | 1296 | const char *name, |
49946538 HT |
1297 | uint64_t size, |
1298 | Error **errp) | |
093bc2cd | 1299 | { |
2c9b15ca | 1300 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1301 | mr->ram = true; |
14a3c10a | 1302 | mr->terminates = true; |
545e92e0 | 1303 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1304 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
677e7805 | 1305 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
0b183fc8 PB |
1306 | } |
1307 | ||
60786ef3 MT |
1308 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1309 | Object *owner, | |
1310 | const char *name, | |
1311 | uint64_t size, | |
1312 | uint64_t max_size, | |
1313 | void (*resized)(const char*, | |
1314 | uint64_t length, | |
1315 | void *host), | |
1316 | Error **errp) | |
1317 | { | |
1318 | memory_region_init(mr, owner, name, size); | |
1319 | mr->ram = true; | |
1320 | mr->terminates = true; | |
1321 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 FZ |
1322 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1323 | mr, errp); | |
677e7805 | 1324 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
60786ef3 MT |
1325 | } |
1326 | ||
0b183fc8 PB |
1327 | #ifdef __linux__ |
1328 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1329 | struct Object *owner, | |
1330 | const char *name, | |
1331 | uint64_t size, | |
dbcb8981 | 1332 | bool share, |
7f56e740 PB |
1333 | const char *path, |
1334 | Error **errp) | |
0b183fc8 PB |
1335 | { |
1336 | memory_region_init(mr, owner, name, size); | |
1337 | mr->ram = true; | |
1338 | mr->terminates = true; | |
1339 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1340 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp); |
677e7805 | 1341 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
093bc2cd | 1342 | } |
0b183fc8 | 1343 | #endif |
093bc2cd AK |
1344 | |
1345 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1346 | Object *owner, |
093bc2cd AK |
1347 | const char *name, |
1348 | uint64_t size, | |
1349 | void *ptr) | |
1350 | { | |
2c9b15ca | 1351 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1352 | mr->ram = true; |
14a3c10a | 1353 | mr->terminates = true; |
fc3e7665 | 1354 | mr->destructor = memory_region_destructor_ram; |
677e7805 | 1355 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
ef701d7b HT |
1356 | |
1357 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1358 | assert(ptr != NULL); | |
8e41fb63 | 1359 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1360 | } |
1361 | ||
e4dc3f59 ND |
1362 | void memory_region_set_skip_dump(MemoryRegion *mr) |
1363 | { | |
1364 | mr->skip_dump = true; | |
1365 | } | |
1366 | ||
093bc2cd | 1367 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1368 | Object *owner, |
093bc2cd AK |
1369 | const char *name, |
1370 | MemoryRegion *orig, | |
a8170e5e | 1371 | hwaddr offset, |
093bc2cd AK |
1372 | uint64_t size) |
1373 | { | |
2c9b15ca | 1374 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1375 | mr->alias = orig; |
1376 | mr->alias_offset = offset; | |
1377 | } | |
1378 | ||
d0a9b5bc | 1379 | void memory_region_init_rom_device(MemoryRegion *mr, |
2c9b15ca | 1380 | Object *owner, |
d0a9b5bc | 1381 | const MemoryRegionOps *ops, |
75f5941c | 1382 | void *opaque, |
d0a9b5bc | 1383 | const char *name, |
33e0eb52 HT |
1384 | uint64_t size, |
1385 | Error **errp) | |
d0a9b5bc | 1386 | { |
2c9b15ca | 1387 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1388 | mr->ops = ops; |
75f5941c | 1389 | mr->opaque = opaque; |
d0a9b5bc | 1390 | mr->terminates = true; |
75c578dc | 1391 | mr->rom_device = true; |
d0a9b5bc | 1392 | mr->destructor = memory_region_destructor_rom_device; |
8e41fb63 | 1393 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
d0a9b5bc AK |
1394 | } |
1395 | ||
30951157 | 1396 | void memory_region_init_iommu(MemoryRegion *mr, |
2c9b15ca | 1397 | Object *owner, |
30951157 AK |
1398 | const MemoryRegionIOMMUOps *ops, |
1399 | const char *name, | |
1400 | uint64_t size) | |
1401 | { | |
2c9b15ca | 1402 | memory_region_init(mr, owner, name, size); |
30951157 AK |
1403 | mr->iommu_ops = ops, |
1404 | mr->terminates = true; /* then re-forwards */ | |
06866575 | 1405 | notifier_list_init(&mr->iommu_notify); |
30951157 AK |
1406 | } |
1407 | ||
b4fefef9 | 1408 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1409 | { |
b4fefef9 PC |
1410 | MemoryRegion *mr = MEMORY_REGION(obj); |
1411 | ||
2e2b8eb7 PB |
1412 | assert(!mr->container); |
1413 | ||
1414 | /* We know the region is not visible in any address space (it | |
1415 | * does not have a container and cannot be a root either because | |
1416 | * it has no references, so we can blindly clear mr->enabled. | |
1417 | * memory_region_set_enabled instead could trigger a transaction | |
1418 | * and cause an infinite loop. | |
1419 | */ | |
1420 | mr->enabled = false; | |
1421 | memory_region_transaction_begin(); | |
1422 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1423 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1424 | memory_region_del_subregion(mr, subregion); | |
1425 | } | |
1426 | memory_region_transaction_commit(); | |
1427 | ||
545e92e0 | 1428 | mr->destructor(mr); |
093bc2cd | 1429 | memory_region_clear_coalescing(mr); |
302fa283 | 1430 | g_free((char *)mr->name); |
7267c094 | 1431 | g_free(mr->ioeventfds); |
093bc2cd AK |
1432 | } |
1433 | ||
803c0816 PB |
1434 | Object *memory_region_owner(MemoryRegion *mr) |
1435 | { | |
22a893e4 PB |
1436 | Object *obj = OBJECT(mr); |
1437 | return obj->parent; | |
803c0816 PB |
1438 | } |
1439 | ||
46637be2 PB |
1440 | void memory_region_ref(MemoryRegion *mr) |
1441 | { | |
22a893e4 PB |
1442 | /* MMIO callbacks most likely will access data that belongs |
1443 | * to the owner, hence the need to ref/unref the owner whenever | |
1444 | * the memory region is in use. | |
1445 | * | |
1446 | * The memory region is a child of its owner. As long as the | |
1447 | * owner doesn't call unparent itself on the memory region, | |
1448 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1449 | * Memory regions without an owner are supposed to never go away; |
1450 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1451 | */ |
612263cf PB |
1452 | if (mr && mr->owner) { |
1453 | object_ref(mr->owner); | |
46637be2 PB |
1454 | } |
1455 | } | |
1456 | ||
1457 | void memory_region_unref(MemoryRegion *mr) | |
1458 | { | |
612263cf PB |
1459 | if (mr && mr->owner) { |
1460 | object_unref(mr->owner); | |
46637be2 PB |
1461 | } |
1462 | } | |
1463 | ||
093bc2cd AK |
1464 | uint64_t memory_region_size(MemoryRegion *mr) |
1465 | { | |
08dafab4 AK |
1466 | if (int128_eq(mr->size, int128_2_64())) { |
1467 | return UINT64_MAX; | |
1468 | } | |
1469 | return int128_get64(mr->size); | |
093bc2cd AK |
1470 | } |
1471 | ||
5d546d4b | 1472 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1473 | { |
d1dd32af PC |
1474 | if (!mr->name) { |
1475 | ((MemoryRegion *)mr)->name = | |
1476 | object_get_canonical_path_component(OBJECT(mr)); | |
1477 | } | |
302fa283 | 1478 | return mr->name; |
8991c79b AK |
1479 | } |
1480 | ||
e4dc3f59 ND |
1481 | bool memory_region_is_skip_dump(MemoryRegion *mr) |
1482 | { | |
1483 | return mr->skip_dump; | |
1484 | } | |
1485 | ||
2d1a35be | 1486 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1487 | { |
6f6a5ef3 PB |
1488 | uint8_t mask = mr->dirty_log_mask; |
1489 | if (global_dirty_log) { | |
1490 | mask |= (1 << DIRTY_MEMORY_MIGRATION); | |
1491 | } | |
1492 | return mask; | |
55043ba3 AK |
1493 | } |
1494 | ||
2d1a35be PB |
1495 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1496 | { | |
1497 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1498 | } | |
1499 | ||
06866575 DG |
1500 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) |
1501 | { | |
1502 | notifier_list_add(&mr->iommu_notify, n); | |
1503 | } | |
1504 | ||
a788f227 DG |
1505 | void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, |
1506 | hwaddr granularity, bool is_write) | |
1507 | { | |
1508 | hwaddr addr; | |
1509 | IOMMUTLBEntry iotlb; | |
1510 | ||
1511 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { | |
1512 | iotlb = mr->iommu_ops->translate(mr, addr, is_write); | |
1513 | if (iotlb.perm != IOMMU_NONE) { | |
1514 | n->notify(n, &iotlb); | |
1515 | } | |
1516 | ||
1517 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1518 | * infinite loop here. This should catch such a wraparound */ | |
1519 | if ((addr + granularity) < addr) { | |
1520 | break; | |
1521 | } | |
1522 | } | |
1523 | } | |
1524 | ||
06866575 DG |
1525 | void memory_region_unregister_iommu_notifier(Notifier *n) |
1526 | { | |
1527 | notifier_remove(n); | |
1528 | } | |
1529 | ||
1530 | void memory_region_notify_iommu(MemoryRegion *mr, | |
1531 | IOMMUTLBEntry entry) | |
1532 | { | |
1533 | assert(memory_region_is_iommu(mr)); | |
1534 | notifier_list_notify(&mr->iommu_notify, &entry); | |
1535 | } | |
1536 | ||
093bc2cd AK |
1537 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1538 | { | |
5a583347 | 1539 | uint8_t mask = 1 << client; |
deb809ed | 1540 | uint8_t old_logging; |
5a583347 | 1541 | |
dbddac6d | 1542 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
1543 | old_logging = mr->vga_logging_count; |
1544 | mr->vga_logging_count += log ? 1 : -1; | |
1545 | if (!!old_logging == !!mr->vga_logging_count) { | |
1546 | return; | |
1547 | } | |
1548 | ||
59023ef4 | 1549 | memory_region_transaction_begin(); |
5a583347 | 1550 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1551 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1552 | memory_region_transaction_commit(); |
093bc2cd AK |
1553 | } |
1554 | ||
a8170e5e AK |
1555 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1556 | hwaddr size, unsigned client) | |
093bc2cd | 1557 | { |
8e41fb63 FZ |
1558 | assert(mr->ram_block); |
1559 | return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr, | |
1560 | size, client); | |
093bc2cd AK |
1561 | } |
1562 | ||
a8170e5e AK |
1563 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1564 | hwaddr size) | |
093bc2cd | 1565 | { |
8e41fb63 FZ |
1566 | assert(mr->ram_block); |
1567 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
1568 | size, | |
58d2707e | 1569 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
1570 | } |
1571 | ||
6c279db8 JQ |
1572 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1573 | hwaddr size, unsigned client) | |
1574 | { | |
8e41fb63 FZ |
1575 | assert(mr->ram_block); |
1576 | return cpu_physical_memory_test_and_clear_dirty( | |
1577 | memory_region_get_ram_addr(mr) + addr, size, client); | |
6c279db8 JQ |
1578 | } |
1579 | ||
1580 | ||
093bc2cd AK |
1581 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1582 | { | |
0d673e36 | 1583 | AddressSpace *as; |
5a583347 AK |
1584 | FlatRange *fr; |
1585 | ||
0d673e36 | 1586 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
856d7245 | 1587 | FlatView *view = address_space_get_flatview(as); |
99e86347 | 1588 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 AK |
1589 | if (fr->mr == mr) { |
1590 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); | |
1591 | } | |
5a583347 | 1592 | } |
856d7245 | 1593 | flatview_unref(view); |
5a583347 | 1594 | } |
093bc2cd AK |
1595 | } |
1596 | ||
1597 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1598 | { | |
fb1cd6f9 | 1599 | if (mr->readonly != readonly) { |
59023ef4 | 1600 | memory_region_transaction_begin(); |
fb1cd6f9 | 1601 | mr->readonly = readonly; |
22bde714 | 1602 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1603 | memory_region_transaction_commit(); |
fb1cd6f9 | 1604 | } |
093bc2cd AK |
1605 | } |
1606 | ||
5f9a5ea1 | 1607 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1608 | { |
5f9a5ea1 | 1609 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1610 | memory_region_transaction_begin(); |
5f9a5ea1 | 1611 | mr->romd_mode = romd_mode; |
22bde714 | 1612 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1613 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1614 | } |
1615 | } | |
1616 | ||
a8170e5e AK |
1617 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1618 | hwaddr size, unsigned client) | |
093bc2cd | 1619 | { |
8e41fb63 FZ |
1620 | assert(mr->ram_block); |
1621 | cpu_physical_memory_test_and_clear_dirty( | |
1622 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
1623 | } |
1624 | ||
a35ba7be PB |
1625 | int memory_region_get_fd(MemoryRegion *mr) |
1626 | { | |
4ff87573 PB |
1627 | int fd; |
1628 | ||
1629 | rcu_read_lock(); | |
1630 | while (mr->alias) { | |
1631 | mr = mr->alias; | |
a35ba7be | 1632 | } |
4ff87573 PB |
1633 | fd = mr->ram_block->fd; |
1634 | rcu_read_unlock(); | |
a35ba7be | 1635 | |
4ff87573 PB |
1636 | return fd; |
1637 | } | |
a35ba7be | 1638 | |
4ff87573 PB |
1639 | void memory_region_set_fd(MemoryRegion *mr, int fd) |
1640 | { | |
1641 | rcu_read_lock(); | |
1642 | while (mr->alias) { | |
1643 | mr = mr->alias; | |
1644 | } | |
1645 | mr->ram_block->fd = fd; | |
1646 | rcu_read_unlock(); | |
a35ba7be PB |
1647 | } |
1648 | ||
093bc2cd AK |
1649 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
1650 | { | |
49b24afc PB |
1651 | void *ptr; |
1652 | uint64_t offset = 0; | |
093bc2cd | 1653 | |
49b24afc PB |
1654 | rcu_read_lock(); |
1655 | while (mr->alias) { | |
1656 | offset += mr->alias_offset; | |
1657 | mr = mr->alias; | |
1658 | } | |
8e41fb63 | 1659 | assert(mr->ram_block); |
0878d0e1 | 1660 | ptr = qemu_map_ram_ptr(mr->ram_block, offset); |
49b24afc | 1661 | rcu_read_unlock(); |
093bc2cd | 1662 | |
0878d0e1 | 1663 | return ptr; |
093bc2cd AK |
1664 | } |
1665 | ||
07bdaa41 PB |
1666 | MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset) |
1667 | { | |
1668 | RAMBlock *block; | |
1669 | ||
1670 | block = qemu_ram_block_from_host(ptr, false, offset); | |
1671 | if (!block) { | |
1672 | return NULL; | |
1673 | } | |
1674 | ||
1675 | return block->mr; | |
1676 | } | |
1677 | ||
7ebb2745 FZ |
1678 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1679 | { | |
1680 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
1681 | } | |
1682 | ||
37d7c084 PB |
1683 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
1684 | { | |
8e41fb63 | 1685 | assert(mr->ram_block); |
37d7c084 | 1686 | |
fa53a0e5 | 1687 | qemu_ram_resize(mr->ram_block, newsize, errp); |
37d7c084 PB |
1688 | } |
1689 | ||
0d673e36 | 1690 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1691 | { |
99e86347 | 1692 | FlatView *view; |
093bc2cd AK |
1693 | FlatRange *fr; |
1694 | CoalescedMemoryRange *cmr; | |
1695 | AddrRange tmp; | |
95d2994a | 1696 | MemoryRegionSection section; |
093bc2cd | 1697 | |
856d7245 | 1698 | view = address_space_get_flatview(as); |
99e86347 | 1699 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1700 | if (fr->mr == mr) { |
95d2994a | 1701 | section = (MemoryRegionSection) { |
f6790af6 | 1702 | .address_space = as, |
95d2994a | 1703 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1704 | .size = fr->addr.size, |
95d2994a AK |
1705 | }; |
1706 | ||
1707 | MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, | |
1708 | int128_get64(fr->addr.start), | |
1709 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1710 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1711 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1712 | int128_sub(fr->addr.start, |
1713 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1714 | if (!addrrange_intersects(tmp, fr->addr)) { |
1715 | continue; | |
1716 | } | |
1717 | tmp = addrrange_intersection(tmp, fr->addr); | |
95d2994a AK |
1718 | MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1719 | int128_get64(tmp.start), | |
1720 | int128_get64(tmp.size)); | |
093bc2cd AK |
1721 | } |
1722 | } | |
1723 | } | |
856d7245 | 1724 | flatview_unref(view); |
093bc2cd AK |
1725 | } |
1726 | ||
0d673e36 AK |
1727 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1728 | { | |
1729 | AddressSpace *as; | |
1730 | ||
1731 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1732 | memory_region_update_coalesced_range_as(mr, as); | |
1733 | } | |
1734 | } | |
1735 | ||
093bc2cd AK |
1736 | void memory_region_set_coalescing(MemoryRegion *mr) |
1737 | { | |
1738 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1739 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1740 | } |
1741 | ||
1742 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1743 | hwaddr offset, |
093bc2cd AK |
1744 | uint64_t size) |
1745 | { | |
7267c094 | 1746 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1747 | |
08dafab4 | 1748 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1749 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1750 | memory_region_update_coalesced_range(mr); | |
d410515e | 1751 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1752 | } |
1753 | ||
1754 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1755 | { | |
1756 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1757 | bool updated = false; |
093bc2cd | 1758 | |
d410515e JK |
1759 | qemu_flush_coalesced_mmio_buffer(); |
1760 | mr->flush_coalesced_mmio = false; | |
1761 | ||
093bc2cd AK |
1762 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
1763 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
1764 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 1765 | g_free(cmr); |
ab5b3db5 FZ |
1766 | updated = true; |
1767 | } | |
1768 | ||
1769 | if (updated) { | |
1770 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 1771 | } |
093bc2cd AK |
1772 | } |
1773 | ||
d410515e JK |
1774 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
1775 | { | |
1776 | mr->flush_coalesced_mmio = true; | |
1777 | } | |
1778 | ||
1779 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
1780 | { | |
1781 | qemu_flush_coalesced_mmio_buffer(); | |
1782 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
1783 | mr->flush_coalesced_mmio = false; | |
1784 | } | |
1785 | } | |
1786 | ||
196ea131 JK |
1787 | void memory_region_set_global_locking(MemoryRegion *mr) |
1788 | { | |
1789 | mr->global_locking = true; | |
1790 | } | |
1791 | ||
1792 | void memory_region_clear_global_locking(MemoryRegion *mr) | |
1793 | { | |
1794 | mr->global_locking = false; | |
1795 | } | |
1796 | ||
8c56c1a5 PF |
1797 | static bool userspace_eventfd_warning; |
1798 | ||
3e9d69e7 | 1799 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 1800 | hwaddr addr, |
3e9d69e7 AK |
1801 | unsigned size, |
1802 | bool match_data, | |
1803 | uint64_t data, | |
753d5e14 | 1804 | EventNotifier *e) |
3e9d69e7 AK |
1805 | { |
1806 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1807 | .addr.start = int128_make64(addr), |
1808 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1809 | .match_data = match_data, |
1810 | .data = data, | |
753d5e14 | 1811 | .e = e, |
3e9d69e7 AK |
1812 | }; |
1813 | unsigned i; | |
1814 | ||
8c56c1a5 PF |
1815 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
1816 | userspace_eventfd_warning))) { | |
1817 | userspace_eventfd_warning = true; | |
1818 | error_report("Using eventfd without MMIO binding in KVM. " | |
1819 | "Suboptimal performance expected"); | |
1820 | } | |
1821 | ||
b8aecea2 JW |
1822 | if (size) { |
1823 | adjust_endianness(mr, &mrfd.data, size); | |
1824 | } | |
59023ef4 | 1825 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1826 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1827 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
1828 | break; | |
1829 | } | |
1830 | } | |
1831 | ++mr->ioeventfd_nb; | |
7267c094 | 1832 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
1833 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
1834 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
1835 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
1836 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 1837 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1838 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1839 | } |
1840 | ||
1841 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 1842 | hwaddr addr, |
3e9d69e7 AK |
1843 | unsigned size, |
1844 | bool match_data, | |
1845 | uint64_t data, | |
753d5e14 | 1846 | EventNotifier *e) |
3e9d69e7 AK |
1847 | { |
1848 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
1849 | .addr.start = int128_make64(addr), |
1850 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
1851 | .match_data = match_data, |
1852 | .data = data, | |
753d5e14 | 1853 | .e = e, |
3e9d69e7 AK |
1854 | }; |
1855 | unsigned i; | |
1856 | ||
b8aecea2 JW |
1857 | if (size) { |
1858 | adjust_endianness(mr, &mrfd.data, size); | |
1859 | } | |
59023ef4 | 1860 | memory_region_transaction_begin(); |
3e9d69e7 AK |
1861 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1862 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
1863 | break; | |
1864 | } | |
1865 | } | |
1866 | assert(i != mr->ioeventfd_nb); | |
1867 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
1868 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
1869 | --mr->ioeventfd_nb; | |
7267c094 | 1870 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 1871 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 1872 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 1873 | memory_region_transaction_commit(); |
3e9d69e7 AK |
1874 | } |
1875 | ||
feca4ac1 | 1876 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 1877 | { |
feca4ac1 | 1878 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
1879 | MemoryRegion *other; |
1880 | ||
59023ef4 JK |
1881 | memory_region_transaction_begin(); |
1882 | ||
dfde4e6e | 1883 | memory_region_ref(subregion); |
093bc2cd AK |
1884 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1885 | if (subregion->priority >= other->priority) { | |
1886 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
1887 | goto done; | |
1888 | } | |
1889 | } | |
1890 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
1891 | done: | |
22bde714 | 1892 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1893 | memory_region_transaction_commit(); |
093bc2cd AK |
1894 | } |
1895 | ||
0598701a PC |
1896 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
1897 | hwaddr offset, | |
1898 | MemoryRegion *subregion) | |
1899 | { | |
feca4ac1 PB |
1900 | assert(!subregion->container); |
1901 | subregion->container = mr; | |
0598701a | 1902 | subregion->addr = offset; |
feca4ac1 | 1903 | memory_region_update_container_subregions(subregion); |
0598701a | 1904 | } |
093bc2cd AK |
1905 | |
1906 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 1907 | hwaddr offset, |
093bc2cd AK |
1908 | MemoryRegion *subregion) |
1909 | { | |
093bc2cd AK |
1910 | subregion->priority = 0; |
1911 | memory_region_add_subregion_common(mr, offset, subregion); | |
1912 | } | |
1913 | ||
1914 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 1915 | hwaddr offset, |
093bc2cd | 1916 | MemoryRegion *subregion, |
a1ff8ae0 | 1917 | int priority) |
093bc2cd | 1918 | { |
093bc2cd AK |
1919 | subregion->priority = priority; |
1920 | memory_region_add_subregion_common(mr, offset, subregion); | |
1921 | } | |
1922 | ||
1923 | void memory_region_del_subregion(MemoryRegion *mr, | |
1924 | MemoryRegion *subregion) | |
1925 | { | |
59023ef4 | 1926 | memory_region_transaction_begin(); |
feca4ac1 PB |
1927 | assert(subregion->container == mr); |
1928 | subregion->container = NULL; | |
093bc2cd | 1929 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 1930 | memory_region_unref(subregion); |
22bde714 | 1931 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 1932 | memory_region_transaction_commit(); |
6bba19ba AK |
1933 | } |
1934 | ||
1935 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
1936 | { | |
1937 | if (enabled == mr->enabled) { | |
1938 | return; | |
1939 | } | |
59023ef4 | 1940 | memory_region_transaction_begin(); |
6bba19ba | 1941 | mr->enabled = enabled; |
22bde714 | 1942 | memory_region_update_pending = true; |
59023ef4 | 1943 | memory_region_transaction_commit(); |
093bc2cd | 1944 | } |
1c0ffa58 | 1945 | |
e7af4c67 MT |
1946 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
1947 | { | |
1948 | Int128 s = int128_make64(size); | |
1949 | ||
1950 | if (size == UINT64_MAX) { | |
1951 | s = int128_2_64(); | |
1952 | } | |
1953 | if (int128_eq(s, mr->size)) { | |
1954 | return; | |
1955 | } | |
1956 | memory_region_transaction_begin(); | |
1957 | mr->size = s; | |
1958 | memory_region_update_pending = true; | |
1959 | memory_region_transaction_commit(); | |
1960 | } | |
1961 | ||
67891b8a | 1962 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 1963 | { |
feca4ac1 | 1964 | MemoryRegion *container = mr->container; |
2282e1af | 1965 | |
feca4ac1 | 1966 | if (container) { |
67891b8a PC |
1967 | memory_region_transaction_begin(); |
1968 | memory_region_ref(mr); | |
feca4ac1 PB |
1969 | memory_region_del_subregion(container, mr); |
1970 | mr->container = container; | |
1971 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
1972 | memory_region_unref(mr); |
1973 | memory_region_transaction_commit(); | |
2282e1af | 1974 | } |
67891b8a | 1975 | } |
2282e1af | 1976 | |
67891b8a PC |
1977 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
1978 | { | |
1979 | if (addr != mr->addr) { | |
1980 | mr->addr = addr; | |
1981 | memory_region_readd_subregion(mr); | |
1982 | } | |
2282e1af AK |
1983 | } |
1984 | ||
a8170e5e | 1985 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 1986 | { |
4703359e | 1987 | assert(mr->alias); |
4703359e | 1988 | |
59023ef4 | 1989 | if (offset == mr->alias_offset) { |
4703359e AK |
1990 | return; |
1991 | } | |
1992 | ||
59023ef4 JK |
1993 | memory_region_transaction_begin(); |
1994 | mr->alias_offset = offset; | |
22bde714 | 1995 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1996 | memory_region_transaction_commit(); |
4703359e AK |
1997 | } |
1998 | ||
a2b257d6 IM |
1999 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
2000 | { | |
2001 | return mr->align; | |
2002 | } | |
2003 | ||
e2177955 AK |
2004 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
2005 | { | |
2006 | const AddrRange *addr = addr_; | |
2007 | const FlatRange *fr = fr_; | |
2008 | ||
2009 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2010 | return -1; | |
2011 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2012 | return 1; | |
2013 | } | |
2014 | return 0; | |
2015 | } | |
2016 | ||
99e86347 | 2017 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 2018 | { |
99e86347 | 2019 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
2020 | sizeof(FlatRange), cmp_flatrange_addr); |
2021 | } | |
2022 | ||
eed2bacf IM |
2023 | bool memory_region_is_mapped(MemoryRegion *mr) |
2024 | { | |
2025 | return mr->container ? true : false; | |
2026 | } | |
2027 | ||
c6742b14 PB |
2028 | /* Same as memory_region_find, but it does not add a reference to the |
2029 | * returned region. It must be called from an RCU critical section. | |
2030 | */ | |
2031 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2032 | hwaddr addr, uint64_t size) | |
e2177955 | 2033 | { |
052e87b0 | 2034 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2035 | MemoryRegion *root; |
2036 | AddressSpace *as; | |
2037 | AddrRange range; | |
99e86347 | 2038 | FlatView *view; |
73034e9e PB |
2039 | FlatRange *fr; |
2040 | ||
2041 | addr += mr->addr; | |
feca4ac1 PB |
2042 | for (root = mr; root->container; ) { |
2043 | root = root->container; | |
73034e9e PB |
2044 | addr += root->addr; |
2045 | } | |
e2177955 | 2046 | |
73034e9e | 2047 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2048 | if (!as) { |
2049 | return ret; | |
2050 | } | |
73034e9e | 2051 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2052 | |
2b647668 | 2053 | view = atomic_rcu_read(&as->current_map); |
99e86347 | 2054 | fr = flatview_lookup(view, range); |
e2177955 | 2055 | if (!fr) { |
c6742b14 | 2056 | return ret; |
e2177955 AK |
2057 | } |
2058 | ||
99e86347 | 2059 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2060 | --fr; |
2061 | } | |
2062 | ||
2063 | ret.mr = fr->mr; | |
73034e9e | 2064 | ret.address_space = as; |
e2177955 AK |
2065 | range = addrrange_intersection(range, fr->addr); |
2066 | ret.offset_within_region = fr->offset_in_region; | |
2067 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2068 | fr->addr.start)); | |
052e87b0 | 2069 | ret.size = range.size; |
e2177955 | 2070 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2071 | ret.readonly = fr->readonly; |
c6742b14 PB |
2072 | return ret; |
2073 | } | |
2074 | ||
2075 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2076 | hwaddr addr, uint64_t size) | |
2077 | { | |
2078 | MemoryRegionSection ret; | |
2079 | rcu_read_lock(); | |
2080 | ret = memory_region_find_rcu(mr, addr, size); | |
2081 | if (ret.mr) { | |
2082 | memory_region_ref(ret.mr); | |
2083 | } | |
2b647668 | 2084 | rcu_read_unlock(); |
e2177955 AK |
2085 | return ret; |
2086 | } | |
2087 | ||
c6742b14 PB |
2088 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2089 | { | |
2090 | MemoryRegion *mr; | |
2091 | ||
2092 | rcu_read_lock(); | |
2093 | mr = memory_region_find_rcu(container, addr, 1).mr; | |
2094 | rcu_read_unlock(); | |
2095 | return mr && mr != container; | |
2096 | } | |
2097 | ||
1d671369 | 2098 | void address_space_sync_dirty_bitmap(AddressSpace *as) |
86e775c6 | 2099 | { |
99e86347 | 2100 | FlatView *view; |
7664e80c AK |
2101 | FlatRange *fr; |
2102 | ||
856d7245 | 2103 | view = address_space_get_flatview(as); |
99e86347 | 2104 | FOR_EACH_FLAT_RANGE(fr, view) { |
72e22d2f | 2105 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
7664e80c | 2106 | } |
856d7245 | 2107 | flatview_unref(view); |
7664e80c AK |
2108 | } |
2109 | ||
2110 | void memory_global_dirty_log_start(void) | |
2111 | { | |
7664e80c | 2112 | global_dirty_log = true; |
6f6a5ef3 | 2113 | |
7376e582 | 2114 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 PB |
2115 | |
2116 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2117 | memory_region_transaction_begin(); | |
2118 | memory_region_update_pending = true; | |
2119 | memory_region_transaction_commit(); | |
7664e80c AK |
2120 | } |
2121 | ||
2122 | void memory_global_dirty_log_stop(void) | |
2123 | { | |
7664e80c | 2124 | global_dirty_log = false; |
6f6a5ef3 PB |
2125 | |
2126 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2127 | memory_region_transaction_begin(); | |
2128 | memory_region_update_pending = true; | |
2129 | memory_region_transaction_commit(); | |
2130 | ||
7376e582 | 2131 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2132 | } |
2133 | ||
2134 | static void listener_add_address_space(MemoryListener *listener, | |
2135 | AddressSpace *as) | |
2136 | { | |
99e86347 | 2137 | FlatView *view; |
7664e80c AK |
2138 | FlatRange *fr; |
2139 | ||
221b3a3f | 2140 | if (listener->address_space_filter |
f6790af6 | 2141 | && listener->address_space_filter != as) { |
221b3a3f JG |
2142 | return; |
2143 | } | |
2144 | ||
680a4783 PB |
2145 | if (listener->begin) { |
2146 | listener->begin(listener); | |
2147 | } | |
7664e80c | 2148 | if (global_dirty_log) { |
975aefe0 AK |
2149 | if (listener->log_global_start) { |
2150 | listener->log_global_start(listener); | |
2151 | } | |
7664e80c | 2152 | } |
975aefe0 | 2153 | |
856d7245 | 2154 | view = address_space_get_flatview(as); |
99e86347 | 2155 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
2156 | MemoryRegionSection section = { |
2157 | .mr = fr->mr, | |
f6790af6 | 2158 | .address_space = as, |
7664e80c | 2159 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 2160 | .size = fr->addr.size, |
7664e80c | 2161 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 2162 | .readonly = fr->readonly, |
7664e80c | 2163 | }; |
680a4783 PB |
2164 | if (fr->dirty_log_mask && listener->log_start) { |
2165 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2166 | } | |
975aefe0 AK |
2167 | if (listener->region_add) { |
2168 | listener->region_add(listener, §ion); | |
2169 | } | |
7664e80c | 2170 | } |
680a4783 PB |
2171 | if (listener->commit) { |
2172 | listener->commit(listener); | |
2173 | } | |
856d7245 | 2174 | flatview_unref(view); |
7664e80c AK |
2175 | } |
2176 | ||
f6790af6 | 2177 | void memory_listener_register(MemoryListener *listener, AddressSpace *filter) |
7664e80c | 2178 | { |
72e22d2f | 2179 | MemoryListener *other = NULL; |
0d673e36 | 2180 | AddressSpace *as; |
72e22d2f | 2181 | |
7376e582 | 2182 | listener->address_space_filter = filter; |
72e22d2f AK |
2183 | if (QTAILQ_EMPTY(&memory_listeners) |
2184 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
2185 | memory_listeners)->priority) { | |
2186 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
2187 | } else { | |
2188 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2189 | if (listener->priority < other->priority) { | |
2190 | break; | |
2191 | } | |
2192 | } | |
2193 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2194 | } | |
0d673e36 AK |
2195 | |
2196 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2197 | listener_add_address_space(listener, as); | |
2198 | } | |
7664e80c AK |
2199 | } |
2200 | ||
2201 | void memory_listener_unregister(MemoryListener *listener) | |
2202 | { | |
72e22d2f | 2203 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
86e775c6 | 2204 | } |
e2177955 | 2205 | |
7dca8043 | 2206 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2207 | { |
ac95190e | 2208 | memory_region_ref(root); |
59023ef4 | 2209 | memory_region_transaction_begin(); |
f0c02d15 | 2210 | as->ref_count = 1; |
8786db7c | 2211 | as->root = root; |
f0c02d15 | 2212 | as->malloced = false; |
8786db7c AK |
2213 | as->current_map = g_new(FlatView, 1); |
2214 | flatview_init(as->current_map); | |
4c19eb72 AK |
2215 | as->ioeventfd_nb = 0; |
2216 | as->ioeventfds = NULL; | |
0d673e36 | 2217 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2218 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 2219 | address_space_init_dispatch(as); |
f43793c7 PB |
2220 | memory_region_update_pending |= root->enabled; |
2221 | memory_region_transaction_commit(); | |
1c0ffa58 | 2222 | } |
658b2224 | 2223 | |
374f2981 | 2224 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2225 | { |
078c44f4 | 2226 | MemoryListener *listener; |
f0c02d15 | 2227 | bool do_free = as->malloced; |
078c44f4 | 2228 | |
83f3c251 | 2229 | address_space_destroy_dispatch(as); |
078c44f4 DG |
2230 | |
2231 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2232 | assert(listener->address_space_filter != as); | |
2233 | } | |
2234 | ||
856d7245 | 2235 | flatview_unref(as->current_map); |
7dca8043 | 2236 | g_free(as->name); |
4c19eb72 | 2237 | g_free(as->ioeventfds); |
ac95190e | 2238 | memory_region_unref(as->root); |
f0c02d15 PC |
2239 | if (do_free) { |
2240 | g_free(as); | |
2241 | } | |
2242 | } | |
2243 | ||
2244 | AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name) | |
2245 | { | |
2246 | AddressSpace *as; | |
2247 | ||
2248 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2249 | if (root == as->root && as->malloced) { | |
2250 | as->ref_count++; | |
2251 | return as; | |
2252 | } | |
2253 | } | |
2254 | ||
2255 | as = g_malloc0(sizeof *as); | |
2256 | address_space_init(as, root, name); | |
2257 | as->malloced = true; | |
2258 | return as; | |
83f3c251 AK |
2259 | } |
2260 | ||
374f2981 PB |
2261 | void address_space_destroy(AddressSpace *as) |
2262 | { | |
ac95190e PB |
2263 | MemoryRegion *root = as->root; |
2264 | ||
f0c02d15 PC |
2265 | as->ref_count--; |
2266 | if (as->ref_count) { | |
2267 | return; | |
2268 | } | |
374f2981 PB |
2269 | /* Flush out anything from MemoryListeners listening in on this */ |
2270 | memory_region_transaction_begin(); | |
2271 | as->root = NULL; | |
2272 | memory_region_transaction_commit(); | |
2273 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
6e48e8f9 | 2274 | address_space_unregister(as); |
374f2981 PB |
2275 | |
2276 | /* At this point, as->dispatch and as->current_map are dummy | |
2277 | * entries that the guest should never use. Wait for the old | |
2278 | * values to expire before freeing the data. | |
2279 | */ | |
ac95190e | 2280 | as->root = root; |
374f2981 PB |
2281 | call_rcu(as, do_address_space_destroy, rcu); |
2282 | } | |
2283 | ||
314e2987 BS |
2284 | typedef struct MemoryRegionList MemoryRegionList; |
2285 | ||
2286 | struct MemoryRegionList { | |
2287 | const MemoryRegion *mr; | |
314e2987 BS |
2288 | QTAILQ_ENTRY(MemoryRegionList) queue; |
2289 | }; | |
2290 | ||
2291 | typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead; | |
2292 | ||
2293 | static void mtree_print_mr(fprintf_function mon_printf, void *f, | |
2294 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 2295 | hwaddr base, |
9479c57a | 2296 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 2297 | { |
9479c57a JK |
2298 | MemoryRegionList *new_ml, *ml, *next_ml; |
2299 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2300 | const MemoryRegion *submr; |
2301 | unsigned int i; | |
2302 | ||
f8a9f720 | 2303 | if (!mr) { |
314e2987 BS |
2304 | return; |
2305 | } | |
2306 | ||
2307 | for (i = 0; i < level; i++) { | |
2308 | mon_printf(f, " "); | |
2309 | } | |
2310 | ||
2311 | if (mr->alias) { | |
2312 | MemoryRegionList *ml; | |
2313 | bool found = false; | |
2314 | ||
2315 | /* check if the alias is already in the queue */ | |
9479c57a | 2316 | QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
f54bb15f | 2317 | if (ml->mr == mr->alias) { |
314e2987 BS |
2318 | found = true; |
2319 | } | |
2320 | } | |
2321 | ||
2322 | if (!found) { | |
2323 | ml = g_new(MemoryRegionList, 1); | |
2324 | ml->mr = mr->alias; | |
9479c57a | 2325 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
314e2987 | 2326 | } |
4896d74b JK |
2327 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
2328 | " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx | |
f8a9f720 | 2329 | "-" TARGET_FMT_plx "%s\n", |
314e2987 | 2330 | base + mr->addr, |
08dafab4 | 2331 | base + mr->addr |
fd1d9926 AW |
2332 | + (int128_nz(mr->size) ? |
2333 | (hwaddr)int128_get64(int128_sub(mr->size, | |
2334 | int128_one())) : 0), | |
4b474ba7 | 2335 | mr->priority, |
5f9a5ea1 JK |
2336 | mr->romd_mode ? 'R' : '-', |
2337 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
2338 | : '-', | |
3fb18b4d PC |
2339 | memory_region_name(mr), |
2340 | memory_region_name(mr->alias), | |
314e2987 | 2341 | mr->alias_offset, |
08dafab4 | 2342 | mr->alias_offset |
a66670c7 AK |
2343 | + (int128_nz(mr->size) ? |
2344 | (hwaddr)int128_get64(int128_sub(mr->size, | |
f8a9f720 GH |
2345 | int128_one())) : 0), |
2346 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2347 | } else { |
4896d74b | 2348 | mon_printf(f, |
f8a9f720 | 2349 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n", |
314e2987 | 2350 | base + mr->addr, |
08dafab4 | 2351 | base + mr->addr |
fd1d9926 AW |
2352 | + (int128_nz(mr->size) ? |
2353 | (hwaddr)int128_get64(int128_sub(mr->size, | |
2354 | int128_one())) : 0), | |
4b474ba7 | 2355 | mr->priority, |
5f9a5ea1 JK |
2356 | mr->romd_mode ? 'R' : '-', |
2357 | !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W' | |
2358 | : '-', | |
f8a9f720 GH |
2359 | memory_region_name(mr), |
2360 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2361 | } |
9479c57a JK |
2362 | |
2363 | QTAILQ_INIT(&submr_print_queue); | |
2364 | ||
314e2987 | 2365 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
2366 | new_ml = g_new(MemoryRegionList, 1); |
2367 | new_ml->mr = submr; | |
2368 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2369 | if (new_ml->mr->addr < ml->mr->addr || | |
2370 | (new_ml->mr->addr == ml->mr->addr && | |
2371 | new_ml->mr->priority > ml->mr->priority)) { | |
2372 | QTAILQ_INSERT_BEFORE(ml, new_ml, queue); | |
2373 | new_ml = NULL; | |
2374 | break; | |
2375 | } | |
2376 | } | |
2377 | if (new_ml) { | |
2378 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); | |
2379 | } | |
2380 | } | |
2381 | ||
2382 | QTAILQ_FOREACH(ml, &submr_print_queue, queue) { | |
2383 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr, | |
2384 | alias_print_queue); | |
2385 | } | |
2386 | ||
88365e47 | 2387 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
9479c57a | 2388 | g_free(ml); |
314e2987 BS |
2389 | } |
2390 | } | |
2391 | ||
2392 | void mtree_info(fprintf_function mon_printf, void *f) | |
2393 | { | |
2394 | MemoryRegionListHead ml_head; | |
2395 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 2396 | AddressSpace *as; |
314e2987 BS |
2397 | |
2398 | QTAILQ_INIT(&ml_head); | |
2399 | ||
0d673e36 | 2400 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
e48816aa GH |
2401 | mon_printf(f, "address-space: %s\n", as->name); |
2402 | mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head); | |
2403 | mon_printf(f, "\n"); | |
b9f9be88 BS |
2404 | } |
2405 | ||
314e2987 BS |
2406 | /* print aliased regions */ |
2407 | QTAILQ_FOREACH(ml, &ml_head, queue) { | |
e48816aa GH |
2408 | mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); |
2409 | mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head); | |
2410 | mon_printf(f, "\n"); | |
314e2987 BS |
2411 | } |
2412 | ||
2413 | QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { | |
88365e47 | 2414 | g_free(ml); |
314e2987 | 2415 | } |
314e2987 | 2416 | } |
b4fefef9 PC |
2417 | |
2418 | static const TypeInfo memory_region_info = { | |
2419 | .parent = TYPE_OBJECT, | |
2420 | .name = TYPE_MEMORY_REGION, | |
2421 | .instance_size = sizeof(MemoryRegion), | |
2422 | .instance_init = memory_region_initfn, | |
2423 | .instance_finalize = memory_region_finalize, | |
2424 | }; | |
2425 | ||
2426 | static void memory_register_types(void) | |
2427 | { | |
2428 | type_register_static(&memory_region_info); | |
2429 | } | |
2430 | ||
2431 | type_init(memory_register_types) |