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CommitLineData
093bc2cd
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
d38ea87a 16#include "qemu/osdep.h"
022c62cb
PB
17#include "exec/memory.h"
18#include "exec/address-spaces.h"
19#include "exec/ioport.h"
409ddd01 20#include "qapi/visitor.h"
1de7afc9 21#include "qemu/bitops.h"
8c56c1a5 22#include "qemu/error-report.h"
2c9b15ca 23#include "qom/object.h"
55d5d048 24#include "trace.h"
093bc2cd 25
022c62cb 26#include "exec/memory-internal.h"
220c3ebd 27#include "exec/ram_addr.h"
8c56c1a5 28#include "sysemu/kvm.h"
e1c57ab8 29#include "sysemu/sysemu.h"
67d95c15 30
d197063f
PB
31//#define DEBUG_UNASSIGNED
32
ec05ec26
PB
33#define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
22bde714
JK
35static unsigned memory_region_transaction_depth;
36static bool memory_region_update_pending;
4dc56152 37static bool ioeventfd_update_pending;
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38static bool global_dirty_log = false;
39
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40static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 42
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43static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
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46typedef struct AddrRange AddrRange;
47
8417cebf 48/*
c9cdaa3a 49 * Note that signed integers are needed for negative offsetting in aliases
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50 * (large MemoryRegion::alias_offset).
51 */
093bc2cd 52struct AddrRange {
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53 Int128 start;
54 Int128 size;
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55};
56
08dafab4 57static AddrRange addrrange_make(Int128 start, Int128 size)
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58{
59 return (AddrRange) { start, size };
60}
61
62static bool addrrange_equal(AddrRange r1, AddrRange r2)
63{
08dafab4 64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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65}
66
08dafab4 67static Int128 addrrange_end(AddrRange r)
093bc2cd 68{
08dafab4 69 return int128_add(r.start, r.size);
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70}
71
08dafab4 72static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 73{
08dafab4 74 int128_addto(&range.start, delta);
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75 return range;
76}
77
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78static bool addrrange_contains(AddrRange range, Int128 addr)
79{
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82}
83
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84static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85{
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86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
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88}
89
90static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91{
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92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
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95}
96
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97enum ListenerDirection { Forward, Reverse };
98
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99static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101{
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104}
105
106#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
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116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
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121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
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124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
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131#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
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140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
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147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
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149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
dfde4e6e 158/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 159#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
7376e582 160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 161 .mr = (fr)->mr, \
f6790af6 162 .address_space = (as), \
0e0d36b4 163 .offset_within_region = (fr)->offset_in_region, \
052e87b0 164 .size = (fr)->addr.size, \
0e0d36b4 165 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 166 .readonly = (fr)->readonly, \
b2dfd71c 167 }), ##_args)
0e0d36b4 168
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169struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172};
173
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174struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
753d5e14 178 EventNotifier *e;
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179};
180
181static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183{
08dafab4 184 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 185 return true;
08dafab4 186 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 187 return false;
08dafab4 188 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 189 return true;
08dafab4 190 } else if (int128_gt(a.addr.size, b.addr.size)) {
3e9d69e7
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191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
753d5e14 203 if (a.e < b.e) {
3e9d69e7 204 return true;
753d5e14 205 } else if (a.e > b.e) {
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206 return false;
207 }
208 return false;
209}
210
211static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213{
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216}
217
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218typedef struct FlatRange FlatRange;
219typedef struct FlatView FlatView;
220
221/* Range of memory in the global map. Addresses are absolute. */
222struct FlatRange {
223 MemoryRegion *mr;
a8170e5e 224 hwaddr offset_in_region;
093bc2cd 225 AddrRange addr;
5a583347 226 uint8_t dirty_log_mask;
5f9a5ea1 227 bool romd_mode;
fb1cd6f9 228 bool readonly;
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229};
230
231/* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234struct FlatView {
374f2981 235 struct rcu_head rcu;
856d7245 236 unsigned ref;
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237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240};
241
cc31e6e7
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242typedef struct AddressSpaceOps AddressSpaceOps;
243
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244#define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
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247static bool flatrange_equal(FlatRange *a, FlatRange *b)
248{
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 251 && a->offset_in_region == b->offset_in_region
5f9a5ea1 252 && a->romd_mode == b->romd_mode
fb1cd6f9 253 && a->readonly == b->readonly;
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254}
255
256static void flatview_init(FlatView *view)
257{
856d7245 258 view->ref = 1;
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259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262}
263
264/* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268{
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 271 view->ranges = g_realloc(view->ranges,
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272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
dfde4e6e 277 memory_region_ref(range->mr);
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278 ++view->nr;
279}
280
281static void flatview_destroy(FlatView *view)
282{
dfde4e6e
PB
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
7267c094 288 g_free(view->ranges);
a9a0c06d 289 g_free(view);
093bc2cd
AK
290}
291
856d7245
PB
292static void flatview_ref(FlatView *view)
293{
294 atomic_inc(&view->ref);
295}
296
297static void flatview_unref(FlatView *view)
298{
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302}
303
3d8e6bf9
AK
304static bool can_merge(FlatRange *r1, FlatRange *r2)
305{
08dafab4 306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 307 && r1->mr == r2->mr
08dafab4
AK
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
d0a9b5bc 311 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 312 && r1->romd_mode == r2->romd_mode
fb1cd6f9 313 && r1->readonly == r2->readonly;
3d8e6bf9
AK
314}
315
8508e024 316/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK
317static void flatview_simplify(FlatView *view)
318{
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
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327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334}
335
e7342aa3
PB
336static bool memory_region_big_endian(MemoryRegion *mr)
337{
338#ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340#else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342#endif
343}
344
e11ef3d1
PB
345static bool memory_region_wrong_endianness(MemoryRegion *mr)
346{
347#ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349#else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351#endif
352}
353
354static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355{
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373}
374
cc05c43a
PM
375static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
376 hwaddr addr,
377 uint64_t *value,
378 unsigned size,
379 unsigned shift,
380 uint64_t mask,
381 MemTxAttrs attrs)
382{
383 uint64_t tmp;
384
385 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68
HB
386 if (mr->subpage) {
387 trace_memory_region_subpage_read(mr, addr, tmp, size);
388 } else {
389 trace_memory_region_ops_read(mr, addr, tmp, size);
390 }
cc05c43a
PM
391 *value |= (tmp & mask) << shift;
392 return MEMTX_OK;
393}
394
395static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
396 hwaddr addr,
397 uint64_t *value,
398 unsigned size,
399 unsigned shift,
cc05c43a
PM
400 uint64_t mask,
401 MemTxAttrs attrs)
ce5d2f33 402{
ce5d2f33
PB
403 uint64_t tmp;
404
cc05c43a 405 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68
HB
406 if (mr->subpage) {
407 trace_memory_region_subpage_read(mr, addr, tmp, size);
408 } else {
409 trace_memory_region_ops_read(mr, addr, tmp, size);
410 }
ce5d2f33 411 *value |= (tmp & mask) << shift;
cc05c43a 412 return MEMTX_OK;
ce5d2f33
PB
413}
414
cc05c43a
PM
415static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
416 hwaddr addr,
417 uint64_t *value,
418 unsigned size,
419 unsigned shift,
420 uint64_t mask,
421 MemTxAttrs attrs)
164a4dcd 422{
cc05c43a
PM
423 uint64_t tmp = 0;
424 MemTxResult r;
164a4dcd 425
cc05c43a 426 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68
HB
427 if (mr->subpage) {
428 trace_memory_region_subpage_read(mr, addr, tmp, size);
429 } else {
430 trace_memory_region_ops_read(mr, addr, tmp, size);
431 }
164a4dcd 432 *value |= (tmp & mask) << shift;
cc05c43a 433 return r;
164a4dcd
AK
434}
435
cc05c43a
PM
436static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
437 hwaddr addr,
438 uint64_t *value,
439 unsigned size,
440 unsigned shift,
441 uint64_t mask,
442 MemTxAttrs attrs)
ce5d2f33 443{
ce5d2f33
PB
444 uint64_t tmp;
445
446 tmp = (*value >> shift) & mask;
23d92d68
HB
447 if (mr->subpage) {
448 trace_memory_region_subpage_write(mr, addr, tmp, size);
449 } else {
450 trace_memory_region_ops_write(mr, addr, tmp, size);
451 }
ce5d2f33 452 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 453 return MEMTX_OK;
ce5d2f33
PB
454}
455
cc05c43a
PM
456static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
457 hwaddr addr,
458 uint64_t *value,
459 unsigned size,
460 unsigned shift,
461 uint64_t mask,
462 MemTxAttrs attrs)
164a4dcd 463{
164a4dcd
AK
464 uint64_t tmp;
465
466 tmp = (*value >> shift) & mask;
23d92d68
HB
467 if (mr->subpage) {
468 trace_memory_region_subpage_write(mr, addr, tmp, size);
469 } else {
470 trace_memory_region_ops_write(mr, addr, tmp, size);
471 }
164a4dcd 472 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 473 return MEMTX_OK;
164a4dcd
AK
474}
475
cc05c43a
PM
476static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned shift,
481 uint64_t mask,
482 MemTxAttrs attrs)
483{
484 uint64_t tmp;
485
cc05c43a 486 tmp = (*value >> shift) & mask;
23d92d68
HB
487 if (mr->subpage) {
488 trace_memory_region_subpage_write(mr, addr, tmp, size);
489 } else {
490 trace_memory_region_ops_write(mr, addr, tmp, size);
491 }
cc05c43a
PM
492 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
493}
494
495static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
496 uint64_t *value,
497 unsigned size,
498 unsigned access_size_min,
499 unsigned access_size_max,
cc05c43a
PM
500 MemTxResult (*access)(MemoryRegion *mr,
501 hwaddr addr,
502 uint64_t *value,
503 unsigned size,
504 unsigned shift,
505 uint64_t mask,
506 MemTxAttrs attrs),
507 MemoryRegion *mr,
508 MemTxAttrs attrs)
164a4dcd
AK
509{
510 uint64_t access_mask;
511 unsigned access_size;
512 unsigned i;
cc05c43a 513 MemTxResult r = MEMTX_OK;
164a4dcd
AK
514
515 if (!access_size_min) {
516 access_size_min = 1;
517 }
518 if (!access_size_max) {
519 access_size_max = 4;
520 }
ce5d2f33
PB
521
522 /* FIXME: support unaligned access? */
164a4dcd
AK
523 access_size = MAX(MIN(size, access_size_max), access_size_min);
524 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
525 if (memory_region_big_endian(mr)) {
526 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
527 r |= access(mr, addr + i, value, access_size,
528 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
529 }
530 } else {
531 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
532 r |= access(mr, addr + i, value, access_size, i * 8,
533 access_mask, attrs);
e7342aa3 534 }
164a4dcd 535 }
cc05c43a 536 return r;
164a4dcd
AK
537}
538
e2177955
AK
539static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
540{
0d673e36
AK
541 AddressSpace *as;
542
feca4ac1
PB
543 while (mr->container) {
544 mr = mr->container;
e2177955 545 }
0d673e36
AK
546 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
547 if (mr == as->root) {
548 return as;
549 }
e2177955 550 }
eed2bacf 551 return NULL;
e2177955
AK
552}
553
093bc2cd
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554/* Render a memory region into the global view. Ranges in @view obscure
555 * ranges in @mr.
556 */
557static void render_memory_region(FlatView *view,
558 MemoryRegion *mr,
08dafab4 559 Int128 base,
fb1cd6f9
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560 AddrRange clip,
561 bool readonly)
093bc2cd
AK
562{
563 MemoryRegion *subregion;
564 unsigned i;
a8170e5e 565 hwaddr offset_in_region;
08dafab4
AK
566 Int128 remain;
567 Int128 now;
093bc2cd
AK
568 FlatRange fr;
569 AddrRange tmp;
570
6bba19ba
AK
571 if (!mr->enabled) {
572 return;
573 }
574
08dafab4 575 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 576 readonly |= mr->readonly;
093bc2cd
AK
577
578 tmp = addrrange_make(base, mr->size);
579
580 if (!addrrange_intersects(tmp, clip)) {
581 return;
582 }
583
584 clip = addrrange_intersection(tmp, clip);
585
586 if (mr->alias) {
08dafab4
AK
587 int128_subfrom(&base, int128_make64(mr->alias->addr));
588 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 589 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK
590 return;
591 }
592
593 /* Render subregions in priority order. */
594 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 595 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
596 }
597
14a3c10a 598 if (!mr->terminates) {
093bc2cd
AK
599 return;
600 }
601
08dafab4 602 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
603 base = clip.start;
604 remain = clip.size;
605
2eb74e1a 606 fr.mr = mr;
6f6a5ef3 607 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
2eb74e1a
PC
608 fr.romd_mode = mr->romd_mode;
609 fr.readonly = readonly;
610
093bc2cd 611 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
612 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
613 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
614 continue;
615 }
08dafab4
AK
616 if (int128_lt(base, view->ranges[i].addr.start)) {
617 now = int128_min(remain,
618 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
619 fr.offset_in_region = offset_in_region;
620 fr.addr = addrrange_make(base, now);
621 flatview_insert(view, i, &fr);
622 ++i;
08dafab4
AK
623 int128_addto(&base, now);
624 offset_in_region += int128_get64(now);
625 int128_subfrom(&remain, now);
093bc2cd 626 }
d26a8cae
AK
627 now = int128_sub(int128_min(int128_add(base, remain),
628 addrrange_end(view->ranges[i].addr)),
629 base);
630 int128_addto(&base, now);
631 offset_in_region += int128_get64(now);
632 int128_subfrom(&remain, now);
093bc2cd 633 }
08dafab4 634 if (int128_nz(remain)) {
093bc2cd
AK
635 fr.offset_in_region = offset_in_region;
636 fr.addr = addrrange_make(base, remain);
637 flatview_insert(view, i, &fr);
638 }
639}
640
641/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 642static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 643{
a9a0c06d 644 FlatView *view;
093bc2cd 645
a9a0c06d
PB
646 view = g_new(FlatView, 1);
647 flatview_init(view);
093bc2cd 648
83f3c251 649 if (mr) {
a9a0c06d 650 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
651 addrrange_make(int128_zero(), int128_2_64()), false);
652 }
a9a0c06d 653 flatview_simplify(view);
093bc2cd
AK
654
655 return view;
656}
657
3e9d69e7
AK
658static void address_space_add_del_ioeventfds(AddressSpace *as,
659 MemoryRegionIoeventfd *fds_new,
660 unsigned fds_new_nb,
661 MemoryRegionIoeventfd *fds_old,
662 unsigned fds_old_nb)
663{
664 unsigned iold, inew;
80a1ea37
AK
665 MemoryRegionIoeventfd *fd;
666 MemoryRegionSection section;
3e9d69e7
AK
667
668 /* Generate a symmetric difference of the old and new fd sets, adding
669 * and deleting as necessary.
670 */
671
672 iold = inew = 0;
673 while (iold < fds_old_nb || inew < fds_new_nb) {
674 if (iold < fds_old_nb
675 && (inew == fds_new_nb
676 || memory_region_ioeventfd_before(fds_old[iold],
677 fds_new[inew]))) {
80a1ea37
AK
678 fd = &fds_old[iold];
679 section = (MemoryRegionSection) {
f6790af6 680 .address_space = as,
80a1ea37 681 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 682 .size = fd->addr.size,
80a1ea37
AK
683 };
684 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 685 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
686 ++iold;
687 } else if (inew < fds_new_nb
688 && (iold == fds_old_nb
689 || memory_region_ioeventfd_before(fds_new[inew],
690 fds_old[iold]))) {
80a1ea37
AK
691 fd = &fds_new[inew];
692 section = (MemoryRegionSection) {
f6790af6 693 .address_space = as,
80a1ea37 694 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 695 .size = fd->addr.size,
80a1ea37
AK
696 };
697 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 698 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
699 ++inew;
700 } else {
701 ++iold;
702 ++inew;
703 }
704 }
705}
706
856d7245
PB
707static FlatView *address_space_get_flatview(AddressSpace *as)
708{
709 FlatView *view;
710
374f2981
PB
711 rcu_read_lock();
712 view = atomic_rcu_read(&as->current_map);
856d7245 713 flatview_ref(view);
374f2981 714 rcu_read_unlock();
856d7245
PB
715 return view;
716}
717
3e9d69e7
AK
718static void address_space_update_ioeventfds(AddressSpace *as)
719{
99e86347 720 FlatView *view;
3e9d69e7
AK
721 FlatRange *fr;
722 unsigned ioeventfd_nb = 0;
723 MemoryRegionIoeventfd *ioeventfds = NULL;
724 AddrRange tmp;
725 unsigned i;
726
856d7245 727 view = address_space_get_flatview(as);
99e86347 728 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
729 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
730 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
731 int128_sub(fr->addr.start,
732 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
733 if (addrrange_intersects(fr->addr, tmp)) {
734 ++ioeventfd_nb;
7267c094 735 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
736 ioeventfd_nb * sizeof(*ioeventfds));
737 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
738 ioeventfds[ioeventfd_nb-1].addr = tmp;
739 }
740 }
741 }
742
743 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
744 as->ioeventfds, as->ioeventfd_nb);
745
7267c094 746 g_free(as->ioeventfds);
3e9d69e7
AK
747 as->ioeventfds = ioeventfds;
748 as->ioeventfd_nb = ioeventfd_nb;
856d7245 749 flatview_unref(view);
3e9d69e7
AK
750}
751
b8af1afb 752static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
753 const FlatView *old_view,
754 const FlatView *new_view,
b8af1afb 755 bool adding)
093bc2cd 756{
093bc2cd
AK
757 unsigned iold, inew;
758 FlatRange *frold, *frnew;
093bc2cd
AK
759
760 /* Generate a symmetric difference of the old and new memory maps.
761 * Kill ranges in the old map, and instantiate ranges in the new map.
762 */
763 iold = inew = 0;
a9a0c06d
PB
764 while (iold < old_view->nr || inew < new_view->nr) {
765 if (iold < old_view->nr) {
766 frold = &old_view->ranges[iold];
093bc2cd
AK
767 } else {
768 frold = NULL;
769 }
a9a0c06d
PB
770 if (inew < new_view->nr) {
771 frnew = &new_view->ranges[inew];
093bc2cd
AK
772 } else {
773 frnew = NULL;
774 }
775
776 if (frold
777 && (!frnew
08dafab4
AK
778 || int128_lt(frold->addr.start, frnew->addr.start)
779 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 780 && !flatrange_equal(frold, frnew)))) {
41a6e477 781 /* In old but not in new, or in both but attributes changed. */
093bc2cd 782
b8af1afb 783 if (!adding) {
72e22d2f 784 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
785 }
786
093bc2cd
AK
787 ++iold;
788 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 789 /* In both and unchanged (except logging may have changed) */
093bc2cd 790
b8af1afb 791 if (adding) {
50c1e149 792 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB
793 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
794 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
795 frold->dirty_log_mask,
796 frnew->dirty_log_mask);
797 }
798 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
799 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
800 frold->dirty_log_mask,
801 frnew->dirty_log_mask);
b8af1afb 802 }
5a583347
AK
803 }
804
093bc2cd
AK
805 ++iold;
806 ++inew;
093bc2cd
AK
807 } else {
808 /* In new */
809
b8af1afb 810 if (adding) {
72e22d2f 811 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
812 }
813
093bc2cd
AK
814 ++inew;
815 }
816 }
b8af1afb
AK
817}
818
819
820static void address_space_update_topology(AddressSpace *as)
821{
856d7245 822 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 823 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
824
825 address_space_update_topology_pass(as, old_view, new_view, false);
826 address_space_update_topology_pass(as, old_view, new_view, true);
827
374f2981
PB
828 /* Writes are protected by the BQL. */
829 atomic_rcu_set(&as->current_map, new_view);
830 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB
831
832 /* Note that all the old MemoryRegions are still alive up to this
833 * point. This relieves most MemoryListeners from the need to
834 * ref/unref the MemoryRegions they get---unless they use them
835 * outside the iothread mutex, in which case precise reference
836 * counting is necessary.
837 */
838 flatview_unref(old_view);
839
3e9d69e7 840 address_space_update_ioeventfds(as);
093bc2cd
AK
841}
842
4ef4db86
AK
843void memory_region_transaction_begin(void)
844{
bb880ded 845 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
846 ++memory_region_transaction_depth;
847}
848
4dc56152
GA
849static void memory_region_clear_pending(void)
850{
851 memory_region_update_pending = false;
852 ioeventfd_update_pending = false;
853}
854
4ef4db86
AK
855void memory_region_transaction_commit(void)
856{
0d673e36
AK
857 AddressSpace *as;
858
4ef4db86
AK
859 assert(memory_region_transaction_depth);
860 --memory_region_transaction_depth;
4dc56152
GA
861 if (!memory_region_transaction_depth) {
862 if (memory_region_update_pending) {
863 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 864
4dc56152
GA
865 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
866 address_space_update_topology(as);
867 }
02e2b95f 868
4dc56152
GA
869 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
870 } else if (ioeventfd_update_pending) {
871 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
872 address_space_update_ioeventfds(as);
873 }
874 }
875 memory_region_clear_pending();
876 }
4ef4db86
AK
877}
878
545e92e0
AK
879static void memory_region_destructor_none(MemoryRegion *mr)
880{
881}
882
883static void memory_region_destructor_ram(MemoryRegion *mr)
884{
885 qemu_ram_free(mr->ram_addr);
886}
887
d0a9b5bc
AK
888static void memory_region_destructor_rom_device(MemoryRegion *mr)
889{
890 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
891}
892
b4fefef9
PC
893static bool memory_region_need_escape(char c)
894{
895 return c == '/' || c == '[' || c == '\\' || c == ']';
896}
897
898static char *memory_region_escape_name(const char *name)
899{
900 const char *p;
901 char *escaped, *q;
902 uint8_t c;
903 size_t bytes = 0;
904
905 for (p = name; *p; p++) {
906 bytes += memory_region_need_escape(*p) ? 4 : 1;
907 }
908 if (bytes == p - name) {
909 return g_memdup(name, bytes + 1);
910 }
911
912 escaped = g_malloc(bytes + 1);
913 for (p = name, q = escaped; *p; p++) {
914 c = *p;
915 if (unlikely(memory_region_need_escape(c))) {
916 *q++ = '\\';
917 *q++ = 'x';
918 *q++ = "0123456789abcdef"[c >> 4];
919 c = "0123456789abcdef"[c & 15];
920 }
921 *q++ = c;
922 }
923 *q = 0;
924 return escaped;
925}
926
093bc2cd 927void memory_region_init(MemoryRegion *mr,
2c9b15ca 928 Object *owner,
093bc2cd
AK
929 const char *name,
930 uint64_t size)
931{
22a893e4 932 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
933 mr->size = int128_make64(size);
934 if (size == UINT64_MAX) {
935 mr->size = int128_2_64();
936 }
302fa283 937 mr->name = g_strdup(name);
612263cf 938 mr->owner = owner;
58eaa217 939 mr->ram_block = NULL;
b4fefef9
PC
940
941 if (name) {
843ef73a
PC
942 char *escaped_name = memory_region_escape_name(name);
943 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB
944
945 if (!owner) {
946 owner = container_get(qdev_get_machine(), "/unattached");
947 }
948
843ef73a 949 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 950 object_unref(OBJECT(mr));
843ef73a
PC
951 g_free(name_array);
952 g_free(escaped_name);
b4fefef9
PC
953 }
954}
955
d7bce999
EB
956static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
957 void *opaque, Error **errp)
409ddd01
PC
958{
959 MemoryRegion *mr = MEMORY_REGION(obj);
960 uint64_t value = mr->addr;
961
51e72bc1 962 visit_type_uint64(v, name, &value, errp);
409ddd01
PC
963}
964
d7bce999
EB
965static void memory_region_get_container(Object *obj, Visitor *v,
966 const char *name, void *opaque,
967 Error **errp)
409ddd01
PC
968{
969 MemoryRegion *mr = MEMORY_REGION(obj);
970 gchar *path = (gchar *)"";
971
972 if (mr->container) {
973 path = object_get_canonical_path(OBJECT(mr->container));
974 }
51e72bc1 975 visit_type_str(v, name, &path, errp);
409ddd01
PC
976 if (mr->container) {
977 g_free(path);
978 }
979}
980
981static Object *memory_region_resolve_container(Object *obj, void *opaque,
982 const char *part)
983{
984 MemoryRegion *mr = MEMORY_REGION(obj);
985
986 return OBJECT(mr->container);
987}
988
d7bce999
EB
989static void memory_region_get_priority(Object *obj, Visitor *v,
990 const char *name, void *opaque,
991 Error **errp)
d33382da
PC
992{
993 MemoryRegion *mr = MEMORY_REGION(obj);
994 int32_t value = mr->priority;
995
51e72bc1 996 visit_type_int32(v, name, &value, errp);
d33382da
PC
997}
998
999static bool memory_region_get_may_overlap(Object *obj, Error **errp)
1000{
1001 MemoryRegion *mr = MEMORY_REGION(obj);
1002
1003 return mr->may_overlap;
1004}
1005
d7bce999
EB
1006static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1007 void *opaque, Error **errp)
52aef7bb
PC
1008{
1009 MemoryRegion *mr = MEMORY_REGION(obj);
1010 uint64_t value = memory_region_size(mr);
1011
51e72bc1 1012 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC
1013}
1014
b4fefef9
PC
1015static void memory_region_initfn(Object *obj)
1016{
1017 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1018 ObjectProperty *op;
b4fefef9
PC
1019
1020 mr->ops = &unassigned_mem_ops;
ec05ec26 1021 mr->ram_addr = RAM_ADDR_INVALID;
6bba19ba 1022 mr->enabled = true;
5f9a5ea1 1023 mr->romd_mode = true;
196ea131 1024 mr->global_locking = true;
545e92e0 1025 mr->destructor = memory_region_destructor_none;
093bc2cd 1026 QTAILQ_INIT(&mr->subregions);
093bc2cd 1027 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1028
1029 op = object_property_add(OBJECT(mr), "container",
1030 "link<" TYPE_MEMORY_REGION ">",
1031 memory_region_get_container,
1032 NULL, /* memory_region_set_container */
1033 NULL, NULL, &error_abort);
1034 op->resolve = memory_region_resolve_container;
1035
1036 object_property_add(OBJECT(mr), "addr", "uint64",
1037 memory_region_get_addr,
1038 NULL, /* memory_region_set_addr */
1039 NULL, NULL, &error_abort);
d33382da
PC
1040 object_property_add(OBJECT(mr), "priority", "uint32",
1041 memory_region_get_priority,
1042 NULL, /* memory_region_set_priority */
1043 NULL, NULL, &error_abort);
1044 object_property_add_bool(OBJECT(mr), "may-overlap",
1045 memory_region_get_may_overlap,
1046 NULL, /* memory_region_set_may_overlap */
1047 &error_abort);
52aef7bb
PC
1048 object_property_add(OBJECT(mr), "size", "uint64",
1049 memory_region_get_size,
1050 NULL, /* memory_region_set_size, */
1051 NULL, NULL, &error_abort);
093bc2cd
AK
1052}
1053
b018ddf6
PB
1054static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1055 unsigned size)
1056{
1057#ifdef DEBUG_UNASSIGNED
1058 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1059#endif
4917cf44
AF
1060 if (current_cpu != NULL) {
1061 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1062 }
68a7439a 1063 return 0;
b018ddf6
PB
1064}
1065
1066static void unassigned_mem_write(void *opaque, hwaddr addr,
1067 uint64_t val, unsigned size)
1068{
1069#ifdef DEBUG_UNASSIGNED
1070 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1071#endif
4917cf44
AF
1072 if (current_cpu != NULL) {
1073 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1074 }
b018ddf6
PB
1075}
1076
d197063f
PB
1077static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1078 unsigned size, bool is_write)
1079{
1080 return false;
1081}
1082
1083const MemoryRegionOps unassigned_mem_ops = {
1084 .valid.accepts = unassigned_mem_accepts,
1085 .endianness = DEVICE_NATIVE_ENDIAN,
1086};
1087
d2702032
PB
1088bool memory_region_access_valid(MemoryRegion *mr,
1089 hwaddr addr,
1090 unsigned size,
1091 bool is_write)
093bc2cd 1092{
a014ed07
PB
1093 int access_size_min, access_size_max;
1094 int access_size, i;
897fa7cf 1095
093bc2cd
AK
1096 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1097 return false;
1098 }
1099
a014ed07 1100 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1101 return true;
1102 }
1103
a014ed07
PB
1104 access_size_min = mr->ops->valid.min_access_size;
1105 if (!mr->ops->valid.min_access_size) {
1106 access_size_min = 1;
1107 }
1108
1109 access_size_max = mr->ops->valid.max_access_size;
1110 if (!mr->ops->valid.max_access_size) {
1111 access_size_max = 4;
1112 }
1113
1114 access_size = MAX(MIN(size, access_size_max), access_size_min);
1115 for (i = 0; i < size; i += access_size) {
1116 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1117 is_write)) {
1118 return false;
1119 }
093bc2cd 1120 }
a014ed07 1121
093bc2cd
AK
1122 return true;
1123}
1124
cc05c43a
PM
1125static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1126 hwaddr addr,
1127 uint64_t *pval,
1128 unsigned size,
1129 MemTxAttrs attrs)
093bc2cd 1130{
cc05c43a 1131 *pval = 0;
093bc2cd 1132
ce5d2f33 1133 if (mr->ops->read) {
cc05c43a
PM
1134 return access_with_adjusted_size(addr, pval, size,
1135 mr->ops->impl.min_access_size,
1136 mr->ops->impl.max_access_size,
1137 memory_region_read_accessor,
1138 mr, attrs);
1139 } else if (mr->ops->read_with_attrs) {
1140 return access_with_adjusted_size(addr, pval, size,
1141 mr->ops->impl.min_access_size,
1142 mr->ops->impl.max_access_size,
1143 memory_region_read_with_attrs_accessor,
1144 mr, attrs);
ce5d2f33 1145 } else {
cc05c43a
PM
1146 return access_with_adjusted_size(addr, pval, size, 1, 4,
1147 memory_region_oldmmio_read_accessor,
1148 mr, attrs);
74901c3b 1149 }
093bc2cd
AK
1150}
1151
3b643495
PM
1152MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1153 hwaddr addr,
1154 uint64_t *pval,
1155 unsigned size,
1156 MemTxAttrs attrs)
a621f38d 1157{
cc05c43a
PM
1158 MemTxResult r;
1159
791af8c8
PB
1160 if (!memory_region_access_valid(mr, addr, size, false)) {
1161 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1162 return MEMTX_DECODE_ERROR;
791af8c8 1163 }
a621f38d 1164
cc05c43a 1165 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1166 adjust_endianness(mr, pval, size);
cc05c43a 1167 return r;
a621f38d 1168}
093bc2cd 1169
8c56c1a5
PF
1170/* Return true if an eventfd was signalled */
1171static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1172 hwaddr addr,
1173 uint64_t data,
1174 unsigned size,
1175 MemTxAttrs attrs)
1176{
1177 MemoryRegionIoeventfd ioeventfd = {
1178 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1179 .data = data,
1180 };
1181 unsigned i;
1182
1183 for (i = 0; i < mr->ioeventfd_nb; i++) {
1184 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1185 ioeventfd.e = mr->ioeventfds[i].e;
1186
1187 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1188 event_notifier_set(ioeventfd.e);
1189 return true;
1190 }
1191 }
1192
1193 return false;
1194}
1195
3b643495
PM
1196MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1197 hwaddr addr,
1198 uint64_t data,
1199 unsigned size,
1200 MemTxAttrs attrs)
a621f38d 1201{
897fa7cf 1202 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1203 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1204 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1205 }
1206
a621f38d
AK
1207 adjust_endianness(mr, &data, size);
1208
8c56c1a5
PF
1209 if ((!kvm_eventfds_enabled()) &&
1210 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1211 return MEMTX_OK;
1212 }
1213
ce5d2f33 1214 if (mr->ops->write) {
cc05c43a
PM
1215 return access_with_adjusted_size(addr, &data, size,
1216 mr->ops->impl.min_access_size,
1217 mr->ops->impl.max_access_size,
1218 memory_region_write_accessor, mr,
1219 attrs);
1220 } else if (mr->ops->write_with_attrs) {
1221 return
1222 access_with_adjusted_size(addr, &data, size,
1223 mr->ops->impl.min_access_size,
1224 mr->ops->impl.max_access_size,
1225 memory_region_write_with_attrs_accessor,
1226 mr, attrs);
ce5d2f33 1227 } else {
cc05c43a
PM
1228 return access_with_adjusted_size(addr, &data, size, 1, 4,
1229 memory_region_oldmmio_write_accessor,
1230 mr, attrs);
74901c3b 1231 }
093bc2cd
AK
1232}
1233
093bc2cd 1234void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1235 Object *owner,
093bc2cd
AK
1236 const MemoryRegionOps *ops,
1237 void *opaque,
1238 const char *name,
1239 uint64_t size)
1240{
2c9b15ca 1241 memory_region_init(mr, owner, name, size);
6d6d2abf 1242 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1243 mr->opaque = opaque;
14a3c10a 1244 mr->terminates = true;
093bc2cd
AK
1245}
1246
1247void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1248 Object *owner,
093bc2cd 1249 const char *name,
49946538
HT
1250 uint64_t size,
1251 Error **errp)
093bc2cd 1252{
2c9b15ca 1253 memory_region_init(mr, owner, name, size);
8ea9252a 1254 mr->ram = true;
14a3c10a 1255 mr->terminates = true;
545e92e0 1256 mr->destructor = memory_region_destructor_ram;
49946538 1257 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
677e7805 1258 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB
1259}
1260
60786ef3
MT
1261void memory_region_init_resizeable_ram(MemoryRegion *mr,
1262 Object *owner,
1263 const char *name,
1264 uint64_t size,
1265 uint64_t max_size,
1266 void (*resized)(const char*,
1267 uint64_t length,
1268 void *host),
1269 Error **errp)
1270{
1271 memory_region_init(mr, owner, name, size);
1272 mr->ram = true;
1273 mr->terminates = true;
1274 mr->destructor = memory_region_destructor_ram;
1275 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
677e7805 1276 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT
1277}
1278
0b183fc8
PB
1279#ifdef __linux__
1280void memory_region_init_ram_from_file(MemoryRegion *mr,
1281 struct Object *owner,
1282 const char *name,
1283 uint64_t size,
dbcb8981 1284 bool share,
7f56e740
PB
1285 const char *path,
1286 Error **errp)
0b183fc8
PB
1287{
1288 memory_region_init(mr, owner, name, size);
1289 mr->ram = true;
1290 mr->terminates = true;
1291 mr->destructor = memory_region_destructor_ram;
dbcb8981 1292 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1293 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1294}
0b183fc8 1295#endif
093bc2cd
AK
1296
1297void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1298 Object *owner,
093bc2cd
AK
1299 const char *name,
1300 uint64_t size,
1301 void *ptr)
1302{
2c9b15ca 1303 memory_region_init(mr, owner, name, size);
8ea9252a 1304 mr->ram = true;
14a3c10a 1305 mr->terminates = true;
fc3e7665 1306 mr->destructor = memory_region_destructor_ram;
677e7805 1307 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT
1308
1309 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1310 assert(ptr != NULL);
0bdaa3a4 1311 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK
1312}
1313
e4dc3f59
ND
1314void memory_region_set_skip_dump(MemoryRegion *mr)
1315{
1316 mr->skip_dump = true;
1317}
1318
093bc2cd 1319void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1320 Object *owner,
093bc2cd
AK
1321 const char *name,
1322 MemoryRegion *orig,
a8170e5e 1323 hwaddr offset,
093bc2cd
AK
1324 uint64_t size)
1325{
2c9b15ca 1326 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1327 mr->alias = orig;
1328 mr->alias_offset = offset;
1329}
1330
d0a9b5bc 1331void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1332 Object *owner,
d0a9b5bc 1333 const MemoryRegionOps *ops,
75f5941c 1334 void *opaque,
d0a9b5bc 1335 const char *name,
33e0eb52
HT
1336 uint64_t size,
1337 Error **errp)
d0a9b5bc 1338{
2c9b15ca 1339 memory_region_init(mr, owner, name, size);
7bc2b9cd 1340 mr->ops = ops;
75f5941c 1341 mr->opaque = opaque;
d0a9b5bc 1342 mr->terminates = true;
75c578dc 1343 mr->rom_device = true;
d0a9b5bc 1344 mr->destructor = memory_region_destructor_rom_device;
33e0eb52 1345 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK
1346}
1347
30951157 1348void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1349 Object *owner,
30951157
AK
1350 const MemoryRegionIOMMUOps *ops,
1351 const char *name,
1352 uint64_t size)
1353{
2c9b15ca 1354 memory_region_init(mr, owner, name, size);
30951157
AK
1355 mr->iommu_ops = ops,
1356 mr->terminates = true; /* then re-forwards */
06866575 1357 notifier_list_init(&mr->iommu_notify);
30951157
AK
1358}
1359
b4fefef9 1360static void memory_region_finalize(Object *obj)
093bc2cd 1361{
b4fefef9
PC
1362 MemoryRegion *mr = MEMORY_REGION(obj);
1363
2e2b8eb7
PB
1364 assert(!mr->container);
1365
1366 /* We know the region is not visible in any address space (it
1367 * does not have a container and cannot be a root either because
1368 * it has no references, so we can blindly clear mr->enabled.
1369 * memory_region_set_enabled instead could trigger a transaction
1370 * and cause an infinite loop.
1371 */
1372 mr->enabled = false;
1373 memory_region_transaction_begin();
1374 while (!QTAILQ_EMPTY(&mr->subregions)) {
1375 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1376 memory_region_del_subregion(mr, subregion);
1377 }
1378 memory_region_transaction_commit();
1379
545e92e0 1380 mr->destructor(mr);
093bc2cd 1381 memory_region_clear_coalescing(mr);
302fa283 1382 g_free((char *)mr->name);
7267c094 1383 g_free(mr->ioeventfds);
093bc2cd
AK
1384}
1385
803c0816
PB
1386Object *memory_region_owner(MemoryRegion *mr)
1387{
22a893e4
PB
1388 Object *obj = OBJECT(mr);
1389 return obj->parent;
803c0816
PB
1390}
1391
46637be2
PB
1392void memory_region_ref(MemoryRegion *mr)
1393{
22a893e4
PB
1394 /* MMIO callbacks most likely will access data that belongs
1395 * to the owner, hence the need to ref/unref the owner whenever
1396 * the memory region is in use.
1397 *
1398 * The memory region is a child of its owner. As long as the
1399 * owner doesn't call unparent itself on the memory region,
1400 * ref-ing the owner will also keep the memory region alive.
612263cf
PB
1401 * Memory regions without an owner are supposed to never go away;
1402 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1403 */
612263cf
PB
1404 if (mr && mr->owner) {
1405 object_ref(mr->owner);
46637be2
PB
1406 }
1407}
1408
1409void memory_region_unref(MemoryRegion *mr)
1410{
612263cf
PB
1411 if (mr && mr->owner) {
1412 object_unref(mr->owner);
46637be2
PB
1413 }
1414}
1415
093bc2cd
AK
1416uint64_t memory_region_size(MemoryRegion *mr)
1417{
08dafab4
AK
1418 if (int128_eq(mr->size, int128_2_64())) {
1419 return UINT64_MAX;
1420 }
1421 return int128_get64(mr->size);
093bc2cd
AK
1422}
1423
5d546d4b 1424const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1425{
d1dd32af
PC
1426 if (!mr->name) {
1427 ((MemoryRegion *)mr)->name =
1428 object_get_canonical_path_component(OBJECT(mr));
1429 }
302fa283 1430 return mr->name;
8991c79b
AK
1431}
1432
e4dc3f59
ND
1433bool memory_region_is_skip_dump(MemoryRegion *mr)
1434{
1435 return mr->skip_dump;
1436}
1437
2d1a35be 1438uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1439{
6f6a5ef3
PB
1440 uint8_t mask = mr->dirty_log_mask;
1441 if (global_dirty_log) {
1442 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1443 }
1444 return mask;
55043ba3
AK
1445}
1446
2d1a35be
PB
1447bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1448{
1449 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1450}
1451
06866575
DG
1452void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1453{
1454 notifier_list_add(&mr->iommu_notify, n);
1455}
1456
a788f227
DG
1457void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1458 hwaddr granularity, bool is_write)
1459{
1460 hwaddr addr;
1461 IOMMUTLBEntry iotlb;
1462
1463 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1464 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1465 if (iotlb.perm != IOMMU_NONE) {
1466 n->notify(n, &iotlb);
1467 }
1468
1469 /* if (2^64 - MR size) < granularity, it's possible to get an
1470 * infinite loop here. This should catch such a wraparound */
1471 if ((addr + granularity) < addr) {
1472 break;
1473 }
1474 }
1475}
1476
06866575
DG
1477void memory_region_unregister_iommu_notifier(Notifier *n)
1478{
1479 notifier_remove(n);
1480}
1481
1482void memory_region_notify_iommu(MemoryRegion *mr,
1483 IOMMUTLBEntry entry)
1484{
1485 assert(memory_region_is_iommu(mr));
1486 notifier_list_notify(&mr->iommu_notify, &entry);
1487}
1488
093bc2cd
AK
1489void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1490{
5a583347 1491 uint8_t mask = 1 << client;
deb809ed 1492 uint8_t old_logging;
5a583347 1493
dbddac6d 1494 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB
1495 old_logging = mr->vga_logging_count;
1496 mr->vga_logging_count += log ? 1 : -1;
1497 if (!!old_logging == !!mr->vga_logging_count) {
1498 return;
1499 }
1500
59023ef4 1501 memory_region_transaction_begin();
5a583347 1502 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1503 memory_region_update_pending |= mr->enabled;
59023ef4 1504 memory_region_transaction_commit();
093bc2cd
AK
1505}
1506
a8170e5e
AK
1507bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1508 hwaddr size, unsigned client)
093bc2cd 1509{
ec05ec26 1510 assert(mr->ram_addr != RAM_ADDR_INVALID);
52159192 1511 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1512}
1513
a8170e5e
AK
1514void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1515 hwaddr size)
093bc2cd 1516{
ec05ec26 1517 assert(mr->ram_addr != RAM_ADDR_INVALID);
58d2707e
PB
1518 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1519 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK
1520}
1521
6c279db8
JQ
1522bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1523 hwaddr size, unsigned client)
1524{
ec05ec26 1525 assert(mr->ram_addr != RAM_ADDR_INVALID);
03eebc9e
SH
1526 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1527 size, client);
6c279db8
JQ
1528}
1529
1530
093bc2cd
AK
1531void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1532{
0d673e36 1533 AddressSpace *as;
5a583347
AK
1534 FlatRange *fr;
1535
0d673e36 1536 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1537 FlatView *view = address_space_get_flatview(as);
99e86347 1538 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1539 if (fr->mr == mr) {
1540 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1541 }
5a583347 1542 }
856d7245 1543 flatview_unref(view);
5a583347 1544 }
093bc2cd
AK
1545}
1546
1547void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1548{
fb1cd6f9 1549 if (mr->readonly != readonly) {
59023ef4 1550 memory_region_transaction_begin();
fb1cd6f9 1551 mr->readonly = readonly;
22bde714 1552 memory_region_update_pending |= mr->enabled;
59023ef4 1553 memory_region_transaction_commit();
fb1cd6f9 1554 }
093bc2cd
AK
1555}
1556
5f9a5ea1 1557void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1558{
5f9a5ea1 1559 if (mr->romd_mode != romd_mode) {
59023ef4 1560 memory_region_transaction_begin();
5f9a5ea1 1561 mr->romd_mode = romd_mode;
22bde714 1562 memory_region_update_pending |= mr->enabled;
59023ef4 1563 memory_region_transaction_commit();
d0a9b5bc
AK
1564 }
1565}
1566
a8170e5e
AK
1567void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1568 hwaddr size, unsigned client)
093bc2cd 1569{
ec05ec26 1570 assert(mr->ram_addr != RAM_ADDR_INVALID);
03eebc9e
SH
1571 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1572 client);
093bc2cd
AK
1573}
1574
a35ba7be
PB
1575int memory_region_get_fd(MemoryRegion *mr)
1576{
1577 if (mr->alias) {
1578 return memory_region_get_fd(mr->alias);
1579 }
1580
ec05ec26 1581 assert(mr->ram_addr != RAM_ADDR_INVALID);
a35ba7be
PB
1582
1583 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1584}
1585
093bc2cd
AK
1586void *memory_region_get_ram_ptr(MemoryRegion *mr)
1587{
49b24afc
PB
1588 void *ptr;
1589 uint64_t offset = 0;
093bc2cd 1590
49b24afc
PB
1591 rcu_read_lock();
1592 while (mr->alias) {
1593 offset += mr->alias_offset;
1594 mr = mr->alias;
1595 }
ec05ec26 1596 assert(mr->ram_addr != RAM_ADDR_INVALID);
3655cb9c 1597 ptr = qemu_get_ram_ptr(mr->ram_block, mr->ram_addr & TARGET_PAGE_MASK);
49b24afc 1598 rcu_read_unlock();
093bc2cd 1599
49b24afc 1600 return ptr + offset;
093bc2cd
AK
1601}
1602
37d7c084
PB
1603void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1604{
ec05ec26 1605 assert(mr->ram_addr != RAM_ADDR_INVALID);
37d7c084
PB
1606
1607 qemu_ram_resize(mr->ram_addr, newsize, errp);
1608}
1609
0d673e36 1610static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1611{
99e86347 1612 FlatView *view;
093bc2cd
AK
1613 FlatRange *fr;
1614 CoalescedMemoryRange *cmr;
1615 AddrRange tmp;
95d2994a 1616 MemoryRegionSection section;
093bc2cd 1617
856d7245 1618 view = address_space_get_flatview(as);
99e86347 1619 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1620 if (fr->mr == mr) {
95d2994a 1621 section = (MemoryRegionSection) {
f6790af6 1622 .address_space = as,
95d2994a 1623 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1624 .size = fr->addr.size,
95d2994a
AK
1625 };
1626
1627 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1628 int128_get64(fr->addr.start),
1629 int128_get64(fr->addr.size));
093bc2cd
AK
1630 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1631 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1632 int128_sub(fr->addr.start,
1633 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1634 if (!addrrange_intersects(tmp, fr->addr)) {
1635 continue;
1636 }
1637 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1638 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1639 int128_get64(tmp.start),
1640 int128_get64(tmp.size));
093bc2cd
AK
1641 }
1642 }
1643 }
856d7245 1644 flatview_unref(view);
093bc2cd
AK
1645}
1646
0d673e36
AK
1647static void memory_region_update_coalesced_range(MemoryRegion *mr)
1648{
1649 AddressSpace *as;
1650
1651 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1652 memory_region_update_coalesced_range_as(mr, as);
1653 }
1654}
1655
093bc2cd
AK
1656void memory_region_set_coalescing(MemoryRegion *mr)
1657{
1658 memory_region_clear_coalescing(mr);
08dafab4 1659 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1660}
1661
1662void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1663 hwaddr offset,
093bc2cd
AK
1664 uint64_t size)
1665{
7267c094 1666 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1667
08dafab4 1668 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1669 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1670 memory_region_update_coalesced_range(mr);
d410515e 1671 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1672}
1673
1674void memory_region_clear_coalescing(MemoryRegion *mr)
1675{
1676 CoalescedMemoryRange *cmr;
ab5b3db5 1677 bool updated = false;
093bc2cd 1678
d410515e
JK
1679 qemu_flush_coalesced_mmio_buffer();
1680 mr->flush_coalesced_mmio = false;
1681
093bc2cd
AK
1682 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1683 cmr = QTAILQ_FIRST(&mr->coalesced);
1684 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1685 g_free(cmr);
ab5b3db5
FZ
1686 updated = true;
1687 }
1688
1689 if (updated) {
1690 memory_region_update_coalesced_range(mr);
093bc2cd 1691 }
093bc2cd
AK
1692}
1693
d410515e
JK
1694void memory_region_set_flush_coalesced(MemoryRegion *mr)
1695{
1696 mr->flush_coalesced_mmio = true;
1697}
1698
1699void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1700{
1701 qemu_flush_coalesced_mmio_buffer();
1702 if (QTAILQ_EMPTY(&mr->coalesced)) {
1703 mr->flush_coalesced_mmio = false;
1704 }
1705}
1706
196ea131
JK
1707void memory_region_set_global_locking(MemoryRegion *mr)
1708{
1709 mr->global_locking = true;
1710}
1711
1712void memory_region_clear_global_locking(MemoryRegion *mr)
1713{
1714 mr->global_locking = false;
1715}
1716
8c56c1a5
PF
1717static bool userspace_eventfd_warning;
1718
3e9d69e7 1719void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1720 hwaddr addr,
3e9d69e7
AK
1721 unsigned size,
1722 bool match_data,
1723 uint64_t data,
753d5e14 1724 EventNotifier *e)
3e9d69e7
AK
1725{
1726 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1727 .addr.start = int128_make64(addr),
1728 .addr.size = int128_make64(size),
3e9d69e7
AK
1729 .match_data = match_data,
1730 .data = data,
753d5e14 1731 .e = e,
3e9d69e7
AK
1732 };
1733 unsigned i;
1734
8c56c1a5
PF
1735 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1736 userspace_eventfd_warning))) {
1737 userspace_eventfd_warning = true;
1738 error_report("Using eventfd without MMIO binding in KVM. "
1739 "Suboptimal performance expected");
1740 }
1741
b8aecea2
JW
1742 if (size) {
1743 adjust_endianness(mr, &mrfd.data, size);
1744 }
59023ef4 1745 memory_region_transaction_begin();
3e9d69e7
AK
1746 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1747 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1748 break;
1749 }
1750 }
1751 ++mr->ioeventfd_nb;
7267c094 1752 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1753 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1754 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1755 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1756 mr->ioeventfds[i] = mrfd;
4dc56152 1757 ioeventfd_update_pending |= mr->enabled;
59023ef4 1758 memory_region_transaction_commit();
3e9d69e7
AK
1759}
1760
1761void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1762 hwaddr addr,
3e9d69e7
AK
1763 unsigned size,
1764 bool match_data,
1765 uint64_t data,
753d5e14 1766 EventNotifier *e)
3e9d69e7
AK
1767{
1768 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1769 .addr.start = int128_make64(addr),
1770 .addr.size = int128_make64(size),
3e9d69e7
AK
1771 .match_data = match_data,
1772 .data = data,
753d5e14 1773 .e = e,
3e9d69e7
AK
1774 };
1775 unsigned i;
1776
b8aecea2
JW
1777 if (size) {
1778 adjust_endianness(mr, &mrfd.data, size);
1779 }
59023ef4 1780 memory_region_transaction_begin();
3e9d69e7
AK
1781 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1782 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1783 break;
1784 }
1785 }
1786 assert(i != mr->ioeventfd_nb);
1787 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1788 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1789 --mr->ioeventfd_nb;
7267c094 1790 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1791 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1792 ioeventfd_update_pending |= mr->enabled;
59023ef4 1793 memory_region_transaction_commit();
3e9d69e7
AK
1794}
1795
feca4ac1 1796static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1797{
0598701a 1798 hwaddr offset = subregion->addr;
feca4ac1 1799 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1800 MemoryRegion *other;
1801
59023ef4
JK
1802 memory_region_transaction_begin();
1803
dfde4e6e 1804 memory_region_ref(subregion);
093bc2cd
AK
1805 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1806 if (subregion->may_overlap || other->may_overlap) {
1807 continue;
1808 }
2c7cfd65 1809 if (int128_ge(int128_make64(offset),
08dafab4
AK
1810 int128_add(int128_make64(other->addr), other->size))
1811 || int128_le(int128_add(int128_make64(offset), subregion->size),
1812 int128_make64(other->addr))) {
093bc2cd
AK
1813 continue;
1814 }
a5e1cbc8 1815#if 0
860329b2
MW
1816 printf("warning: subregion collision %llx/%llx (%s) "
1817 "vs %llx/%llx (%s)\n",
093bc2cd 1818 (unsigned long long)offset,
08dafab4 1819 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1820 subregion->name,
1821 (unsigned long long)other->addr,
08dafab4 1822 (unsigned long long)int128_get64(other->size),
860329b2 1823 other->name);
a5e1cbc8 1824#endif
093bc2cd
AK
1825 }
1826 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1827 if (subregion->priority >= other->priority) {
1828 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1829 goto done;
1830 }
1831 }
1832 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1833done:
22bde714 1834 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1835 memory_region_transaction_commit();
093bc2cd
AK
1836}
1837
0598701a
PC
1838static void memory_region_add_subregion_common(MemoryRegion *mr,
1839 hwaddr offset,
1840 MemoryRegion *subregion)
1841{
feca4ac1
PB
1842 assert(!subregion->container);
1843 subregion->container = mr;
0598701a 1844 subregion->addr = offset;
feca4ac1 1845 memory_region_update_container_subregions(subregion);
0598701a 1846}
093bc2cd
AK
1847
1848void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1849 hwaddr offset,
093bc2cd
AK
1850 MemoryRegion *subregion)
1851{
1852 subregion->may_overlap = false;
1853 subregion->priority = 0;
1854 memory_region_add_subregion_common(mr, offset, subregion);
1855}
1856
1857void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1858 hwaddr offset,
093bc2cd 1859 MemoryRegion *subregion,
a1ff8ae0 1860 int priority)
093bc2cd
AK
1861{
1862 subregion->may_overlap = true;
1863 subregion->priority = priority;
1864 memory_region_add_subregion_common(mr, offset, subregion);
1865}
1866
1867void memory_region_del_subregion(MemoryRegion *mr,
1868 MemoryRegion *subregion)
1869{
59023ef4 1870 memory_region_transaction_begin();
feca4ac1
PB
1871 assert(subregion->container == mr);
1872 subregion->container = NULL;
093bc2cd 1873 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1874 memory_region_unref(subregion);
22bde714 1875 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1876 memory_region_transaction_commit();
6bba19ba
AK
1877}
1878
1879void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1880{
1881 if (enabled == mr->enabled) {
1882 return;
1883 }
59023ef4 1884 memory_region_transaction_begin();
6bba19ba 1885 mr->enabled = enabled;
22bde714 1886 memory_region_update_pending = true;
59023ef4 1887 memory_region_transaction_commit();
093bc2cd 1888}
1c0ffa58 1889
e7af4c67
MT
1890void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1891{
1892 Int128 s = int128_make64(size);
1893
1894 if (size == UINT64_MAX) {
1895 s = int128_2_64();
1896 }
1897 if (int128_eq(s, mr->size)) {
1898 return;
1899 }
1900 memory_region_transaction_begin();
1901 mr->size = s;
1902 memory_region_update_pending = true;
1903 memory_region_transaction_commit();
1904}
1905
67891b8a 1906static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1907{
feca4ac1 1908 MemoryRegion *container = mr->container;
2282e1af 1909
feca4ac1 1910 if (container) {
67891b8a
PC
1911 memory_region_transaction_begin();
1912 memory_region_ref(mr);
feca4ac1
PB
1913 memory_region_del_subregion(container, mr);
1914 mr->container = container;
1915 memory_region_update_container_subregions(mr);
67891b8a
PC
1916 memory_region_unref(mr);
1917 memory_region_transaction_commit();
2282e1af 1918 }
67891b8a 1919}
2282e1af 1920
67891b8a
PC
1921void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1922{
1923 if (addr != mr->addr) {
1924 mr->addr = addr;
1925 memory_region_readd_subregion(mr);
1926 }
2282e1af
AK
1927}
1928
a8170e5e 1929void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1930{
4703359e 1931 assert(mr->alias);
4703359e 1932
59023ef4 1933 if (offset == mr->alias_offset) {
4703359e
AK
1934 return;
1935 }
1936
59023ef4
JK
1937 memory_region_transaction_begin();
1938 mr->alias_offset = offset;
22bde714 1939 memory_region_update_pending |= mr->enabled;
59023ef4 1940 memory_region_transaction_commit();
4703359e
AK
1941}
1942
a2b257d6
IM
1943uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1944{
1945 return mr->align;
1946}
1947
e2177955
AK
1948static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1949{
1950 const AddrRange *addr = addr_;
1951 const FlatRange *fr = fr_;
1952
1953 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1954 return -1;
1955 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1956 return 1;
1957 }
1958 return 0;
1959}
1960
99e86347 1961static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1962{
99e86347 1963 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1964 sizeof(FlatRange), cmp_flatrange_addr);
1965}
1966
eed2bacf
IM
1967bool memory_region_is_mapped(MemoryRegion *mr)
1968{
1969 return mr->container ? true : false;
1970}
1971
c6742b14
PB
1972/* Same as memory_region_find, but it does not add a reference to the
1973 * returned region. It must be called from an RCU critical section.
1974 */
1975static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
1976 hwaddr addr, uint64_t size)
e2177955 1977{
052e87b0 1978 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1979 MemoryRegion *root;
1980 AddressSpace *as;
1981 AddrRange range;
99e86347 1982 FlatView *view;
73034e9e
PB
1983 FlatRange *fr;
1984
1985 addr += mr->addr;
feca4ac1
PB
1986 for (root = mr; root->container; ) {
1987 root = root->container;
73034e9e
PB
1988 addr += root->addr;
1989 }
e2177955 1990
73034e9e 1991 as = memory_region_to_address_space(root);
eed2bacf
IM
1992 if (!as) {
1993 return ret;
1994 }
73034e9e 1995 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1996
2b647668 1997 view = atomic_rcu_read(&as->current_map);
99e86347 1998 fr = flatview_lookup(view, range);
e2177955 1999 if (!fr) {
c6742b14 2000 return ret;
e2177955
AK
2001 }
2002
99e86347 2003 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
2004 --fr;
2005 }
2006
2007 ret.mr = fr->mr;
73034e9e 2008 ret.address_space = as;
e2177955
AK
2009 range = addrrange_intersection(range, fr->addr);
2010 ret.offset_within_region = fr->offset_in_region;
2011 ret.offset_within_region += int128_get64(int128_sub(range.start,
2012 fr->addr.start));
052e87b0 2013 ret.size = range.size;
e2177955 2014 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2015 ret.readonly = fr->readonly;
c6742b14
PB
2016 return ret;
2017}
2018
2019MemoryRegionSection memory_region_find(MemoryRegion *mr,
2020 hwaddr addr, uint64_t size)
2021{
2022 MemoryRegionSection ret;
2023 rcu_read_lock();
2024 ret = memory_region_find_rcu(mr, addr, size);
2025 if (ret.mr) {
2026 memory_region_ref(ret.mr);
2027 }
2b647668 2028 rcu_read_unlock();
e2177955
AK
2029 return ret;
2030}
2031
c6742b14
PB
2032bool memory_region_present(MemoryRegion *container, hwaddr addr)
2033{
2034 MemoryRegion *mr;
2035
2036 rcu_read_lock();
2037 mr = memory_region_find_rcu(container, addr, 1).mr;
2038 rcu_read_unlock();
2039 return mr && mr != container;
2040}
2041
1d671369 2042void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 2043{
99e86347 2044 FlatView *view;
7664e80c
AK
2045 FlatRange *fr;
2046
856d7245 2047 view = address_space_get_flatview(as);
99e86347 2048 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 2049 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 2050 }
856d7245 2051 flatview_unref(view);
7664e80c
AK
2052}
2053
2054void memory_global_dirty_log_start(void)
2055{
7664e80c 2056 global_dirty_log = true;
6f6a5ef3 2057
7376e582 2058 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB
2059
2060 /* Refresh DIRTY_LOG_MIGRATION bit. */
2061 memory_region_transaction_begin();
2062 memory_region_update_pending = true;
2063 memory_region_transaction_commit();
7664e80c
AK
2064}
2065
2066void memory_global_dirty_log_stop(void)
2067{
7664e80c 2068 global_dirty_log = false;
6f6a5ef3
PB
2069
2070 /* Refresh DIRTY_LOG_MIGRATION bit. */
2071 memory_region_transaction_begin();
2072 memory_region_update_pending = true;
2073 memory_region_transaction_commit();
2074
7376e582 2075 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
2076}
2077
2078static void listener_add_address_space(MemoryListener *listener,
2079 AddressSpace *as)
2080{
99e86347 2081 FlatView *view;
7664e80c
AK
2082 FlatRange *fr;
2083
221b3a3f 2084 if (listener->address_space_filter
f6790af6 2085 && listener->address_space_filter != as) {
221b3a3f
JG
2086 return;
2087 }
2088
680a4783
PB
2089 if (listener->begin) {
2090 listener->begin(listener);
2091 }
7664e80c 2092 if (global_dirty_log) {
975aefe0
AK
2093 if (listener->log_global_start) {
2094 listener->log_global_start(listener);
2095 }
7664e80c 2096 }
975aefe0 2097
856d7245 2098 view = address_space_get_flatview(as);
99e86347 2099 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
2100 MemoryRegionSection section = {
2101 .mr = fr->mr,
f6790af6 2102 .address_space = as,
7664e80c 2103 .offset_within_region = fr->offset_in_region,
052e87b0 2104 .size = fr->addr.size,
7664e80c 2105 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2106 .readonly = fr->readonly,
7664e80c 2107 };
680a4783
PB
2108 if (fr->dirty_log_mask && listener->log_start) {
2109 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2110 }
975aefe0
AK
2111 if (listener->region_add) {
2112 listener->region_add(listener, &section);
2113 }
7664e80c 2114 }
680a4783
PB
2115 if (listener->commit) {
2116 listener->commit(listener);
2117 }
856d7245 2118 flatview_unref(view);
7664e80c
AK
2119}
2120
f6790af6 2121void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 2122{
72e22d2f 2123 MemoryListener *other = NULL;
0d673e36 2124 AddressSpace *as;
72e22d2f 2125
7376e582 2126 listener->address_space_filter = filter;
72e22d2f
AK
2127 if (QTAILQ_EMPTY(&memory_listeners)
2128 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2129 memory_listeners)->priority) {
2130 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2131 } else {
2132 QTAILQ_FOREACH(other, &memory_listeners, link) {
2133 if (listener->priority < other->priority) {
2134 break;
2135 }
2136 }
2137 QTAILQ_INSERT_BEFORE(other, listener, link);
2138 }
0d673e36
AK
2139
2140 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2141 listener_add_address_space(listener, as);
2142 }
7664e80c
AK
2143}
2144
2145void memory_listener_unregister(MemoryListener *listener)
2146{
72e22d2f 2147 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 2148}
e2177955 2149
7dca8043 2150void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2151{
ac95190e 2152 memory_region_ref(root);
59023ef4 2153 memory_region_transaction_begin();
f0c02d15 2154 as->ref_count = 1;
8786db7c 2155 as->root = root;
f0c02d15 2156 as->malloced = false;
8786db7c
AK
2157 as->current_map = g_new(FlatView, 1);
2158 flatview_init(as->current_map);
4c19eb72
AK
2159 as->ioeventfd_nb = 0;
2160 as->ioeventfds = NULL;
0d673e36 2161 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2162 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2163 address_space_init_dispatch(as);
f43793c7
PB
2164 memory_region_update_pending |= root->enabled;
2165 memory_region_transaction_commit();
1c0ffa58 2166}
658b2224 2167
374f2981 2168static void do_address_space_destroy(AddressSpace *as)
83f3c251 2169{
078c44f4 2170 MemoryListener *listener;
f0c02d15 2171 bool do_free = as->malloced;
078c44f4 2172
83f3c251 2173 address_space_destroy_dispatch(as);
078c44f4
DG
2174
2175 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2176 assert(listener->address_space_filter != as);
2177 }
2178
856d7245 2179 flatview_unref(as->current_map);
7dca8043 2180 g_free(as->name);
4c19eb72 2181 g_free(as->ioeventfds);
ac95190e 2182 memory_region_unref(as->root);
f0c02d15
PC
2183 if (do_free) {
2184 g_free(as);
2185 }
2186}
2187
2188AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2189{
2190 AddressSpace *as;
2191
2192 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2193 if (root == as->root && as->malloced) {
2194 as->ref_count++;
2195 return as;
2196 }
2197 }
2198
2199 as = g_malloc0(sizeof *as);
2200 address_space_init(as, root, name);
2201 as->malloced = true;
2202 return as;
83f3c251
AK
2203}
2204
374f2981
PB
2205void address_space_destroy(AddressSpace *as)
2206{
ac95190e
PB
2207 MemoryRegion *root = as->root;
2208
f0c02d15
PC
2209 as->ref_count--;
2210 if (as->ref_count) {
2211 return;
2212 }
374f2981
PB
2213 /* Flush out anything from MemoryListeners listening in on this */
2214 memory_region_transaction_begin();
2215 as->root = NULL;
2216 memory_region_transaction_commit();
2217 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2218 address_space_unregister(as);
374f2981
PB
2219
2220 /* At this point, as->dispatch and as->current_map are dummy
2221 * entries that the guest should never use. Wait for the old
2222 * values to expire before freeing the data.
2223 */
ac95190e 2224 as->root = root;
374f2981
PB
2225 call_rcu(as, do_address_space_destroy, rcu);
2226}
2227
314e2987
BS
2228typedef struct MemoryRegionList MemoryRegionList;
2229
2230struct MemoryRegionList {
2231 const MemoryRegion *mr;
314e2987
BS
2232 QTAILQ_ENTRY(MemoryRegionList) queue;
2233};
2234
2235typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2236
2237static void mtree_print_mr(fprintf_function mon_printf, void *f,
2238 const MemoryRegion *mr, unsigned int level,
a8170e5e 2239 hwaddr base,
9479c57a 2240 MemoryRegionListHead *alias_print_queue)
314e2987 2241{
9479c57a
JK
2242 MemoryRegionList *new_ml, *ml, *next_ml;
2243 MemoryRegionListHead submr_print_queue;
314e2987
BS
2244 const MemoryRegion *submr;
2245 unsigned int i;
2246
f8a9f720 2247 if (!mr) {
314e2987
BS
2248 return;
2249 }
2250
2251 for (i = 0; i < level; i++) {
2252 mon_printf(f, " ");
2253 }
2254
2255 if (mr->alias) {
2256 MemoryRegionList *ml;
2257 bool found = false;
2258
2259 /* check if the alias is already in the queue */
9479c57a 2260 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2261 if (ml->mr == mr->alias) {
314e2987
BS
2262 found = true;
2263 }
2264 }
2265
2266 if (!found) {
2267 ml = g_new(MemoryRegionList, 1);
2268 ml->mr = mr->alias;
9479c57a 2269 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2270 }
4896d74b
JK
2271 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2272 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
f8a9f720 2273 "-" TARGET_FMT_plx "%s\n",
314e2987 2274 base + mr->addr,
08dafab4 2275 base + mr->addr
fd1d9926
AW
2276 + (int128_nz(mr->size) ?
2277 (hwaddr)int128_get64(int128_sub(mr->size,
2278 int128_one())) : 0),
4b474ba7 2279 mr->priority,
5f9a5ea1
JK
2280 mr->romd_mode ? 'R' : '-',
2281 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2282 : '-',
3fb18b4d
PC
2283 memory_region_name(mr),
2284 memory_region_name(mr->alias),
314e2987 2285 mr->alias_offset,
08dafab4 2286 mr->alias_offset
a66670c7
AK
2287 + (int128_nz(mr->size) ?
2288 (hwaddr)int128_get64(int128_sub(mr->size,
f8a9f720
GH
2289 int128_one())) : 0),
2290 mr->enabled ? "" : " [disabled]");
314e2987 2291 } else {
4896d74b 2292 mon_printf(f,
f8a9f720 2293 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
314e2987 2294 base + mr->addr,
08dafab4 2295 base + mr->addr
fd1d9926
AW
2296 + (int128_nz(mr->size) ?
2297 (hwaddr)int128_get64(int128_sub(mr->size,
2298 int128_one())) : 0),
4b474ba7 2299 mr->priority,
5f9a5ea1
JK
2300 mr->romd_mode ? 'R' : '-',
2301 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2302 : '-',
f8a9f720
GH
2303 memory_region_name(mr),
2304 mr->enabled ? "" : " [disabled]");
314e2987 2305 }
9479c57a
JK
2306
2307 QTAILQ_INIT(&submr_print_queue);
2308
314e2987 2309 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2310 new_ml = g_new(MemoryRegionList, 1);
2311 new_ml->mr = submr;
2312 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2313 if (new_ml->mr->addr < ml->mr->addr ||
2314 (new_ml->mr->addr == ml->mr->addr &&
2315 new_ml->mr->priority > ml->mr->priority)) {
2316 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2317 new_ml = NULL;
2318 break;
2319 }
2320 }
2321 if (new_ml) {
2322 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2323 }
2324 }
2325
2326 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2327 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2328 alias_print_queue);
2329 }
2330
88365e47 2331 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2332 g_free(ml);
314e2987
BS
2333 }
2334}
2335
2336void mtree_info(fprintf_function mon_printf, void *f)
2337{
2338 MemoryRegionListHead ml_head;
2339 MemoryRegionList *ml, *ml2;
0d673e36 2340 AddressSpace *as;
314e2987
BS
2341
2342 QTAILQ_INIT(&ml_head);
2343
0d673e36 2344 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH
2345 mon_printf(f, "address-space: %s\n", as->name);
2346 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2347 mon_printf(f, "\n");
b9f9be88
BS
2348 }
2349
314e2987
BS
2350 /* print aliased regions */
2351 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH
2352 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2353 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2354 mon_printf(f, "\n");
314e2987
BS
2355 }
2356
2357 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2358 g_free(ml);
314e2987 2359 }
314e2987 2360}
b4fefef9
PC
2361
2362static const TypeInfo memory_region_info = {
2363 .parent = TYPE_OBJECT,
2364 .name = TYPE_MEMORY_REGION,
2365 .instance_size = sizeof(MemoryRegion),
2366 .instance_init = memory_region_initfn,
2367 .instance_finalize = memory_region_finalize,
2368};
2369
2370static void memory_register_types(void)
2371{
2372 type_register_static(&memory_region_info);
2373}
2374
2375type_init(memory_register_types)