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CommitLineData
093bc2cd
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
d38ea87a 16#include "qemu/osdep.h"
022c62cb
PB
17#include "exec/memory.h"
18#include "exec/address-spaces.h"
19#include "exec/ioport.h"
409ddd01 20#include "qapi/visitor.h"
1de7afc9 21#include "qemu/bitops.h"
8c56c1a5 22#include "qemu/error-report.h"
2c9b15ca 23#include "qom/object.h"
55d5d048 24#include "trace.h"
093bc2cd 25
022c62cb 26#include "exec/memory-internal.h"
220c3ebd 27#include "exec/ram_addr.h"
8c56c1a5 28#include "sysemu/kvm.h"
e1c57ab8 29#include "sysemu/sysemu.h"
67d95c15 30
d197063f
PB
31//#define DEBUG_UNASSIGNED
32
ec05ec26
PB
33#define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
22bde714
JK
35static unsigned memory_region_transaction_depth;
36static bool memory_region_update_pending;
4dc56152 37static bool ioeventfd_update_pending;
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38static bool global_dirty_log = false;
39
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40static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 42
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43static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
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46typedef struct AddrRange AddrRange;
47
8417cebf 48/*
c9cdaa3a 49 * Note that signed integers are needed for negative offsetting in aliases
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50 * (large MemoryRegion::alias_offset).
51 */
093bc2cd 52struct AddrRange {
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53 Int128 start;
54 Int128 size;
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55};
56
08dafab4 57static AddrRange addrrange_make(Int128 start, Int128 size)
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58{
59 return (AddrRange) { start, size };
60}
61
62static bool addrrange_equal(AddrRange r1, AddrRange r2)
63{
08dafab4 64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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65}
66
08dafab4 67static Int128 addrrange_end(AddrRange r)
093bc2cd 68{
08dafab4 69 return int128_add(r.start, r.size);
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70}
71
08dafab4 72static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 73{
08dafab4 74 int128_addto(&range.start, delta);
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75 return range;
76}
77
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78static bool addrrange_contains(AddrRange range, Int128 addr)
79{
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82}
83
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84static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85{
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86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
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88}
89
90static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91{
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92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
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95}
96
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97enum ListenerDirection { Forward, Reverse };
98
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99static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101{
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104}
105
106#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
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107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
0e0d36b4
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116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
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121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
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124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
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131#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
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140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
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147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
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149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
dfde4e6e 158/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 159#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
7376e582 160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 161 .mr = (fr)->mr, \
f6790af6 162 .address_space = (as), \
0e0d36b4 163 .offset_within_region = (fr)->offset_in_region, \
052e87b0 164 .size = (fr)->addr.size, \
0e0d36b4 165 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 166 .readonly = (fr)->readonly, \
b2dfd71c 167 }), ##_args)
0e0d36b4 168
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169struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172};
173
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174struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
753d5e14 178 EventNotifier *e;
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179};
180
181static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183{
08dafab4 184 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 185 return true;
08dafab4 186 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 187 return false;
08dafab4 188 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 189 return true;
08dafab4 190 } else if (int128_gt(a.addr.size, b.addr.size)) {
3e9d69e7
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191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
753d5e14 203 if (a.e < b.e) {
3e9d69e7 204 return true;
753d5e14 205 } else if (a.e > b.e) {
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206 return false;
207 }
208 return false;
209}
210
211static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213{
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216}
217
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218typedef struct FlatRange FlatRange;
219typedef struct FlatView FlatView;
220
221/* Range of memory in the global map. Addresses are absolute. */
222struct FlatRange {
223 MemoryRegion *mr;
a8170e5e 224 hwaddr offset_in_region;
093bc2cd 225 AddrRange addr;
5a583347 226 uint8_t dirty_log_mask;
5f9a5ea1 227 bool romd_mode;
fb1cd6f9 228 bool readonly;
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229};
230
231/* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234struct FlatView {
374f2981 235 struct rcu_head rcu;
856d7245 236 unsigned ref;
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237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240};
241
cc31e6e7
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242typedef struct AddressSpaceOps AddressSpaceOps;
243
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244#define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
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247static bool flatrange_equal(FlatRange *a, FlatRange *b)
248{
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 251 && a->offset_in_region == b->offset_in_region
5f9a5ea1 252 && a->romd_mode == b->romd_mode
fb1cd6f9 253 && a->readonly == b->readonly;
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254}
255
256static void flatview_init(FlatView *view)
257{
856d7245 258 view->ref = 1;
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259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262}
263
264/* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268{
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 271 view->ranges = g_realloc(view->ranges,
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272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
dfde4e6e 277 memory_region_ref(range->mr);
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278 ++view->nr;
279}
280
281static void flatview_destroy(FlatView *view)
282{
dfde4e6e
PB
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
7267c094 288 g_free(view->ranges);
a9a0c06d 289 g_free(view);
093bc2cd
AK
290}
291
856d7245
PB
292static void flatview_ref(FlatView *view)
293{
294 atomic_inc(&view->ref);
295}
296
297static void flatview_unref(FlatView *view)
298{
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302}
303
3d8e6bf9
AK
304static bool can_merge(FlatRange *r1, FlatRange *r2)
305{
08dafab4 306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 307 && r1->mr == r2->mr
08dafab4
AK
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
d0a9b5bc 311 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 312 && r1->romd_mode == r2->romd_mode
fb1cd6f9 313 && r1->readonly == r2->readonly;
3d8e6bf9
AK
314}
315
8508e024 316/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK
317static void flatview_simplify(FlatView *view)
318{
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK
327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334}
335
e7342aa3
PB
336static bool memory_region_big_endian(MemoryRegion *mr)
337{
338#ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340#else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342#endif
343}
344
e11ef3d1
PB
345static bool memory_region_wrong_endianness(MemoryRegion *mr)
346{
347#ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349#else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351#endif
352}
353
354static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355{
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373}
374
4779dc1d
HB
375static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
376{
377 MemoryRegion *root;
378 hwaddr abs_addr = offset;
379
380 abs_addr += mr->addr;
381 for (root = mr; root->container; ) {
382 root = root->container;
383 abs_addr += root->addr;
384 }
385
386 return abs_addr;
387}
388
5a68be94
HB
389static int get_cpu_index(void)
390{
391 if (current_cpu) {
392 return current_cpu->cpu_index;
393 }
394 return -1;
395}
396
cc05c43a
PM
397static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
398 hwaddr addr,
399 uint64_t *value,
400 unsigned size,
401 unsigned shift,
402 uint64_t mask,
403 MemTxAttrs attrs)
404{
405 uint64_t tmp;
406
407 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68 408 if (mr->subpage) {
5a68be94 409 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
410 } else if (mr == &io_mem_notdirty) {
411 /* Accesses to code which has previously been translated into a TB show
412 * up in the MMIO path, as accesses to the io_mem_notdirty
413 * MemoryRegion. */
414 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
415 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
416 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 417 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 418 }
cc05c43a
PM
419 *value |= (tmp & mask) << shift;
420 return MEMTX_OK;
421}
422
423static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
424 hwaddr addr,
425 uint64_t *value,
426 unsigned size,
427 unsigned shift,
cc05c43a
PM
428 uint64_t mask,
429 MemTxAttrs attrs)
ce5d2f33 430{
ce5d2f33
PB
431 uint64_t tmp;
432
cc05c43a 433 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 434 if (mr->subpage) {
5a68be94 435 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
436 } else if (mr == &io_mem_notdirty) {
437 /* Accesses to code which has previously been translated into a TB show
438 * up in the MMIO path, as accesses to the io_mem_notdirty
439 * MemoryRegion. */
440 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
441 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
442 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 443 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 444 }
ce5d2f33 445 *value |= (tmp & mask) << shift;
cc05c43a 446 return MEMTX_OK;
ce5d2f33
PB
447}
448
cc05c43a
PM
449static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
450 hwaddr addr,
451 uint64_t *value,
452 unsigned size,
453 unsigned shift,
454 uint64_t mask,
455 MemTxAttrs attrs)
164a4dcd 456{
cc05c43a
PM
457 uint64_t tmp = 0;
458 MemTxResult r;
164a4dcd 459
cc05c43a 460 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 461 if (mr->subpage) {
5a68be94 462 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
463 } else if (mr == &io_mem_notdirty) {
464 /* Accesses to code which has previously been translated into a TB show
465 * up in the MMIO path, as accesses to the io_mem_notdirty
466 * MemoryRegion. */
467 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
468 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
469 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 470 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 471 }
164a4dcd 472 *value |= (tmp & mask) << shift;
cc05c43a 473 return r;
164a4dcd
AK
474}
475
cc05c43a
PM
476static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned shift,
481 uint64_t mask,
482 MemTxAttrs attrs)
ce5d2f33 483{
ce5d2f33
PB
484 uint64_t tmp;
485
486 tmp = (*value >> shift) & mask;
23d92d68 487 if (mr->subpage) {
5a68be94 488 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
489 } else if (mr == &io_mem_notdirty) {
490 /* Accesses to code which has previously been translated into a TB show
491 * up in the MMIO path, as accesses to the io_mem_notdirty
492 * MemoryRegion. */
493 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
494 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
495 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 496 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 497 }
ce5d2f33 498 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 499 return MEMTX_OK;
ce5d2f33
PB
500}
501
cc05c43a
PM
502static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
503 hwaddr addr,
504 uint64_t *value,
505 unsigned size,
506 unsigned shift,
507 uint64_t mask,
508 MemTxAttrs attrs)
164a4dcd 509{
164a4dcd
AK
510 uint64_t tmp;
511
512 tmp = (*value >> shift) & mask;
23d92d68 513 if (mr->subpage) {
5a68be94 514 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
515 } else if (mr == &io_mem_notdirty) {
516 /* Accesses to code which has previously been translated into a TB show
517 * up in the MMIO path, as accesses to the io_mem_notdirty
518 * MemoryRegion. */
519 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
520 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
521 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 522 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 523 }
164a4dcd 524 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 525 return MEMTX_OK;
164a4dcd
AK
526}
527
cc05c43a
PM
528static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
529 hwaddr addr,
530 uint64_t *value,
531 unsigned size,
532 unsigned shift,
533 uint64_t mask,
534 MemTxAttrs attrs)
535{
536 uint64_t tmp;
537
cc05c43a 538 tmp = (*value >> shift) & mask;
23d92d68 539 if (mr->subpage) {
5a68be94 540 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
541 } else if (mr == &io_mem_notdirty) {
542 /* Accesses to code which has previously been translated into a TB show
543 * up in the MMIO path, as accesses to the io_mem_notdirty
544 * MemoryRegion. */
545 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
546 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
547 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 548 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 549 }
cc05c43a
PM
550 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
551}
552
553static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
554 uint64_t *value,
555 unsigned size,
556 unsigned access_size_min,
557 unsigned access_size_max,
cc05c43a
PM
558 MemTxResult (*access)(MemoryRegion *mr,
559 hwaddr addr,
560 uint64_t *value,
561 unsigned size,
562 unsigned shift,
563 uint64_t mask,
564 MemTxAttrs attrs),
565 MemoryRegion *mr,
566 MemTxAttrs attrs)
164a4dcd
AK
567{
568 uint64_t access_mask;
569 unsigned access_size;
570 unsigned i;
cc05c43a 571 MemTxResult r = MEMTX_OK;
164a4dcd
AK
572
573 if (!access_size_min) {
574 access_size_min = 1;
575 }
576 if (!access_size_max) {
577 access_size_max = 4;
578 }
ce5d2f33
PB
579
580 /* FIXME: support unaligned access? */
164a4dcd
AK
581 access_size = MAX(MIN(size, access_size_max), access_size_min);
582 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
583 if (memory_region_big_endian(mr)) {
584 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
585 r |= access(mr, addr + i, value, access_size,
586 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
587 }
588 } else {
589 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
590 r |= access(mr, addr + i, value, access_size, i * 8,
591 access_mask, attrs);
e7342aa3 592 }
164a4dcd 593 }
cc05c43a 594 return r;
164a4dcd
AK
595}
596
e2177955
AK
597static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
598{
0d673e36
AK
599 AddressSpace *as;
600
feca4ac1
PB
601 while (mr->container) {
602 mr = mr->container;
e2177955 603 }
0d673e36
AK
604 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
605 if (mr == as->root) {
606 return as;
607 }
e2177955 608 }
eed2bacf 609 return NULL;
e2177955
AK
610}
611
093bc2cd
AK
612/* Render a memory region into the global view. Ranges in @view obscure
613 * ranges in @mr.
614 */
615static void render_memory_region(FlatView *view,
616 MemoryRegion *mr,
08dafab4 617 Int128 base,
fb1cd6f9
AK
618 AddrRange clip,
619 bool readonly)
093bc2cd
AK
620{
621 MemoryRegion *subregion;
622 unsigned i;
a8170e5e 623 hwaddr offset_in_region;
08dafab4
AK
624 Int128 remain;
625 Int128 now;
093bc2cd
AK
626 FlatRange fr;
627 AddrRange tmp;
628
6bba19ba
AK
629 if (!mr->enabled) {
630 return;
631 }
632
08dafab4 633 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 634 readonly |= mr->readonly;
093bc2cd
AK
635
636 tmp = addrrange_make(base, mr->size);
637
638 if (!addrrange_intersects(tmp, clip)) {
639 return;
640 }
641
642 clip = addrrange_intersection(tmp, clip);
643
644 if (mr->alias) {
08dafab4
AK
645 int128_subfrom(&base, int128_make64(mr->alias->addr));
646 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 647 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK
648 return;
649 }
650
651 /* Render subregions in priority order. */
652 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 653 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
654 }
655
14a3c10a 656 if (!mr->terminates) {
093bc2cd
AK
657 return;
658 }
659
08dafab4 660 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
661 base = clip.start;
662 remain = clip.size;
663
2eb74e1a 664 fr.mr = mr;
6f6a5ef3 665 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
2eb74e1a
PC
666 fr.romd_mode = mr->romd_mode;
667 fr.readonly = readonly;
668
093bc2cd 669 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
670 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
671 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
672 continue;
673 }
08dafab4
AK
674 if (int128_lt(base, view->ranges[i].addr.start)) {
675 now = int128_min(remain,
676 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
677 fr.offset_in_region = offset_in_region;
678 fr.addr = addrrange_make(base, now);
679 flatview_insert(view, i, &fr);
680 ++i;
08dafab4
AK
681 int128_addto(&base, now);
682 offset_in_region += int128_get64(now);
683 int128_subfrom(&remain, now);
093bc2cd 684 }
d26a8cae
AK
685 now = int128_sub(int128_min(int128_add(base, remain),
686 addrrange_end(view->ranges[i].addr)),
687 base);
688 int128_addto(&base, now);
689 offset_in_region += int128_get64(now);
690 int128_subfrom(&remain, now);
093bc2cd 691 }
08dafab4 692 if (int128_nz(remain)) {
093bc2cd
AK
693 fr.offset_in_region = offset_in_region;
694 fr.addr = addrrange_make(base, remain);
695 flatview_insert(view, i, &fr);
696 }
697}
698
699/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 700static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 701{
a9a0c06d 702 FlatView *view;
093bc2cd 703
a9a0c06d
PB
704 view = g_new(FlatView, 1);
705 flatview_init(view);
093bc2cd 706
83f3c251 707 if (mr) {
a9a0c06d 708 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
709 addrrange_make(int128_zero(), int128_2_64()), false);
710 }
a9a0c06d 711 flatview_simplify(view);
093bc2cd
AK
712
713 return view;
714}
715
3e9d69e7
AK
716static void address_space_add_del_ioeventfds(AddressSpace *as,
717 MemoryRegionIoeventfd *fds_new,
718 unsigned fds_new_nb,
719 MemoryRegionIoeventfd *fds_old,
720 unsigned fds_old_nb)
721{
722 unsigned iold, inew;
80a1ea37
AK
723 MemoryRegionIoeventfd *fd;
724 MemoryRegionSection section;
3e9d69e7
AK
725
726 /* Generate a symmetric difference of the old and new fd sets, adding
727 * and deleting as necessary.
728 */
729
730 iold = inew = 0;
731 while (iold < fds_old_nb || inew < fds_new_nb) {
732 if (iold < fds_old_nb
733 && (inew == fds_new_nb
734 || memory_region_ioeventfd_before(fds_old[iold],
735 fds_new[inew]))) {
80a1ea37
AK
736 fd = &fds_old[iold];
737 section = (MemoryRegionSection) {
f6790af6 738 .address_space = as,
80a1ea37 739 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 740 .size = fd->addr.size,
80a1ea37
AK
741 };
742 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 743 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
744 ++iold;
745 } else if (inew < fds_new_nb
746 && (iold == fds_old_nb
747 || memory_region_ioeventfd_before(fds_new[inew],
748 fds_old[iold]))) {
80a1ea37
AK
749 fd = &fds_new[inew];
750 section = (MemoryRegionSection) {
f6790af6 751 .address_space = as,
80a1ea37 752 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 753 .size = fd->addr.size,
80a1ea37
AK
754 };
755 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 756 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
757 ++inew;
758 } else {
759 ++iold;
760 ++inew;
761 }
762 }
763}
764
856d7245
PB
765static FlatView *address_space_get_flatview(AddressSpace *as)
766{
767 FlatView *view;
768
374f2981
PB
769 rcu_read_lock();
770 view = atomic_rcu_read(&as->current_map);
856d7245 771 flatview_ref(view);
374f2981 772 rcu_read_unlock();
856d7245
PB
773 return view;
774}
775
3e9d69e7
AK
776static void address_space_update_ioeventfds(AddressSpace *as)
777{
99e86347 778 FlatView *view;
3e9d69e7
AK
779 FlatRange *fr;
780 unsigned ioeventfd_nb = 0;
781 MemoryRegionIoeventfd *ioeventfds = NULL;
782 AddrRange tmp;
783 unsigned i;
784
856d7245 785 view = address_space_get_flatview(as);
99e86347 786 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
787 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
788 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
789 int128_sub(fr->addr.start,
790 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
791 if (addrrange_intersects(fr->addr, tmp)) {
792 ++ioeventfd_nb;
7267c094 793 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
794 ioeventfd_nb * sizeof(*ioeventfds));
795 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
796 ioeventfds[ioeventfd_nb-1].addr = tmp;
797 }
798 }
799 }
800
801 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
802 as->ioeventfds, as->ioeventfd_nb);
803
7267c094 804 g_free(as->ioeventfds);
3e9d69e7
AK
805 as->ioeventfds = ioeventfds;
806 as->ioeventfd_nb = ioeventfd_nb;
856d7245 807 flatview_unref(view);
3e9d69e7
AK
808}
809
b8af1afb 810static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
811 const FlatView *old_view,
812 const FlatView *new_view,
b8af1afb 813 bool adding)
093bc2cd 814{
093bc2cd
AK
815 unsigned iold, inew;
816 FlatRange *frold, *frnew;
093bc2cd
AK
817
818 /* Generate a symmetric difference of the old and new memory maps.
819 * Kill ranges in the old map, and instantiate ranges in the new map.
820 */
821 iold = inew = 0;
a9a0c06d
PB
822 while (iold < old_view->nr || inew < new_view->nr) {
823 if (iold < old_view->nr) {
824 frold = &old_view->ranges[iold];
093bc2cd
AK
825 } else {
826 frold = NULL;
827 }
a9a0c06d
PB
828 if (inew < new_view->nr) {
829 frnew = &new_view->ranges[inew];
093bc2cd
AK
830 } else {
831 frnew = NULL;
832 }
833
834 if (frold
835 && (!frnew
08dafab4
AK
836 || int128_lt(frold->addr.start, frnew->addr.start)
837 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 838 && !flatrange_equal(frold, frnew)))) {
41a6e477 839 /* In old but not in new, or in both but attributes changed. */
093bc2cd 840
b8af1afb 841 if (!adding) {
72e22d2f 842 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
843 }
844
093bc2cd
AK
845 ++iold;
846 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 847 /* In both and unchanged (except logging may have changed) */
093bc2cd 848
b8af1afb 849 if (adding) {
50c1e149 850 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB
851 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
853 frold->dirty_log_mask,
854 frnew->dirty_log_mask);
855 }
856 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
857 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
858 frold->dirty_log_mask,
859 frnew->dirty_log_mask);
b8af1afb 860 }
5a583347
AK
861 }
862
093bc2cd
AK
863 ++iold;
864 ++inew;
093bc2cd
AK
865 } else {
866 /* In new */
867
b8af1afb 868 if (adding) {
72e22d2f 869 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
870 }
871
093bc2cd
AK
872 ++inew;
873 }
874 }
b8af1afb
AK
875}
876
877
878static void address_space_update_topology(AddressSpace *as)
879{
856d7245 880 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 881 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
882
883 address_space_update_topology_pass(as, old_view, new_view, false);
884 address_space_update_topology_pass(as, old_view, new_view, true);
885
374f2981
PB
886 /* Writes are protected by the BQL. */
887 atomic_rcu_set(&as->current_map, new_view);
888 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB
889
890 /* Note that all the old MemoryRegions are still alive up to this
891 * point. This relieves most MemoryListeners from the need to
892 * ref/unref the MemoryRegions they get---unless they use them
893 * outside the iothread mutex, in which case precise reference
894 * counting is necessary.
895 */
896 flatview_unref(old_view);
897
3e9d69e7 898 address_space_update_ioeventfds(as);
093bc2cd
AK
899}
900
4ef4db86
AK
901void memory_region_transaction_begin(void)
902{
bb880ded 903 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
904 ++memory_region_transaction_depth;
905}
906
4dc56152
GA
907static void memory_region_clear_pending(void)
908{
909 memory_region_update_pending = false;
910 ioeventfd_update_pending = false;
911}
912
4ef4db86
AK
913void memory_region_transaction_commit(void)
914{
0d673e36
AK
915 AddressSpace *as;
916
4ef4db86
AK
917 assert(memory_region_transaction_depth);
918 --memory_region_transaction_depth;
4dc56152
GA
919 if (!memory_region_transaction_depth) {
920 if (memory_region_update_pending) {
921 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 922
4dc56152
GA
923 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
924 address_space_update_topology(as);
925 }
02e2b95f 926
4dc56152
GA
927 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
928 } else if (ioeventfd_update_pending) {
929 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
930 address_space_update_ioeventfds(as);
931 }
932 }
933 memory_region_clear_pending();
934 }
4ef4db86
AK
935}
936
545e92e0
AK
937static void memory_region_destructor_none(MemoryRegion *mr)
938{
939}
940
941static void memory_region_destructor_ram(MemoryRegion *mr)
942{
f1060c55 943 qemu_ram_free(mr->ram_block);
545e92e0
AK
944}
945
d0a9b5bc
AK
946static void memory_region_destructor_rom_device(MemoryRegion *mr)
947{
f1060c55 948 qemu_ram_free(mr->ram_block);
d0a9b5bc
AK
949}
950
b4fefef9
PC
951static bool memory_region_need_escape(char c)
952{
953 return c == '/' || c == '[' || c == '\\' || c == ']';
954}
955
956static char *memory_region_escape_name(const char *name)
957{
958 const char *p;
959 char *escaped, *q;
960 uint8_t c;
961 size_t bytes = 0;
962
963 for (p = name; *p; p++) {
964 bytes += memory_region_need_escape(*p) ? 4 : 1;
965 }
966 if (bytes == p - name) {
967 return g_memdup(name, bytes + 1);
968 }
969
970 escaped = g_malloc(bytes + 1);
971 for (p = name, q = escaped; *p; p++) {
972 c = *p;
973 if (unlikely(memory_region_need_escape(c))) {
974 *q++ = '\\';
975 *q++ = 'x';
976 *q++ = "0123456789abcdef"[c >> 4];
977 c = "0123456789abcdef"[c & 15];
978 }
979 *q++ = c;
980 }
981 *q = 0;
982 return escaped;
983}
984
093bc2cd 985void memory_region_init(MemoryRegion *mr,
2c9b15ca 986 Object *owner,
093bc2cd
AK
987 const char *name,
988 uint64_t size)
989{
22a893e4 990 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
991 mr->size = int128_make64(size);
992 if (size == UINT64_MAX) {
993 mr->size = int128_2_64();
994 }
302fa283 995 mr->name = g_strdup(name);
612263cf 996 mr->owner = owner;
58eaa217 997 mr->ram_block = NULL;
b4fefef9
PC
998
999 if (name) {
843ef73a
PC
1000 char *escaped_name = memory_region_escape_name(name);
1001 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB
1002
1003 if (!owner) {
1004 owner = container_get(qdev_get_machine(), "/unattached");
1005 }
1006
843ef73a 1007 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 1008 object_unref(OBJECT(mr));
843ef73a
PC
1009 g_free(name_array);
1010 g_free(escaped_name);
b4fefef9
PC
1011 }
1012}
1013
d7bce999
EB
1014static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1015 void *opaque, Error **errp)
409ddd01
PC
1016{
1017 MemoryRegion *mr = MEMORY_REGION(obj);
1018 uint64_t value = mr->addr;
1019
51e72bc1 1020 visit_type_uint64(v, name, &value, errp);
409ddd01
PC
1021}
1022
d7bce999
EB
1023static void memory_region_get_container(Object *obj, Visitor *v,
1024 const char *name, void *opaque,
1025 Error **errp)
409ddd01
PC
1026{
1027 MemoryRegion *mr = MEMORY_REGION(obj);
1028 gchar *path = (gchar *)"";
1029
1030 if (mr->container) {
1031 path = object_get_canonical_path(OBJECT(mr->container));
1032 }
51e72bc1 1033 visit_type_str(v, name, &path, errp);
409ddd01
PC
1034 if (mr->container) {
1035 g_free(path);
1036 }
1037}
1038
1039static Object *memory_region_resolve_container(Object *obj, void *opaque,
1040 const char *part)
1041{
1042 MemoryRegion *mr = MEMORY_REGION(obj);
1043
1044 return OBJECT(mr->container);
1045}
1046
d7bce999
EB
1047static void memory_region_get_priority(Object *obj, Visitor *v,
1048 const char *name, void *opaque,
1049 Error **errp)
d33382da
PC
1050{
1051 MemoryRegion *mr = MEMORY_REGION(obj);
1052 int32_t value = mr->priority;
1053
51e72bc1 1054 visit_type_int32(v, name, &value, errp);
d33382da
PC
1055}
1056
1057static bool memory_region_get_may_overlap(Object *obj, Error **errp)
1058{
1059 MemoryRegion *mr = MEMORY_REGION(obj);
1060
1061 return mr->may_overlap;
1062}
1063
d7bce999
EB
1064static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1065 void *opaque, Error **errp)
52aef7bb
PC
1066{
1067 MemoryRegion *mr = MEMORY_REGION(obj);
1068 uint64_t value = memory_region_size(mr);
1069
51e72bc1 1070 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC
1071}
1072
b4fefef9
PC
1073static void memory_region_initfn(Object *obj)
1074{
1075 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1076 ObjectProperty *op;
b4fefef9
PC
1077
1078 mr->ops = &unassigned_mem_ops;
6bba19ba 1079 mr->enabled = true;
5f9a5ea1 1080 mr->romd_mode = true;
196ea131 1081 mr->global_locking = true;
545e92e0 1082 mr->destructor = memory_region_destructor_none;
093bc2cd 1083 QTAILQ_INIT(&mr->subregions);
093bc2cd 1084 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1085
1086 op = object_property_add(OBJECT(mr), "container",
1087 "link<" TYPE_MEMORY_REGION ">",
1088 memory_region_get_container,
1089 NULL, /* memory_region_set_container */
1090 NULL, NULL, &error_abort);
1091 op->resolve = memory_region_resolve_container;
1092
1093 object_property_add(OBJECT(mr), "addr", "uint64",
1094 memory_region_get_addr,
1095 NULL, /* memory_region_set_addr */
1096 NULL, NULL, &error_abort);
d33382da
PC
1097 object_property_add(OBJECT(mr), "priority", "uint32",
1098 memory_region_get_priority,
1099 NULL, /* memory_region_set_priority */
1100 NULL, NULL, &error_abort);
1101 object_property_add_bool(OBJECT(mr), "may-overlap",
1102 memory_region_get_may_overlap,
1103 NULL, /* memory_region_set_may_overlap */
1104 &error_abort);
52aef7bb
PC
1105 object_property_add(OBJECT(mr), "size", "uint64",
1106 memory_region_get_size,
1107 NULL, /* memory_region_set_size, */
1108 NULL, NULL, &error_abort);
093bc2cd
AK
1109}
1110
b018ddf6
PB
1111static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1112 unsigned size)
1113{
1114#ifdef DEBUG_UNASSIGNED
1115 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1116#endif
4917cf44
AF
1117 if (current_cpu != NULL) {
1118 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1119 }
68a7439a 1120 return 0;
b018ddf6
PB
1121}
1122
1123static void unassigned_mem_write(void *opaque, hwaddr addr,
1124 uint64_t val, unsigned size)
1125{
1126#ifdef DEBUG_UNASSIGNED
1127 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1128#endif
4917cf44
AF
1129 if (current_cpu != NULL) {
1130 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1131 }
b018ddf6
PB
1132}
1133
d197063f
PB
1134static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1135 unsigned size, bool is_write)
1136{
1137 return false;
1138}
1139
1140const MemoryRegionOps unassigned_mem_ops = {
1141 .valid.accepts = unassigned_mem_accepts,
1142 .endianness = DEVICE_NATIVE_ENDIAN,
1143};
1144
d2702032
PB
1145bool memory_region_access_valid(MemoryRegion *mr,
1146 hwaddr addr,
1147 unsigned size,
1148 bool is_write)
093bc2cd 1149{
a014ed07
PB
1150 int access_size_min, access_size_max;
1151 int access_size, i;
897fa7cf 1152
093bc2cd
AK
1153 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1154 return false;
1155 }
1156
a014ed07 1157 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1158 return true;
1159 }
1160
a014ed07
PB
1161 access_size_min = mr->ops->valid.min_access_size;
1162 if (!mr->ops->valid.min_access_size) {
1163 access_size_min = 1;
1164 }
1165
1166 access_size_max = mr->ops->valid.max_access_size;
1167 if (!mr->ops->valid.max_access_size) {
1168 access_size_max = 4;
1169 }
1170
1171 access_size = MAX(MIN(size, access_size_max), access_size_min);
1172 for (i = 0; i < size; i += access_size) {
1173 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1174 is_write)) {
1175 return false;
1176 }
093bc2cd 1177 }
a014ed07 1178
093bc2cd
AK
1179 return true;
1180}
1181
cc05c43a
PM
1182static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1183 hwaddr addr,
1184 uint64_t *pval,
1185 unsigned size,
1186 MemTxAttrs attrs)
093bc2cd 1187{
cc05c43a 1188 *pval = 0;
093bc2cd 1189
ce5d2f33 1190 if (mr->ops->read) {
cc05c43a
PM
1191 return access_with_adjusted_size(addr, pval, size,
1192 mr->ops->impl.min_access_size,
1193 mr->ops->impl.max_access_size,
1194 memory_region_read_accessor,
1195 mr, attrs);
1196 } else if (mr->ops->read_with_attrs) {
1197 return access_with_adjusted_size(addr, pval, size,
1198 mr->ops->impl.min_access_size,
1199 mr->ops->impl.max_access_size,
1200 memory_region_read_with_attrs_accessor,
1201 mr, attrs);
ce5d2f33 1202 } else {
cc05c43a
PM
1203 return access_with_adjusted_size(addr, pval, size, 1, 4,
1204 memory_region_oldmmio_read_accessor,
1205 mr, attrs);
74901c3b 1206 }
093bc2cd
AK
1207}
1208
3b643495
PM
1209MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1210 hwaddr addr,
1211 uint64_t *pval,
1212 unsigned size,
1213 MemTxAttrs attrs)
a621f38d 1214{
cc05c43a
PM
1215 MemTxResult r;
1216
791af8c8
PB
1217 if (!memory_region_access_valid(mr, addr, size, false)) {
1218 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1219 return MEMTX_DECODE_ERROR;
791af8c8 1220 }
a621f38d 1221
cc05c43a 1222 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1223 adjust_endianness(mr, pval, size);
cc05c43a 1224 return r;
a621f38d 1225}
093bc2cd 1226
8c56c1a5
PF
1227/* Return true if an eventfd was signalled */
1228static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1229 hwaddr addr,
1230 uint64_t data,
1231 unsigned size,
1232 MemTxAttrs attrs)
1233{
1234 MemoryRegionIoeventfd ioeventfd = {
1235 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1236 .data = data,
1237 };
1238 unsigned i;
1239
1240 for (i = 0; i < mr->ioeventfd_nb; i++) {
1241 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1242 ioeventfd.e = mr->ioeventfds[i].e;
1243
1244 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1245 event_notifier_set(ioeventfd.e);
1246 return true;
1247 }
1248 }
1249
1250 return false;
1251}
1252
3b643495
PM
1253MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1254 hwaddr addr,
1255 uint64_t data,
1256 unsigned size,
1257 MemTxAttrs attrs)
a621f38d 1258{
897fa7cf 1259 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1260 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1261 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1262 }
1263
a621f38d
AK
1264 adjust_endianness(mr, &data, size);
1265
8c56c1a5
PF
1266 if ((!kvm_eventfds_enabled()) &&
1267 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1268 return MEMTX_OK;
1269 }
1270
ce5d2f33 1271 if (mr->ops->write) {
cc05c43a
PM
1272 return access_with_adjusted_size(addr, &data, size,
1273 mr->ops->impl.min_access_size,
1274 mr->ops->impl.max_access_size,
1275 memory_region_write_accessor, mr,
1276 attrs);
1277 } else if (mr->ops->write_with_attrs) {
1278 return
1279 access_with_adjusted_size(addr, &data, size,
1280 mr->ops->impl.min_access_size,
1281 mr->ops->impl.max_access_size,
1282 memory_region_write_with_attrs_accessor,
1283 mr, attrs);
ce5d2f33 1284 } else {
cc05c43a
PM
1285 return access_with_adjusted_size(addr, &data, size, 1, 4,
1286 memory_region_oldmmio_write_accessor,
1287 mr, attrs);
74901c3b 1288 }
093bc2cd
AK
1289}
1290
093bc2cd 1291void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1292 Object *owner,
093bc2cd
AK
1293 const MemoryRegionOps *ops,
1294 void *opaque,
1295 const char *name,
1296 uint64_t size)
1297{
2c9b15ca 1298 memory_region_init(mr, owner, name, size);
6d6d2abf 1299 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1300 mr->opaque = opaque;
14a3c10a 1301 mr->terminates = true;
093bc2cd
AK
1302}
1303
1304void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1305 Object *owner,
093bc2cd 1306 const char *name,
49946538
HT
1307 uint64_t size,
1308 Error **errp)
093bc2cd 1309{
2c9b15ca 1310 memory_region_init(mr, owner, name, size);
8ea9252a 1311 mr->ram = true;
14a3c10a 1312 mr->terminates = true;
545e92e0 1313 mr->destructor = memory_region_destructor_ram;
8e41fb63 1314 mr->ram_block = qemu_ram_alloc(size, mr, errp);
677e7805 1315 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB
1316}
1317
60786ef3
MT
1318void memory_region_init_resizeable_ram(MemoryRegion *mr,
1319 Object *owner,
1320 const char *name,
1321 uint64_t size,
1322 uint64_t max_size,
1323 void (*resized)(const char*,
1324 uint64_t length,
1325 void *host),
1326 Error **errp)
1327{
1328 memory_region_init(mr, owner, name, size);
1329 mr->ram = true;
1330 mr->terminates = true;
1331 mr->destructor = memory_region_destructor_ram;
8e41fb63
FZ
1332 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1333 mr, errp);
677e7805 1334 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT
1335}
1336
0b183fc8
PB
1337#ifdef __linux__
1338void memory_region_init_ram_from_file(MemoryRegion *mr,
1339 struct Object *owner,
1340 const char *name,
1341 uint64_t size,
dbcb8981 1342 bool share,
7f56e740
PB
1343 const char *path,
1344 Error **errp)
0b183fc8
PB
1345{
1346 memory_region_init(mr, owner, name, size);
1347 mr->ram = true;
1348 mr->terminates = true;
1349 mr->destructor = memory_region_destructor_ram;
8e41fb63 1350 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1351 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1352}
0b183fc8 1353#endif
093bc2cd
AK
1354
1355void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1356 Object *owner,
093bc2cd
AK
1357 const char *name,
1358 uint64_t size,
1359 void *ptr)
1360{
2c9b15ca 1361 memory_region_init(mr, owner, name, size);
8ea9252a 1362 mr->ram = true;
14a3c10a 1363 mr->terminates = true;
fc3e7665 1364 mr->destructor = memory_region_destructor_ram;
677e7805 1365 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT
1366
1367 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1368 assert(ptr != NULL);
8e41fb63 1369 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK
1370}
1371
e4dc3f59
ND
1372void memory_region_set_skip_dump(MemoryRegion *mr)
1373{
1374 mr->skip_dump = true;
1375}
1376
093bc2cd 1377void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1378 Object *owner,
093bc2cd
AK
1379 const char *name,
1380 MemoryRegion *orig,
a8170e5e 1381 hwaddr offset,
093bc2cd
AK
1382 uint64_t size)
1383{
2c9b15ca 1384 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1385 mr->alias = orig;
1386 mr->alias_offset = offset;
1387}
1388
d0a9b5bc 1389void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1390 Object *owner,
d0a9b5bc 1391 const MemoryRegionOps *ops,
75f5941c 1392 void *opaque,
d0a9b5bc 1393 const char *name,
33e0eb52
HT
1394 uint64_t size,
1395 Error **errp)
d0a9b5bc 1396{
2c9b15ca 1397 memory_region_init(mr, owner, name, size);
7bc2b9cd 1398 mr->ops = ops;
75f5941c 1399 mr->opaque = opaque;
d0a9b5bc 1400 mr->terminates = true;
75c578dc 1401 mr->rom_device = true;
d0a9b5bc 1402 mr->destructor = memory_region_destructor_rom_device;
8e41fb63 1403 mr->ram_block = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK
1404}
1405
30951157 1406void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1407 Object *owner,
30951157
AK
1408 const MemoryRegionIOMMUOps *ops,
1409 const char *name,
1410 uint64_t size)
1411{
2c9b15ca 1412 memory_region_init(mr, owner, name, size);
30951157
AK
1413 mr->iommu_ops = ops,
1414 mr->terminates = true; /* then re-forwards */
06866575 1415 notifier_list_init(&mr->iommu_notify);
30951157
AK
1416}
1417
b4fefef9 1418static void memory_region_finalize(Object *obj)
093bc2cd 1419{
b4fefef9
PC
1420 MemoryRegion *mr = MEMORY_REGION(obj);
1421
2e2b8eb7
PB
1422 assert(!mr->container);
1423
1424 /* We know the region is not visible in any address space (it
1425 * does not have a container and cannot be a root either because
1426 * it has no references, so we can blindly clear mr->enabled.
1427 * memory_region_set_enabled instead could trigger a transaction
1428 * and cause an infinite loop.
1429 */
1430 mr->enabled = false;
1431 memory_region_transaction_begin();
1432 while (!QTAILQ_EMPTY(&mr->subregions)) {
1433 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1434 memory_region_del_subregion(mr, subregion);
1435 }
1436 memory_region_transaction_commit();
1437
545e92e0 1438 mr->destructor(mr);
093bc2cd 1439 memory_region_clear_coalescing(mr);
302fa283 1440 g_free((char *)mr->name);
7267c094 1441 g_free(mr->ioeventfds);
093bc2cd
AK
1442}
1443
803c0816
PB
1444Object *memory_region_owner(MemoryRegion *mr)
1445{
22a893e4
PB
1446 Object *obj = OBJECT(mr);
1447 return obj->parent;
803c0816
PB
1448}
1449
46637be2
PB
1450void memory_region_ref(MemoryRegion *mr)
1451{
22a893e4
PB
1452 /* MMIO callbacks most likely will access data that belongs
1453 * to the owner, hence the need to ref/unref the owner whenever
1454 * the memory region is in use.
1455 *
1456 * The memory region is a child of its owner. As long as the
1457 * owner doesn't call unparent itself on the memory region,
1458 * ref-ing the owner will also keep the memory region alive.
612263cf
PB
1459 * Memory regions without an owner are supposed to never go away;
1460 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1461 */
612263cf
PB
1462 if (mr && mr->owner) {
1463 object_ref(mr->owner);
46637be2
PB
1464 }
1465}
1466
1467void memory_region_unref(MemoryRegion *mr)
1468{
612263cf
PB
1469 if (mr && mr->owner) {
1470 object_unref(mr->owner);
46637be2
PB
1471 }
1472}
1473
093bc2cd
AK
1474uint64_t memory_region_size(MemoryRegion *mr)
1475{
08dafab4
AK
1476 if (int128_eq(mr->size, int128_2_64())) {
1477 return UINT64_MAX;
1478 }
1479 return int128_get64(mr->size);
093bc2cd
AK
1480}
1481
5d546d4b 1482const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1483{
d1dd32af
PC
1484 if (!mr->name) {
1485 ((MemoryRegion *)mr)->name =
1486 object_get_canonical_path_component(OBJECT(mr));
1487 }
302fa283 1488 return mr->name;
8991c79b
AK
1489}
1490
e4dc3f59
ND
1491bool memory_region_is_skip_dump(MemoryRegion *mr)
1492{
1493 return mr->skip_dump;
1494}
1495
2d1a35be 1496uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1497{
6f6a5ef3
PB
1498 uint8_t mask = mr->dirty_log_mask;
1499 if (global_dirty_log) {
1500 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1501 }
1502 return mask;
55043ba3
AK
1503}
1504
2d1a35be
PB
1505bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1506{
1507 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1508}
1509
06866575
DG
1510void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1511{
1512 notifier_list_add(&mr->iommu_notify, n);
1513}
1514
a788f227
DG
1515void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1516 hwaddr granularity, bool is_write)
1517{
1518 hwaddr addr;
1519 IOMMUTLBEntry iotlb;
1520
1521 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1522 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1523 if (iotlb.perm != IOMMU_NONE) {
1524 n->notify(n, &iotlb);
1525 }
1526
1527 /* if (2^64 - MR size) < granularity, it's possible to get an
1528 * infinite loop here. This should catch such a wraparound */
1529 if ((addr + granularity) < addr) {
1530 break;
1531 }
1532 }
1533}
1534
06866575
DG
1535void memory_region_unregister_iommu_notifier(Notifier *n)
1536{
1537 notifier_remove(n);
1538}
1539
1540void memory_region_notify_iommu(MemoryRegion *mr,
1541 IOMMUTLBEntry entry)
1542{
1543 assert(memory_region_is_iommu(mr));
1544 notifier_list_notify(&mr->iommu_notify, &entry);
1545}
1546
093bc2cd
AK
1547void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1548{
5a583347 1549 uint8_t mask = 1 << client;
deb809ed 1550 uint8_t old_logging;
5a583347 1551
dbddac6d 1552 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB
1553 old_logging = mr->vga_logging_count;
1554 mr->vga_logging_count += log ? 1 : -1;
1555 if (!!old_logging == !!mr->vga_logging_count) {
1556 return;
1557 }
1558
59023ef4 1559 memory_region_transaction_begin();
5a583347 1560 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1561 memory_region_update_pending |= mr->enabled;
59023ef4 1562 memory_region_transaction_commit();
093bc2cd
AK
1563}
1564
a8170e5e
AK
1565bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1566 hwaddr size, unsigned client)
093bc2cd 1567{
8e41fb63
FZ
1568 assert(mr->ram_block);
1569 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1570 size, client);
093bc2cd
AK
1571}
1572
a8170e5e
AK
1573void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1574 hwaddr size)
093bc2cd 1575{
8e41fb63
FZ
1576 assert(mr->ram_block);
1577 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1578 size,
58d2707e 1579 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK
1580}
1581
6c279db8
JQ
1582bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1583 hwaddr size, unsigned client)
1584{
8e41fb63
FZ
1585 assert(mr->ram_block);
1586 return cpu_physical_memory_test_and_clear_dirty(
1587 memory_region_get_ram_addr(mr) + addr, size, client);
6c279db8
JQ
1588}
1589
1590
093bc2cd
AK
1591void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1592{
0d673e36 1593 AddressSpace *as;
5a583347
AK
1594 FlatRange *fr;
1595
0d673e36 1596 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1597 FlatView *view = address_space_get_flatview(as);
99e86347 1598 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1599 if (fr->mr == mr) {
1600 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1601 }
5a583347 1602 }
856d7245 1603 flatview_unref(view);
5a583347 1604 }
093bc2cd
AK
1605}
1606
1607void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1608{
fb1cd6f9 1609 if (mr->readonly != readonly) {
59023ef4 1610 memory_region_transaction_begin();
fb1cd6f9 1611 mr->readonly = readonly;
22bde714 1612 memory_region_update_pending |= mr->enabled;
59023ef4 1613 memory_region_transaction_commit();
fb1cd6f9 1614 }
093bc2cd
AK
1615}
1616
5f9a5ea1 1617void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1618{
5f9a5ea1 1619 if (mr->romd_mode != romd_mode) {
59023ef4 1620 memory_region_transaction_begin();
5f9a5ea1 1621 mr->romd_mode = romd_mode;
22bde714 1622 memory_region_update_pending |= mr->enabled;
59023ef4 1623 memory_region_transaction_commit();
d0a9b5bc
AK
1624 }
1625}
1626
a8170e5e
AK
1627void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1628 hwaddr size, unsigned client)
093bc2cd 1629{
8e41fb63
FZ
1630 assert(mr->ram_block);
1631 cpu_physical_memory_test_and_clear_dirty(
1632 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK
1633}
1634
a35ba7be
PB
1635int memory_region_get_fd(MemoryRegion *mr)
1636{
1637 if (mr->alias) {
1638 return memory_region_get_fd(mr->alias);
1639 }
1640
8e41fb63 1641 assert(mr->ram_block);
a35ba7be 1642
8e41fb63 1643 return qemu_get_ram_fd(memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK);
a35ba7be
PB
1644}
1645
093bc2cd
AK
1646void *memory_region_get_ram_ptr(MemoryRegion *mr)
1647{
49b24afc
PB
1648 void *ptr;
1649 uint64_t offset = 0;
093bc2cd 1650
49b24afc
PB
1651 rcu_read_lock();
1652 while (mr->alias) {
1653 offset += mr->alias_offset;
1654 mr = mr->alias;
1655 }
8e41fb63
FZ
1656 assert(mr->ram_block);
1657 ptr = qemu_get_ram_ptr(mr->ram_block,
1658 memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK);
49b24afc 1659 rcu_read_unlock();
093bc2cd 1660
49b24afc 1661 return ptr + offset;
093bc2cd
AK
1662}
1663
7ebb2745
FZ
1664ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1665{
1666 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1667}
1668
37d7c084
PB
1669void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1670{
8e41fb63 1671 assert(mr->ram_block);
37d7c084 1672
8e41fb63 1673 qemu_ram_resize(memory_region_get_ram_addr(mr), newsize, errp);
37d7c084
PB
1674}
1675
0d673e36 1676static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1677{
99e86347 1678 FlatView *view;
093bc2cd
AK
1679 FlatRange *fr;
1680 CoalescedMemoryRange *cmr;
1681 AddrRange tmp;
95d2994a 1682 MemoryRegionSection section;
093bc2cd 1683
856d7245 1684 view = address_space_get_flatview(as);
99e86347 1685 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1686 if (fr->mr == mr) {
95d2994a 1687 section = (MemoryRegionSection) {
f6790af6 1688 .address_space = as,
95d2994a 1689 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1690 .size = fr->addr.size,
95d2994a
AK
1691 };
1692
1693 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1694 int128_get64(fr->addr.start),
1695 int128_get64(fr->addr.size));
093bc2cd
AK
1696 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1697 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1698 int128_sub(fr->addr.start,
1699 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1700 if (!addrrange_intersects(tmp, fr->addr)) {
1701 continue;
1702 }
1703 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1704 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1705 int128_get64(tmp.start),
1706 int128_get64(tmp.size));
093bc2cd
AK
1707 }
1708 }
1709 }
856d7245 1710 flatview_unref(view);
093bc2cd
AK
1711}
1712
0d673e36
AK
1713static void memory_region_update_coalesced_range(MemoryRegion *mr)
1714{
1715 AddressSpace *as;
1716
1717 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1718 memory_region_update_coalesced_range_as(mr, as);
1719 }
1720}
1721
093bc2cd
AK
1722void memory_region_set_coalescing(MemoryRegion *mr)
1723{
1724 memory_region_clear_coalescing(mr);
08dafab4 1725 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1726}
1727
1728void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1729 hwaddr offset,
093bc2cd
AK
1730 uint64_t size)
1731{
7267c094 1732 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1733
08dafab4 1734 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1735 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1736 memory_region_update_coalesced_range(mr);
d410515e 1737 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1738}
1739
1740void memory_region_clear_coalescing(MemoryRegion *mr)
1741{
1742 CoalescedMemoryRange *cmr;
ab5b3db5 1743 bool updated = false;
093bc2cd 1744
d410515e
JK
1745 qemu_flush_coalesced_mmio_buffer();
1746 mr->flush_coalesced_mmio = false;
1747
093bc2cd
AK
1748 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1749 cmr = QTAILQ_FIRST(&mr->coalesced);
1750 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1751 g_free(cmr);
ab5b3db5
FZ
1752 updated = true;
1753 }
1754
1755 if (updated) {
1756 memory_region_update_coalesced_range(mr);
093bc2cd 1757 }
093bc2cd
AK
1758}
1759
d410515e
JK
1760void memory_region_set_flush_coalesced(MemoryRegion *mr)
1761{
1762 mr->flush_coalesced_mmio = true;
1763}
1764
1765void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1766{
1767 qemu_flush_coalesced_mmio_buffer();
1768 if (QTAILQ_EMPTY(&mr->coalesced)) {
1769 mr->flush_coalesced_mmio = false;
1770 }
1771}
1772
196ea131
JK
1773void memory_region_set_global_locking(MemoryRegion *mr)
1774{
1775 mr->global_locking = true;
1776}
1777
1778void memory_region_clear_global_locking(MemoryRegion *mr)
1779{
1780 mr->global_locking = false;
1781}
1782
8c56c1a5
PF
1783static bool userspace_eventfd_warning;
1784
3e9d69e7 1785void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1786 hwaddr addr,
3e9d69e7
AK
1787 unsigned size,
1788 bool match_data,
1789 uint64_t data,
753d5e14 1790 EventNotifier *e)
3e9d69e7
AK
1791{
1792 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1793 .addr.start = int128_make64(addr),
1794 .addr.size = int128_make64(size),
3e9d69e7
AK
1795 .match_data = match_data,
1796 .data = data,
753d5e14 1797 .e = e,
3e9d69e7
AK
1798 };
1799 unsigned i;
1800
8c56c1a5
PF
1801 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1802 userspace_eventfd_warning))) {
1803 userspace_eventfd_warning = true;
1804 error_report("Using eventfd without MMIO binding in KVM. "
1805 "Suboptimal performance expected");
1806 }
1807
b8aecea2
JW
1808 if (size) {
1809 adjust_endianness(mr, &mrfd.data, size);
1810 }
59023ef4 1811 memory_region_transaction_begin();
3e9d69e7
AK
1812 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1813 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1814 break;
1815 }
1816 }
1817 ++mr->ioeventfd_nb;
7267c094 1818 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1819 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1820 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1821 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1822 mr->ioeventfds[i] = mrfd;
4dc56152 1823 ioeventfd_update_pending |= mr->enabled;
59023ef4 1824 memory_region_transaction_commit();
3e9d69e7
AK
1825}
1826
1827void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1828 hwaddr addr,
3e9d69e7
AK
1829 unsigned size,
1830 bool match_data,
1831 uint64_t data,
753d5e14 1832 EventNotifier *e)
3e9d69e7
AK
1833{
1834 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1835 .addr.start = int128_make64(addr),
1836 .addr.size = int128_make64(size),
3e9d69e7
AK
1837 .match_data = match_data,
1838 .data = data,
753d5e14 1839 .e = e,
3e9d69e7
AK
1840 };
1841 unsigned i;
1842
b8aecea2
JW
1843 if (size) {
1844 adjust_endianness(mr, &mrfd.data, size);
1845 }
59023ef4 1846 memory_region_transaction_begin();
3e9d69e7
AK
1847 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1848 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1849 break;
1850 }
1851 }
1852 assert(i != mr->ioeventfd_nb);
1853 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1854 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1855 --mr->ioeventfd_nb;
7267c094 1856 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1857 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1858 ioeventfd_update_pending |= mr->enabled;
59023ef4 1859 memory_region_transaction_commit();
3e9d69e7
AK
1860}
1861
feca4ac1 1862static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1863{
0598701a 1864 hwaddr offset = subregion->addr;
feca4ac1 1865 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1866 MemoryRegion *other;
1867
59023ef4
JK
1868 memory_region_transaction_begin();
1869
dfde4e6e 1870 memory_region_ref(subregion);
093bc2cd
AK
1871 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1872 if (subregion->may_overlap || other->may_overlap) {
1873 continue;
1874 }
2c7cfd65 1875 if (int128_ge(int128_make64(offset),
08dafab4
AK
1876 int128_add(int128_make64(other->addr), other->size))
1877 || int128_le(int128_add(int128_make64(offset), subregion->size),
1878 int128_make64(other->addr))) {
093bc2cd
AK
1879 continue;
1880 }
a5e1cbc8 1881#if 0
860329b2
MW
1882 printf("warning: subregion collision %llx/%llx (%s) "
1883 "vs %llx/%llx (%s)\n",
093bc2cd 1884 (unsigned long long)offset,
08dafab4 1885 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1886 subregion->name,
1887 (unsigned long long)other->addr,
08dafab4 1888 (unsigned long long)int128_get64(other->size),
860329b2 1889 other->name);
a5e1cbc8 1890#endif
093bc2cd
AK
1891 }
1892 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1893 if (subregion->priority >= other->priority) {
1894 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1895 goto done;
1896 }
1897 }
1898 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1899done:
22bde714 1900 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1901 memory_region_transaction_commit();
093bc2cd
AK
1902}
1903
0598701a
PC
1904static void memory_region_add_subregion_common(MemoryRegion *mr,
1905 hwaddr offset,
1906 MemoryRegion *subregion)
1907{
feca4ac1
PB
1908 assert(!subregion->container);
1909 subregion->container = mr;
0598701a 1910 subregion->addr = offset;
feca4ac1 1911 memory_region_update_container_subregions(subregion);
0598701a 1912}
093bc2cd
AK
1913
1914void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1915 hwaddr offset,
093bc2cd
AK
1916 MemoryRegion *subregion)
1917{
1918 subregion->may_overlap = false;
1919 subregion->priority = 0;
1920 memory_region_add_subregion_common(mr, offset, subregion);
1921}
1922
1923void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1924 hwaddr offset,
093bc2cd 1925 MemoryRegion *subregion,
a1ff8ae0 1926 int priority)
093bc2cd
AK
1927{
1928 subregion->may_overlap = true;
1929 subregion->priority = priority;
1930 memory_region_add_subregion_common(mr, offset, subregion);
1931}
1932
1933void memory_region_del_subregion(MemoryRegion *mr,
1934 MemoryRegion *subregion)
1935{
59023ef4 1936 memory_region_transaction_begin();
feca4ac1
PB
1937 assert(subregion->container == mr);
1938 subregion->container = NULL;
093bc2cd 1939 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1940 memory_region_unref(subregion);
22bde714 1941 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1942 memory_region_transaction_commit();
6bba19ba
AK
1943}
1944
1945void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1946{
1947 if (enabled == mr->enabled) {
1948 return;
1949 }
59023ef4 1950 memory_region_transaction_begin();
6bba19ba 1951 mr->enabled = enabled;
22bde714 1952 memory_region_update_pending = true;
59023ef4 1953 memory_region_transaction_commit();
093bc2cd 1954}
1c0ffa58 1955
e7af4c67
MT
1956void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1957{
1958 Int128 s = int128_make64(size);
1959
1960 if (size == UINT64_MAX) {
1961 s = int128_2_64();
1962 }
1963 if (int128_eq(s, mr->size)) {
1964 return;
1965 }
1966 memory_region_transaction_begin();
1967 mr->size = s;
1968 memory_region_update_pending = true;
1969 memory_region_transaction_commit();
1970}
1971
67891b8a 1972static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1973{
feca4ac1 1974 MemoryRegion *container = mr->container;
2282e1af 1975
feca4ac1 1976 if (container) {
67891b8a
PC
1977 memory_region_transaction_begin();
1978 memory_region_ref(mr);
feca4ac1
PB
1979 memory_region_del_subregion(container, mr);
1980 mr->container = container;
1981 memory_region_update_container_subregions(mr);
67891b8a
PC
1982 memory_region_unref(mr);
1983 memory_region_transaction_commit();
2282e1af 1984 }
67891b8a 1985}
2282e1af 1986
67891b8a
PC
1987void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1988{
1989 if (addr != mr->addr) {
1990 mr->addr = addr;
1991 memory_region_readd_subregion(mr);
1992 }
2282e1af
AK
1993}
1994
a8170e5e 1995void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1996{
4703359e 1997 assert(mr->alias);
4703359e 1998
59023ef4 1999 if (offset == mr->alias_offset) {
4703359e
AK
2000 return;
2001 }
2002
59023ef4
JK
2003 memory_region_transaction_begin();
2004 mr->alias_offset = offset;
22bde714 2005 memory_region_update_pending |= mr->enabled;
59023ef4 2006 memory_region_transaction_commit();
4703359e
AK
2007}
2008
a2b257d6
IM
2009uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2010{
2011 return mr->align;
2012}
2013
e2177955
AK
2014static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2015{
2016 const AddrRange *addr = addr_;
2017 const FlatRange *fr = fr_;
2018
2019 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2020 return -1;
2021 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2022 return 1;
2023 }
2024 return 0;
2025}
2026
99e86347 2027static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2028{
99e86347 2029 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
2030 sizeof(FlatRange), cmp_flatrange_addr);
2031}
2032
eed2bacf
IM
2033bool memory_region_is_mapped(MemoryRegion *mr)
2034{
2035 return mr->container ? true : false;
2036}
2037
c6742b14
PB
2038/* Same as memory_region_find, but it does not add a reference to the
2039 * returned region. It must be called from an RCU critical section.
2040 */
2041static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2042 hwaddr addr, uint64_t size)
e2177955 2043{
052e87b0 2044 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
2045 MemoryRegion *root;
2046 AddressSpace *as;
2047 AddrRange range;
99e86347 2048 FlatView *view;
73034e9e
PB
2049 FlatRange *fr;
2050
2051 addr += mr->addr;
feca4ac1
PB
2052 for (root = mr; root->container; ) {
2053 root = root->container;
73034e9e
PB
2054 addr += root->addr;
2055 }
e2177955 2056
73034e9e 2057 as = memory_region_to_address_space(root);
eed2bacf
IM
2058 if (!as) {
2059 return ret;
2060 }
73034e9e 2061 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2062
2b647668 2063 view = atomic_rcu_read(&as->current_map);
99e86347 2064 fr = flatview_lookup(view, range);
e2177955 2065 if (!fr) {
c6742b14 2066 return ret;
e2177955
AK
2067 }
2068
99e86347 2069 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
2070 --fr;
2071 }
2072
2073 ret.mr = fr->mr;
73034e9e 2074 ret.address_space = as;
e2177955
AK
2075 range = addrrange_intersection(range, fr->addr);
2076 ret.offset_within_region = fr->offset_in_region;
2077 ret.offset_within_region += int128_get64(int128_sub(range.start,
2078 fr->addr.start));
052e87b0 2079 ret.size = range.size;
e2177955 2080 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2081 ret.readonly = fr->readonly;
c6742b14
PB
2082 return ret;
2083}
2084
2085MemoryRegionSection memory_region_find(MemoryRegion *mr,
2086 hwaddr addr, uint64_t size)
2087{
2088 MemoryRegionSection ret;
2089 rcu_read_lock();
2090 ret = memory_region_find_rcu(mr, addr, size);
2091 if (ret.mr) {
2092 memory_region_ref(ret.mr);
2093 }
2b647668 2094 rcu_read_unlock();
e2177955
AK
2095 return ret;
2096}
2097
c6742b14
PB
2098bool memory_region_present(MemoryRegion *container, hwaddr addr)
2099{
2100 MemoryRegion *mr;
2101
2102 rcu_read_lock();
2103 mr = memory_region_find_rcu(container, addr, 1).mr;
2104 rcu_read_unlock();
2105 return mr && mr != container;
2106}
2107
1d671369 2108void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 2109{
99e86347 2110 FlatView *view;
7664e80c
AK
2111 FlatRange *fr;
2112
856d7245 2113 view = address_space_get_flatview(as);
99e86347 2114 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 2115 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 2116 }
856d7245 2117 flatview_unref(view);
7664e80c
AK
2118}
2119
2120void memory_global_dirty_log_start(void)
2121{
7664e80c 2122 global_dirty_log = true;
6f6a5ef3 2123
7376e582 2124 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB
2125
2126 /* Refresh DIRTY_LOG_MIGRATION bit. */
2127 memory_region_transaction_begin();
2128 memory_region_update_pending = true;
2129 memory_region_transaction_commit();
7664e80c
AK
2130}
2131
2132void memory_global_dirty_log_stop(void)
2133{
7664e80c 2134 global_dirty_log = false;
6f6a5ef3
PB
2135
2136 /* Refresh DIRTY_LOG_MIGRATION bit. */
2137 memory_region_transaction_begin();
2138 memory_region_update_pending = true;
2139 memory_region_transaction_commit();
2140
7376e582 2141 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
2142}
2143
2144static void listener_add_address_space(MemoryListener *listener,
2145 AddressSpace *as)
2146{
99e86347 2147 FlatView *view;
7664e80c
AK
2148 FlatRange *fr;
2149
221b3a3f 2150 if (listener->address_space_filter
f6790af6 2151 && listener->address_space_filter != as) {
221b3a3f
JG
2152 return;
2153 }
2154
680a4783
PB
2155 if (listener->begin) {
2156 listener->begin(listener);
2157 }
7664e80c 2158 if (global_dirty_log) {
975aefe0
AK
2159 if (listener->log_global_start) {
2160 listener->log_global_start(listener);
2161 }
7664e80c 2162 }
975aefe0 2163
856d7245 2164 view = address_space_get_flatview(as);
99e86347 2165 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
2166 MemoryRegionSection section = {
2167 .mr = fr->mr,
f6790af6 2168 .address_space = as,
7664e80c 2169 .offset_within_region = fr->offset_in_region,
052e87b0 2170 .size = fr->addr.size,
7664e80c 2171 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2172 .readonly = fr->readonly,
7664e80c 2173 };
680a4783
PB
2174 if (fr->dirty_log_mask && listener->log_start) {
2175 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2176 }
975aefe0
AK
2177 if (listener->region_add) {
2178 listener->region_add(listener, &section);
2179 }
7664e80c 2180 }
680a4783
PB
2181 if (listener->commit) {
2182 listener->commit(listener);
2183 }
856d7245 2184 flatview_unref(view);
7664e80c
AK
2185}
2186
f6790af6 2187void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 2188{
72e22d2f 2189 MemoryListener *other = NULL;
0d673e36 2190 AddressSpace *as;
72e22d2f 2191
7376e582 2192 listener->address_space_filter = filter;
72e22d2f
AK
2193 if (QTAILQ_EMPTY(&memory_listeners)
2194 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2195 memory_listeners)->priority) {
2196 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2197 } else {
2198 QTAILQ_FOREACH(other, &memory_listeners, link) {
2199 if (listener->priority < other->priority) {
2200 break;
2201 }
2202 }
2203 QTAILQ_INSERT_BEFORE(other, listener, link);
2204 }
0d673e36
AK
2205
2206 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2207 listener_add_address_space(listener, as);
2208 }
7664e80c
AK
2209}
2210
2211void memory_listener_unregister(MemoryListener *listener)
2212{
72e22d2f 2213 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 2214}
e2177955 2215
7dca8043 2216void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2217{
ac95190e 2218 memory_region_ref(root);
59023ef4 2219 memory_region_transaction_begin();
f0c02d15 2220 as->ref_count = 1;
8786db7c 2221 as->root = root;
f0c02d15 2222 as->malloced = false;
8786db7c
AK
2223 as->current_map = g_new(FlatView, 1);
2224 flatview_init(as->current_map);
4c19eb72
AK
2225 as->ioeventfd_nb = 0;
2226 as->ioeventfds = NULL;
0d673e36 2227 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2228 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2229 address_space_init_dispatch(as);
f43793c7
PB
2230 memory_region_update_pending |= root->enabled;
2231 memory_region_transaction_commit();
1c0ffa58 2232}
658b2224 2233
374f2981 2234static void do_address_space_destroy(AddressSpace *as)
83f3c251 2235{
078c44f4 2236 MemoryListener *listener;
f0c02d15 2237 bool do_free = as->malloced;
078c44f4 2238
83f3c251 2239 address_space_destroy_dispatch(as);
078c44f4
DG
2240
2241 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2242 assert(listener->address_space_filter != as);
2243 }
2244
856d7245 2245 flatview_unref(as->current_map);
7dca8043 2246 g_free(as->name);
4c19eb72 2247 g_free(as->ioeventfds);
ac95190e 2248 memory_region_unref(as->root);
f0c02d15
PC
2249 if (do_free) {
2250 g_free(as);
2251 }
2252}
2253
2254AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2255{
2256 AddressSpace *as;
2257
2258 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2259 if (root == as->root && as->malloced) {
2260 as->ref_count++;
2261 return as;
2262 }
2263 }
2264
2265 as = g_malloc0(sizeof *as);
2266 address_space_init(as, root, name);
2267 as->malloced = true;
2268 return as;
83f3c251
AK
2269}
2270
374f2981
PB
2271void address_space_destroy(AddressSpace *as)
2272{
ac95190e
PB
2273 MemoryRegion *root = as->root;
2274
f0c02d15
PC
2275 as->ref_count--;
2276 if (as->ref_count) {
2277 return;
2278 }
374f2981
PB
2279 /* Flush out anything from MemoryListeners listening in on this */
2280 memory_region_transaction_begin();
2281 as->root = NULL;
2282 memory_region_transaction_commit();
2283 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2284 address_space_unregister(as);
374f2981
PB
2285
2286 /* At this point, as->dispatch and as->current_map are dummy
2287 * entries that the guest should never use. Wait for the old
2288 * values to expire before freeing the data.
2289 */
ac95190e 2290 as->root = root;
374f2981
PB
2291 call_rcu(as, do_address_space_destroy, rcu);
2292}
2293
314e2987
BS
2294typedef struct MemoryRegionList MemoryRegionList;
2295
2296struct MemoryRegionList {
2297 const MemoryRegion *mr;
314e2987
BS
2298 QTAILQ_ENTRY(MemoryRegionList) queue;
2299};
2300
2301typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2302
2303static void mtree_print_mr(fprintf_function mon_printf, void *f,
2304 const MemoryRegion *mr, unsigned int level,
a8170e5e 2305 hwaddr base,
9479c57a 2306 MemoryRegionListHead *alias_print_queue)
314e2987 2307{
9479c57a
JK
2308 MemoryRegionList *new_ml, *ml, *next_ml;
2309 MemoryRegionListHead submr_print_queue;
314e2987
BS
2310 const MemoryRegion *submr;
2311 unsigned int i;
2312
f8a9f720 2313 if (!mr) {
314e2987
BS
2314 return;
2315 }
2316
2317 for (i = 0; i < level; i++) {
2318 mon_printf(f, " ");
2319 }
2320
2321 if (mr->alias) {
2322 MemoryRegionList *ml;
2323 bool found = false;
2324
2325 /* check if the alias is already in the queue */
9479c57a 2326 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2327 if (ml->mr == mr->alias) {
314e2987
BS
2328 found = true;
2329 }
2330 }
2331
2332 if (!found) {
2333 ml = g_new(MemoryRegionList, 1);
2334 ml->mr = mr->alias;
9479c57a 2335 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2336 }
4896d74b
JK
2337 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2338 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
f8a9f720 2339 "-" TARGET_FMT_plx "%s\n",
314e2987 2340 base + mr->addr,
08dafab4 2341 base + mr->addr
fd1d9926
AW
2342 + (int128_nz(mr->size) ?
2343 (hwaddr)int128_get64(int128_sub(mr->size,
2344 int128_one())) : 0),
4b474ba7 2345 mr->priority,
5f9a5ea1
JK
2346 mr->romd_mode ? 'R' : '-',
2347 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2348 : '-',
3fb18b4d
PC
2349 memory_region_name(mr),
2350 memory_region_name(mr->alias),
314e2987 2351 mr->alias_offset,
08dafab4 2352 mr->alias_offset
a66670c7
AK
2353 + (int128_nz(mr->size) ?
2354 (hwaddr)int128_get64(int128_sub(mr->size,
f8a9f720
GH
2355 int128_one())) : 0),
2356 mr->enabled ? "" : " [disabled]");
314e2987 2357 } else {
4896d74b 2358 mon_printf(f,
f8a9f720 2359 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
314e2987 2360 base + mr->addr,
08dafab4 2361 base + mr->addr
fd1d9926
AW
2362 + (int128_nz(mr->size) ?
2363 (hwaddr)int128_get64(int128_sub(mr->size,
2364 int128_one())) : 0),
4b474ba7 2365 mr->priority,
5f9a5ea1
JK
2366 mr->romd_mode ? 'R' : '-',
2367 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2368 : '-',
f8a9f720
GH
2369 memory_region_name(mr),
2370 mr->enabled ? "" : " [disabled]");
314e2987 2371 }
9479c57a
JK
2372
2373 QTAILQ_INIT(&submr_print_queue);
2374
314e2987 2375 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2376 new_ml = g_new(MemoryRegionList, 1);
2377 new_ml->mr = submr;
2378 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2379 if (new_ml->mr->addr < ml->mr->addr ||
2380 (new_ml->mr->addr == ml->mr->addr &&
2381 new_ml->mr->priority > ml->mr->priority)) {
2382 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2383 new_ml = NULL;
2384 break;
2385 }
2386 }
2387 if (new_ml) {
2388 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2389 }
2390 }
2391
2392 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2393 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2394 alias_print_queue);
2395 }
2396
88365e47 2397 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2398 g_free(ml);
314e2987
BS
2399 }
2400}
2401
2402void mtree_info(fprintf_function mon_printf, void *f)
2403{
2404 MemoryRegionListHead ml_head;
2405 MemoryRegionList *ml, *ml2;
0d673e36 2406 AddressSpace *as;
314e2987
BS
2407
2408 QTAILQ_INIT(&ml_head);
2409
0d673e36 2410 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH
2411 mon_printf(f, "address-space: %s\n", as->name);
2412 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2413 mon_printf(f, "\n");
b9f9be88
BS
2414 }
2415
314e2987
BS
2416 /* print aliased regions */
2417 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH
2418 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2419 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2420 mon_printf(f, "\n");
314e2987
BS
2421 }
2422
2423 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2424 g_free(ml);
314e2987 2425 }
314e2987 2426}
b4fefef9
PC
2427
2428static const TypeInfo memory_region_info = {
2429 .parent = TYPE_OBJECT,
2430 .name = TYPE_MEMORY_REGION,
2431 .instance_size = sizeof(MemoryRegion),
2432 .instance_init = memory_region_initfn,
2433 .instance_finalize = memory_region_finalize,
2434};
2435
2436static void memory_register_types(void)
2437{
2438 type_register_static(&memory_region_info);
2439}
2440
2441type_init(memory_register_types)