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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
409ddd01 19#include "qapi/visitor.h"
1de7afc9 20#include "qemu/bitops.h"
2c9b15ca 21#include "qom/object.h"
55d5d048 22#include "trace.h"
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23#include <assert.h>
24
022c62cb 25#include "exec/memory-internal.h"
220c3ebd 26#include "exec/ram_addr.h"
e1c57ab8 27#include "sysemu/sysemu.h"
67d95c15 28
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29//#define DEBUG_UNASSIGNED
30
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31static unsigned memory_region_transaction_depth;
32static bool memory_region_update_pending;
4dc56152 33static bool ioeventfd_update_pending;
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34static bool global_dirty_log = false;
35
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36static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
37 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 38
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39static QTAILQ_HEAD(, AddressSpace) address_spaces
40 = QTAILQ_HEAD_INITIALIZER(address_spaces);
41
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42typedef struct AddrRange AddrRange;
43
8417cebf 44/*
c9cdaa3a 45 * Note that signed integers are needed for negative offsetting in aliases
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46 * (large MemoryRegion::alias_offset).
47 */
093bc2cd 48struct AddrRange {
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49 Int128 start;
50 Int128 size;
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51};
52
08dafab4 53static AddrRange addrrange_make(Int128 start, Int128 size)
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54{
55 return (AddrRange) { start, size };
56}
57
58static bool addrrange_equal(AddrRange r1, AddrRange r2)
59{
08dafab4 60 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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61}
62
08dafab4 63static Int128 addrrange_end(AddrRange r)
093bc2cd 64{
08dafab4 65 return int128_add(r.start, r.size);
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66}
67
08dafab4 68static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 69{
08dafab4 70 int128_addto(&range.start, delta);
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71 return range;
72}
73
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74static bool addrrange_contains(AddrRange range, Int128 addr)
75{
76 return int128_ge(addr, range.start)
77 && int128_lt(addr, addrrange_end(range));
78}
79
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80static bool addrrange_intersects(AddrRange r1, AddrRange r2)
81{
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82 return addrrange_contains(r1, r2.start)
83 || addrrange_contains(r2, r1.start);
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84}
85
86static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
87{
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88 Int128 start = int128_max(r1.start, r2.start);
89 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
90 return addrrange_make(start, int128_sub(end, start));
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91}
92
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93enum ListenerDirection { Forward, Reverse };
94
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95static bool memory_listener_match(MemoryListener *listener,
96 MemoryRegionSection *section)
97{
98 return !listener->address_space_filter
99 || listener->address_space_filter == section->address_space;
100}
101
102#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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103 do { \
104 MemoryListener *_listener; \
105 \
106 switch (_direction) { \
107 case Forward: \
108 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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109 if (_listener->_callback) { \
110 _listener->_callback(_listener, ##_args); \
111 } \
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112 } \
113 break; \
114 case Reverse: \
115 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
116 memory_listeners, link) { \
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117 if (_listener->_callback) { \
118 _listener->_callback(_listener, ##_args); \
119 } \
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120 } \
121 break; \
122 default: \
123 abort(); \
124 } \
125 } while (0)
126
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127#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
128 do { \
129 MemoryListener *_listener; \
130 \
131 switch (_direction) { \
132 case Forward: \
133 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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134 if (_listener->_callback \
135 && memory_listener_match(_listener, _section)) { \
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136 _listener->_callback(_listener, _section, ##_args); \
137 } \
138 } \
139 break; \
140 case Reverse: \
141 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
142 memory_listeners, link) { \
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143 if (_listener->_callback \
144 && memory_listener_match(_listener, _section)) { \
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145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
dfde4e6e 154/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 155#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 156 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 157 .mr = (fr)->mr, \
f6790af6 158 .address_space = (as), \
0e0d36b4 159 .offset_within_region = (fr)->offset_in_region, \
052e87b0 160 .size = (fr)->addr.size, \
0e0d36b4 161 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 162 .readonly = (fr)->readonly, \
7376e582 163 }))
0e0d36b4 164
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165struct CoalescedMemoryRange {
166 AddrRange addr;
167 QTAILQ_ENTRY(CoalescedMemoryRange) link;
168};
169
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170struct MemoryRegionIoeventfd {
171 AddrRange addr;
172 bool match_data;
173 uint64_t data;
753d5e14 174 EventNotifier *e;
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175};
176
177static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
178 MemoryRegionIoeventfd b)
179{
08dafab4 180 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 181 return true;
08dafab4 182 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 183 return false;
08dafab4 184 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 185 return true;
08dafab4 186 } else if (int128_gt(a.addr.size, b.addr.size)) {
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187 return false;
188 } else if (a.match_data < b.match_data) {
189 return true;
190 } else if (a.match_data > b.match_data) {
191 return false;
192 } else if (a.match_data) {
193 if (a.data < b.data) {
194 return true;
195 } else if (a.data > b.data) {
196 return false;
197 }
198 }
753d5e14 199 if (a.e < b.e) {
3e9d69e7 200 return true;
753d5e14 201 } else if (a.e > b.e) {
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202 return false;
203 }
204 return false;
205}
206
207static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
208 MemoryRegionIoeventfd b)
209{
210 return !memory_region_ioeventfd_before(a, b)
211 && !memory_region_ioeventfd_before(b, a);
212}
213
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214typedef struct FlatRange FlatRange;
215typedef struct FlatView FlatView;
216
217/* Range of memory in the global map. Addresses are absolute. */
218struct FlatRange {
219 MemoryRegion *mr;
a8170e5e 220 hwaddr offset_in_region;
093bc2cd 221 AddrRange addr;
5a583347 222 uint8_t dirty_log_mask;
5f9a5ea1 223 bool romd_mode;
fb1cd6f9 224 bool readonly;
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225};
226
227/* Flattened global view of current active memory hierarchy. Kept in sorted
228 * order.
229 */
230struct FlatView {
374f2981 231 struct rcu_head rcu;
856d7245 232 unsigned ref;
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233 FlatRange *ranges;
234 unsigned nr;
235 unsigned nr_allocated;
236};
237
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238typedef struct AddressSpaceOps AddressSpaceOps;
239
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240#define FOR_EACH_FLAT_RANGE(var, view) \
241 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
242
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243static bool flatrange_equal(FlatRange *a, FlatRange *b)
244{
245 return a->mr == b->mr
246 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 247 && a->offset_in_region == b->offset_in_region
5f9a5ea1 248 && a->romd_mode == b->romd_mode
fb1cd6f9 249 && a->readonly == b->readonly;
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250}
251
252static void flatview_init(FlatView *view)
253{
856d7245 254 view->ref = 1;
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255 view->ranges = NULL;
256 view->nr = 0;
257 view->nr_allocated = 0;
258}
259
260/* Insert a range into a given position. Caller is responsible for maintaining
261 * sorting order.
262 */
263static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
264{
265 if (view->nr == view->nr_allocated) {
266 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 267 view->ranges = g_realloc(view->ranges,
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268 view->nr_allocated * sizeof(*view->ranges));
269 }
270 memmove(view->ranges + pos + 1, view->ranges + pos,
271 (view->nr - pos) * sizeof(FlatRange));
272 view->ranges[pos] = *range;
dfde4e6e 273 memory_region_ref(range->mr);
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274 ++view->nr;
275}
276
277static void flatview_destroy(FlatView *view)
278{
dfde4e6e
PB
279 int i;
280
281 for (i = 0; i < view->nr; i++) {
282 memory_region_unref(view->ranges[i].mr);
283 }
7267c094 284 g_free(view->ranges);
a9a0c06d 285 g_free(view);
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286}
287
856d7245
PB
288static void flatview_ref(FlatView *view)
289{
290 atomic_inc(&view->ref);
291}
292
293static void flatview_unref(FlatView *view)
294{
295 if (atomic_fetch_dec(&view->ref) == 1) {
296 flatview_destroy(view);
297 }
298}
299
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300static bool can_merge(FlatRange *r1, FlatRange *r2)
301{
08dafab4 302 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 303 && r1->mr == r2->mr
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304 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
305 r1->addr.size),
306 int128_make64(r2->offset_in_region))
d0a9b5bc 307 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 308 && r1->romd_mode == r2->romd_mode
fb1cd6f9 309 && r1->readonly == r2->readonly;
3d8e6bf9
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310}
311
8508e024 312/* Attempt to simplify a view by merging adjacent ranges */
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313static void flatview_simplify(FlatView *view)
314{
315 unsigned i, j;
316
317 i = 0;
318 while (i < view->nr) {
319 j = i + 1;
320 while (j < view->nr
321 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 322 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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323 ++j;
324 }
325 ++i;
326 memmove(&view->ranges[i], &view->ranges[j],
327 (view->nr - j) * sizeof(view->ranges[j]));
328 view->nr -= j - i;
329 }
330}
331
e7342aa3
PB
332static bool memory_region_big_endian(MemoryRegion *mr)
333{
334#ifdef TARGET_WORDS_BIGENDIAN
335 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
336#else
337 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
338#endif
339}
340
e11ef3d1
PB
341static bool memory_region_wrong_endianness(MemoryRegion *mr)
342{
343#ifdef TARGET_WORDS_BIGENDIAN
344 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
345#else
346 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
347#endif
348}
349
350static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
351{
352 if (memory_region_wrong_endianness(mr)) {
353 switch (size) {
354 case 1:
355 break;
356 case 2:
357 *data = bswap16(*data);
358 break;
359 case 4:
360 *data = bswap32(*data);
361 break;
362 case 8:
363 *data = bswap64(*data);
364 break;
365 default:
366 abort();
367 }
368 }
369}
370
cc05c43a
PM
371static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
372 hwaddr addr,
373 uint64_t *value,
374 unsigned size,
375 unsigned shift,
376 uint64_t mask,
377 MemTxAttrs attrs)
378{
379 uint64_t tmp;
380
381 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
382 trace_memory_region_ops_read(mr, addr, tmp, size);
383 *value |= (tmp & mask) << shift;
384 return MEMTX_OK;
385}
386
387static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
388 hwaddr addr,
389 uint64_t *value,
390 unsigned size,
391 unsigned shift,
cc05c43a
PM
392 uint64_t mask,
393 MemTxAttrs attrs)
ce5d2f33 394{
ce5d2f33
PB
395 uint64_t tmp;
396
cc05c43a
PM
397 if (mr->flush_coalesced_mmio) {
398 qemu_flush_coalesced_mmio_buffer();
399 }
400 tmp = mr->ops->read(mr->opaque, addr, size);
55d5d048 401 trace_memory_region_ops_read(mr, addr, tmp, size);
ce5d2f33 402 *value |= (tmp & mask) << shift;
cc05c43a 403 return MEMTX_OK;
ce5d2f33
PB
404}
405
cc05c43a
PM
406static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
407 hwaddr addr,
408 uint64_t *value,
409 unsigned size,
410 unsigned shift,
411 uint64_t mask,
412 MemTxAttrs attrs)
164a4dcd 413{
cc05c43a
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414 uint64_t tmp = 0;
415 MemTxResult r;
164a4dcd 416
d410515e
JK
417 if (mr->flush_coalesced_mmio) {
418 qemu_flush_coalesced_mmio_buffer();
419 }
cc05c43a 420 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
55d5d048 421 trace_memory_region_ops_read(mr, addr, tmp, size);
164a4dcd 422 *value |= (tmp & mask) << shift;
cc05c43a 423 return r;
164a4dcd
AK
424}
425
cc05c43a
PM
426static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
431 uint64_t mask,
432 MemTxAttrs attrs)
ce5d2f33 433{
ce5d2f33
PB
434 uint64_t tmp;
435
436 tmp = (*value >> shift) & mask;
55d5d048 437 trace_memory_region_ops_write(mr, addr, tmp, size);
ce5d2f33 438 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 439 return MEMTX_OK;
ce5d2f33
PB
440}
441
cc05c43a
PM
442static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
443 hwaddr addr,
444 uint64_t *value,
445 unsigned size,
446 unsigned shift,
447 uint64_t mask,
448 MemTxAttrs attrs)
164a4dcd 449{
164a4dcd
AK
450 uint64_t tmp;
451
d410515e
JK
452 if (mr->flush_coalesced_mmio) {
453 qemu_flush_coalesced_mmio_buffer();
454 }
164a4dcd 455 tmp = (*value >> shift) & mask;
55d5d048 456 trace_memory_region_ops_write(mr, addr, tmp, size);
164a4dcd 457 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 458 return MEMTX_OK;
164a4dcd
AK
459}
460
cc05c43a
PM
461static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
462 hwaddr addr,
463 uint64_t *value,
464 unsigned size,
465 unsigned shift,
466 uint64_t mask,
467 MemTxAttrs attrs)
468{
469 uint64_t tmp;
470
471 if (mr->flush_coalesced_mmio) {
472 qemu_flush_coalesced_mmio_buffer();
473 }
474 tmp = (*value >> shift) & mask;
475 trace_memory_region_ops_write(mr, addr, tmp, size);
476 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
477}
478
479static MemTxResult access_with_adjusted_size(hwaddr addr,
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480 uint64_t *value,
481 unsigned size,
482 unsigned access_size_min,
483 unsigned access_size_max,
cc05c43a
PM
484 MemTxResult (*access)(MemoryRegion *mr,
485 hwaddr addr,
486 uint64_t *value,
487 unsigned size,
488 unsigned shift,
489 uint64_t mask,
490 MemTxAttrs attrs),
491 MemoryRegion *mr,
492 MemTxAttrs attrs)
164a4dcd
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493{
494 uint64_t access_mask;
495 unsigned access_size;
496 unsigned i;
cc05c43a 497 MemTxResult r = MEMTX_OK;
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498
499 if (!access_size_min) {
500 access_size_min = 1;
501 }
502 if (!access_size_max) {
503 access_size_max = 4;
504 }
ce5d2f33
PB
505
506 /* FIXME: support unaligned access? */
164a4dcd
AK
507 access_size = MAX(MIN(size, access_size_max), access_size_min);
508 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
509 if (memory_region_big_endian(mr)) {
510 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
511 r |= access(mr, addr + i, value, access_size,
512 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
513 }
514 } else {
515 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
516 r |= access(mr, addr + i, value, access_size, i * 8,
517 access_mask, attrs);
e7342aa3 518 }
164a4dcd 519 }
cc05c43a 520 return r;
164a4dcd
AK
521}
522
e2177955
AK
523static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
524{
0d673e36
AK
525 AddressSpace *as;
526
feca4ac1
PB
527 while (mr->container) {
528 mr = mr->container;
e2177955 529 }
0d673e36
AK
530 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
531 if (mr == as->root) {
532 return as;
533 }
e2177955 534 }
eed2bacf 535 return NULL;
e2177955
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536}
537
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538/* Render a memory region into the global view. Ranges in @view obscure
539 * ranges in @mr.
540 */
541static void render_memory_region(FlatView *view,
542 MemoryRegion *mr,
08dafab4 543 Int128 base,
fb1cd6f9
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544 AddrRange clip,
545 bool readonly)
093bc2cd
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546{
547 MemoryRegion *subregion;
548 unsigned i;
a8170e5e 549 hwaddr offset_in_region;
08dafab4
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550 Int128 remain;
551 Int128 now;
093bc2cd
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552 FlatRange fr;
553 AddrRange tmp;
554
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555 if (!mr->enabled) {
556 return;
557 }
558
08dafab4 559 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 560 readonly |= mr->readonly;
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561
562 tmp = addrrange_make(base, mr->size);
563
564 if (!addrrange_intersects(tmp, clip)) {
565 return;
566 }
567
568 clip = addrrange_intersection(tmp, clip);
569
570 if (mr->alias) {
08dafab4
AK
571 int128_subfrom(&base, int128_make64(mr->alias->addr));
572 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 573 render_memory_region(view, mr->alias, base, clip, readonly);
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574 return;
575 }
576
577 /* Render subregions in priority order. */
578 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 579 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
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580 }
581
14a3c10a 582 if (!mr->terminates) {
093bc2cd
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583 return;
584 }
585
08dafab4 586 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
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587 base = clip.start;
588 remain = clip.size;
589
2eb74e1a
PC
590 fr.mr = mr;
591 fr.dirty_log_mask = mr->dirty_log_mask;
592 fr.romd_mode = mr->romd_mode;
593 fr.readonly = readonly;
594
093bc2cd 595 /* Render the region itself into any gaps left by the current view. */
08dafab4
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596 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
597 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
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598 continue;
599 }
08dafab4
AK
600 if (int128_lt(base, view->ranges[i].addr.start)) {
601 now = int128_min(remain,
602 int128_sub(view->ranges[i].addr.start, base));
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603 fr.offset_in_region = offset_in_region;
604 fr.addr = addrrange_make(base, now);
605 flatview_insert(view, i, &fr);
606 ++i;
08dafab4
AK
607 int128_addto(&base, now);
608 offset_in_region += int128_get64(now);
609 int128_subfrom(&remain, now);
093bc2cd 610 }
d26a8cae
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611 now = int128_sub(int128_min(int128_add(base, remain),
612 addrrange_end(view->ranges[i].addr)),
613 base);
614 int128_addto(&base, now);
615 offset_in_region += int128_get64(now);
616 int128_subfrom(&remain, now);
093bc2cd 617 }
08dafab4 618 if (int128_nz(remain)) {
093bc2cd
AK
619 fr.offset_in_region = offset_in_region;
620 fr.addr = addrrange_make(base, remain);
621 flatview_insert(view, i, &fr);
622 }
623}
624
625/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 626static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 627{
a9a0c06d 628 FlatView *view;
093bc2cd 629
a9a0c06d
PB
630 view = g_new(FlatView, 1);
631 flatview_init(view);
093bc2cd 632
83f3c251 633 if (mr) {
a9a0c06d 634 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
635 addrrange_make(int128_zero(), int128_2_64()), false);
636 }
a9a0c06d 637 flatview_simplify(view);
093bc2cd
AK
638
639 return view;
640}
641
3e9d69e7
AK
642static void address_space_add_del_ioeventfds(AddressSpace *as,
643 MemoryRegionIoeventfd *fds_new,
644 unsigned fds_new_nb,
645 MemoryRegionIoeventfd *fds_old,
646 unsigned fds_old_nb)
647{
648 unsigned iold, inew;
80a1ea37
AK
649 MemoryRegionIoeventfd *fd;
650 MemoryRegionSection section;
3e9d69e7
AK
651
652 /* Generate a symmetric difference of the old and new fd sets, adding
653 * and deleting as necessary.
654 */
655
656 iold = inew = 0;
657 while (iold < fds_old_nb || inew < fds_new_nb) {
658 if (iold < fds_old_nb
659 && (inew == fds_new_nb
660 || memory_region_ioeventfd_before(fds_old[iold],
661 fds_new[inew]))) {
80a1ea37
AK
662 fd = &fds_old[iold];
663 section = (MemoryRegionSection) {
f6790af6 664 .address_space = as,
80a1ea37 665 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 666 .size = fd->addr.size,
80a1ea37
AK
667 };
668 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 669 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
670 ++iold;
671 } else if (inew < fds_new_nb
672 && (iold == fds_old_nb
673 || memory_region_ioeventfd_before(fds_new[inew],
674 fds_old[iold]))) {
80a1ea37
AK
675 fd = &fds_new[inew];
676 section = (MemoryRegionSection) {
f6790af6 677 .address_space = as,
80a1ea37 678 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 679 .size = fd->addr.size,
80a1ea37
AK
680 };
681 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 682 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
683 ++inew;
684 } else {
685 ++iold;
686 ++inew;
687 }
688 }
689}
690
856d7245
PB
691static FlatView *address_space_get_flatview(AddressSpace *as)
692{
693 FlatView *view;
694
374f2981
PB
695 rcu_read_lock();
696 view = atomic_rcu_read(&as->current_map);
856d7245 697 flatview_ref(view);
374f2981 698 rcu_read_unlock();
856d7245
PB
699 return view;
700}
701
3e9d69e7
AK
702static void address_space_update_ioeventfds(AddressSpace *as)
703{
99e86347 704 FlatView *view;
3e9d69e7
AK
705 FlatRange *fr;
706 unsigned ioeventfd_nb = 0;
707 MemoryRegionIoeventfd *ioeventfds = NULL;
708 AddrRange tmp;
709 unsigned i;
710
856d7245 711 view = address_space_get_flatview(as);
99e86347 712 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
713 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
714 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
715 int128_sub(fr->addr.start,
716 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
717 if (addrrange_intersects(fr->addr, tmp)) {
718 ++ioeventfd_nb;
7267c094 719 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
720 ioeventfd_nb * sizeof(*ioeventfds));
721 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
722 ioeventfds[ioeventfd_nb-1].addr = tmp;
723 }
724 }
725 }
726
727 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
728 as->ioeventfds, as->ioeventfd_nb);
729
7267c094 730 g_free(as->ioeventfds);
3e9d69e7
AK
731 as->ioeventfds = ioeventfds;
732 as->ioeventfd_nb = ioeventfd_nb;
856d7245 733 flatview_unref(view);
3e9d69e7
AK
734}
735
b8af1afb 736static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
737 const FlatView *old_view,
738 const FlatView *new_view,
b8af1afb 739 bool adding)
093bc2cd 740{
093bc2cd
AK
741 unsigned iold, inew;
742 FlatRange *frold, *frnew;
093bc2cd
AK
743
744 /* Generate a symmetric difference of the old and new memory maps.
745 * Kill ranges in the old map, and instantiate ranges in the new map.
746 */
747 iold = inew = 0;
a9a0c06d
PB
748 while (iold < old_view->nr || inew < new_view->nr) {
749 if (iold < old_view->nr) {
750 frold = &old_view->ranges[iold];
093bc2cd
AK
751 } else {
752 frold = NULL;
753 }
a9a0c06d
PB
754 if (inew < new_view->nr) {
755 frnew = &new_view->ranges[inew];
093bc2cd
AK
756 } else {
757 frnew = NULL;
758 }
759
760 if (frold
761 && (!frnew
08dafab4
AK
762 || int128_lt(frold->addr.start, frnew->addr.start)
763 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 764 && !flatrange_equal(frold, frnew)))) {
41a6e477 765 /* In old but not in new, or in both but attributes changed. */
093bc2cd 766
b8af1afb 767 if (!adding) {
72e22d2f 768 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
769 }
770
093bc2cd
AK
771 ++iold;
772 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 773 /* In both and unchanged (except logging may have changed) */
093bc2cd 774
b8af1afb 775 if (adding) {
50c1e149 776 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 777 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 778 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 779 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 780 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 781 }
5a583347
AK
782 }
783
093bc2cd
AK
784 ++iold;
785 ++inew;
093bc2cd
AK
786 } else {
787 /* In new */
788
b8af1afb 789 if (adding) {
72e22d2f 790 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
791 }
792
093bc2cd
AK
793 ++inew;
794 }
795 }
b8af1afb
AK
796}
797
798
799static void address_space_update_topology(AddressSpace *as)
800{
856d7245 801 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 802 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
803
804 address_space_update_topology_pass(as, old_view, new_view, false);
805 address_space_update_topology_pass(as, old_view, new_view, true);
806
374f2981
PB
807 /* Writes are protected by the BQL. */
808 atomic_rcu_set(&as->current_map, new_view);
809 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB
810
811 /* Note that all the old MemoryRegions are still alive up to this
812 * point. This relieves most MemoryListeners from the need to
813 * ref/unref the MemoryRegions they get---unless they use them
814 * outside the iothread mutex, in which case precise reference
815 * counting is necessary.
816 */
817 flatview_unref(old_view);
818
3e9d69e7 819 address_space_update_ioeventfds(as);
093bc2cd
AK
820}
821
4ef4db86
AK
822void memory_region_transaction_begin(void)
823{
bb880ded 824 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
825 ++memory_region_transaction_depth;
826}
827
4dc56152
GA
828static void memory_region_clear_pending(void)
829{
830 memory_region_update_pending = false;
831 ioeventfd_update_pending = false;
832}
833
4ef4db86
AK
834void memory_region_transaction_commit(void)
835{
0d673e36
AK
836 AddressSpace *as;
837
4ef4db86
AK
838 assert(memory_region_transaction_depth);
839 --memory_region_transaction_depth;
4dc56152
GA
840 if (!memory_region_transaction_depth) {
841 if (memory_region_update_pending) {
842 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 843
4dc56152
GA
844 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
845 address_space_update_topology(as);
846 }
02e2b95f 847
4dc56152
GA
848 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
849 } else if (ioeventfd_update_pending) {
850 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
851 address_space_update_ioeventfds(as);
852 }
853 }
854 memory_region_clear_pending();
855 }
4ef4db86
AK
856}
857
545e92e0
AK
858static void memory_region_destructor_none(MemoryRegion *mr)
859{
860}
861
862static void memory_region_destructor_ram(MemoryRegion *mr)
863{
864 qemu_ram_free(mr->ram_addr);
865}
866
dfde4e6e
PB
867static void memory_region_destructor_alias(MemoryRegion *mr)
868{
869 memory_region_unref(mr->alias);
870}
871
545e92e0
AK
872static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
873{
874 qemu_ram_free_from_ptr(mr->ram_addr);
875}
876
d0a9b5bc
AK
877static void memory_region_destructor_rom_device(MemoryRegion *mr)
878{
879 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
880}
881
b4fefef9
PC
882static bool memory_region_need_escape(char c)
883{
884 return c == '/' || c == '[' || c == '\\' || c == ']';
885}
886
887static char *memory_region_escape_name(const char *name)
888{
889 const char *p;
890 char *escaped, *q;
891 uint8_t c;
892 size_t bytes = 0;
893
894 for (p = name; *p; p++) {
895 bytes += memory_region_need_escape(*p) ? 4 : 1;
896 }
897 if (bytes == p - name) {
898 return g_memdup(name, bytes + 1);
899 }
900
901 escaped = g_malloc(bytes + 1);
902 for (p = name, q = escaped; *p; p++) {
903 c = *p;
904 if (unlikely(memory_region_need_escape(c))) {
905 *q++ = '\\';
906 *q++ = 'x';
907 *q++ = "0123456789abcdef"[c >> 4];
908 c = "0123456789abcdef"[c & 15];
909 }
910 *q++ = c;
911 }
912 *q = 0;
913 return escaped;
914}
915
093bc2cd 916void memory_region_init(MemoryRegion *mr,
2c9b15ca 917 Object *owner,
093bc2cd
AK
918 const char *name,
919 uint64_t size)
920{
22a893e4 921 if (!owner) {
210eb936 922 owner = container_get(qdev_get_machine(), "/unattached");
22a893e4 923 }
b4fefef9 924
22a893e4 925 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
926 mr->size = int128_make64(size);
927 if (size == UINT64_MAX) {
928 mr->size = int128_2_64();
929 }
302fa283 930 mr->name = g_strdup(name);
b4fefef9
PC
931
932 if (name) {
843ef73a
PC
933 char *escaped_name = memory_region_escape_name(name);
934 char *name_array = g_strdup_printf("%s[*]", escaped_name);
935 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 936 object_unref(OBJECT(mr));
843ef73a
PC
937 g_free(name_array);
938 g_free(escaped_name);
b4fefef9
PC
939 }
940}
941
409ddd01
PC
942static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
943 const char *name, Error **errp)
944{
945 MemoryRegion *mr = MEMORY_REGION(obj);
946 uint64_t value = mr->addr;
947
948 visit_type_uint64(v, &value, name, errp);
949}
950
951static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
952 const char *name, Error **errp)
953{
954 MemoryRegion *mr = MEMORY_REGION(obj);
955 gchar *path = (gchar *)"";
956
957 if (mr->container) {
958 path = object_get_canonical_path(OBJECT(mr->container));
959 }
960 visit_type_str(v, &path, name, errp);
961 if (mr->container) {
962 g_free(path);
963 }
964}
965
966static Object *memory_region_resolve_container(Object *obj, void *opaque,
967 const char *part)
968{
969 MemoryRegion *mr = MEMORY_REGION(obj);
970
971 return OBJECT(mr->container);
972}
973
d33382da
PC
974static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
975 const char *name, Error **errp)
976{
977 MemoryRegion *mr = MEMORY_REGION(obj);
978 int32_t value = mr->priority;
979
980 visit_type_int32(v, &value, name, errp);
981}
982
983static bool memory_region_get_may_overlap(Object *obj, Error **errp)
984{
985 MemoryRegion *mr = MEMORY_REGION(obj);
986
987 return mr->may_overlap;
988}
989
52aef7bb
PC
990static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
991 const char *name, Error **errp)
992{
993 MemoryRegion *mr = MEMORY_REGION(obj);
994 uint64_t value = memory_region_size(mr);
995
996 visit_type_uint64(v, &value, name, errp);
997}
998
b4fefef9
PC
999static void memory_region_initfn(Object *obj)
1000{
1001 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1002 ObjectProperty *op;
b4fefef9
PC
1003
1004 mr->ops = &unassigned_mem_ops;
6bba19ba 1005 mr->enabled = true;
5f9a5ea1 1006 mr->romd_mode = true;
545e92e0 1007 mr->destructor = memory_region_destructor_none;
093bc2cd 1008 QTAILQ_INIT(&mr->subregions);
093bc2cd 1009 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1010
1011 op = object_property_add(OBJECT(mr), "container",
1012 "link<" TYPE_MEMORY_REGION ">",
1013 memory_region_get_container,
1014 NULL, /* memory_region_set_container */
1015 NULL, NULL, &error_abort);
1016 op->resolve = memory_region_resolve_container;
1017
1018 object_property_add(OBJECT(mr), "addr", "uint64",
1019 memory_region_get_addr,
1020 NULL, /* memory_region_set_addr */
1021 NULL, NULL, &error_abort);
d33382da
PC
1022 object_property_add(OBJECT(mr), "priority", "uint32",
1023 memory_region_get_priority,
1024 NULL, /* memory_region_set_priority */
1025 NULL, NULL, &error_abort);
1026 object_property_add_bool(OBJECT(mr), "may-overlap",
1027 memory_region_get_may_overlap,
1028 NULL, /* memory_region_set_may_overlap */
1029 &error_abort);
52aef7bb
PC
1030 object_property_add(OBJECT(mr), "size", "uint64",
1031 memory_region_get_size,
1032 NULL, /* memory_region_set_size, */
1033 NULL, NULL, &error_abort);
093bc2cd
AK
1034}
1035
b018ddf6
PB
1036static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1037 unsigned size)
1038{
1039#ifdef DEBUG_UNASSIGNED
1040 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1041#endif
4917cf44
AF
1042 if (current_cpu != NULL) {
1043 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1044 }
68a7439a 1045 return 0;
b018ddf6
PB
1046}
1047
1048static void unassigned_mem_write(void *opaque, hwaddr addr,
1049 uint64_t val, unsigned size)
1050{
1051#ifdef DEBUG_UNASSIGNED
1052 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1053#endif
4917cf44
AF
1054 if (current_cpu != NULL) {
1055 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1056 }
b018ddf6
PB
1057}
1058
d197063f
PB
1059static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1060 unsigned size, bool is_write)
1061{
1062 return false;
1063}
1064
1065const MemoryRegionOps unassigned_mem_ops = {
1066 .valid.accepts = unassigned_mem_accepts,
1067 .endianness = DEVICE_NATIVE_ENDIAN,
1068};
1069
d2702032
PB
1070bool memory_region_access_valid(MemoryRegion *mr,
1071 hwaddr addr,
1072 unsigned size,
1073 bool is_write)
093bc2cd 1074{
a014ed07
PB
1075 int access_size_min, access_size_max;
1076 int access_size, i;
897fa7cf 1077
093bc2cd
AK
1078 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1079 return false;
1080 }
1081
a014ed07 1082 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1083 return true;
1084 }
1085
a014ed07
PB
1086 access_size_min = mr->ops->valid.min_access_size;
1087 if (!mr->ops->valid.min_access_size) {
1088 access_size_min = 1;
1089 }
1090
1091 access_size_max = mr->ops->valid.max_access_size;
1092 if (!mr->ops->valid.max_access_size) {
1093 access_size_max = 4;
1094 }
1095
1096 access_size = MAX(MIN(size, access_size_max), access_size_min);
1097 for (i = 0; i < size; i += access_size) {
1098 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1099 is_write)) {
1100 return false;
1101 }
093bc2cd 1102 }
a014ed07 1103
093bc2cd
AK
1104 return true;
1105}
1106
cc05c43a
PM
1107static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1108 hwaddr addr,
1109 uint64_t *pval,
1110 unsigned size,
1111 MemTxAttrs attrs)
093bc2cd 1112{
cc05c43a 1113 *pval = 0;
093bc2cd 1114
ce5d2f33 1115 if (mr->ops->read) {
cc05c43a
PM
1116 return access_with_adjusted_size(addr, pval, size,
1117 mr->ops->impl.min_access_size,
1118 mr->ops->impl.max_access_size,
1119 memory_region_read_accessor,
1120 mr, attrs);
1121 } else if (mr->ops->read_with_attrs) {
1122 return access_with_adjusted_size(addr, pval, size,
1123 mr->ops->impl.min_access_size,
1124 mr->ops->impl.max_access_size,
1125 memory_region_read_with_attrs_accessor,
1126 mr, attrs);
ce5d2f33 1127 } else {
cc05c43a
PM
1128 return access_with_adjusted_size(addr, pval, size, 1, 4,
1129 memory_region_oldmmio_read_accessor,
1130 mr, attrs);
74901c3b 1131 }
093bc2cd
AK
1132}
1133
3b643495
PM
1134MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1135 hwaddr addr,
1136 uint64_t *pval,
1137 unsigned size,
1138 MemTxAttrs attrs)
a621f38d 1139{
cc05c43a
PM
1140 MemTxResult r;
1141
791af8c8
PB
1142 if (!memory_region_access_valid(mr, addr, size, false)) {
1143 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1144 return MEMTX_DECODE_ERROR;
791af8c8 1145 }
a621f38d 1146
cc05c43a 1147 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1148 adjust_endianness(mr, pval, size);
cc05c43a 1149 return r;
a621f38d 1150}
093bc2cd 1151
3b643495
PM
1152MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1153 hwaddr addr,
1154 uint64_t data,
1155 unsigned size,
1156 MemTxAttrs attrs)
a621f38d 1157{
897fa7cf 1158 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1159 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1160 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1161 }
1162
a621f38d
AK
1163 adjust_endianness(mr, &data, size);
1164
ce5d2f33 1165 if (mr->ops->write) {
cc05c43a
PM
1166 return access_with_adjusted_size(addr, &data, size,
1167 mr->ops->impl.min_access_size,
1168 mr->ops->impl.max_access_size,
1169 memory_region_write_accessor, mr,
1170 attrs);
1171 } else if (mr->ops->write_with_attrs) {
1172 return
1173 access_with_adjusted_size(addr, &data, size,
1174 mr->ops->impl.min_access_size,
1175 mr->ops->impl.max_access_size,
1176 memory_region_write_with_attrs_accessor,
1177 mr, attrs);
ce5d2f33 1178 } else {
cc05c43a
PM
1179 return access_with_adjusted_size(addr, &data, size, 1, 4,
1180 memory_region_oldmmio_write_accessor,
1181 mr, attrs);
74901c3b 1182 }
093bc2cd
AK
1183}
1184
093bc2cd 1185void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1186 Object *owner,
093bc2cd
AK
1187 const MemoryRegionOps *ops,
1188 void *opaque,
1189 const char *name,
1190 uint64_t size)
1191{
2c9b15ca 1192 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1193 mr->ops = ops;
1194 mr->opaque = opaque;
14a3c10a 1195 mr->terminates = true;
97161e17 1196 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1197}
1198
1199void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1200 Object *owner,
093bc2cd 1201 const char *name,
49946538
HT
1202 uint64_t size,
1203 Error **errp)
093bc2cd 1204{
2c9b15ca 1205 memory_region_init(mr, owner, name, size);
8ea9252a 1206 mr->ram = true;
14a3c10a 1207 mr->terminates = true;
545e92e0 1208 mr->destructor = memory_region_destructor_ram;
49946538 1209 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
0b183fc8
PB
1210}
1211
60786ef3
MT
1212void memory_region_init_resizeable_ram(MemoryRegion *mr,
1213 Object *owner,
1214 const char *name,
1215 uint64_t size,
1216 uint64_t max_size,
1217 void (*resized)(const char*,
1218 uint64_t length,
1219 void *host),
1220 Error **errp)
1221{
1222 memory_region_init(mr, owner, name, size);
1223 mr->ram = true;
1224 mr->terminates = true;
1225 mr->destructor = memory_region_destructor_ram;
1226 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1227}
1228
0b183fc8
PB
1229#ifdef __linux__
1230void memory_region_init_ram_from_file(MemoryRegion *mr,
1231 struct Object *owner,
1232 const char *name,
1233 uint64_t size,
dbcb8981 1234 bool share,
7f56e740
PB
1235 const char *path,
1236 Error **errp)
0b183fc8
PB
1237{
1238 memory_region_init(mr, owner, name, size);
1239 mr->ram = true;
1240 mr->terminates = true;
1241 mr->destructor = memory_region_destructor_ram;
dbcb8981 1242 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
093bc2cd 1243}
0b183fc8 1244#endif
093bc2cd
AK
1245
1246void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1247 Object *owner,
093bc2cd
AK
1248 const char *name,
1249 uint64_t size,
1250 void *ptr)
1251{
2c9b15ca 1252 memory_region_init(mr, owner, name, size);
8ea9252a 1253 mr->ram = true;
14a3c10a 1254 mr->terminates = true;
545e92e0 1255 mr->destructor = memory_region_destructor_ram_from_ptr;
ef701d7b
HT
1256
1257 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1258 assert(ptr != NULL);
1259 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
093bc2cd
AK
1260}
1261
e4dc3f59
ND
1262void memory_region_set_skip_dump(MemoryRegion *mr)
1263{
1264 mr->skip_dump = true;
1265}
1266
093bc2cd 1267void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1268 Object *owner,
093bc2cd
AK
1269 const char *name,
1270 MemoryRegion *orig,
a8170e5e 1271 hwaddr offset,
093bc2cd
AK
1272 uint64_t size)
1273{
2c9b15ca 1274 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1275 memory_region_ref(orig);
1276 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1277 mr->alias = orig;
1278 mr->alias_offset = offset;
1279}
1280
d0a9b5bc 1281void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1282 Object *owner,
d0a9b5bc 1283 const MemoryRegionOps *ops,
75f5941c 1284 void *opaque,
d0a9b5bc 1285 const char *name,
33e0eb52
HT
1286 uint64_t size,
1287 Error **errp)
d0a9b5bc 1288{
2c9b15ca 1289 memory_region_init(mr, owner, name, size);
7bc2b9cd 1290 mr->ops = ops;
75f5941c 1291 mr->opaque = opaque;
d0a9b5bc 1292 mr->terminates = true;
75c578dc 1293 mr->rom_device = true;
d0a9b5bc 1294 mr->destructor = memory_region_destructor_rom_device;
33e0eb52 1295 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK
1296}
1297
30951157 1298void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1299 Object *owner,
30951157
AK
1300 const MemoryRegionIOMMUOps *ops,
1301 const char *name,
1302 uint64_t size)
1303{
2c9b15ca 1304 memory_region_init(mr, owner, name, size);
30951157
AK
1305 mr->iommu_ops = ops,
1306 mr->terminates = true; /* then re-forwards */
06866575 1307 notifier_list_init(&mr->iommu_notify);
30951157
AK
1308}
1309
1660e72d 1310void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1311 Object *owner,
1660e72d
JK
1312 const char *name,
1313 uint64_t size)
1314{
2c9b15ca 1315 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1316}
1317
b4fefef9 1318static void memory_region_finalize(Object *obj)
093bc2cd 1319{
b4fefef9
PC
1320 MemoryRegion *mr = MEMORY_REGION(obj);
1321
093bc2cd 1322 assert(QTAILQ_EMPTY(&mr->subregions));
545e92e0 1323 mr->destructor(mr);
093bc2cd 1324 memory_region_clear_coalescing(mr);
302fa283 1325 g_free((char *)mr->name);
7267c094 1326 g_free(mr->ioeventfds);
093bc2cd
AK
1327}
1328
803c0816
PB
1329Object *memory_region_owner(MemoryRegion *mr)
1330{
22a893e4
PB
1331 Object *obj = OBJECT(mr);
1332 return obj->parent;
803c0816
PB
1333}
1334
46637be2
PB
1335void memory_region_ref(MemoryRegion *mr)
1336{
22a893e4
PB
1337 /* MMIO callbacks most likely will access data that belongs
1338 * to the owner, hence the need to ref/unref the owner whenever
1339 * the memory region is in use.
1340 *
1341 * The memory region is a child of its owner. As long as the
1342 * owner doesn't call unparent itself on the memory region,
1343 * ref-ing the owner will also keep the memory region alive.
1344 * Memory regions without an owner are supposed to never go away,
1345 * but we still ref/unref them for debugging purposes.
1346 */
1347 Object *obj = OBJECT(mr);
1348 if (obj && obj->parent) {
1349 object_ref(obj->parent);
b4fefef9 1350 } else {
22a893e4 1351 object_ref(obj);
46637be2
PB
1352 }
1353}
1354
1355void memory_region_unref(MemoryRegion *mr)
1356{
22a893e4
PB
1357 Object *obj = OBJECT(mr);
1358 if (obj && obj->parent) {
1359 object_unref(obj->parent);
b4fefef9 1360 } else {
22a893e4 1361 object_unref(obj);
46637be2
PB
1362 }
1363}
1364
093bc2cd
AK
1365uint64_t memory_region_size(MemoryRegion *mr)
1366{
08dafab4
AK
1367 if (int128_eq(mr->size, int128_2_64())) {
1368 return UINT64_MAX;
1369 }
1370 return int128_get64(mr->size);
093bc2cd
AK
1371}
1372
5d546d4b 1373const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1374{
d1dd32af
PC
1375 if (!mr->name) {
1376 ((MemoryRegion *)mr)->name =
1377 object_get_canonical_path_component(OBJECT(mr));
1378 }
302fa283 1379 return mr->name;
8991c79b
AK
1380}
1381
8ea9252a
AK
1382bool memory_region_is_ram(MemoryRegion *mr)
1383{
1384 return mr->ram;
1385}
1386
e4dc3f59
ND
1387bool memory_region_is_skip_dump(MemoryRegion *mr)
1388{
1389 return mr->skip_dump;
1390}
1391
55043ba3
AK
1392bool memory_region_is_logging(MemoryRegion *mr)
1393{
1394 return mr->dirty_log_mask;
1395}
1396
ce7923da
AK
1397bool memory_region_is_rom(MemoryRegion *mr)
1398{
1399 return mr->ram && mr->readonly;
1400}
1401
30951157
AK
1402bool memory_region_is_iommu(MemoryRegion *mr)
1403{
1404 return mr->iommu_ops;
1405}
1406
06866575
DG
1407void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1408{
1409 notifier_list_add(&mr->iommu_notify, n);
1410}
1411
1412void memory_region_unregister_iommu_notifier(Notifier *n)
1413{
1414 notifier_remove(n);
1415}
1416
1417void memory_region_notify_iommu(MemoryRegion *mr,
1418 IOMMUTLBEntry entry)
1419{
1420 assert(memory_region_is_iommu(mr));
1421 notifier_list_notify(&mr->iommu_notify, &entry);
1422}
1423
093bc2cd
AK
1424void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1425{
5a583347
AK
1426 uint8_t mask = 1 << client;
1427
59023ef4 1428 memory_region_transaction_begin();
5a583347 1429 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1430 memory_region_update_pending |= mr->enabled;
59023ef4 1431 memory_region_transaction_commit();
093bc2cd
AK
1432}
1433
a8170e5e
AK
1434bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1435 hwaddr size, unsigned client)
093bc2cd 1436{
14a3c10a 1437 assert(mr->terminates);
52159192 1438 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1439}
1440
a8170e5e
AK
1441void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1442 hwaddr size)
093bc2cd 1443{
14a3c10a 1444 assert(mr->terminates);
75218e7f 1445 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
093bc2cd
AK
1446}
1447
6c279db8
JQ
1448bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1449 hwaddr size, unsigned client)
1450{
1451 bool ret;
1452 assert(mr->terminates);
52159192 1453 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
6c279db8 1454 if (ret) {
a2f4d5be 1455 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
6c279db8
JQ
1456 }
1457 return ret;
1458}
1459
1460
093bc2cd
AK
1461void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1462{
0d673e36 1463 AddressSpace *as;
5a583347
AK
1464 FlatRange *fr;
1465
0d673e36 1466 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1467 FlatView *view = address_space_get_flatview(as);
99e86347 1468 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1469 if (fr->mr == mr) {
1470 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1471 }
5a583347 1472 }
856d7245 1473 flatview_unref(view);
5a583347 1474 }
093bc2cd
AK
1475}
1476
1477void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1478{
fb1cd6f9 1479 if (mr->readonly != readonly) {
59023ef4 1480 memory_region_transaction_begin();
fb1cd6f9 1481 mr->readonly = readonly;
22bde714 1482 memory_region_update_pending |= mr->enabled;
59023ef4 1483 memory_region_transaction_commit();
fb1cd6f9 1484 }
093bc2cd
AK
1485}
1486
5f9a5ea1 1487void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1488{
5f9a5ea1 1489 if (mr->romd_mode != romd_mode) {
59023ef4 1490 memory_region_transaction_begin();
5f9a5ea1 1491 mr->romd_mode = romd_mode;
22bde714 1492 memory_region_update_pending |= mr->enabled;
59023ef4 1493 memory_region_transaction_commit();
d0a9b5bc
AK
1494 }
1495}
1496
a8170e5e
AK
1497void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1498 hwaddr size, unsigned client)
093bc2cd 1499{
14a3c10a 1500 assert(mr->terminates);
a2f4d5be 1501 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1502}
1503
a35ba7be
PB
1504int memory_region_get_fd(MemoryRegion *mr)
1505{
1506 if (mr->alias) {
1507 return memory_region_get_fd(mr->alias);
1508 }
1509
1510 assert(mr->terminates);
1511
1512 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1513}
1514
093bc2cd
AK
1515void *memory_region_get_ram_ptr(MemoryRegion *mr)
1516{
1517 if (mr->alias) {
1518 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1519 }
1520
14a3c10a 1521 assert(mr->terminates);
093bc2cd 1522
021d26d1 1523 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1524}
1525
37d7c084
PB
1526void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1527{
1528 assert(mr->terminates);
1529
1530 qemu_ram_resize(mr->ram_addr, newsize, errp);
1531}
1532
0d673e36 1533static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1534{
99e86347 1535 FlatView *view;
093bc2cd
AK
1536 FlatRange *fr;
1537 CoalescedMemoryRange *cmr;
1538 AddrRange tmp;
95d2994a 1539 MemoryRegionSection section;
093bc2cd 1540
856d7245 1541 view = address_space_get_flatview(as);
99e86347 1542 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1543 if (fr->mr == mr) {
95d2994a 1544 section = (MemoryRegionSection) {
f6790af6 1545 .address_space = as,
95d2994a 1546 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1547 .size = fr->addr.size,
95d2994a
AK
1548 };
1549
1550 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1551 int128_get64(fr->addr.start),
1552 int128_get64(fr->addr.size));
093bc2cd
AK
1553 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1554 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1555 int128_sub(fr->addr.start,
1556 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1557 if (!addrrange_intersects(tmp, fr->addr)) {
1558 continue;
1559 }
1560 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1561 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1562 int128_get64(tmp.start),
1563 int128_get64(tmp.size));
093bc2cd
AK
1564 }
1565 }
1566 }
856d7245 1567 flatview_unref(view);
093bc2cd
AK
1568}
1569
0d673e36
AK
1570static void memory_region_update_coalesced_range(MemoryRegion *mr)
1571{
1572 AddressSpace *as;
1573
1574 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1575 memory_region_update_coalesced_range_as(mr, as);
1576 }
1577}
1578
093bc2cd
AK
1579void memory_region_set_coalescing(MemoryRegion *mr)
1580{
1581 memory_region_clear_coalescing(mr);
08dafab4 1582 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1583}
1584
1585void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1586 hwaddr offset,
093bc2cd
AK
1587 uint64_t size)
1588{
7267c094 1589 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1590
08dafab4 1591 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1592 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1593 memory_region_update_coalesced_range(mr);
d410515e 1594 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1595}
1596
1597void memory_region_clear_coalescing(MemoryRegion *mr)
1598{
1599 CoalescedMemoryRange *cmr;
ab5b3db5 1600 bool updated = false;
093bc2cd 1601
d410515e
JK
1602 qemu_flush_coalesced_mmio_buffer();
1603 mr->flush_coalesced_mmio = false;
1604
093bc2cd
AK
1605 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1606 cmr = QTAILQ_FIRST(&mr->coalesced);
1607 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1608 g_free(cmr);
ab5b3db5
FZ
1609 updated = true;
1610 }
1611
1612 if (updated) {
1613 memory_region_update_coalesced_range(mr);
093bc2cd 1614 }
093bc2cd
AK
1615}
1616
d410515e
JK
1617void memory_region_set_flush_coalesced(MemoryRegion *mr)
1618{
1619 mr->flush_coalesced_mmio = true;
1620}
1621
1622void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1623{
1624 qemu_flush_coalesced_mmio_buffer();
1625 if (QTAILQ_EMPTY(&mr->coalesced)) {
1626 mr->flush_coalesced_mmio = false;
1627 }
1628}
1629
3e9d69e7 1630void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1631 hwaddr addr,
3e9d69e7
AK
1632 unsigned size,
1633 bool match_data,
1634 uint64_t data,
753d5e14 1635 EventNotifier *e)
3e9d69e7
AK
1636{
1637 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1638 .addr.start = int128_make64(addr),
1639 .addr.size = int128_make64(size),
3e9d69e7
AK
1640 .match_data = match_data,
1641 .data = data,
753d5e14 1642 .e = e,
3e9d69e7
AK
1643 };
1644 unsigned i;
1645
28f362be 1646 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1647 memory_region_transaction_begin();
3e9d69e7
AK
1648 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1649 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1650 break;
1651 }
1652 }
1653 ++mr->ioeventfd_nb;
7267c094 1654 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1655 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1656 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1657 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1658 mr->ioeventfds[i] = mrfd;
4dc56152 1659 ioeventfd_update_pending |= mr->enabled;
59023ef4 1660 memory_region_transaction_commit();
3e9d69e7
AK
1661}
1662
1663void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1664 hwaddr addr,
3e9d69e7
AK
1665 unsigned size,
1666 bool match_data,
1667 uint64_t data,
753d5e14 1668 EventNotifier *e)
3e9d69e7
AK
1669{
1670 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1671 .addr.start = int128_make64(addr),
1672 .addr.size = int128_make64(size),
3e9d69e7
AK
1673 .match_data = match_data,
1674 .data = data,
753d5e14 1675 .e = e,
3e9d69e7
AK
1676 };
1677 unsigned i;
1678
28f362be 1679 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1680 memory_region_transaction_begin();
3e9d69e7
AK
1681 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1682 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1683 break;
1684 }
1685 }
1686 assert(i != mr->ioeventfd_nb);
1687 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1688 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1689 --mr->ioeventfd_nb;
7267c094 1690 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1691 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1692 ioeventfd_update_pending |= mr->enabled;
59023ef4 1693 memory_region_transaction_commit();
3e9d69e7
AK
1694}
1695
feca4ac1 1696static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1697{
0598701a 1698 hwaddr offset = subregion->addr;
feca4ac1 1699 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1700 MemoryRegion *other;
1701
59023ef4
JK
1702 memory_region_transaction_begin();
1703
dfde4e6e 1704 memory_region_ref(subregion);
093bc2cd
AK
1705 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1706 if (subregion->may_overlap || other->may_overlap) {
1707 continue;
1708 }
2c7cfd65 1709 if (int128_ge(int128_make64(offset),
08dafab4
AK
1710 int128_add(int128_make64(other->addr), other->size))
1711 || int128_le(int128_add(int128_make64(offset), subregion->size),
1712 int128_make64(other->addr))) {
093bc2cd
AK
1713 continue;
1714 }
a5e1cbc8 1715#if 0
860329b2
MW
1716 printf("warning: subregion collision %llx/%llx (%s) "
1717 "vs %llx/%llx (%s)\n",
093bc2cd 1718 (unsigned long long)offset,
08dafab4 1719 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1720 subregion->name,
1721 (unsigned long long)other->addr,
08dafab4 1722 (unsigned long long)int128_get64(other->size),
860329b2 1723 other->name);
a5e1cbc8 1724#endif
093bc2cd
AK
1725 }
1726 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1727 if (subregion->priority >= other->priority) {
1728 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1729 goto done;
1730 }
1731 }
1732 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1733done:
22bde714 1734 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1735 memory_region_transaction_commit();
093bc2cd
AK
1736}
1737
0598701a
PC
1738static void memory_region_add_subregion_common(MemoryRegion *mr,
1739 hwaddr offset,
1740 MemoryRegion *subregion)
1741{
feca4ac1
PB
1742 assert(!subregion->container);
1743 subregion->container = mr;
0598701a 1744 subregion->addr = offset;
feca4ac1 1745 memory_region_update_container_subregions(subregion);
0598701a 1746}
093bc2cd
AK
1747
1748void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1749 hwaddr offset,
093bc2cd
AK
1750 MemoryRegion *subregion)
1751{
1752 subregion->may_overlap = false;
1753 subregion->priority = 0;
1754 memory_region_add_subregion_common(mr, offset, subregion);
1755}
1756
1757void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1758 hwaddr offset,
093bc2cd 1759 MemoryRegion *subregion,
a1ff8ae0 1760 int priority)
093bc2cd
AK
1761{
1762 subregion->may_overlap = true;
1763 subregion->priority = priority;
1764 memory_region_add_subregion_common(mr, offset, subregion);
1765}
1766
1767void memory_region_del_subregion(MemoryRegion *mr,
1768 MemoryRegion *subregion)
1769{
59023ef4 1770 memory_region_transaction_begin();
feca4ac1
PB
1771 assert(subregion->container == mr);
1772 subregion->container = NULL;
093bc2cd 1773 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1774 memory_region_unref(subregion);
22bde714 1775 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1776 memory_region_transaction_commit();
6bba19ba
AK
1777}
1778
1779void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1780{
1781 if (enabled == mr->enabled) {
1782 return;
1783 }
59023ef4 1784 memory_region_transaction_begin();
6bba19ba 1785 mr->enabled = enabled;
22bde714 1786 memory_region_update_pending = true;
59023ef4 1787 memory_region_transaction_commit();
093bc2cd 1788}
1c0ffa58 1789
e7af4c67
MT
1790void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1791{
1792 Int128 s = int128_make64(size);
1793
1794 if (size == UINT64_MAX) {
1795 s = int128_2_64();
1796 }
1797 if (int128_eq(s, mr->size)) {
1798 return;
1799 }
1800 memory_region_transaction_begin();
1801 mr->size = s;
1802 memory_region_update_pending = true;
1803 memory_region_transaction_commit();
1804}
1805
67891b8a 1806static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1807{
feca4ac1 1808 MemoryRegion *container = mr->container;
2282e1af 1809
feca4ac1 1810 if (container) {
67891b8a
PC
1811 memory_region_transaction_begin();
1812 memory_region_ref(mr);
feca4ac1
PB
1813 memory_region_del_subregion(container, mr);
1814 mr->container = container;
1815 memory_region_update_container_subregions(mr);
67891b8a
PC
1816 memory_region_unref(mr);
1817 memory_region_transaction_commit();
2282e1af 1818 }
67891b8a 1819}
2282e1af 1820
67891b8a
PC
1821void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1822{
1823 if (addr != mr->addr) {
1824 mr->addr = addr;
1825 memory_region_readd_subregion(mr);
1826 }
2282e1af
AK
1827}
1828
a8170e5e 1829void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1830{
4703359e 1831 assert(mr->alias);
4703359e 1832
59023ef4 1833 if (offset == mr->alias_offset) {
4703359e
AK
1834 return;
1835 }
1836
59023ef4
JK
1837 memory_region_transaction_begin();
1838 mr->alias_offset = offset;
22bde714 1839 memory_region_update_pending |= mr->enabled;
59023ef4 1840 memory_region_transaction_commit();
4703359e
AK
1841}
1842
e34911c4
AK
1843ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1844{
e34911c4
AK
1845 return mr->ram_addr;
1846}
1847
a2b257d6
IM
1848uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1849{
1850 return mr->align;
1851}
1852
e2177955
AK
1853static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1854{
1855 const AddrRange *addr = addr_;
1856 const FlatRange *fr = fr_;
1857
1858 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1859 return -1;
1860 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1861 return 1;
1862 }
1863 return 0;
1864}
1865
99e86347 1866static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1867{
99e86347 1868 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1869 sizeof(FlatRange), cmp_flatrange_addr);
1870}
1871
feca4ac1 1872bool memory_region_present(MemoryRegion *container, hwaddr addr)
3ce10901 1873{
feca4ac1
PB
1874 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1875 if (!mr || (mr == container)) {
3ce10901
PB
1876 return false;
1877 }
dfde4e6e 1878 memory_region_unref(mr);
3ce10901
PB
1879 return true;
1880}
1881
eed2bacf
IM
1882bool memory_region_is_mapped(MemoryRegion *mr)
1883{
1884 return mr->container ? true : false;
1885}
1886
73034e9e 1887MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1888 hwaddr addr, uint64_t size)
e2177955 1889{
052e87b0 1890 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1891 MemoryRegion *root;
1892 AddressSpace *as;
1893 AddrRange range;
99e86347 1894 FlatView *view;
73034e9e
PB
1895 FlatRange *fr;
1896
1897 addr += mr->addr;
feca4ac1
PB
1898 for (root = mr; root->container; ) {
1899 root = root->container;
73034e9e
PB
1900 addr += root->addr;
1901 }
e2177955 1902
73034e9e 1903 as = memory_region_to_address_space(root);
eed2bacf
IM
1904 if (!as) {
1905 return ret;
1906 }
73034e9e 1907 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1908
2b647668
PB
1909 rcu_read_lock();
1910 view = atomic_rcu_read(&as->current_map);
99e86347 1911 fr = flatview_lookup(view, range);
e2177955 1912 if (!fr) {
2b647668 1913 goto out;
e2177955
AK
1914 }
1915
99e86347 1916 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1917 --fr;
1918 }
1919
1920 ret.mr = fr->mr;
73034e9e 1921 ret.address_space = as;
e2177955
AK
1922 range = addrrange_intersection(range, fr->addr);
1923 ret.offset_within_region = fr->offset_in_region;
1924 ret.offset_within_region += int128_get64(int128_sub(range.start,
1925 fr->addr.start));
052e87b0 1926 ret.size = range.size;
e2177955 1927 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1928 ret.readonly = fr->readonly;
dfde4e6e 1929 memory_region_ref(ret.mr);
2b647668
PB
1930out:
1931 rcu_read_unlock();
e2177955
AK
1932 return ret;
1933}
1934
1d671369 1935void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1936{
99e86347 1937 FlatView *view;
7664e80c
AK
1938 FlatRange *fr;
1939
856d7245 1940 view = address_space_get_flatview(as);
99e86347 1941 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1942 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1943 }
856d7245 1944 flatview_unref(view);
7664e80c
AK
1945}
1946
1947void memory_global_dirty_log_start(void)
1948{
7664e80c 1949 global_dirty_log = true;
7376e582 1950 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1951}
1952
1953void memory_global_dirty_log_stop(void)
1954{
7664e80c 1955 global_dirty_log = false;
7376e582 1956 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1957}
1958
1959static void listener_add_address_space(MemoryListener *listener,
1960 AddressSpace *as)
1961{
99e86347 1962 FlatView *view;
7664e80c
AK
1963 FlatRange *fr;
1964
221b3a3f 1965 if (listener->address_space_filter
f6790af6 1966 && listener->address_space_filter != as) {
221b3a3f
JG
1967 return;
1968 }
1969
7664e80c 1970 if (global_dirty_log) {
975aefe0
AK
1971 if (listener->log_global_start) {
1972 listener->log_global_start(listener);
1973 }
7664e80c 1974 }
975aefe0 1975
856d7245 1976 view = address_space_get_flatview(as);
99e86347 1977 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1978 MemoryRegionSection section = {
1979 .mr = fr->mr,
f6790af6 1980 .address_space = as,
7664e80c 1981 .offset_within_region = fr->offset_in_region,
052e87b0 1982 .size = fr->addr.size,
7664e80c 1983 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1984 .readonly = fr->readonly,
7664e80c 1985 };
975aefe0
AK
1986 if (listener->region_add) {
1987 listener->region_add(listener, &section);
1988 }
7664e80c 1989 }
856d7245 1990 flatview_unref(view);
7664e80c
AK
1991}
1992
f6790af6 1993void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1994{
72e22d2f 1995 MemoryListener *other = NULL;
0d673e36 1996 AddressSpace *as;
72e22d2f 1997
7376e582 1998 listener->address_space_filter = filter;
72e22d2f
AK
1999 if (QTAILQ_EMPTY(&memory_listeners)
2000 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2001 memory_listeners)->priority) {
2002 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2003 } else {
2004 QTAILQ_FOREACH(other, &memory_listeners, link) {
2005 if (listener->priority < other->priority) {
2006 break;
2007 }
2008 }
2009 QTAILQ_INSERT_BEFORE(other, listener, link);
2010 }
0d673e36
AK
2011
2012 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2013 listener_add_address_space(listener, as);
2014 }
7664e80c
AK
2015}
2016
2017void memory_listener_unregister(MemoryListener *listener)
2018{
72e22d2f 2019 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 2020}
e2177955 2021
7dca8043 2022void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2023{
ac95190e 2024 memory_region_ref(root);
59023ef4 2025 memory_region_transaction_begin();
8786db7c
AK
2026 as->root = root;
2027 as->current_map = g_new(FlatView, 1);
2028 flatview_init(as->current_map);
4c19eb72
AK
2029 as->ioeventfd_nb = 0;
2030 as->ioeventfds = NULL;
0d673e36 2031 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2032 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2033 address_space_init_dispatch(as);
f43793c7
PB
2034 memory_region_update_pending |= root->enabled;
2035 memory_region_transaction_commit();
1c0ffa58 2036}
658b2224 2037
374f2981 2038static void do_address_space_destroy(AddressSpace *as)
83f3c251 2039{
078c44f4
DG
2040 MemoryListener *listener;
2041
83f3c251 2042 address_space_destroy_dispatch(as);
078c44f4
DG
2043
2044 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2045 assert(listener->address_space_filter != as);
2046 }
2047
856d7245 2048 flatview_unref(as->current_map);
7dca8043 2049 g_free(as->name);
4c19eb72 2050 g_free(as->ioeventfds);
ac95190e 2051 memory_region_unref(as->root);
83f3c251
AK
2052}
2053
374f2981
PB
2054void address_space_destroy(AddressSpace *as)
2055{
ac95190e
PB
2056 MemoryRegion *root = as->root;
2057
374f2981
PB
2058 /* Flush out anything from MemoryListeners listening in on this */
2059 memory_region_transaction_begin();
2060 as->root = NULL;
2061 memory_region_transaction_commit();
2062 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2063 address_space_unregister(as);
374f2981
PB
2064
2065 /* At this point, as->dispatch and as->current_map are dummy
2066 * entries that the guest should never use. Wait for the old
2067 * values to expire before freeing the data.
2068 */
ac95190e 2069 as->root = root;
374f2981
PB
2070 call_rcu(as, do_address_space_destroy, rcu);
2071}
2072
314e2987
BS
2073typedef struct MemoryRegionList MemoryRegionList;
2074
2075struct MemoryRegionList {
2076 const MemoryRegion *mr;
314e2987
BS
2077 QTAILQ_ENTRY(MemoryRegionList) queue;
2078};
2079
2080typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2081
2082static void mtree_print_mr(fprintf_function mon_printf, void *f,
2083 const MemoryRegion *mr, unsigned int level,
a8170e5e 2084 hwaddr base,
9479c57a 2085 MemoryRegionListHead *alias_print_queue)
314e2987 2086{
9479c57a
JK
2087 MemoryRegionList *new_ml, *ml, *next_ml;
2088 MemoryRegionListHead submr_print_queue;
314e2987
BS
2089 const MemoryRegion *submr;
2090 unsigned int i;
2091
f8a9f720 2092 if (!mr) {
314e2987
BS
2093 return;
2094 }
2095
2096 for (i = 0; i < level; i++) {
2097 mon_printf(f, " ");
2098 }
2099
2100 if (mr->alias) {
2101 MemoryRegionList *ml;
2102 bool found = false;
2103
2104 /* check if the alias is already in the queue */
9479c57a 2105 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2106 if (ml->mr == mr->alias) {
314e2987
BS
2107 found = true;
2108 }
2109 }
2110
2111 if (!found) {
2112 ml = g_new(MemoryRegionList, 1);
2113 ml->mr = mr->alias;
9479c57a 2114 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2115 }
4896d74b
JK
2116 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2117 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
f8a9f720 2118 "-" TARGET_FMT_plx "%s\n",
314e2987 2119 base + mr->addr,
08dafab4 2120 base + mr->addr
fd1d9926
AW
2121 + (int128_nz(mr->size) ?
2122 (hwaddr)int128_get64(int128_sub(mr->size,
2123 int128_one())) : 0),
4b474ba7 2124 mr->priority,
5f9a5ea1
JK
2125 mr->romd_mode ? 'R' : '-',
2126 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2127 : '-',
3fb18b4d
PC
2128 memory_region_name(mr),
2129 memory_region_name(mr->alias),
314e2987 2130 mr->alias_offset,
08dafab4 2131 mr->alias_offset
a66670c7
AK
2132 + (int128_nz(mr->size) ?
2133 (hwaddr)int128_get64(int128_sub(mr->size,
f8a9f720
GH
2134 int128_one())) : 0),
2135 mr->enabled ? "" : " [disabled]");
314e2987 2136 } else {
4896d74b 2137 mon_printf(f,
f8a9f720 2138 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
314e2987 2139 base + mr->addr,
08dafab4 2140 base + mr->addr
fd1d9926
AW
2141 + (int128_nz(mr->size) ?
2142 (hwaddr)int128_get64(int128_sub(mr->size,
2143 int128_one())) : 0),
4b474ba7 2144 mr->priority,
5f9a5ea1
JK
2145 mr->romd_mode ? 'R' : '-',
2146 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2147 : '-',
f8a9f720
GH
2148 memory_region_name(mr),
2149 mr->enabled ? "" : " [disabled]");
314e2987 2150 }
9479c57a
JK
2151
2152 QTAILQ_INIT(&submr_print_queue);
2153
314e2987 2154 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2155 new_ml = g_new(MemoryRegionList, 1);
2156 new_ml->mr = submr;
2157 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2158 if (new_ml->mr->addr < ml->mr->addr ||
2159 (new_ml->mr->addr == ml->mr->addr &&
2160 new_ml->mr->priority > ml->mr->priority)) {
2161 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2162 new_ml = NULL;
2163 break;
2164 }
2165 }
2166 if (new_ml) {
2167 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2168 }
2169 }
2170
2171 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2172 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2173 alias_print_queue);
2174 }
2175
88365e47 2176 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2177 g_free(ml);
314e2987
BS
2178 }
2179}
2180
2181void mtree_info(fprintf_function mon_printf, void *f)
2182{
2183 MemoryRegionListHead ml_head;
2184 MemoryRegionList *ml, *ml2;
0d673e36 2185 AddressSpace *as;
314e2987
BS
2186
2187 QTAILQ_INIT(&ml_head);
2188
0d673e36 2189 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH
2190 mon_printf(f, "address-space: %s\n", as->name);
2191 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2192 mon_printf(f, "\n");
b9f9be88
BS
2193 }
2194
314e2987
BS
2195 /* print aliased regions */
2196 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH
2197 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2198 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2199 mon_printf(f, "\n");
314e2987
BS
2200 }
2201
2202 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2203 g_free(ml);
314e2987 2204 }
314e2987 2205}
b4fefef9
PC
2206
2207static const TypeInfo memory_region_info = {
2208 .parent = TYPE_OBJECT,
2209 .name = TYPE_MEMORY_REGION,
2210 .instance_size = sizeof(MemoryRegion),
2211 .instance_init = memory_region_initfn,
2212 .instance_finalize = memory_region_finalize,
2213};
2214
2215static void memory_register_types(void)
2216{
2217 type_register_static(&memory_region_info);
2218}
2219
2220type_init(memory_register_types)