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introduce mmio_interface
[mirror_qemu.git] / memory.c
CommitLineData
093bc2cd
AK		 1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB		 12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
093bc2cd
AK		 14 */
15
d38ea87a 16#include "qemu/osdep.h"
da34e65c 17#include "qapi/error.h"
33c11879
PB		 18#include "qemu-common.h"
19#include "cpu.h"
022c62cb
PB		 20#include "exec/memory.h"
21#include "exec/address-spaces.h"
22#include "exec/ioport.h"
409ddd01 23#include "qapi/visitor.h"
1de7afc9 24#include "qemu/bitops.h"
8c56c1a5 25#include "qemu/error-report.h"
2c9b15ca 26#include "qom/object.h"
0ab8ed18 27#include "trace-root.h"
093bc2cd 28
022c62cb 29#include "exec/memory-internal.h"
220c3ebd 30#include "exec/ram_addr.h"
8c56c1a5 31#include "sysemu/kvm.h"
e1c57ab8 32#include "sysemu/sysemu.h"
67d95c15 33
d197063f
PB		 34//#define DEBUG_UNASSIGNED
35
22bde714
JK		 36static unsigned memory_region_transaction_depth;
37static bool memory_region_update_pending;
4dc56152 38static bool ioeventfd_update_pending;
7664e80c
AK		 39static bool global_dirty_log = false;
40
72e22d2f
AK		 41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
0d673e36
AK		 44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
093bc2cd
AK		 47typedef struct AddrRange AddrRange;
48
8417cebf 49/*
c9cdaa3a 50 * Note that signed integers are needed for negative offsetting in aliases
8417cebf
AK		 51 * (large MemoryRegion::alias_offset).
52 */
093bc2cd 53struct AddrRange {
08dafab4
AK		 54 Int128 start;
55 Int128 size;
093bc2cd
AK		 56};
57
08dafab4 58static AddrRange addrrange_make(Int128 start, Int128 size)
093bc2cd
AK		 59{
60 return (AddrRange) { start, size };
61}
62
63static bool addrrange_equal(AddrRange r1, AddrRange r2)
64{
08dafab4 65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
093bc2cd
AK		 66}
67
08dafab4 68static Int128 addrrange_end(AddrRange r)
093bc2cd 69{
08dafab4 70 return int128_add(r.start, r.size);
093bc2cd
AK		 71}
72
08dafab4 73static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 74{
08dafab4 75 int128_addto(&range.start, delta);
093bc2cd
AK		 76 return range;
77}
78
08dafab4
AK		 79static bool addrrange_contains(AddrRange range, Int128 addr)
80{
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83}
84
093bc2cd
AK		 85static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86{
08dafab4
AK		 87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
093bc2cd
AK		 89}
90
91static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92{
08dafab4
AK		 93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
093bc2cd
AK		 96}
97
0e0d36b4
AK		 98enum ListenerDirection { Forward, Reverse };
99
7376e582 100#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
AK		 101 do { \
102 MemoryListener *_listener; \
103 \
104 switch (_direction) { \
105 case Forward: \
106 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
975aefe0
AK		 107 if (_listener->_callback) { \
108 _listener->_callback(_listener, ##_args); \
109 } \
0e0d36b4
AK		 110 } \
111 break; \
112 case Reverse: \
113 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
114 memory_listeners, link) { \
975aefe0
AK		 115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
0e0d36b4
AK		 118 } \
119 break; \
120 default: \
121 abort(); \
122 } \
123 } while (0)
124
9a54635d 125#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
7376e582
AK		 126 do { \
127 MemoryListener *_listener; \
9a54635d 128 struct memory_listeners_as *list = &(_as)->listeners; \
7376e582
AK		 129 \
130 switch (_direction) { \
131 case Forward: \
9a54635d
PB		 132 QTAILQ_FOREACH(_listener, list, link_as) { \
133 if (_listener->_callback) { \
7376e582
AK		 134 _listener->_callback(_listener, _section, ##_args); \
135 } \
136 } \
137 break; \
138 case Reverse: \
9a54635d
PB		 139 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
140 link_as) { \
141 if (_listener->_callback) { \
7376e582
AK		 142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
dfde4e6e 151/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 152#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
9c1f8f44
PB		 153 do { \
154 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
9a54635d 155 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
9c1f8f44 156 } while(0)
0e0d36b4 157
093bc2cd
AK		 158struct CoalescedMemoryRange {
159 AddrRange addr;
160 QTAILQ_ENTRY(CoalescedMemoryRange) link;
161};
162
3e9d69e7
AK		 163struct MemoryRegionIoeventfd {
164 AddrRange addr;
165 bool match_data;
166 uint64_t data;
753d5e14 167 EventNotifier *e;
3e9d69e7
AK		 168};
169
170static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
171 MemoryRegionIoeventfd b)
172{
08dafab4 173 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 174 return true;
08dafab4 175 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 176 return false;
08dafab4 177 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 178 return true;
08dafab4 179 } else if (int128_gt(a.addr.size, b.addr.size)) {
3e9d69e7
AK		 180 return false;
181 } else if (a.match_data < b.match_data) {
182 return true;
183 } else if (a.match_data > b.match_data) {
184 return false;
185 } else if (a.match_data) {
186 if (a.data < b.data) {
187 return true;
188 } else if (a.data > b.data) {
189 return false;
190 }
191 }
753d5e14 192 if (a.e < b.e) {
3e9d69e7 193 return true;
753d5e14 194 } else if (a.e > b.e) {
3e9d69e7
AK		 195 return false;
196 }
197 return false;
198}
199
200static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
201 MemoryRegionIoeventfd b)
202{
203 return !memory_region_ioeventfd_before(a, b)
204 && !memory_region_ioeventfd_before(b, a);
205}
206
093bc2cd
AK		 207typedef struct FlatRange FlatRange;
208typedef struct FlatView FlatView;
209
210/* Range of memory in the global map. Addresses are absolute. */
211struct FlatRange {
212 MemoryRegion *mr;
a8170e5e 213 hwaddr offset_in_region;
093bc2cd 214 AddrRange addr;
5a583347 215 uint8_t dirty_log_mask;
b138e654 216 bool romd_mode;
fb1cd6f9 217 bool readonly;
093bc2cd
AK		 218};
219
220/* Flattened global view of current active memory hierarchy. Kept in sorted
221 * order.
222 */
223struct FlatView {
374f2981 224 struct rcu_head rcu;
856d7245 225 unsigned ref;
093bc2cd
AK		 226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229};
230
cc31e6e7
AK		 231typedef struct AddressSpaceOps AddressSpaceOps;
232
093bc2cd
AK		 233#define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
9c1f8f44
PB		 236static inline MemoryRegionSection
237section_from_flat_range(FlatRange *fr, AddressSpace *as)
238{
239 return (MemoryRegionSection) {
240 .mr = fr->mr,
241 .address_space = as,
242 .offset_within_region = fr->offset_in_region,
243 .size = fr->addr.size,
244 .offset_within_address_space = int128_get64(fr->addr.start),
245 .readonly = fr->readonly,
246 };
247}
248
093bc2cd
AK		 249static bool flatrange_equal(FlatRange *a, FlatRange *b)
250{
251 return a->mr == b->mr
252 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 253 && a->offset_in_region == b->offset_in_region
b138e654 254 && a->romd_mode == b->romd_mode
fb1cd6f9 255 && a->readonly == b->readonly;
093bc2cd
AK		 256}
257
258static void flatview_init(FlatView *view)
259{
856d7245 260 view->ref = 1;
093bc2cd
AK		 261 view->ranges = NULL;
262 view->nr = 0;
263 view->nr_allocated = 0;
264}
265
266/* Insert a range into a given position. Caller is responsible for maintaining
267 * sorting order.
268 */
269static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
270{
271 if (view->nr == view->nr_allocated) {
272 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 273 view->ranges = g_realloc(view->ranges,
093bc2cd
AK		 274 view->nr_allocated * sizeof(*view->ranges));
275 }
276 memmove(view->ranges + pos + 1, view->ranges + pos,
277 (view->nr - pos) * sizeof(FlatRange));
278 view->ranges[pos] = *range;
dfde4e6e 279 memory_region_ref(range->mr);
093bc2cd
AK		 280 ++view->nr;
281}
282
283static void flatview_destroy(FlatView *view)
284{
dfde4e6e
PB		 285 int i;
286
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
7267c094 290 g_free(view->ranges);
a9a0c06d 291 g_free(view);
093bc2cd
AK		 292}
293
856d7245
PB		 294static void flatview_ref(FlatView *view)
295{
296 atomic_inc(&view->ref);
297}
298
299static void flatview_unref(FlatView *view)
300{
301 if (atomic_fetch_dec(&view->ref) == 1) {
302 flatview_destroy(view);
303 }
304}
305
3d8e6bf9
AK		 306static bool can_merge(FlatRange *r1, FlatRange *r2)
307{
08dafab4 308 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 309 && r1->mr == r2->mr
08dafab4
AK		 310 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
311 r1->addr.size),
312 int128_make64(r2->offset_in_region))
d0a9b5bc 313 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 314 && r1->romd_mode == r2->romd_mode
fb1cd6f9 315 && r1->readonly == r2->readonly;
3d8e6bf9
AK		 316}
317
8508e024 318/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK		 319static void flatview_simplify(FlatView *view)
320{
321 unsigned i, j;
322
323 i = 0;
324 while (i < view->nr) {
325 j = i + 1;
326 while (j < view->nr
327 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 328 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK		 329 ++j;
330 }
331 ++i;
332 memmove(&view->ranges[i], &view->ranges[j],
333 (view->nr - j) * sizeof(view->ranges[j]));
334 view->nr -= j - i;
335 }
336}
337
e7342aa3
PB		 338static bool memory_region_big_endian(MemoryRegion *mr)
339{
340#ifdef TARGET_WORDS_BIGENDIAN
341 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
342#else
343 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
344#endif
345}
346
e11ef3d1
PB		 347static bool memory_region_wrong_endianness(MemoryRegion *mr)
348{
349#ifdef TARGET_WORDS_BIGENDIAN
350 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
351#else
352 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
353#endif
354}
355
356static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
357{
358 if (memory_region_wrong_endianness(mr)) {
359 switch (size) {
360 case 1:
361 break;
362 case 2:
363 *data = bswap16(*data);
364 break;
365 case 4:
366 *data = bswap32(*data);
367 break;
368 case 8:
369 *data = bswap64(*data);
370 break;
371 default:
372 abort();
373 }
374 }
375}
376
4779dc1d
HB		 377static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
378{
379 MemoryRegion *root;
380 hwaddr abs_addr = offset;
381
382 abs_addr += mr->addr;
383 for (root = mr; root->container; ) {
384 root = root->container;
385 abs_addr += root->addr;
386 }
387
388 return abs_addr;
389}
390
5a68be94
HB		 391static int get_cpu_index(void)
392{
393 if (current_cpu) {
394 return current_cpu->cpu_index;
395 }
396 return -1;
397}
398
cc05c43a
PM		 399static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
400 hwaddr addr,
401 uint64_t *value,
402 unsigned size,
403 unsigned shift,
404 uint64_t mask,
405 MemTxAttrs attrs)
406{
407 uint64_t tmp;
408
409 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68 410 if (mr->subpage) {
5a68be94 411 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 412 } else if (mr == &io_mem_notdirty) {
413 /* Accesses to code which has previously been translated into a TB show
414 * up in the MMIO path, as accesses to the io_mem_notdirty
415 * MemoryRegion. */
416 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 417 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
418 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 419 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 420 }
cc05c43a
PM		 421 *value |= (tmp & mask) << shift;
422 return MEMTX_OK;
423}
424
425static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB		 426 hwaddr addr,
427 uint64_t *value,
428 unsigned size,
429 unsigned shift,
cc05c43a
PM		 430 uint64_t mask,
431 MemTxAttrs attrs)
ce5d2f33 432{
ce5d2f33
PB		 433 uint64_t tmp;
434
cc05c43a 435 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 436 if (mr->subpage) {
5a68be94 437 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 438 } else if (mr == &io_mem_notdirty) {
439 /* Accesses to code which has previously been translated into a TB show
440 * up in the MMIO path, as accesses to the io_mem_notdirty
441 * MemoryRegion. */
442 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 443 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 446 }
ce5d2f33 447 *value |= (tmp & mask) << shift;
cc05c43a 448 return MEMTX_OK;
ce5d2f33
PB		 449}
450
cc05c43a
PM		 451static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask,
457 MemTxAttrs attrs)
164a4dcd 458{
cc05c43a
PM		 459 uint64_t tmp = 0;
460 MemTxResult r;
164a4dcd 461
cc05c43a 462 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 463 if (mr->subpage) {
5a68be94 464 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 465 } else if (mr == &io_mem_notdirty) {
466 /* Accesses to code which has previously been translated into a TB show
467 * up in the MMIO path, as accesses to the io_mem_notdirty
468 * MemoryRegion. */
469 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 470 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
471 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 472 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 473 }
164a4dcd 474 *value |= (tmp & mask) << shift;
cc05c43a 475 return r;
164a4dcd
AK		 476}
477
cc05c43a
PM		 478static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
479 hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 unsigned shift,
483 uint64_t mask,
484 MemTxAttrs attrs)
ce5d2f33 485{
ce5d2f33
PB		 486 uint64_t tmp;
487
488 tmp = (*value >> shift) & mask;
23d92d68 489 if (mr->subpage) {
5a68be94 490 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 491 } else if (mr == &io_mem_notdirty) {
492 /* Accesses to code which has previously been translated into a TB show
493 * up in the MMIO path, as accesses to the io_mem_notdirty
494 * MemoryRegion. */
495 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 496 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
497 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 498 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 499 }
ce5d2f33 500 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 501 return MEMTX_OK;
ce5d2f33
PB		 502}
503
cc05c43a
PM		 504static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
505 hwaddr addr,
506 uint64_t *value,
507 unsigned size,
508 unsigned shift,
509 uint64_t mask,
510 MemTxAttrs attrs)
164a4dcd 511{
164a4dcd
AK		 512 uint64_t tmp;
513
514 tmp = (*value >> shift) & mask;
23d92d68 515 if (mr->subpage) {
5a68be94 516 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 517 } else if (mr == &io_mem_notdirty) {
518 /* Accesses to code which has previously been translated into a TB show
519 * up in the MMIO path, as accesses to the io_mem_notdirty
520 * MemoryRegion. */
521 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 522 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
523 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 524 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 525 }
164a4dcd 526 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 527 return MEMTX_OK;
164a4dcd
AK		 528}
529
cc05c43a
PM		 530static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
531 hwaddr addr,
532 uint64_t *value,
533 unsigned size,
534 unsigned shift,
535 uint64_t mask,
536 MemTxAttrs attrs)
537{
538 uint64_t tmp;
539
cc05c43a 540 tmp = (*value >> shift) & mask;
23d92d68 541 if (mr->subpage) {
5a68be94 542 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 543 } else if (mr == &io_mem_notdirty) {
544 /* Accesses to code which has previously been translated into a TB show
545 * up in the MMIO path, as accesses to the io_mem_notdirty
546 * MemoryRegion. */
547 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 548 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
549 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 550 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 551 }
cc05c43a
PM		 552 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
553}
554
555static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK		 556 uint64_t *value,
557 unsigned size,
558 unsigned access_size_min,
559 unsigned access_size_max,
cc05c43a
PM		 560 MemTxResult (*access)(MemoryRegion *mr,
561 hwaddr addr,
562 uint64_t *value,
563 unsigned size,
564 unsigned shift,
565 uint64_t mask,
566 MemTxAttrs attrs),
567 MemoryRegion *mr,
568 MemTxAttrs attrs)
164a4dcd
AK		 569{
570 uint64_t access_mask;
571 unsigned access_size;
572 unsigned i;
cc05c43a 573 MemTxResult r = MEMTX_OK;
164a4dcd
AK		 574
575 if (!access_size_min) {
576 access_size_min = 1;
577 }
578 if (!access_size_max) {
579 access_size_max = 4;
580 }
ce5d2f33
PB		 581
582 /* FIXME: support unaligned access? */
164a4dcd
AK		 583 access_size = MAX(MIN(size, access_size_max), access_size_min);
584 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB		 585 if (memory_region_big_endian(mr)) {
586 for (i = 0; i < size; i += access_size) {
cc05c43a
PM		 587 r |= access(mr, addr + i, value, access_size,
588 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB		 589 }
590 } else {
591 for (i = 0; i < size; i += access_size) {
cc05c43a
PM		 592 r |= access(mr, addr + i, value, access_size, i * 8,
593 access_mask, attrs);
e7342aa3 594 }
164a4dcd 595 }
cc05c43a 596 return r;
164a4dcd
AK		 597}
598
e2177955
AK		 599static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
600{
0d673e36
AK		 601 AddressSpace *as;
602
feca4ac1
PB		 603 while (mr->container) {
604 mr = mr->container;
e2177955 605 }
0d673e36
AK		 606 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
607 if (mr == as->root) {
608 return as;
609 }
e2177955 610 }
eed2bacf 611 return NULL;
e2177955
AK		 612}
613
093bc2cd
AK		 614/* Render a memory region into the global view. Ranges in @view obscure
615 * ranges in @mr.
616 */
617static void render_memory_region(FlatView *view,
618 MemoryRegion *mr,
08dafab4 619 Int128 base,
fb1cd6f9
AK		 620 AddrRange clip,
621 bool readonly)
093bc2cd
AK		 622{
623 MemoryRegion *subregion;
624 unsigned i;
a8170e5e 625 hwaddr offset_in_region;
08dafab4
AK		 626 Int128 remain;
627 Int128 now;
093bc2cd
AK		 628 FlatRange fr;
629 AddrRange tmp;
630
6bba19ba
AK		 631 if (!mr->enabled) {
632 return;
633 }
634
08dafab4 635 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 636 readonly |= mr->readonly;
093bc2cd
AK		 637
638 tmp = addrrange_make(base, mr->size);
639
640 if (!addrrange_intersects(tmp, clip)) {
641 return;
642 }
643
644 clip = addrrange_intersection(tmp, clip);
645
646 if (mr->alias) {
08dafab4
AK		 647 int128_subfrom(&base, int128_make64(mr->alias->addr));
648 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 649 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK		 650 return;
651 }
652
653 /* Render subregions in priority order. */
654 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 655 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK		 656 }
657
14a3c10a 658 if (!mr->terminates) {
093bc2cd
AK		 659 return;
660 }
661
08dafab4 662 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK		 663 base = clip.start;
664 remain = clip.size;
665
2eb74e1a 666 fr.mr = mr;
6f6a5ef3 667 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 668 fr.romd_mode = mr->romd_mode;
2eb74e1a
PC		 669 fr.readonly = readonly;
670
093bc2cd 671 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK		 672 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
673 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK		 674 continue;
675 }
08dafab4
AK		 676 if (int128_lt(base, view->ranges[i].addr.start)) {
677 now = int128_min(remain,
678 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK		 679 fr.offset_in_region = offset_in_region;
680 fr.addr = addrrange_make(base, now);
681 flatview_insert(view, i, &fr);
682 ++i;
08dafab4
AK		 683 int128_addto(&base, now);
684 offset_in_region += int128_get64(now);
685 int128_subfrom(&remain, now);
093bc2cd 686 }
d26a8cae
AK		 687 now = int128_sub(int128_min(int128_add(base, remain),
688 addrrange_end(view->ranges[i].addr)),
689 base);
690 int128_addto(&base, now);
691 offset_in_region += int128_get64(now);
692 int128_subfrom(&remain, now);
093bc2cd 693 }
08dafab4 694 if (int128_nz(remain)) {
093bc2cd
AK		 695 fr.offset_in_region = offset_in_region;
696 fr.addr = addrrange_make(base, remain);
697 flatview_insert(view, i, &fr);
698 }
699}
700
701/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 702static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 703{
a9a0c06d 704 FlatView *view;
093bc2cd 705
a9a0c06d
PB		 706 view = g_new(FlatView, 1);
707 flatview_init(view);
093bc2cd 708
83f3c251 709 if (mr) {
a9a0c06d 710 render_memory_region(view, mr, int128_zero(),
83f3c251
AK		 711 addrrange_make(int128_zero(), int128_2_64()), false);
712 }
a9a0c06d 713 flatview_simplify(view);
093bc2cd
AK		 714
715 return view;
716}
717
3e9d69e7
AK		 718static void address_space_add_del_ioeventfds(AddressSpace *as,
719 MemoryRegionIoeventfd *fds_new,
720 unsigned fds_new_nb,
721 MemoryRegionIoeventfd *fds_old,
722 unsigned fds_old_nb)
723{
724 unsigned iold, inew;
80a1ea37
AK		 725 MemoryRegionIoeventfd *fd;
726 MemoryRegionSection section;
3e9d69e7
AK		 727
728 /* Generate a symmetric difference of the old and new fd sets, adding
729 * and deleting as necessary.
730 */
731
732 iold = inew = 0;
733 while (iold < fds_old_nb || inew < fds_new_nb) {
734 if (iold < fds_old_nb
735 && (inew == fds_new_nb
736 || memory_region_ioeventfd_before(fds_old[iold],
737 fds_new[inew]))) {
80a1ea37
AK		 738 fd = &fds_old[iold];
739 section = (MemoryRegionSection) {
f6790af6 740 .address_space = as,
80a1ea37 741 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 742 .size = fd->addr.size,
80a1ea37 743 };
9a54635d 744 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
753d5e14 745 fd->match_data, fd->data, fd->e);
3e9d69e7
AK		 746 ++iold;
747 } else if (inew < fds_new_nb
748 && (iold == fds_old_nb
749 || memory_region_ioeventfd_before(fds_new[inew],
750 fds_old[iold]))) {
80a1ea37
AK		 751 fd = &fds_new[inew];
752 section = (MemoryRegionSection) {
f6790af6 753 .address_space = as,
80a1ea37 754 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 755 .size = fd->addr.size,
80a1ea37 756 };
9a54635d 757 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
753d5e14 758 fd->match_data, fd->data, fd->e);
3e9d69e7
AK		 759 ++inew;
760 } else {
761 ++iold;
762 ++inew;
763 }
764 }
765}
766
856d7245
PB		 767static FlatView *address_space_get_flatview(AddressSpace *as)
768{
769 FlatView *view;
770
374f2981
PB		 771 rcu_read_lock();
772 view = atomic_rcu_read(&as->current_map);
856d7245 773 flatview_ref(view);
374f2981 774 rcu_read_unlock();
856d7245
PB		 775 return view;
776}
777
3e9d69e7
AK		 778static void address_space_update_ioeventfds(AddressSpace *as)
779{
99e86347 780 FlatView *view;
3e9d69e7
AK		 781 FlatRange *fr;
782 unsigned ioeventfd_nb = 0;
783 MemoryRegionIoeventfd *ioeventfds = NULL;
784 AddrRange tmp;
785 unsigned i;
786
856d7245 787 view = address_space_get_flatview(as);
99e86347 788 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK		 789 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
790 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK		 791 int128_sub(fr->addr.start,
792 int128_make64(fr->offset_in_region)));
3e9d69e7
AK		 793 if (addrrange_intersects(fr->addr, tmp)) {
794 ++ioeventfd_nb;
7267c094 795 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK		 796 ioeventfd_nb * sizeof(*ioeventfds));
797 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
798 ioeventfds[ioeventfd_nb-1].addr = tmp;
799 }
800 }
801 }
802
803 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
804 as->ioeventfds, as->ioeventfd_nb);
805
7267c094 806 g_free(as->ioeventfds);
3e9d69e7
AK		 807 as->ioeventfds = ioeventfds;
808 as->ioeventfd_nb = ioeventfd_nb;
856d7245 809 flatview_unref(view);
3e9d69e7
AK		 810}
811
b8af1afb 812static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB		 813 const FlatView *old_view,
814 const FlatView *new_view,
b8af1afb 815 bool adding)
093bc2cd 816{
093bc2cd
AK		 817 unsigned iold, inew;
818 FlatRange *frold, *frnew;
093bc2cd
AK		 819
820 /* Generate a symmetric difference of the old and new memory maps.
821 * Kill ranges in the old map, and instantiate ranges in the new map.
822 */
823 iold = inew = 0;
a9a0c06d
PB		 824 while (iold < old_view->nr || inew < new_view->nr) {
825 if (iold < old_view->nr) {
826 frold = &old_view->ranges[iold];
093bc2cd
AK		 827 } else {
828 frold = NULL;
829 }
a9a0c06d
PB		 830 if (inew < new_view->nr) {
831 frnew = &new_view->ranges[inew];
093bc2cd
AK		 832 } else {
833 frnew = NULL;
834 }
835
836 if (frold
837 && (!frnew
08dafab4
AK		 838 || int128_lt(frold->addr.start, frnew->addr.start)
839 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 840 && !flatrange_equal(frold, frnew)))) {
41a6e477 841 /* In old but not in new, or in both but attributes changed. */
093bc2cd 842
b8af1afb 843 if (!adding) {
72e22d2f 844 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK		 845 }
846
093bc2cd
AK		 847 ++iold;
848 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 849 /* In both and unchanged (except logging may have changed) */
093bc2cd 850
b8af1afb 851 if (adding) {
50c1e149 852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB		 853 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
854 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
855 frold->dirty_log_mask,
856 frnew->dirty_log_mask);
857 }
858 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
859 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
860 frold->dirty_log_mask,
861 frnew->dirty_log_mask);
b8af1afb 862 }
5a583347
AK		 863 }
864
093bc2cd
AK		 865 ++iold;
866 ++inew;
093bc2cd
AK		 867 } else {
868 /* In new */
869
b8af1afb 870 if (adding) {
72e22d2f 871 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK		 872 }
873
093bc2cd
AK		 874 ++inew;
875 }
876 }
b8af1afb
AK		 877}
878
879
880static void address_space_update_topology(AddressSpace *as)
881{
856d7245 882 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 883 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK		 884
885 address_space_update_topology_pass(as, old_view, new_view, false);
886 address_space_update_topology_pass(as, old_view, new_view, true);
887
374f2981
PB		 888 /* Writes are protected by the BQL. */
889 atomic_rcu_set(&as->current_map, new_view);
890 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB		 891
892 /* Note that all the old MemoryRegions are still alive up to this
893 * point. This relieves most MemoryListeners from the need to
894 * ref/unref the MemoryRegions they get---unless they use them
895 * outside the iothread mutex, in which case precise reference
896 * counting is necessary.
897 */
898 flatview_unref(old_view);
899
3e9d69e7 900 address_space_update_ioeventfds(as);
093bc2cd
AK		 901}
902
4ef4db86
AK		 903void memory_region_transaction_begin(void)
904{
bb880ded 905 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK		 906 ++memory_region_transaction_depth;
907}
908
909void memory_region_transaction_commit(void)
910{
0d673e36
AK		 911 AddressSpace *as;
912
4ef4db86 913 assert(memory_region_transaction_depth);
8d04fb55
JK		 914 assert(qemu_mutex_iothread_locked());
915
4ef4db86 916 --memory_region_transaction_depth;
4dc56152
GA		 917 if (!memory_region_transaction_depth) {
918 if (memory_region_update_pending) {
919 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 920
4dc56152
GA		 921 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
922 address_space_update_topology(as);
923 }
ade9c1aa 924 memory_region_update_pending = false;
4dc56152
GA		 925 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
926 } else if (ioeventfd_update_pending) {
927 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
928 address_space_update_ioeventfds(as);
929 }
ade9c1aa 930 ioeventfd_update_pending = false;
4dc56152 931 }
4dc56152 932 }
4ef4db86
AK		 933}
934
545e92e0
AK		 935static void memory_region_destructor_none(MemoryRegion *mr)
936{
937}
938
939static void memory_region_destructor_ram(MemoryRegion *mr)
940{
f1060c55 941 qemu_ram_free(mr->ram_block);
545e92e0
AK		 942}
943
b4fefef9
PC		 944static bool memory_region_need_escape(char c)
945{
946 return c == '/' || c == '[' || c == '\\' || c == ']';
947}
948
949static char *memory_region_escape_name(const char *name)
950{
951 const char *p;
952 char *escaped, *q;
953 uint8_t c;
954 size_t bytes = 0;
955
956 for (p = name; *p; p++) {
957 bytes += memory_region_need_escape(*p) ? 4 : 1;
958 }
959 if (bytes == p - name) {
960 return g_memdup(name, bytes + 1);
961 }
962
963 escaped = g_malloc(bytes + 1);
964 for (p = name, q = escaped; *p; p++) {
965 c = *p;
966 if (unlikely(memory_region_need_escape(c))) {
967 *q++ = '\\';
968 *q++ = 'x';
969 *q++ = "0123456789abcdef"[c >> 4];
970 c = "0123456789abcdef"[c & 15];
971 }
972 *q++ = c;
973 }
974 *q = 0;
975 return escaped;
976}
977
093bc2cd 978void memory_region_init(MemoryRegion *mr,
2c9b15ca 979 Object *owner,
093bc2cd
AK		 980 const char *name,
981 uint64_t size)
982{
22a893e4 983 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK		 984 mr->size = int128_make64(size);
985 if (size == UINT64_MAX) {
986 mr->size = int128_2_64();
987 }
302fa283 988 mr->name = g_strdup(name);
612263cf 989 mr->owner = owner;
58eaa217 990 mr->ram_block = NULL;
b4fefef9
PC		 991
992 if (name) {
843ef73a
PC		 993 char *escaped_name = memory_region_escape_name(name);
994 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB		 995
996 if (!owner) {
997 owner = container_get(qdev_get_machine(), "/unattached");
998 }
999
843ef73a 1000 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 1001 object_unref(OBJECT(mr));
843ef73a
PC		 1002 g_free(name_array);
1003 g_free(escaped_name);
b4fefef9
PC		 1004 }
1005}
1006
d7bce999
EB		 1007static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1008 void *opaque, Error **errp)
409ddd01
PC		 1009{
1010 MemoryRegion *mr = MEMORY_REGION(obj);
1011 uint64_t value = mr->addr;
1012
51e72bc1 1013 visit_type_uint64(v, name, &value, errp);
409ddd01
PC		 1014}
1015
d7bce999
EB		 1016static void memory_region_get_container(Object *obj, Visitor *v,
1017 const char *name, void *opaque,
1018 Error **errp)
409ddd01
PC		 1019{
1020 MemoryRegion *mr = MEMORY_REGION(obj);
1021 gchar *path = (gchar *)"";
1022
1023 if (mr->container) {
1024 path = object_get_canonical_path(OBJECT(mr->container));
1025 }
51e72bc1 1026 visit_type_str(v, name, &path, errp);
409ddd01
PC		 1027 if (mr->container) {
1028 g_free(path);
1029 }
1030}
1031
1032static Object *memory_region_resolve_container(Object *obj, void *opaque,
1033 const char *part)
1034{
1035 MemoryRegion *mr = MEMORY_REGION(obj);
1036
1037 return OBJECT(mr->container);
1038}
1039
d7bce999
EB		 1040static void memory_region_get_priority(Object *obj, Visitor *v,
1041 const char *name, void *opaque,
1042 Error **errp)
d33382da
PC		 1043{
1044 MemoryRegion *mr = MEMORY_REGION(obj);
1045 int32_t value = mr->priority;
1046
51e72bc1 1047 visit_type_int32(v, name, &value, errp);
d33382da
PC		 1048}
1049
d7bce999
EB		 1050static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1051 void *opaque, Error **errp)
52aef7bb
PC		 1052{
1053 MemoryRegion *mr = MEMORY_REGION(obj);
1054 uint64_t value = memory_region_size(mr);
1055
51e72bc1 1056 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC		 1057}
1058
b4fefef9
PC		 1059static void memory_region_initfn(Object *obj)
1060{
1061 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1062 ObjectProperty *op;
b4fefef9
PC		 1063
1064 mr->ops = &unassigned_mem_ops;
6bba19ba 1065 mr->enabled = true;
5f9a5ea1 1066 mr->romd_mode = true;
196ea131 1067 mr->global_locking = true;
545e92e0 1068 mr->destructor = memory_region_destructor_none;
093bc2cd 1069 QTAILQ_INIT(&mr->subregions);
093bc2cd 1070 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC		 1071
1072 op = object_property_add(OBJECT(mr), "container",
1073 "link<" TYPE_MEMORY_REGION ">",
1074 memory_region_get_container,
1075 NULL, /* memory_region_set_container */
1076 NULL, NULL, &error_abort);
1077 op->resolve = memory_region_resolve_container;
1078
1079 object_property_add(OBJECT(mr), "addr", "uint64",
1080 memory_region_get_addr,
1081 NULL, /* memory_region_set_addr */
1082 NULL, NULL, &error_abort);
d33382da
PC		 1083 object_property_add(OBJECT(mr), "priority", "uint32",
1084 memory_region_get_priority,
1085 NULL, /* memory_region_set_priority */
1086 NULL, NULL, &error_abort);
52aef7bb
PC		 1087 object_property_add(OBJECT(mr), "size", "uint64",
1088 memory_region_get_size,
1089 NULL, /* memory_region_set_size, */
1090 NULL, NULL, &error_abort);
093bc2cd
AK		 1091}
1092
b018ddf6
PB		 1093static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1094 unsigned size)
1095{
1096#ifdef DEBUG_UNASSIGNED
1097 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1098#endif
4917cf44
AF		 1099 if (current_cpu != NULL) {
1100 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1101 }
68a7439a 1102 return 0;
b018ddf6
PB		 1103}
1104
1105static void unassigned_mem_write(void *opaque, hwaddr addr,
1106 uint64_t val, unsigned size)
1107{
1108#ifdef DEBUG_UNASSIGNED
1109 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1110#endif
4917cf44
AF		 1111 if (current_cpu != NULL) {
1112 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1113 }
b018ddf6
PB		 1114}
1115
d197063f
PB		 1116static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1117 unsigned size, bool is_write)
1118{
1119 return false;
1120}
1121
1122const MemoryRegionOps unassigned_mem_ops = {
1123 .valid.accepts = unassigned_mem_accepts,
1124 .endianness = DEVICE_NATIVE_ENDIAN,
1125};
1126
4a2e242b
AW		 1127static uint64_t memory_region_ram_device_read(void *opaque,
1128 hwaddr addr, unsigned size)
1129{
1130 MemoryRegion *mr = opaque;
1131 uint64_t data = (uint64_t)~0;
1132
1133 switch (size) {
1134 case 1:
1135 data = *(uint8_t *)(mr->ram_block->host + addr);
1136 break;
1137 case 2:
1138 data = *(uint16_t *)(mr->ram_block->host + addr);
1139 break;
1140 case 4:
1141 data = *(uint32_t *)(mr->ram_block->host + addr);
1142 break;
1143 case 8:
1144 data = *(uint64_t *)(mr->ram_block->host + addr);
1145 break;
1146 }
1147
1148 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1149
1150 return data;
1151}
1152
1153static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1154 uint64_t data, unsigned size)
1155{
1156 MemoryRegion *mr = opaque;
1157
1158 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1159
1160 switch (size) {
1161 case 1:
1162 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1163 break;
1164 case 2:
1165 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1166 break;
1167 case 4:
1168 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1169 break;
1170 case 8:
1171 *(uint64_t *)(mr->ram_block->host + addr) = data;
1172 break;
1173 }
1174}
1175
1176static const MemoryRegionOps ram_device_mem_ops = {
1177 .read = memory_region_ram_device_read,
1178 .write = memory_region_ram_device_write,
c99a29e7 1179 .endianness = DEVICE_HOST_ENDIAN,
4a2e242b
AW		 1180 .valid = {
1181 .min_access_size = 1,
1182 .max_access_size = 8,
1183 .unaligned = true,
1184 },
1185 .impl = {
1186 .min_access_size = 1,
1187 .max_access_size = 8,
1188 .unaligned = true,
1189 },
1190};
1191
d2702032
PB		 1192bool memory_region_access_valid(MemoryRegion *mr,
1193 hwaddr addr,
1194 unsigned size,
1195 bool is_write)
093bc2cd 1196{
a014ed07
PB		 1197 int access_size_min, access_size_max;
1198 int access_size, i;
897fa7cf 1199
093bc2cd
AK		 1200 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1201 return false;
1202 }
1203
a014ed07 1204 if (!mr->ops->valid.accepts) {
093bc2cd
AK		 1205 return true;
1206 }
1207
a014ed07
PB		 1208 access_size_min = mr->ops->valid.min_access_size;
1209 if (!mr->ops->valid.min_access_size) {
1210 access_size_min = 1;
1211 }
1212
1213 access_size_max = mr->ops->valid.max_access_size;
1214 if (!mr->ops->valid.max_access_size) {
1215 access_size_max = 4;
1216 }
1217
1218 access_size = MAX(MIN(size, access_size_max), access_size_min);
1219 for (i = 0; i < size; i += access_size) {
1220 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1221 is_write)) {
1222 return false;
1223 }
093bc2cd 1224 }
a014ed07 1225
093bc2cd
AK		 1226 return true;
1227}
1228
cc05c43a
PM		 1229static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1230 hwaddr addr,
1231 uint64_t *pval,
1232 unsigned size,
1233 MemTxAttrs attrs)
093bc2cd 1234{
cc05c43a 1235 *pval = 0;
093bc2cd 1236
ce5d2f33 1237 if (mr->ops->read) {
cc05c43a
PM		 1238 return access_with_adjusted_size(addr, pval, size,
1239 mr->ops->impl.min_access_size,
1240 mr->ops->impl.max_access_size,
1241 memory_region_read_accessor,
1242 mr, attrs);
1243 } else if (mr->ops->read_with_attrs) {
1244 return access_with_adjusted_size(addr, pval, size,
1245 mr->ops->impl.min_access_size,
1246 mr->ops->impl.max_access_size,
1247 memory_region_read_with_attrs_accessor,
1248 mr, attrs);
ce5d2f33 1249 } else {
cc05c43a
PM		 1250 return access_with_adjusted_size(addr, pval, size, 1, 4,
1251 memory_region_oldmmio_read_accessor,
1252 mr, attrs);
74901c3b 1253 }
093bc2cd
AK		 1254}
1255
3b643495
PM		 1256MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1257 hwaddr addr,
1258 uint64_t *pval,
1259 unsigned size,
1260 MemTxAttrs attrs)
a621f38d 1261{
cc05c43a
PM		 1262 MemTxResult r;
1263
791af8c8
PB		 1264 if (!memory_region_access_valid(mr, addr, size, false)) {
1265 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1266 return MEMTX_DECODE_ERROR;
791af8c8 1267 }
a621f38d 1268
cc05c43a 1269 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1270 adjust_endianness(mr, pval, size);
cc05c43a 1271 return r;
a621f38d 1272}
093bc2cd 1273
8c56c1a5
PF		 1274/* Return true if an eventfd was signalled */
1275static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1276 hwaddr addr,
1277 uint64_t data,
1278 unsigned size,
1279 MemTxAttrs attrs)
1280{
1281 MemoryRegionIoeventfd ioeventfd = {
1282 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1283 .data = data,
1284 };
1285 unsigned i;
1286
1287 for (i = 0; i < mr->ioeventfd_nb; i++) {
1288 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1289 ioeventfd.e = mr->ioeventfds[i].e;
1290
1291 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1292 event_notifier_set(ioeventfd.e);
1293 return true;
1294 }
1295 }
1296
1297 return false;
1298}
1299
3b643495
PM		 1300MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1301 hwaddr addr,
1302 uint64_t data,
1303 unsigned size,
1304 MemTxAttrs attrs)
a621f38d 1305{
897fa7cf 1306 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1307 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1308 return MEMTX_DECODE_ERROR;
093bc2cd
AK		 1309 }
1310
a621f38d
AK		 1311 adjust_endianness(mr, &data, size);
1312
8c56c1a5
PF		 1313 if ((!kvm_eventfds_enabled()) &&
1314 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1315 return MEMTX_OK;
1316 }
1317
ce5d2f33 1318 if (mr->ops->write) {
cc05c43a
PM		 1319 return access_with_adjusted_size(addr, &data, size,
1320 mr->ops->impl.min_access_size,
1321 mr->ops->impl.max_access_size,
1322 memory_region_write_accessor, mr,
1323 attrs);
1324 } else if (mr->ops->write_with_attrs) {
1325 return
1326 access_with_adjusted_size(addr, &data, size,
1327 mr->ops->impl.min_access_size,
1328 mr->ops->impl.max_access_size,
1329 memory_region_write_with_attrs_accessor,
1330 mr, attrs);
ce5d2f33 1331 } else {
cc05c43a
PM		 1332 return access_with_adjusted_size(addr, &data, size, 1, 4,
1333 memory_region_oldmmio_write_accessor,
1334 mr, attrs);
74901c3b 1335 }
093bc2cd
AK		 1336}
1337
093bc2cd 1338void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1339 Object *owner,
093bc2cd
AK		 1340 const MemoryRegionOps *ops,
1341 void *opaque,
1342 const char *name,
1343 uint64_t size)
1344{
2c9b15ca 1345 memory_region_init(mr, owner, name, size);
6d6d2abf 1346 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1347 mr->opaque = opaque;
14a3c10a 1348 mr->terminates = true;
093bc2cd
AK		 1349}
1350
1351void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1352 Object *owner,
093bc2cd 1353 const char *name,
49946538
HT		 1354 uint64_t size,
1355 Error **errp)
093bc2cd 1356{
2c9b15ca 1357 memory_region_init(mr, owner, name, size);
8ea9252a 1358 mr->ram = true;
14a3c10a 1359 mr->terminates = true;
545e92e0 1360 mr->destructor = memory_region_destructor_ram;
8e41fb63 1361 mr->ram_block = qemu_ram_alloc(size, mr, errp);
677e7805 1362 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB		 1363}
1364
60786ef3
MT		 1365void memory_region_init_resizeable_ram(MemoryRegion *mr,
1366 Object *owner,
1367 const char *name,
1368 uint64_t size,
1369 uint64_t max_size,
1370 void (*resized)(const char*,
1371 uint64_t length,
1372 void *host),
1373 Error **errp)
1374{
1375 memory_region_init(mr, owner, name, size);
1376 mr->ram = true;
1377 mr->terminates = true;
1378 mr->destructor = memory_region_destructor_ram;
8e41fb63
FZ		 1379 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1380 mr, errp);
677e7805 1381 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT		 1382}
1383
0b183fc8
PB		 1384#ifdef __linux__
1385void memory_region_init_ram_from_file(MemoryRegion *mr,
1386 struct Object *owner,
1387 const char *name,
1388 uint64_t size,
dbcb8981 1389 bool share,
7f56e740
PB		 1390 const char *path,
1391 Error **errp)
0b183fc8
PB		 1392{
1393 memory_region_init(mr, owner, name, size);
1394 mr->ram = true;
1395 mr->terminates = true;
1396 mr->destructor = memory_region_destructor_ram;
8e41fb63 1397 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1398 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1399}
fea617c5
MAL		 1400
1401void memory_region_init_ram_from_fd(MemoryRegion *mr,
1402 struct Object *owner,
1403 const char *name,
1404 uint64_t size,
1405 bool share,
1406 int fd,
1407 Error **errp)
1408{
1409 memory_region_init(mr, owner, name, size);
1410 mr->ram = true;
1411 mr->terminates = true;
1412 mr->destructor = memory_region_destructor_ram;
1413 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1414 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1415}
0b183fc8 1416#endif
093bc2cd
AK		 1417
1418void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1419 Object *owner,
093bc2cd
AK		 1420 const char *name,
1421 uint64_t size,
1422 void *ptr)
1423{
2c9b15ca 1424 memory_region_init(mr, owner, name, size);
8ea9252a 1425 mr->ram = true;
14a3c10a 1426 mr->terminates = true;
fc3e7665 1427 mr->destructor = memory_region_destructor_ram;
677e7805 1428 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT		 1429
1430 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1431 assert(ptr != NULL);
8e41fb63 1432 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK		 1433}
1434
21e00fa5
AW		 1435void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1436 Object *owner,
1437 const char *name,
1438 uint64_t size,
1439 void *ptr)
e4dc3f59 1440{
21e00fa5
AW		 1441 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1442 mr->ram_device = true;
4a2e242b
AW		 1443 mr->ops = &ram_device_mem_ops;
1444 mr->opaque = mr;
e4dc3f59
ND		 1445}
1446
093bc2cd 1447void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1448 Object *owner,
093bc2cd
AK		 1449 const char *name,
1450 MemoryRegion *orig,
a8170e5e 1451 hwaddr offset,
093bc2cd
AK		 1452 uint64_t size)
1453{
2c9b15ca 1454 memory_region_init(mr, owner, name, size);
093bc2cd
AK		 1455 mr->alias = orig;
1456 mr->alias_offset = offset;
1457}
1458
a1777f7f
PM		 1459void memory_region_init_rom(MemoryRegion *mr,
1460 struct Object *owner,
1461 const char *name,
1462 uint64_t size,
1463 Error **errp)
1464{
1465 memory_region_init(mr, owner, name, size);
1466 mr->ram = true;
1467 mr->readonly = true;
1468 mr->terminates = true;
1469 mr->destructor = memory_region_destructor_ram;
1470 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1471 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1472}
1473
d0a9b5bc 1474void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1475 Object *owner,
d0a9b5bc 1476 const MemoryRegionOps *ops,
75f5941c 1477 void *opaque,
d0a9b5bc 1478 const char *name,
33e0eb52
HT		 1479 uint64_t size,
1480 Error **errp)
d0a9b5bc 1481{
39e0b03d 1482 assert(ops);
2c9b15ca 1483 memory_region_init(mr, owner, name, size);
7bc2b9cd 1484 mr->ops = ops;
75f5941c 1485 mr->opaque = opaque;
d0a9b5bc 1486 mr->terminates = true;
75c578dc 1487 mr->rom_device = true;
58268c8d 1488 mr->destructor = memory_region_destructor_ram;
8e41fb63 1489 mr->ram_block = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK		 1490}
1491
30951157 1492void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1493 Object *owner,
30951157
AK		 1494 const MemoryRegionIOMMUOps *ops,
1495 const char *name,
1496 uint64_t size)
1497{
2c9b15ca 1498 memory_region_init(mr, owner, name, size);
30951157
AK		 1499 mr->iommu_ops = ops,
1500 mr->terminates = true; /* then re-forwards */
cdb30812 1501 QLIST_INIT(&mr->iommu_notify);
5bf3d319 1502 mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
30951157
AK		 1503}
1504
b4fefef9 1505static void memory_region_finalize(Object *obj)
093bc2cd 1506{
b4fefef9
PC		 1507 MemoryRegion *mr = MEMORY_REGION(obj);
1508
2e2b8eb7
PB		 1509 assert(!mr->container);
1510
1511 /* We know the region is not visible in any address space (it
1512 * does not have a container and cannot be a root either because
1513 * it has no references, so we can blindly clear mr->enabled.
1514 * memory_region_set_enabled instead could trigger a transaction
1515 * and cause an infinite loop.
1516 */
1517 mr->enabled = false;
1518 memory_region_transaction_begin();
1519 while (!QTAILQ_EMPTY(&mr->subregions)) {
1520 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1521 memory_region_del_subregion(mr, subregion);
1522 }
1523 memory_region_transaction_commit();
1524
545e92e0 1525 mr->destructor(mr);
093bc2cd 1526 memory_region_clear_coalescing(mr);
302fa283 1527 g_free((char *)mr->name);
7267c094 1528 g_free(mr->ioeventfds);
093bc2cd
AK		 1529}
1530
803c0816
PB		 1531Object *memory_region_owner(MemoryRegion *mr)
1532{
22a893e4
PB		 1533 Object *obj = OBJECT(mr);
1534 return obj->parent;
803c0816
PB		 1535}
1536
46637be2
PB		 1537void memory_region_ref(MemoryRegion *mr)
1538{
22a893e4
PB		 1539 /* MMIO callbacks most likely will access data that belongs
1540 * to the owner, hence the need to ref/unref the owner whenever
1541 * the memory region is in use.
1542 *
1543 * The memory region is a child of its owner. As long as the
1544 * owner doesn't call unparent itself on the memory region,
1545 * ref-ing the owner will also keep the memory region alive.
612263cf
PB		 1546 * Memory regions without an owner are supposed to never go away;
1547 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1548 */
612263cf
PB		 1549 if (mr && mr->owner) {
1550 object_ref(mr->owner);
46637be2
PB		 1551 }
1552}
1553
1554void memory_region_unref(MemoryRegion *mr)
1555{
612263cf
PB		 1556 if (mr && mr->owner) {
1557 object_unref(mr->owner);
46637be2
PB		 1558 }
1559}
1560
093bc2cd
AK		 1561uint64_t memory_region_size(MemoryRegion *mr)
1562{
08dafab4
AK		 1563 if (int128_eq(mr->size, int128_2_64())) {
1564 return UINT64_MAX;
1565 }
1566 return int128_get64(mr->size);
093bc2cd
AK		 1567}
1568
5d546d4b 1569const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1570{
d1dd32af
PC		 1571 if (!mr->name) {
1572 ((MemoryRegion *)mr)->name =
1573 object_get_canonical_path_component(OBJECT(mr));
1574 }
302fa283 1575 return mr->name;
8991c79b
AK		 1576}
1577
21e00fa5 1578bool memory_region_is_ram_device(MemoryRegion *mr)
e4dc3f59 1579{
21e00fa5 1580 return mr->ram_device;
e4dc3f59
ND		 1581}
1582
2d1a35be 1583uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1584{
6f6a5ef3 1585 uint8_t mask = mr->dirty_log_mask;
adaad61c 1586 if (global_dirty_log && mr->ram_block) {
6f6a5ef3
PB		 1587 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1588 }
1589 return mask;
55043ba3
AK		 1590}
1591
2d1a35be
PB		 1592bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1593{
1594 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1595}
1596
5bf3d319
PX		 1597static void memory_region_update_iommu_notify_flags(MemoryRegion *mr)
1598{
1599 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1600 IOMMUNotifier *iommu_notifier;
1601
512fa408 1602 IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) {
5bf3d319
PX		 1603 flags |= iommu_notifier->notifier_flags;
1604 }
1605
1606 if (flags != mr->iommu_notify_flags &&
1607 mr->iommu_ops->notify_flag_changed) {
1608 mr->iommu_ops->notify_flag_changed(mr, mr->iommu_notify_flags,
1609 flags);
1610 }
1611
1612 mr->iommu_notify_flags = flags;
1613}
1614
cdb30812
PX		 1615void memory_region_register_iommu_notifier(MemoryRegion *mr,
1616 IOMMUNotifier *n)
06866575 1617{
efcd38c5
JW		 1618 if (mr->alias) {
1619 memory_region_register_iommu_notifier(mr->alias, n);
1620 return;
1621 }
1622
cdb30812
PX		 1623 /* We need to register for at least one bitfield */
1624 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
698feb5e 1625 assert(n->start <= n->end);
cdb30812 1626 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
5bf3d319 1627 memory_region_update_iommu_notify_flags(mr);
06866575
DG		 1628}
1629
f682e9c2 1630uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
a788f227 1631{
f682e9c2
AK		 1632 assert(memory_region_is_iommu(mr));
1633 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1634 return mr->iommu_ops->get_min_page_size(mr);
1635 }
1636 return TARGET_PAGE_SIZE;
1637}
1638
ad523590 1639void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n)
f682e9c2
AK		 1640{
1641 hwaddr addr, granularity;
a788f227
DG		 1642 IOMMUTLBEntry iotlb;
1643
faa362e3
PX		 1644 /* If the IOMMU has its own replay callback, override */
1645 if (mr->iommu_ops->replay) {
1646 mr->iommu_ops->replay(mr, n);
1647 return;
1648 }
1649
f682e9c2
AK		 1650 granularity = memory_region_iommu_get_min_page_size(mr);
1651
a788f227 1652 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
ad523590 1653 iotlb = mr->iommu_ops->translate(mr, addr, IOMMU_NONE);
a788f227
DG		 1654 if (iotlb.perm != IOMMU_NONE) {
1655 n->notify(n, &iotlb);
1656 }
1657
1658 /* if (2^64 - MR size) < granularity, it's possible to get an
1659 * infinite loop here. This should catch such a wraparound */
1660 if ((addr + granularity) < addr) {
1661 break;
1662 }
1663 }
1664}
1665
de472e4a
PX		 1666void memory_region_iommu_replay_all(MemoryRegion *mr)
1667{
1668 IOMMUNotifier *notifier;
1669
1670 IOMMU_NOTIFIER_FOREACH(notifier, mr) {
ad523590 1671 memory_region_iommu_replay(mr, notifier);
de472e4a
PX		 1672 }
1673}
1674
cdb30812
PX		 1675void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1676 IOMMUNotifier *n)
06866575 1677{
efcd38c5
JW		 1678 if (mr->alias) {
1679 memory_region_unregister_iommu_notifier(mr->alias, n);
1680 return;
1681 }
cdb30812 1682 QLIST_REMOVE(n, node);
5bf3d319 1683 memory_region_update_iommu_notify_flags(mr);
06866575
DG		 1684}
1685
bd2bfa4c
PX		 1686void memory_region_notify_one(IOMMUNotifier *notifier,
1687 IOMMUTLBEntry *entry)
06866575 1688{
cdb30812
PX		 1689 IOMMUNotifierFlag request_flags;
1690
bd2bfa4c
PX		 1691 /*
1692 * Skip the notification if the notification does not overlap
1693 * with registered range.
1694 */
1695 if (notifier->start > entry->iova + entry->addr_mask + 1 ||
1696 notifier->end < entry->iova) {
1697 return;
1698 }
cdb30812 1699
bd2bfa4c 1700 if (entry->perm & IOMMU_RW) {
cdb30812
PX		 1701 request_flags = IOMMU_NOTIFIER_MAP;
1702 } else {
1703 request_flags = IOMMU_NOTIFIER_UNMAP;
1704 }
1705
bd2bfa4c
PX		 1706 if (notifier->notifier_flags & request_flags) {
1707 notifier->notify(notifier, entry);
1708 }
1709}
1710
1711void memory_region_notify_iommu(MemoryRegion *mr,
1712 IOMMUTLBEntry entry)
1713{
1714 IOMMUNotifier *iommu_notifier;
1715
1716 assert(memory_region_is_iommu(mr));
1717
512fa408 1718 IOMMU_NOTIFIER_FOREACH(iommu_notifier, mr) {
bd2bfa4c 1719 memory_region_notify_one(iommu_notifier, &entry);
cdb30812 1720 }
06866575
DG		 1721}
1722
093bc2cd
AK		 1723void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1724{
5a583347 1725 uint8_t mask = 1 << client;
deb809ed 1726 uint8_t old_logging;
5a583347 1727
dbddac6d 1728 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB		 1729 old_logging = mr->vga_logging_count;
1730 mr->vga_logging_count += log ? 1 : -1;
1731 if (!!old_logging == !!mr->vga_logging_count) {
1732 return;
1733 }
1734
59023ef4 1735 memory_region_transaction_begin();
5a583347 1736 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1737 memory_region_update_pending |= mr->enabled;
59023ef4 1738 memory_region_transaction_commit();
093bc2cd
AK		 1739}
1740
a8170e5e
AK		 1741bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1742 hwaddr size, unsigned client)
093bc2cd 1743{
8e41fb63
FZ		 1744 assert(mr->ram_block);
1745 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1746 size, client);
093bc2cd
AK		 1747}
1748
a8170e5e
AK		 1749void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1750 hwaddr size)
093bc2cd 1751{
8e41fb63
FZ		 1752 assert(mr->ram_block);
1753 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1754 size,
58d2707e 1755 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK		 1756}
1757
6c279db8
JQ		 1758bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1759 hwaddr size, unsigned client)
1760{
8e41fb63
FZ		 1761 assert(mr->ram_block);
1762 return cpu_physical_memory_test_and_clear_dirty(
1763 memory_region_get_ram_addr(mr) + addr, size, client);
6c279db8
JQ		 1764}
1765
8deaf12c
GH		 1766DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
1767 hwaddr addr,
1768 hwaddr size,
1769 unsigned client)
1770{
1771 assert(mr->ram_block);
1772 return cpu_physical_memory_snapshot_and_clear_dirty(
1773 memory_region_get_ram_addr(mr) + addr, size, client);
1774}
1775
1776bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
1777 hwaddr addr, hwaddr size)
1778{
1779 assert(mr->ram_block);
1780 return cpu_physical_memory_snapshot_get_dirty(snap,
1781 memory_region_get_ram_addr(mr) + addr, size);
1782}
6c279db8 1783
093bc2cd
AK		 1784void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1785{
0a752eee 1786 MemoryListener *listener;
0d673e36 1787 AddressSpace *as;
0a752eee 1788 FlatView *view;
5a583347
AK		 1789 FlatRange *fr;
1790
0a752eee
PB		 1791 /* If the same address space has multiple log_sync listeners, we
1792 * visit that address space's FlatView multiple times. But because
1793 * log_sync listeners are rare, it's still cheaper than walking each
1794 * address space once.
1795 */
1796 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1797 if (!listener->log_sync) {
1798 continue;
1799 }
1800 as = listener->address_space;
1801 view = address_space_get_flatview(as);
99e86347 1802 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36 1803 if (fr->mr == mr) {
0a752eee
PB		 1804 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1805 listener->log_sync(listener, &mrs);
0d673e36 1806 }
5a583347 1807 }
856d7245 1808 flatview_unref(view);
5a583347 1809 }
093bc2cd
AK		 1810}
1811
1812void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1813{
fb1cd6f9 1814 if (mr->readonly != readonly) {
59023ef4 1815 memory_region_transaction_begin();
fb1cd6f9 1816 mr->readonly = readonly;
22bde714 1817 memory_region_update_pending |= mr->enabled;
59023ef4 1818 memory_region_transaction_commit();
fb1cd6f9 1819 }
093bc2cd
AK		 1820}
1821
5f9a5ea1 1822void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1823{
5f9a5ea1 1824 if (mr->romd_mode != romd_mode) {
59023ef4 1825 memory_region_transaction_begin();
5f9a5ea1 1826 mr->romd_mode = romd_mode;
22bde714 1827 memory_region_update_pending |= mr->enabled;
59023ef4 1828 memory_region_transaction_commit();
d0a9b5bc
AK		 1829 }
1830}
1831
a8170e5e
AK		 1832void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1833 hwaddr size, unsigned client)
093bc2cd 1834{
8e41fb63
FZ		 1835 assert(mr->ram_block);
1836 cpu_physical_memory_test_and_clear_dirty(
1837 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK		 1838}
1839
a35ba7be
PB		 1840int memory_region_get_fd(MemoryRegion *mr)
1841{
4ff87573
PB		 1842 int fd;
1843
1844 rcu_read_lock();
1845 while (mr->alias) {
1846 mr = mr->alias;
a35ba7be 1847 }
4ff87573
PB		 1848 fd = mr->ram_block->fd;
1849 rcu_read_unlock();
a35ba7be 1850
4ff87573
PB		 1851 return fd;
1852}
a35ba7be 1853
093bc2cd
AK		 1854void *memory_region_get_ram_ptr(MemoryRegion *mr)
1855{
49b24afc
PB		 1856 void *ptr;
1857 uint64_t offset = 0;
093bc2cd 1858
49b24afc
PB		 1859 rcu_read_lock();
1860 while (mr->alias) {
1861 offset += mr->alias_offset;
1862 mr = mr->alias;
1863 }
8e41fb63 1864 assert(mr->ram_block);
0878d0e1 1865 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
49b24afc 1866 rcu_read_unlock();
093bc2cd 1867
0878d0e1 1868 return ptr;
093bc2cd
AK		 1869}
1870
07bdaa41
PB		 1871MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1872{
1873 RAMBlock *block;
1874
1875 block = qemu_ram_block_from_host(ptr, false, offset);
1876 if (!block) {
1877 return NULL;
1878 }
1879
1880 return block->mr;
1881}
1882
7ebb2745
FZ		 1883ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1884{
1885 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1886}
1887
37d7c084
PB		 1888void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1889{
8e41fb63 1890 assert(mr->ram_block);
37d7c084 1891
fa53a0e5 1892 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB		 1893}
1894
0d673e36 1895static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1896{
99e86347 1897 FlatView *view;
093bc2cd
AK		 1898 FlatRange *fr;
1899 CoalescedMemoryRange *cmr;
1900 AddrRange tmp;
95d2994a 1901 MemoryRegionSection section;
093bc2cd 1902
856d7245 1903 view = address_space_get_flatview(as);
99e86347 1904 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1905 if (fr->mr == mr) {
95d2994a 1906 section = (MemoryRegionSection) {
f6790af6 1907 .address_space = as,
95d2994a 1908 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1909 .size = fr->addr.size,
95d2994a
AK		 1910 };
1911
9a54635d 1912 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
95d2994a
AK		 1913 int128_get64(fr->addr.start),
1914 int128_get64(fr->addr.size));
093bc2cd
AK		 1915 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1916 tmp = addrrange_shift(cmr->addr,
08dafab4
AK		 1917 int128_sub(fr->addr.start,
1918 int128_make64(fr->offset_in_region)));
093bc2cd
AK		 1919 if (!addrrange_intersects(tmp, fr->addr)) {
1920 continue;
1921 }
1922 tmp = addrrange_intersection(tmp, fr->addr);
9a54635d 1923 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
95d2994a
AK		 1924 int128_get64(tmp.start),
1925 int128_get64(tmp.size));
093bc2cd
AK		 1926 }
1927 }
1928 }
856d7245 1929 flatview_unref(view);
093bc2cd
AK		 1930}
1931
0d673e36
AK		 1932static void memory_region_update_coalesced_range(MemoryRegion *mr)
1933{
1934 AddressSpace *as;
1935
1936 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1937 memory_region_update_coalesced_range_as(mr, as);
1938 }
1939}
1940
093bc2cd
AK		 1941void memory_region_set_coalescing(MemoryRegion *mr)
1942{
1943 memory_region_clear_coalescing(mr);
08dafab4 1944 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK		 1945}
1946
1947void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1948 hwaddr offset,
093bc2cd
AK		 1949 uint64_t size)
1950{
7267c094 1951 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1952
08dafab4 1953 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK		 1954 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1955 memory_region_update_coalesced_range(mr);
d410515e 1956 memory_region_set_flush_coalesced(mr);
093bc2cd
AK		 1957}
1958
1959void memory_region_clear_coalescing(MemoryRegion *mr)
1960{
1961 CoalescedMemoryRange *cmr;
ab5b3db5 1962 bool updated = false;
093bc2cd 1963
d410515e
JK		 1964 qemu_flush_coalesced_mmio_buffer();
1965 mr->flush_coalesced_mmio = false;
1966
093bc2cd
AK		 1967 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1968 cmr = QTAILQ_FIRST(&mr->coalesced);
1969 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1970 g_free(cmr);
ab5b3db5
FZ		 1971 updated = true;
1972 }
1973
1974 if (updated) {
1975 memory_region_update_coalesced_range(mr);
093bc2cd 1976 }
093bc2cd
AK		 1977}
1978
d410515e
JK		 1979void memory_region_set_flush_coalesced(MemoryRegion *mr)
1980{
1981 mr->flush_coalesced_mmio = true;
1982}
1983
1984void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1985{
1986 qemu_flush_coalesced_mmio_buffer();
1987 if (QTAILQ_EMPTY(&mr->coalesced)) {
1988 mr->flush_coalesced_mmio = false;
1989 }
1990}
1991
196ea131
JK		 1992void memory_region_set_global_locking(MemoryRegion *mr)
1993{
1994 mr->global_locking = true;
1995}
1996
1997void memory_region_clear_global_locking(MemoryRegion *mr)
1998{
1999 mr->global_locking = false;
2000}
2001
8c56c1a5
PF		 2002static bool userspace_eventfd_warning;
2003
3e9d69e7 2004void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 2005 hwaddr addr,
3e9d69e7
AK		 2006 unsigned size,
2007 bool match_data,
2008 uint64_t data,
753d5e14 2009 EventNotifier *e)
3e9d69e7
AK		 2010{
2011 MemoryRegionIoeventfd mrfd = {
08dafab4
AK		 2012 .addr.start = int128_make64(addr),
2013 .addr.size = int128_make64(size),
3e9d69e7
AK		 2014 .match_data = match_data,
2015 .data = data,
753d5e14 2016 .e = e,
3e9d69e7
AK		 2017 };
2018 unsigned i;
2019
8c56c1a5
PF		 2020 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2021 userspace_eventfd_warning))) {
2022 userspace_eventfd_warning = true;
2023 error_report("Using eventfd without MMIO binding in KVM. "
2024 "Suboptimal performance expected");
2025 }
2026
b8aecea2
JW		 2027 if (size) {
2028 adjust_endianness(mr, &mrfd.data, size);
2029 }
59023ef4 2030 memory_region_transaction_begin();
3e9d69e7
AK		 2031 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2032 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2033 break;
2034 }
2035 }
2036 ++mr->ioeventfd_nb;
7267c094 2037 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK		 2038 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2039 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2040 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2041 mr->ioeventfds[i] = mrfd;
4dc56152 2042 ioeventfd_update_pending |= mr->enabled;
59023ef4 2043 memory_region_transaction_commit();
3e9d69e7
AK		 2044}
2045
2046void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 2047 hwaddr addr,
3e9d69e7
AK		 2048 unsigned size,
2049 bool match_data,
2050 uint64_t data,
753d5e14 2051 EventNotifier *e)
3e9d69e7
AK		 2052{
2053 MemoryRegionIoeventfd mrfd = {
08dafab4
AK		 2054 .addr.start = int128_make64(addr),
2055 .addr.size = int128_make64(size),
3e9d69e7
AK		 2056 .match_data = match_data,
2057 .data = data,
753d5e14 2058 .e = e,
3e9d69e7
AK		 2059 };
2060 unsigned i;
2061
b8aecea2
JW		 2062 if (size) {
2063 adjust_endianness(mr, &mrfd.data, size);
2064 }
59023ef4 2065 memory_region_transaction_begin();
3e9d69e7
AK		 2066 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2067 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2068 break;
2069 }
2070 }
2071 assert(i != mr->ioeventfd_nb);
2072 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2073 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2074 --mr->ioeventfd_nb;
7267c094 2075 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 2076 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 2077 ioeventfd_update_pending |= mr->enabled;
59023ef4 2078 memory_region_transaction_commit();
3e9d69e7
AK		 2079}
2080
feca4ac1 2081static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 2082{
feca4ac1 2083 MemoryRegion *mr = subregion->container;
093bc2cd
AK		 2084 MemoryRegion *other;
2085
59023ef4
JK		 2086 memory_region_transaction_begin();
2087
dfde4e6e 2088 memory_region_ref(subregion);
093bc2cd
AK		 2089 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2090 if (subregion->priority >= other->priority) {
2091 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2092 goto done;
2093 }
2094 }
2095 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2096done:
22bde714 2097 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2098 memory_region_transaction_commit();
093bc2cd
AK		 2099}
2100
0598701a
PC		 2101static void memory_region_add_subregion_common(MemoryRegion *mr,
2102 hwaddr offset,
2103 MemoryRegion *subregion)
2104{
feca4ac1
PB		 2105 assert(!subregion->container);
2106 subregion->container = mr;
0598701a 2107 subregion->addr = offset;
feca4ac1 2108 memory_region_update_container_subregions(subregion);
0598701a 2109}
093bc2cd
AK		 2110
2111void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 2112 hwaddr offset,
093bc2cd
AK		 2113 MemoryRegion *subregion)
2114{
093bc2cd
AK		 2115 subregion->priority = 0;
2116 memory_region_add_subregion_common(mr, offset, subregion);
2117}
2118
2119void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 2120 hwaddr offset,
093bc2cd 2121 MemoryRegion *subregion,
a1ff8ae0 2122 int priority)
093bc2cd 2123{
093bc2cd
AK		 2124 subregion->priority = priority;
2125 memory_region_add_subregion_common(mr, offset, subregion);
2126}
2127
2128void memory_region_del_subregion(MemoryRegion *mr,
2129 MemoryRegion *subregion)
2130{
59023ef4 2131 memory_region_transaction_begin();
feca4ac1
PB		 2132 assert(subregion->container == mr);
2133 subregion->container = NULL;
093bc2cd 2134 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 2135 memory_region_unref(subregion);
22bde714 2136 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2137 memory_region_transaction_commit();
6bba19ba
AK		 2138}
2139
2140void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2141{
2142 if (enabled == mr->enabled) {
2143 return;
2144 }
59023ef4 2145 memory_region_transaction_begin();
6bba19ba 2146 mr->enabled = enabled;
22bde714 2147 memory_region_update_pending = true;
59023ef4 2148 memory_region_transaction_commit();
093bc2cd 2149}
1c0ffa58 2150
e7af4c67
MT		 2151void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2152{
2153 Int128 s = int128_make64(size);
2154
2155 if (size == UINT64_MAX) {
2156 s = int128_2_64();
2157 }
2158 if (int128_eq(s, mr->size)) {
2159 return;
2160 }
2161 memory_region_transaction_begin();
2162 mr->size = s;
2163 memory_region_update_pending = true;
2164 memory_region_transaction_commit();
2165}
2166
67891b8a 2167static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 2168{
feca4ac1 2169 MemoryRegion *container = mr->container;
2282e1af 2170
feca4ac1 2171 if (container) {
67891b8a
PC		 2172 memory_region_transaction_begin();
2173 memory_region_ref(mr);
feca4ac1
PB		 2174 memory_region_del_subregion(container, mr);
2175 mr->container = container;
2176 memory_region_update_container_subregions(mr);
67891b8a
PC		 2177 memory_region_unref(mr);
2178 memory_region_transaction_commit();
2282e1af 2179 }
67891b8a 2180}
2282e1af 2181
67891b8a
PC		 2182void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2183{
2184 if (addr != mr->addr) {
2185 mr->addr = addr;
2186 memory_region_readd_subregion(mr);
2187 }
2282e1af
AK		 2188}
2189
a8170e5e 2190void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 2191{
4703359e 2192 assert(mr->alias);
4703359e 2193
59023ef4 2194 if (offset == mr->alias_offset) {
4703359e
AK		 2195 return;
2196 }
2197
59023ef4
JK		 2198 memory_region_transaction_begin();
2199 mr->alias_offset = offset;
22bde714 2200 memory_region_update_pending |= mr->enabled;
59023ef4 2201 memory_region_transaction_commit();
4703359e
AK		 2202}
2203
a2b257d6
IM		 2204uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2205{
2206 return mr->align;
2207}
2208
e2177955
AK		 2209static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2210{
2211 const AddrRange *addr = addr_;
2212 const FlatRange *fr = fr_;
2213
2214 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2215 return -1;
2216 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2217 return 1;
2218 }
2219 return 0;
2220}
2221
99e86347 2222static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2223{
99e86347 2224 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK		 2225 sizeof(FlatRange), cmp_flatrange_addr);
2226}
2227
eed2bacf
IM		 2228bool memory_region_is_mapped(MemoryRegion *mr)
2229{
2230 return mr->container ? true : false;
2231}
2232
c6742b14
PB		 2233/* Same as memory_region_find, but it does not add a reference to the
2234 * returned region. It must be called from an RCU critical section.
2235 */
2236static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2237 hwaddr addr, uint64_t size)
e2177955 2238{
052e87b0 2239 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB		 2240 MemoryRegion *root;
2241 AddressSpace *as;
2242 AddrRange range;
99e86347 2243 FlatView *view;
73034e9e
PB		 2244 FlatRange *fr;
2245
2246 addr += mr->addr;
feca4ac1
PB		 2247 for (root = mr; root->container; ) {
2248 root = root->container;
73034e9e
PB		 2249 addr += root->addr;
2250 }
e2177955 2251
73034e9e 2252 as = memory_region_to_address_space(root);
eed2bacf
IM		 2253 if (!as) {
2254 return ret;
2255 }
73034e9e 2256 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2257
2b647668 2258 view = atomic_rcu_read(&as->current_map);
99e86347 2259 fr = flatview_lookup(view, range);
e2177955 2260 if (!fr) {
c6742b14 2261 return ret;
e2177955
AK		 2262 }
2263
99e86347 2264 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK		 2265 --fr;
2266 }
2267
2268 ret.mr = fr->mr;
73034e9e 2269 ret.address_space = as;
e2177955
AK		 2270 range = addrrange_intersection(range, fr->addr);
2271 ret.offset_within_region = fr->offset_in_region;
2272 ret.offset_within_region += int128_get64(int128_sub(range.start,
2273 fr->addr.start));
052e87b0 2274 ret.size = range.size;
e2177955 2275 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2276 ret.readonly = fr->readonly;
c6742b14
PB		 2277 return ret;
2278}
2279
2280MemoryRegionSection memory_region_find(MemoryRegion *mr,
2281 hwaddr addr, uint64_t size)
2282{
2283 MemoryRegionSection ret;
2284 rcu_read_lock();
2285 ret = memory_region_find_rcu(mr, addr, size);
2286 if (ret.mr) {
2287 memory_region_ref(ret.mr);
2288 }
2b647668 2289 rcu_read_unlock();
e2177955
AK		 2290 return ret;
2291}
2292
c6742b14
PB		 2293bool memory_region_present(MemoryRegion *container, hwaddr addr)
2294{
2295 MemoryRegion *mr;
2296
2297 rcu_read_lock();
2298 mr = memory_region_find_rcu(container, addr, 1).mr;
2299 rcu_read_unlock();
2300 return mr && mr != container;
2301}
2302
9c1f8f44 2303void memory_global_dirty_log_sync(void)
86e775c6 2304{
9c1f8f44
PB		 2305 MemoryListener *listener;
2306 AddressSpace *as;
99e86347 2307 FlatView *view;
7664e80c
AK		 2308 FlatRange *fr;
2309
9c1f8f44
PB		 2310 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2311 if (!listener->log_sync) {
2312 continue;
2313 }
d45fa784 2314 as = listener->address_space;
9c1f8f44
PB		 2315 view = address_space_get_flatview(as);
2316 FOR_EACH_FLAT_RANGE(fr, view) {
adaad61c
PB		 2317 if (fr->dirty_log_mask) {
2318 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2319 listener->log_sync(listener, &mrs);
2320 }
9c1f8f44
PB		 2321 }
2322 flatview_unref(view);
7664e80c
AK		 2323 }
2324}
2325
2326void memory_global_dirty_log_start(void)
2327{
7664e80c 2328 global_dirty_log = true;
6f6a5ef3 2329
7376e582 2330 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB		 2331
2332 /* Refresh DIRTY_LOG_MIGRATION bit. */
2333 memory_region_transaction_begin();
2334 memory_region_update_pending = true;
2335 memory_region_transaction_commit();
7664e80c
AK		 2336}
2337
2338void memory_global_dirty_log_stop(void)
2339{
7664e80c 2340 global_dirty_log = false;
6f6a5ef3
PB		 2341
2342 /* Refresh DIRTY_LOG_MIGRATION bit. */
2343 memory_region_transaction_begin();
2344 memory_region_update_pending = true;
2345 memory_region_transaction_commit();
2346
7376e582 2347 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK		 2348}
2349
2350static void listener_add_address_space(MemoryListener *listener,
2351 AddressSpace *as)
2352{
99e86347 2353 FlatView *view;
7664e80c
AK		 2354 FlatRange *fr;
2355
680a4783
PB		 2356 if (listener->begin) {
2357 listener->begin(listener);
2358 }
7664e80c 2359 if (global_dirty_log) {
975aefe0
AK		 2360 if (listener->log_global_start) {
2361 listener->log_global_start(listener);
2362 }
7664e80c 2363 }
975aefe0 2364
856d7245 2365 view = address_space_get_flatview(as);
99e86347 2366 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK		 2367 MemoryRegionSection section = {
2368 .mr = fr->mr,
f6790af6 2369 .address_space = as,
7664e80c 2370 .offset_within_region = fr->offset_in_region,
052e87b0 2371 .size = fr->addr.size,
7664e80c 2372 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2373 .readonly = fr->readonly,
7664e80c 2374 };
680a4783
PB		 2375 if (fr->dirty_log_mask && listener->log_start) {
2376 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2377 }
975aefe0
AK		 2378 if (listener->region_add) {
2379 listener->region_add(listener, &section);
2380 }
7664e80c 2381 }
680a4783
PB		 2382 if (listener->commit) {
2383 listener->commit(listener);
2384 }
856d7245 2385 flatview_unref(view);
7664e80c
AK		 2386}
2387
d45fa784 2388void memory_listener_register(MemoryListener *listener, AddressSpace *as)
7664e80c 2389{
72e22d2f
AK		 2390 MemoryListener *other = NULL;
2391
d45fa784 2392 listener->address_space = as;
72e22d2f
AK		 2393 if (QTAILQ_EMPTY(&memory_listeners)
2394 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2395 memory_listeners)->priority) {
2396 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2397 } else {
2398 QTAILQ_FOREACH(other, &memory_listeners, link) {
2399 if (listener->priority < other->priority) {
2400 break;
2401 }
2402 }
2403 QTAILQ_INSERT_BEFORE(other, listener, link);
2404 }
0d673e36 2405
9a54635d
PB		 2406 if (QTAILQ_EMPTY(&as->listeners)
2407 || listener->priority >= QTAILQ_LAST(&as->listeners,
2408 memory_listeners)->priority) {
2409 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2410 } else {
2411 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2412 if (listener->priority < other->priority) {
2413 break;
2414 }
2415 }
2416 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2417 }
2418
d45fa784 2419 listener_add_address_space(listener, as);
7664e80c
AK		 2420}
2421
2422void memory_listener_unregister(MemoryListener *listener)
2423{
1d8280c1
PB		 2424 if (!listener->address_space) {
2425 return;
2426 }
2427
72e22d2f 2428 QTAILQ_REMOVE(&memory_listeners, listener, link);
9a54635d 2429 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
1d8280c1 2430 listener->address_space = NULL;
86e775c6 2431}
e2177955 2432
7dca8043 2433void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2434{
ac95190e 2435 memory_region_ref(root);
59023ef4 2436 memory_region_transaction_begin();
f0c02d15 2437 as->ref_count = 1;
8786db7c 2438 as->root = root;
f0c02d15 2439 as->malloced = false;
8786db7c
AK		 2440 as->current_map = g_new(FlatView, 1);
2441 flatview_init(as->current_map);
4c19eb72
AK		 2442 as->ioeventfd_nb = 0;
2443 as->ioeventfds = NULL;
9a54635d 2444 QTAILQ_INIT(&as->listeners);
0d673e36 2445 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2446 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2447 address_space_init_dispatch(as);
f43793c7
PB		 2448 memory_region_update_pending |= root->enabled;
2449 memory_region_transaction_commit();
1c0ffa58 2450}
658b2224 2451
374f2981 2452static void do_address_space_destroy(AddressSpace *as)
83f3c251 2453{
f0c02d15 2454 bool do_free = as->malloced;
078c44f4 2455
83f3c251 2456 address_space_destroy_dispatch(as);
9a54635d 2457 assert(QTAILQ_EMPTY(&as->listeners));
078c44f4 2458
856d7245 2459 flatview_unref(as->current_map);
7dca8043 2460 g_free(as->name);
4c19eb72 2461 g_free(as->ioeventfds);
ac95190e 2462 memory_region_unref(as->root);
f0c02d15
PC		 2463 if (do_free) {
2464 g_free(as);
2465 }
2466}
2467
2468AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2469{
2470 AddressSpace *as;
2471
2472 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2473 if (root == as->root && as->malloced) {
2474 as->ref_count++;
2475 return as;
2476 }
2477 }
2478
2479 as = g_malloc0(sizeof *as);
2480 address_space_init(as, root, name);
2481 as->malloced = true;
2482 return as;
83f3c251
AK		 2483}
2484
374f2981
PB		 2485void address_space_destroy(AddressSpace *as)
2486{
ac95190e
PB		 2487 MemoryRegion *root = as->root;
2488
f0c02d15
PC		 2489 as->ref_count--;
2490 if (as->ref_count) {
2491 return;
2492 }
374f2981
PB		 2493 /* Flush out anything from MemoryListeners listening in on this */
2494 memory_region_transaction_begin();
2495 as->root = NULL;
2496 memory_region_transaction_commit();
2497 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2498 address_space_unregister(as);
374f2981
PB		 2499
2500 /* At this point, as->dispatch and as->current_map are dummy
2501 * entries that the guest should never use. Wait for the old
2502 * values to expire before freeing the data.
2503 */
ac95190e 2504 as->root = root;
374f2981
PB		 2505 call_rcu(as, do_address_space_destroy, rcu);
2506}
2507
4e831901
PX		 2508static const char *memory_region_type(MemoryRegion *mr)
2509{
2510 if (memory_region_is_ram_device(mr)) {
2511 return "ramd";
2512 } else if (memory_region_is_romd(mr)) {
2513 return "romd";
2514 } else if (memory_region_is_rom(mr)) {
2515 return "rom";
2516 } else if (memory_region_is_ram(mr)) {
2517 return "ram";
2518 } else {
2519 return "i/o";
2520 }
2521}
2522
314e2987
BS		 2523typedef struct MemoryRegionList MemoryRegionList;
2524
2525struct MemoryRegionList {
2526 const MemoryRegion *mr;
314e2987
BS		 2527 QTAILQ_ENTRY(MemoryRegionList) queue;
2528};
2529
2530typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2531
4e831901
PX		 2532#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2533 int128_sub((size), int128_one())) : 0)
2534#define MTREE_INDENT " "
2535
314e2987
BS		 2536static void mtree_print_mr(fprintf_function mon_printf, void *f,
2537 const MemoryRegion *mr, unsigned int level,
a8170e5e 2538 hwaddr base,
9479c57a 2539 MemoryRegionListHead *alias_print_queue)
314e2987 2540{
9479c57a
JK		 2541 MemoryRegionList *new_ml, *ml, *next_ml;
2542 MemoryRegionListHead submr_print_queue;
314e2987
BS		 2543 const MemoryRegion *submr;
2544 unsigned int i;
b31f8412 2545 hwaddr cur_start, cur_end;
314e2987 2546
f8a9f720 2547 if (!mr) {
314e2987
BS		 2548 return;
2549 }
2550
2551 for (i = 0; i < level; i++) {
4e831901 2552 mon_printf(f, MTREE_INDENT);
314e2987
BS		 2553 }
2554
b31f8412
PX		 2555 cur_start = base + mr->addr;
2556 cur_end = cur_start + MR_SIZE(mr->size);
2557
2558 /*
2559 * Try to detect overflow of memory region. This should never
2560 * happen normally. When it happens, we dump something to warn the
2561 * user who is observing this.
2562 */
2563 if (cur_start < base || cur_end < cur_start) {
2564 mon_printf(f, "[DETECTED OVERFLOW!] ");
2565 }
2566
314e2987
BS		 2567 if (mr->alias) {
2568 MemoryRegionList *ml;
2569 bool found = false;
2570
2571 /* check if the alias is already in the queue */
9479c57a 2572 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2573 if (ml->mr == mr->alias) {
314e2987
BS		 2574 found = true;
2575 }
2576 }
2577
2578 if (!found) {
2579 ml = g_new(MemoryRegionList, 1);
2580 ml->mr = mr->alias;
9479c57a 2581 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2582 }
4896d74b 2583 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
4e831901 2584 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
f8a9f720 2585 "-" TARGET_FMT_plx "%s\n",
b31f8412 2586 cur_start, cur_end,
4b474ba7 2587 mr->priority,
4e831901 2588 memory_region_type((MemoryRegion *)mr),
3fb18b4d
PC		 2589 memory_region_name(mr),
2590 memory_region_name(mr->alias),
314e2987 2591 mr->alias_offset,
4e831901 2592 mr->alias_offset + MR_SIZE(mr->size),
f8a9f720 2593 mr->enabled ? "" : " [disabled]");
314e2987 2594 } else {
4896d74b 2595 mon_printf(f,
4e831901 2596 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
b31f8412 2597 cur_start, cur_end,
4b474ba7 2598 mr->priority,
4e831901 2599 memory_region_type((MemoryRegion *)mr),
f8a9f720
GH		 2600 memory_region_name(mr),
2601 mr->enabled ? "" : " [disabled]");
314e2987 2602 }
9479c57a
JK		 2603
2604 QTAILQ_INIT(&submr_print_queue);
2605
314e2987 2606 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK		 2607 new_ml = g_new(MemoryRegionList, 1);
2608 new_ml->mr = submr;
2609 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2610 if (new_ml->mr->addr < ml->mr->addr ||
2611 (new_ml->mr->addr == ml->mr->addr &&
2612 new_ml->mr->priority > ml->mr->priority)) {
2613 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2614 new_ml = NULL;
2615 break;
2616 }
2617 }
2618 if (new_ml) {
2619 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2620 }
2621 }
2622
2623 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
b31f8412 2624 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
9479c57a
JK		 2625 alias_print_queue);
2626 }
2627
88365e47 2628 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2629 g_free(ml);
314e2987
BS		 2630 }
2631}
2632
57bb40c9
PX		 2633static void mtree_print_flatview(fprintf_function p, void *f,
2634 AddressSpace *as)
2635{
2636 FlatView *view = address_space_get_flatview(as);
2637 FlatRange *range = &view->ranges[0];
2638 MemoryRegion *mr;
2639 int n = view->nr;
2640
2641 if (n <= 0) {
2642 p(f, MTREE_INDENT "No rendered FlatView for "
2643 "address space '%s'\n", as->name);
2644 flatview_unref(view);
2645 return;
2646 }
2647
2648 while (n--) {
2649 mr = range->mr;
377a07aa
PB		 2650 if (range->offset_in_region) {
2651 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2652 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2653 int128_get64(range->addr.start),
2654 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2655 mr->priority,
2656 range->readonly ? "rom" : memory_region_type(mr),
2657 memory_region_name(mr),
2658 range->offset_in_region);
2659 } else {
2660 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2661 TARGET_FMT_plx " (prio %d, %s): %s\n",
2662 int128_get64(range->addr.start),
2663 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2664 mr->priority,
2665 range->readonly ? "rom" : memory_region_type(mr),
2666 memory_region_name(mr));
2667 }
57bb40c9
PX		 2668 range++;
2669 }
2670
2671 flatview_unref(view);
2672}
2673
2674void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
314e2987
BS		 2675{
2676 MemoryRegionListHead ml_head;
2677 MemoryRegionList *ml, *ml2;
0d673e36 2678 AddressSpace *as;
314e2987 2679
57bb40c9
PX		 2680 if (flatview) {
2681 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2682 mon_printf(f, "address-space (flat view): %s\n", as->name);
2683 mtree_print_flatview(mon_printf, f, as);
2684 mon_printf(f, "\n");
2685 }
2686 return;
2687 }
2688
314e2987
BS		 2689 QTAILQ_INIT(&ml_head);
2690
0d673e36 2691 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH		 2692 mon_printf(f, "address-space: %s\n", as->name);
2693 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2694 mon_printf(f, "\n");
b9f9be88
BS		 2695 }
2696
314e2987
BS		 2697 /* print aliased regions */
2698 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH		 2699 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2700 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2701 mon_printf(f, "\n");
314e2987
BS		 2702 }
2703
2704 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2705 g_free(ml);
314e2987 2706 }
314e2987 2707}
b4fefef9
PC		 2708
2709static const TypeInfo memory_region_info = {
2710 .parent = TYPE_OBJECT,
2711 .name = TYPE_MEMORY_REGION,
2712 .instance_size = sizeof(MemoryRegion),
2713 .instance_init = memory_region_initfn,
2714 .instance_finalize = memory_region_finalize,
2715};
2716
2717static void memory_register_types(void)
2718{
2719 type_register_static(&memory_region_info);
2720}
2721
2722type_init(memory_register_types)
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