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memory: introduce IOMMUNotifier and its caps
[mirror_qemu.git] / memory.c
CommitLineData
093bc2cd
AK		 1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB		 12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
093bc2cd
AK		 14 */
15
d38ea87a 16#include "qemu/osdep.h"
da34e65c 17#include "qapi/error.h"
33c11879
PB		 18#include "qemu-common.h"
19#include "cpu.h"
022c62cb
PB		 20#include "exec/memory.h"
21#include "exec/address-spaces.h"
22#include "exec/ioport.h"
409ddd01 23#include "qapi/visitor.h"
1de7afc9 24#include "qemu/bitops.h"
8c56c1a5 25#include "qemu/error-report.h"
2c9b15ca 26#include "qom/object.h"
55d5d048 27#include "trace.h"
093bc2cd 28
022c62cb 29#include "exec/memory-internal.h"
220c3ebd 30#include "exec/ram_addr.h"
8c56c1a5 31#include "sysemu/kvm.h"
e1c57ab8 32#include "sysemu/sysemu.h"
67d95c15 33
d197063f
PB		 34//#define DEBUG_UNASSIGNED
35
22bde714
JK		 36static unsigned memory_region_transaction_depth;
37static bool memory_region_update_pending;
4dc56152 38static bool ioeventfd_update_pending;
7664e80c
AK		 39static bool global_dirty_log = false;
40
72e22d2f
AK		 41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
0d673e36
AK		 44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
093bc2cd
AK		 47typedef struct AddrRange AddrRange;
48
8417cebf 49/*
c9cdaa3a 50 * Note that signed integers are needed for negative offsetting in aliases
8417cebf
AK		 51 * (large MemoryRegion::alias_offset).
52 */
093bc2cd 53struct AddrRange {
08dafab4
AK		 54 Int128 start;
55 Int128 size;
093bc2cd
AK		 56};
57
08dafab4 58static AddrRange addrrange_make(Int128 start, Int128 size)
093bc2cd
AK		 59{
60 return (AddrRange) { start, size };
61}
62
63static bool addrrange_equal(AddrRange r1, AddrRange r2)
64{
08dafab4 65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
093bc2cd
AK		 66}
67
08dafab4 68static Int128 addrrange_end(AddrRange r)
093bc2cd 69{
08dafab4 70 return int128_add(r.start, r.size);
093bc2cd
AK		 71}
72
08dafab4 73static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 74{
08dafab4 75 int128_addto(&range.start, delta);
093bc2cd
AK		 76 return range;
77}
78
08dafab4
AK		 79static bool addrrange_contains(AddrRange range, Int128 addr)
80{
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83}
84
093bc2cd
AK		 85static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86{
08dafab4
AK		 87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
093bc2cd
AK		 89}
90
91static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92{
08dafab4
AK		 93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
093bc2cd
AK		 96}
97
0e0d36b4
AK		 98enum ListenerDirection { Forward, Reverse };
99
7376e582
AK		 100static bool memory_listener_match(MemoryListener *listener,
101 MemoryRegionSection *section)
102{
103 return !listener->address_space_filter
104 || listener->address_space_filter == section->address_space;
105}
106
107#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
AK		 108 do { \
109 MemoryListener *_listener; \
110 \
111 switch (_direction) { \
112 case Forward: \
113 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
975aefe0
AK		 114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
0e0d36b4
AK		 117 } \
118 break; \
119 case Reverse: \
120 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
121 memory_listeners, link) { \
975aefe0
AK		 122 if (_listener->_callback) { \
123 _listener->_callback(_listener, ##_args); \
124 } \
0e0d36b4
AK		 125 } \
126 break; \
127 default: \
128 abort(); \
129 } \
130 } while (0)
131
7376e582
AK		 132#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
133 do { \
134 MemoryListener *_listener; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
975aefe0
AK		 139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
7376e582
AK		 141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 case Reverse: \
146 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
147 memory_listeners, link) { \
975aefe0
AK		 148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
7376e582
AK		 150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 default: \
155 abort(); \
156 } \
157 } while (0)
158
dfde4e6e 159/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 160#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
7376e582 161 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 162 .mr = (fr)->mr, \
f6790af6 163 .address_space = (as), \
0e0d36b4 164 .offset_within_region = (fr)->offset_in_region, \
052e87b0 165 .size = (fr)->addr.size, \
0e0d36b4 166 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 167 .readonly = (fr)->readonly, \
b2dfd71c 168 }), ##_args)
0e0d36b4 169
093bc2cd
AK		 170struct CoalescedMemoryRange {
171 AddrRange addr;
172 QTAILQ_ENTRY(CoalescedMemoryRange) link;
173};
174
3e9d69e7
AK		 175struct MemoryRegionIoeventfd {
176 AddrRange addr;
177 bool match_data;
178 uint64_t data;
753d5e14 179 EventNotifier *e;
3e9d69e7
AK		 180};
181
182static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
183 MemoryRegionIoeventfd b)
184{
08dafab4 185 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 186 return true;
08dafab4 187 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 188 return false;
08dafab4 189 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 190 return true;
08dafab4 191 } else if (int128_gt(a.addr.size, b.addr.size)) {
3e9d69e7
AK		 192 return false;
193 } else if (a.match_data < b.match_data) {
194 return true;
195 } else if (a.match_data > b.match_data) {
196 return false;
197 } else if (a.match_data) {
198 if (a.data < b.data) {
199 return true;
200 } else if (a.data > b.data) {
201 return false;
202 }
203 }
753d5e14 204 if (a.e < b.e) {
3e9d69e7 205 return true;
753d5e14 206 } else if (a.e > b.e) {
3e9d69e7
AK		 207 return false;
208 }
209 return false;
210}
211
212static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
213 MemoryRegionIoeventfd b)
214{
215 return !memory_region_ioeventfd_before(a, b)
216 && !memory_region_ioeventfd_before(b, a);
217}
218
093bc2cd
AK		 219typedef struct FlatRange FlatRange;
220typedef struct FlatView FlatView;
221
222/* Range of memory in the global map. Addresses are absolute. */
223struct FlatRange {
224 MemoryRegion *mr;
a8170e5e 225 hwaddr offset_in_region;
093bc2cd 226 AddrRange addr;
5a583347 227 uint8_t dirty_log_mask;
b138e654 228 bool romd_mode;
fb1cd6f9 229 bool readonly;
093bc2cd
AK		 230};
231
232/* Flattened global view of current active memory hierarchy. Kept in sorted
233 * order.
234 */
235struct FlatView {
374f2981 236 struct rcu_head rcu;
856d7245 237 unsigned ref;
093bc2cd
AK		 238 FlatRange *ranges;
239 unsigned nr;
240 unsigned nr_allocated;
241};
242
cc31e6e7
AK		 243typedef struct AddressSpaceOps AddressSpaceOps;
244
093bc2cd
AK		 245#define FOR_EACH_FLAT_RANGE(var, view) \
246 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
247
093bc2cd
AK		 248static bool flatrange_equal(FlatRange *a, FlatRange *b)
249{
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 252 && a->offset_in_region == b->offset_in_region
b138e654 253 && a->romd_mode == b->romd_mode
fb1cd6f9 254 && a->readonly == b->readonly;
093bc2cd
AK		 255}
256
257static void flatview_init(FlatView *view)
258{
856d7245 259 view->ref = 1;
093bc2cd
AK		 260 view->ranges = NULL;
261 view->nr = 0;
262 view->nr_allocated = 0;
263}
264
265/* Insert a range into a given position. Caller is responsible for maintaining
266 * sorting order.
267 */
268static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
269{
270 if (view->nr == view->nr_allocated) {
271 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 272 view->ranges = g_realloc(view->ranges,
093bc2cd
AK		 273 view->nr_allocated * sizeof(*view->ranges));
274 }
275 memmove(view->ranges + pos + 1, view->ranges + pos,
276 (view->nr - pos) * sizeof(FlatRange));
277 view->ranges[pos] = *range;
dfde4e6e 278 memory_region_ref(range->mr);
093bc2cd
AK		 279 ++view->nr;
280}
281
282static void flatview_destroy(FlatView *view)
283{
dfde4e6e
PB		 284 int i;
285
286 for (i = 0; i < view->nr; i++) {
287 memory_region_unref(view->ranges[i].mr);
288 }
7267c094 289 g_free(view->ranges);
a9a0c06d 290 g_free(view);
093bc2cd
AK		 291}
292
856d7245
PB		 293static void flatview_ref(FlatView *view)
294{
295 atomic_inc(&view->ref);
296}
297
298static void flatview_unref(FlatView *view)
299{
300 if (atomic_fetch_dec(&view->ref) == 1) {
301 flatview_destroy(view);
302 }
303}
304
3d8e6bf9
AK		 305static bool can_merge(FlatRange *r1, FlatRange *r2)
306{
08dafab4 307 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 308 && r1->mr == r2->mr
08dafab4
AK		 309 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
310 r1->addr.size),
311 int128_make64(r2->offset_in_region))
d0a9b5bc 312 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 313 && r1->romd_mode == r2->romd_mode
fb1cd6f9 314 && r1->readonly == r2->readonly;
3d8e6bf9
AK		 315}
316
8508e024 317/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK		 318static void flatview_simplify(FlatView *view)
319{
320 unsigned i, j;
321
322 i = 0;
323 while (i < view->nr) {
324 j = i + 1;
325 while (j < view->nr
326 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 327 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK		 328 ++j;
329 }
330 ++i;
331 memmove(&view->ranges[i], &view->ranges[j],
332 (view->nr - j) * sizeof(view->ranges[j]));
333 view->nr -= j - i;
334 }
335}
336
e7342aa3
PB		 337static bool memory_region_big_endian(MemoryRegion *mr)
338{
339#ifdef TARGET_WORDS_BIGENDIAN
340 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
341#else
342 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
343#endif
344}
345
e11ef3d1
PB		 346static bool memory_region_wrong_endianness(MemoryRegion *mr)
347{
348#ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
350#else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352#endif
353}
354
355static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
356{
357 if (memory_region_wrong_endianness(mr)) {
358 switch (size) {
359 case 1:
360 break;
361 case 2:
362 *data = bswap16(*data);
363 break;
364 case 4:
365 *data = bswap32(*data);
366 break;
367 case 8:
368 *data = bswap64(*data);
369 break;
370 default:
371 abort();
372 }
373 }
374}
375
4779dc1d
HB		 376static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
377{
378 MemoryRegion *root;
379 hwaddr abs_addr = offset;
380
381 abs_addr += mr->addr;
382 for (root = mr; root->container; ) {
383 root = root->container;
384 abs_addr += root->addr;
385 }
386
387 return abs_addr;
388}
389
5a68be94
HB		 390static int get_cpu_index(void)
391{
392 if (current_cpu) {
393 return current_cpu->cpu_index;
394 }
395 return -1;
396}
397
cc05c43a
PM		 398static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask,
404 MemTxAttrs attrs)
405{
406 uint64_t tmp;
407
408 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68 409 if (mr->subpage) {
5a68be94 410 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 411 } else if (mr == &io_mem_notdirty) {
412 /* Accesses to code which has previously been translated into a TB show
413 * up in the MMIO path, as accesses to the io_mem_notdirty
414 * MemoryRegion. */
415 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 416 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
417 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 418 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 419 }
cc05c43a
PM		 420 *value |= (tmp & mask) << shift;
421 return MEMTX_OK;
422}
423
424static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB		 425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
cc05c43a
PM		 429 uint64_t mask,
430 MemTxAttrs attrs)
ce5d2f33 431{
ce5d2f33
PB		 432 uint64_t tmp;
433
cc05c43a 434 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 435 if (mr->subpage) {
5a68be94 436 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 437 } else if (mr == &io_mem_notdirty) {
438 /* Accesses to code which has previously been translated into a TB show
439 * up in the MMIO path, as accesses to the io_mem_notdirty
440 * MemoryRegion. */
441 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 442 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
443 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 444 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 445 }
ce5d2f33 446 *value |= (tmp & mask) << shift;
cc05c43a 447 return MEMTX_OK;
ce5d2f33
PB		 448}
449
cc05c43a
PM		 450static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
451 hwaddr addr,
452 uint64_t *value,
453 unsigned size,
454 unsigned shift,
455 uint64_t mask,
456 MemTxAttrs attrs)
164a4dcd 457{
cc05c43a
PM		 458 uint64_t tmp = 0;
459 MemTxResult r;
164a4dcd 460
cc05c43a 461 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 462 if (mr->subpage) {
5a68be94 463 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 464 } else if (mr == &io_mem_notdirty) {
465 /* Accesses to code which has previously been translated into a TB show
466 * up in the MMIO path, as accesses to the io_mem_notdirty
467 * MemoryRegion. */
468 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 469 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
470 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 471 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 472 }
164a4dcd 473 *value |= (tmp & mask) << shift;
cc05c43a 474 return r;
164a4dcd
AK		 475}
476
cc05c43a
PM		 477static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
478 hwaddr addr,
479 uint64_t *value,
480 unsigned size,
481 unsigned shift,
482 uint64_t mask,
483 MemTxAttrs attrs)
ce5d2f33 484{
ce5d2f33
PB		 485 uint64_t tmp;
486
487 tmp = (*value >> shift) & mask;
23d92d68 488 if (mr->subpage) {
5a68be94 489 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 490 } else if (mr == &io_mem_notdirty) {
491 /* Accesses to code which has previously been translated into a TB show
492 * up in the MMIO path, as accesses to the io_mem_notdirty
493 * MemoryRegion. */
494 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 495 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
496 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 497 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 498 }
ce5d2f33 499 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 500 return MEMTX_OK;
ce5d2f33
PB		 501}
502
cc05c43a
PM		 503static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
504 hwaddr addr,
505 uint64_t *value,
506 unsigned size,
507 unsigned shift,
508 uint64_t mask,
509 MemTxAttrs attrs)
164a4dcd 510{
164a4dcd
AK		 511 uint64_t tmp;
512
513 tmp = (*value >> shift) & mask;
23d92d68 514 if (mr->subpage) {
5a68be94 515 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 516 } else if (mr == &io_mem_notdirty) {
517 /* Accesses to code which has previously been translated into a TB show
518 * up in the MMIO path, as accesses to the io_mem_notdirty
519 * MemoryRegion. */
520 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 521 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
522 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 523 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 524 }
164a4dcd 525 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 526 return MEMTX_OK;
164a4dcd
AK		 527}
528
cc05c43a
PM		 529static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
530 hwaddr addr,
531 uint64_t *value,
532 unsigned size,
533 unsigned shift,
534 uint64_t mask,
535 MemTxAttrs attrs)
536{
537 uint64_t tmp;
538
cc05c43a 539 tmp = (*value >> shift) & mask;
23d92d68 540 if (mr->subpage) {
5a68be94 541 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB		 542 } else if (mr == &io_mem_notdirty) {
543 /* Accesses to code which has previously been translated into a TB show
544 * up in the MMIO path, as accesses to the io_mem_notdirty
545 * MemoryRegion. */
546 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB		 547 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
548 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 549 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 550 }
cc05c43a
PM		 551 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
552}
553
554static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK		 555 uint64_t *value,
556 unsigned size,
557 unsigned access_size_min,
558 unsigned access_size_max,
cc05c43a
PM		 559 MemTxResult (*access)(MemoryRegion *mr,
560 hwaddr addr,
561 uint64_t *value,
562 unsigned size,
563 unsigned shift,
564 uint64_t mask,
565 MemTxAttrs attrs),
566 MemoryRegion *mr,
567 MemTxAttrs attrs)
164a4dcd
AK		 568{
569 uint64_t access_mask;
570 unsigned access_size;
571 unsigned i;
cc05c43a 572 MemTxResult r = MEMTX_OK;
164a4dcd
AK		 573
574 if (!access_size_min) {
575 access_size_min = 1;
576 }
577 if (!access_size_max) {
578 access_size_max = 4;
579 }
ce5d2f33
PB		 580
581 /* FIXME: support unaligned access? */
164a4dcd
AK		 582 access_size = MAX(MIN(size, access_size_max), access_size_min);
583 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB		 584 if (memory_region_big_endian(mr)) {
585 for (i = 0; i < size; i += access_size) {
cc05c43a
PM		 586 r |= access(mr, addr + i, value, access_size,
587 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB		 588 }
589 } else {
590 for (i = 0; i < size; i += access_size) {
cc05c43a
PM		 591 r |= access(mr, addr + i, value, access_size, i * 8,
592 access_mask, attrs);
e7342aa3 593 }
164a4dcd 594 }
cc05c43a 595 return r;
164a4dcd
AK		 596}
597
e2177955
AK		 598static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
599{
0d673e36
AK		 600 AddressSpace *as;
601
feca4ac1
PB		 602 while (mr->container) {
603 mr = mr->container;
e2177955 604 }
0d673e36
AK		 605 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
606 if (mr == as->root) {
607 return as;
608 }
e2177955 609 }
eed2bacf 610 return NULL;
e2177955
AK		 611}
612
093bc2cd
AK		 613/* Render a memory region into the global view. Ranges in @view obscure
614 * ranges in @mr.
615 */
616static void render_memory_region(FlatView *view,
617 MemoryRegion *mr,
08dafab4 618 Int128 base,
fb1cd6f9
AK		 619 AddrRange clip,
620 bool readonly)
093bc2cd
AK		 621{
622 MemoryRegion *subregion;
623 unsigned i;
a8170e5e 624 hwaddr offset_in_region;
08dafab4
AK		 625 Int128 remain;
626 Int128 now;
093bc2cd
AK		 627 FlatRange fr;
628 AddrRange tmp;
629
6bba19ba
AK		 630 if (!mr->enabled) {
631 return;
632 }
633
08dafab4 634 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 635 readonly |= mr->readonly;
093bc2cd
AK		 636
637 tmp = addrrange_make(base, mr->size);
638
639 if (!addrrange_intersects(tmp, clip)) {
640 return;
641 }
642
643 clip = addrrange_intersection(tmp, clip);
644
645 if (mr->alias) {
08dafab4
AK		 646 int128_subfrom(&base, int128_make64(mr->alias->addr));
647 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 648 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK		 649 return;
650 }
651
652 /* Render subregions in priority order. */
653 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 654 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK		 655 }
656
14a3c10a 657 if (!mr->terminates) {
093bc2cd
AK		 658 return;
659 }
660
08dafab4 661 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK		 662 base = clip.start;
663 remain = clip.size;
664
2eb74e1a 665 fr.mr = mr;
6f6a5ef3 666 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 667 fr.romd_mode = mr->romd_mode;
2eb74e1a
PC		 668 fr.readonly = readonly;
669
093bc2cd 670 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK		 671 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
672 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK		 673 continue;
674 }
08dafab4
AK		 675 if (int128_lt(base, view->ranges[i].addr.start)) {
676 now = int128_min(remain,
677 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK		 678 fr.offset_in_region = offset_in_region;
679 fr.addr = addrrange_make(base, now);
680 flatview_insert(view, i, &fr);
681 ++i;
08dafab4
AK		 682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
093bc2cd 685 }
d26a8cae
AK		 686 now = int128_sub(int128_min(int128_add(base, remain),
687 addrrange_end(view->ranges[i].addr)),
688 base);
689 int128_addto(&base, now);
690 offset_in_region += int128_get64(now);
691 int128_subfrom(&remain, now);
093bc2cd 692 }
08dafab4 693 if (int128_nz(remain)) {
093bc2cd
AK		 694 fr.offset_in_region = offset_in_region;
695 fr.addr = addrrange_make(base, remain);
696 flatview_insert(view, i, &fr);
697 }
698}
699
700/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 701static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 702{
a9a0c06d 703 FlatView *view;
093bc2cd 704
a9a0c06d
PB		 705 view = g_new(FlatView, 1);
706 flatview_init(view);
093bc2cd 707
83f3c251 708 if (mr) {
a9a0c06d 709 render_memory_region(view, mr, int128_zero(),
83f3c251
AK		 710 addrrange_make(int128_zero(), int128_2_64()), false);
711 }
a9a0c06d 712 flatview_simplify(view);
093bc2cd
AK		 713
714 return view;
715}
716
3e9d69e7
AK		 717static void address_space_add_del_ioeventfds(AddressSpace *as,
718 MemoryRegionIoeventfd *fds_new,
719 unsigned fds_new_nb,
720 MemoryRegionIoeventfd *fds_old,
721 unsigned fds_old_nb)
722{
723 unsigned iold, inew;
80a1ea37
AK		 724 MemoryRegionIoeventfd *fd;
725 MemoryRegionSection section;
3e9d69e7
AK		 726
727 /* Generate a symmetric difference of the old and new fd sets, adding
728 * and deleting as necessary.
729 */
730
731 iold = inew = 0;
732 while (iold < fds_old_nb || inew < fds_new_nb) {
733 if (iold < fds_old_nb
734 && (inew == fds_new_nb
735 || memory_region_ioeventfd_before(fds_old[iold],
736 fds_new[inew]))) {
80a1ea37
AK		 737 fd = &fds_old[iold];
738 section = (MemoryRegionSection) {
f6790af6 739 .address_space = as,
80a1ea37 740 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 741 .size = fd->addr.size,
80a1ea37
AK		 742 };
743 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 744 fd->match_data, fd->data, fd->e);
3e9d69e7
AK		 745 ++iold;
746 } else if (inew < fds_new_nb
747 && (iold == fds_old_nb
748 || memory_region_ioeventfd_before(fds_new[inew],
749 fds_old[iold]))) {
80a1ea37
AK		 750 fd = &fds_new[inew];
751 section = (MemoryRegionSection) {
f6790af6 752 .address_space = as,
80a1ea37 753 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 754 .size = fd->addr.size,
80a1ea37
AK		 755 };
756 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 757 fd->match_data, fd->data, fd->e);
3e9d69e7
AK		 758 ++inew;
759 } else {
760 ++iold;
761 ++inew;
762 }
763 }
764}
765
856d7245
PB		 766static FlatView *address_space_get_flatview(AddressSpace *as)
767{
768 FlatView *view;
769
374f2981
PB		 770 rcu_read_lock();
771 view = atomic_rcu_read(&as->current_map);
856d7245 772 flatview_ref(view);
374f2981 773 rcu_read_unlock();
856d7245
PB		 774 return view;
775}
776
3e9d69e7
AK		 777static void address_space_update_ioeventfds(AddressSpace *as)
778{
99e86347 779 FlatView *view;
3e9d69e7
AK		 780 FlatRange *fr;
781 unsigned ioeventfd_nb = 0;
782 MemoryRegionIoeventfd *ioeventfds = NULL;
783 AddrRange tmp;
784 unsigned i;
785
856d7245 786 view = address_space_get_flatview(as);
99e86347 787 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK		 788 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
789 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK		 790 int128_sub(fr->addr.start,
791 int128_make64(fr->offset_in_region)));
3e9d69e7
AK		 792 if (addrrange_intersects(fr->addr, tmp)) {
793 ++ioeventfd_nb;
7267c094 794 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK		 795 ioeventfd_nb * sizeof(*ioeventfds));
796 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
797 ioeventfds[ioeventfd_nb-1].addr = tmp;
798 }
799 }
800 }
801
802 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
803 as->ioeventfds, as->ioeventfd_nb);
804
7267c094 805 g_free(as->ioeventfds);
3e9d69e7
AK		 806 as->ioeventfds = ioeventfds;
807 as->ioeventfd_nb = ioeventfd_nb;
856d7245 808 flatview_unref(view);
3e9d69e7
AK		 809}
810
b8af1afb 811static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB		 812 const FlatView *old_view,
813 const FlatView *new_view,
b8af1afb 814 bool adding)
093bc2cd 815{
093bc2cd
AK		 816 unsigned iold, inew;
817 FlatRange *frold, *frnew;
093bc2cd
AK		 818
819 /* Generate a symmetric difference of the old and new memory maps.
820 * Kill ranges in the old map, and instantiate ranges in the new map.
821 */
822 iold = inew = 0;
a9a0c06d
PB		 823 while (iold < old_view->nr || inew < new_view->nr) {
824 if (iold < old_view->nr) {
825 frold = &old_view->ranges[iold];
093bc2cd
AK		 826 } else {
827 frold = NULL;
828 }
a9a0c06d
PB		 829 if (inew < new_view->nr) {
830 frnew = &new_view->ranges[inew];
093bc2cd
AK		 831 } else {
832 frnew = NULL;
833 }
834
835 if (frold
836 && (!frnew
08dafab4
AK		 837 || int128_lt(frold->addr.start, frnew->addr.start)
838 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 839 && !flatrange_equal(frold, frnew)))) {
41a6e477 840 /* In old but not in new, or in both but attributes changed. */
093bc2cd 841
b8af1afb 842 if (!adding) {
72e22d2f 843 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK		 844 }
845
093bc2cd
AK		 846 ++iold;
847 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 848 /* In both and unchanged (except logging may have changed) */
093bc2cd 849
b8af1afb 850 if (adding) {
50c1e149 851 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB		 852 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
854 frold->dirty_log_mask,
855 frnew->dirty_log_mask);
856 }
857 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
858 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
859 frold->dirty_log_mask,
860 frnew->dirty_log_mask);
b8af1afb 861 }
5a583347
AK		 862 }
863
093bc2cd
AK		 864 ++iold;
865 ++inew;
093bc2cd
AK		 866 } else {
867 /* In new */
868
b8af1afb 869 if (adding) {
72e22d2f 870 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK		 871 }
872
093bc2cd
AK		 873 ++inew;
874 }
875 }
b8af1afb
AK		 876}
877
878
879static void address_space_update_topology(AddressSpace *as)
880{
856d7245 881 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 882 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK		 883
884 address_space_update_topology_pass(as, old_view, new_view, false);
885 address_space_update_topology_pass(as, old_view, new_view, true);
886
374f2981
PB		 887 /* Writes are protected by the BQL. */
888 atomic_rcu_set(&as->current_map, new_view);
889 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB		 890
891 /* Note that all the old MemoryRegions are still alive up to this
892 * point. This relieves most MemoryListeners from the need to
893 * ref/unref the MemoryRegions they get---unless they use them
894 * outside the iothread mutex, in which case precise reference
895 * counting is necessary.
896 */
897 flatview_unref(old_view);
898
3e9d69e7 899 address_space_update_ioeventfds(as);
093bc2cd
AK		 900}
901
4ef4db86
AK		 902void memory_region_transaction_begin(void)
903{
bb880ded 904 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK		 905 ++memory_region_transaction_depth;
906}
907
4dc56152
GA		 908static void memory_region_clear_pending(void)
909{
910 memory_region_update_pending = false;
911 ioeventfd_update_pending = false;
912}
913
4ef4db86
AK		 914void memory_region_transaction_commit(void)
915{
0d673e36
AK		 916 AddressSpace *as;
917
4ef4db86
AK		 918 assert(memory_region_transaction_depth);
919 --memory_region_transaction_depth;
4dc56152
GA		 920 if (!memory_region_transaction_depth) {
921 if (memory_region_update_pending) {
922 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 923
4dc56152
GA		 924 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
925 address_space_update_topology(as);
926 }
02e2b95f 927
4dc56152
GA		 928 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
929 } else if (ioeventfd_update_pending) {
930 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
931 address_space_update_ioeventfds(as);
932 }
933 }
934 memory_region_clear_pending();
935 }
4ef4db86
AK		 936}
937
545e92e0
AK		 938static void memory_region_destructor_none(MemoryRegion *mr)
939{
940}
941
942static void memory_region_destructor_ram(MemoryRegion *mr)
943{
f1060c55 944 qemu_ram_free(mr->ram_block);
545e92e0
AK		 945}
946
b4fefef9
PC		 947static bool memory_region_need_escape(char c)
948{
949 return c == '/' || c == '[' || c == '\\' || c == ']';
950}
951
952static char *memory_region_escape_name(const char *name)
953{
954 const char *p;
955 char *escaped, *q;
956 uint8_t c;
957 size_t bytes = 0;
958
959 for (p = name; *p; p++) {
960 bytes += memory_region_need_escape(*p) ? 4 : 1;
961 }
962 if (bytes == p - name) {
963 return g_memdup(name, bytes + 1);
964 }
965
966 escaped = g_malloc(bytes + 1);
967 for (p = name, q = escaped; *p; p++) {
968 c = *p;
969 if (unlikely(memory_region_need_escape(c))) {
970 *q++ = '\\';
971 *q++ = 'x';
972 *q++ = "0123456789abcdef"[c >> 4];
973 c = "0123456789abcdef"[c & 15];
974 }
975 *q++ = c;
976 }
977 *q = 0;
978 return escaped;
979}
980
093bc2cd 981void memory_region_init(MemoryRegion *mr,
2c9b15ca 982 Object *owner,
093bc2cd
AK		 983 const char *name,
984 uint64_t size)
985{
22a893e4 986 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK		 987 mr->size = int128_make64(size);
988 if (size == UINT64_MAX) {
989 mr->size = int128_2_64();
990 }
302fa283 991 mr->name = g_strdup(name);
612263cf 992 mr->owner = owner;
58eaa217 993 mr->ram_block = NULL;
b4fefef9
PC		 994
995 if (name) {
843ef73a
PC		 996 char *escaped_name = memory_region_escape_name(name);
997 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB		 998
999 if (!owner) {
1000 owner = container_get(qdev_get_machine(), "/unattached");
1001 }
1002
843ef73a 1003 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 1004 object_unref(OBJECT(mr));
843ef73a
PC		 1005 g_free(name_array);
1006 g_free(escaped_name);
b4fefef9
PC		 1007 }
1008}
1009
d7bce999
EB		 1010static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1011 void *opaque, Error **errp)
409ddd01
PC		 1012{
1013 MemoryRegion *mr = MEMORY_REGION(obj);
1014 uint64_t value = mr->addr;
1015
51e72bc1 1016 visit_type_uint64(v, name, &value, errp);
409ddd01
PC		 1017}
1018
d7bce999
EB		 1019static void memory_region_get_container(Object *obj, Visitor *v,
1020 const char *name, void *opaque,
1021 Error **errp)
409ddd01
PC		 1022{
1023 MemoryRegion *mr = MEMORY_REGION(obj);
1024 gchar *path = (gchar *)"";
1025
1026 if (mr->container) {
1027 path = object_get_canonical_path(OBJECT(mr->container));
1028 }
51e72bc1 1029 visit_type_str(v, name, &path, errp);
409ddd01
PC		 1030 if (mr->container) {
1031 g_free(path);
1032 }
1033}
1034
1035static Object *memory_region_resolve_container(Object *obj, void *opaque,
1036 const char *part)
1037{
1038 MemoryRegion *mr = MEMORY_REGION(obj);
1039
1040 return OBJECT(mr->container);
1041}
1042
d7bce999
EB		 1043static void memory_region_get_priority(Object *obj, Visitor *v,
1044 const char *name, void *opaque,
1045 Error **errp)
d33382da
PC		 1046{
1047 MemoryRegion *mr = MEMORY_REGION(obj);
1048 int32_t value = mr->priority;
1049
51e72bc1 1050 visit_type_int32(v, name, &value, errp);
d33382da
PC		 1051}
1052
d7bce999
EB		 1053static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1054 void *opaque, Error **errp)
52aef7bb
PC		 1055{
1056 MemoryRegion *mr = MEMORY_REGION(obj);
1057 uint64_t value = memory_region_size(mr);
1058
51e72bc1 1059 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC		 1060}
1061
b4fefef9
PC		 1062static void memory_region_initfn(Object *obj)
1063{
1064 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1065 ObjectProperty *op;
b4fefef9
PC		 1066
1067 mr->ops = &unassigned_mem_ops;
6bba19ba 1068 mr->enabled = true;
5f9a5ea1 1069 mr->romd_mode = true;
196ea131 1070 mr->global_locking = true;
545e92e0 1071 mr->destructor = memory_region_destructor_none;
093bc2cd 1072 QTAILQ_INIT(&mr->subregions);
093bc2cd 1073 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC		 1074
1075 op = object_property_add(OBJECT(mr), "container",
1076 "link<" TYPE_MEMORY_REGION ">",
1077 memory_region_get_container,
1078 NULL, /* memory_region_set_container */
1079 NULL, NULL, &error_abort);
1080 op->resolve = memory_region_resolve_container;
1081
1082 object_property_add(OBJECT(mr), "addr", "uint64",
1083 memory_region_get_addr,
1084 NULL, /* memory_region_set_addr */
1085 NULL, NULL, &error_abort);
d33382da
PC		 1086 object_property_add(OBJECT(mr), "priority", "uint32",
1087 memory_region_get_priority,
1088 NULL, /* memory_region_set_priority */
1089 NULL, NULL, &error_abort);
52aef7bb
PC		 1090 object_property_add(OBJECT(mr), "size", "uint64",
1091 memory_region_get_size,
1092 NULL, /* memory_region_set_size, */
1093 NULL, NULL, &error_abort);
093bc2cd
AK		 1094}
1095
b018ddf6
PB		 1096static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1097 unsigned size)
1098{
1099#ifdef DEBUG_UNASSIGNED
1100 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1101#endif
4917cf44
AF		 1102 if (current_cpu != NULL) {
1103 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1104 }
68a7439a 1105 return 0;
b018ddf6
PB		 1106}
1107
1108static void unassigned_mem_write(void *opaque, hwaddr addr,
1109 uint64_t val, unsigned size)
1110{
1111#ifdef DEBUG_UNASSIGNED
1112 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1113#endif
4917cf44
AF		 1114 if (current_cpu != NULL) {
1115 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1116 }
b018ddf6
PB		 1117}
1118
d197063f
PB		 1119static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1120 unsigned size, bool is_write)
1121{
1122 return false;
1123}
1124
1125const MemoryRegionOps unassigned_mem_ops = {
1126 .valid.accepts = unassigned_mem_accepts,
1127 .endianness = DEVICE_NATIVE_ENDIAN,
1128};
1129
d2702032
PB		 1130bool memory_region_access_valid(MemoryRegion *mr,
1131 hwaddr addr,
1132 unsigned size,
1133 bool is_write)
093bc2cd 1134{
a014ed07
PB		 1135 int access_size_min, access_size_max;
1136 int access_size, i;
897fa7cf 1137
093bc2cd
AK		 1138 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1139 return false;
1140 }
1141
a014ed07 1142 if (!mr->ops->valid.accepts) {
093bc2cd
AK		 1143 return true;
1144 }
1145
a014ed07
PB		 1146 access_size_min = mr->ops->valid.min_access_size;
1147 if (!mr->ops->valid.min_access_size) {
1148 access_size_min = 1;
1149 }
1150
1151 access_size_max = mr->ops->valid.max_access_size;
1152 if (!mr->ops->valid.max_access_size) {
1153 access_size_max = 4;
1154 }
1155
1156 access_size = MAX(MIN(size, access_size_max), access_size_min);
1157 for (i = 0; i < size; i += access_size) {
1158 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1159 is_write)) {
1160 return false;
1161 }
093bc2cd 1162 }
a014ed07 1163
093bc2cd
AK		 1164 return true;
1165}
1166
cc05c43a
PM		 1167static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1168 hwaddr addr,
1169 uint64_t *pval,
1170 unsigned size,
1171 MemTxAttrs attrs)
093bc2cd 1172{
cc05c43a 1173 *pval = 0;
093bc2cd 1174
ce5d2f33 1175 if (mr->ops->read) {
cc05c43a
PM		 1176 return access_with_adjusted_size(addr, pval, size,
1177 mr->ops->impl.min_access_size,
1178 mr->ops->impl.max_access_size,
1179 memory_region_read_accessor,
1180 mr, attrs);
1181 } else if (mr->ops->read_with_attrs) {
1182 return access_with_adjusted_size(addr, pval, size,
1183 mr->ops->impl.min_access_size,
1184 mr->ops->impl.max_access_size,
1185 memory_region_read_with_attrs_accessor,
1186 mr, attrs);
ce5d2f33 1187 } else {
cc05c43a
PM		 1188 return access_with_adjusted_size(addr, pval, size, 1, 4,
1189 memory_region_oldmmio_read_accessor,
1190 mr, attrs);
74901c3b 1191 }
093bc2cd
AK		 1192}
1193
3b643495
PM		 1194MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1195 hwaddr addr,
1196 uint64_t *pval,
1197 unsigned size,
1198 MemTxAttrs attrs)
a621f38d 1199{
cc05c43a
PM		 1200 MemTxResult r;
1201
791af8c8
PB		 1202 if (!memory_region_access_valid(mr, addr, size, false)) {
1203 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1204 return MEMTX_DECODE_ERROR;
791af8c8 1205 }
a621f38d 1206
cc05c43a 1207 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1208 adjust_endianness(mr, pval, size);
cc05c43a 1209 return r;
a621f38d 1210}
093bc2cd 1211
8c56c1a5
PF		 1212/* Return true if an eventfd was signalled */
1213static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1214 hwaddr addr,
1215 uint64_t data,
1216 unsigned size,
1217 MemTxAttrs attrs)
1218{
1219 MemoryRegionIoeventfd ioeventfd = {
1220 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1221 .data = data,
1222 };
1223 unsigned i;
1224
1225 for (i = 0; i < mr->ioeventfd_nb; i++) {
1226 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1227 ioeventfd.e = mr->ioeventfds[i].e;
1228
1229 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1230 event_notifier_set(ioeventfd.e);
1231 return true;
1232 }
1233 }
1234
1235 return false;
1236}
1237
3b643495
PM		 1238MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1239 hwaddr addr,
1240 uint64_t data,
1241 unsigned size,
1242 MemTxAttrs attrs)
a621f38d 1243{
897fa7cf 1244 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1245 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1246 return MEMTX_DECODE_ERROR;
093bc2cd
AK		 1247 }
1248
a621f38d
AK		 1249 adjust_endianness(mr, &data, size);
1250
8c56c1a5
PF		 1251 if ((!kvm_eventfds_enabled()) &&
1252 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1253 return MEMTX_OK;
1254 }
1255
ce5d2f33 1256 if (mr->ops->write) {
cc05c43a
PM		 1257 return access_with_adjusted_size(addr, &data, size,
1258 mr->ops->impl.min_access_size,
1259 mr->ops->impl.max_access_size,
1260 memory_region_write_accessor, mr,
1261 attrs);
1262 } else if (mr->ops->write_with_attrs) {
1263 return
1264 access_with_adjusted_size(addr, &data, size,
1265 mr->ops->impl.min_access_size,
1266 mr->ops->impl.max_access_size,
1267 memory_region_write_with_attrs_accessor,
1268 mr, attrs);
ce5d2f33 1269 } else {
cc05c43a
PM		 1270 return access_with_adjusted_size(addr, &data, size, 1, 4,
1271 memory_region_oldmmio_write_accessor,
1272 mr, attrs);
74901c3b 1273 }
093bc2cd
AK		 1274}
1275
093bc2cd 1276void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1277 Object *owner,
093bc2cd
AK		 1278 const MemoryRegionOps *ops,
1279 void *opaque,
1280 const char *name,
1281 uint64_t size)
1282{
2c9b15ca 1283 memory_region_init(mr, owner, name, size);
6d6d2abf 1284 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1285 mr->opaque = opaque;
14a3c10a 1286 mr->terminates = true;
093bc2cd
AK		 1287}
1288
1289void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1290 Object *owner,
093bc2cd 1291 const char *name,
49946538
HT		 1292 uint64_t size,
1293 Error **errp)
093bc2cd 1294{
2c9b15ca 1295 memory_region_init(mr, owner, name, size);
8ea9252a 1296 mr->ram = true;
14a3c10a 1297 mr->terminates = true;
545e92e0 1298 mr->destructor = memory_region_destructor_ram;
8e41fb63 1299 mr->ram_block = qemu_ram_alloc(size, mr, errp);
677e7805 1300 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB		 1301}
1302
60786ef3
MT		 1303void memory_region_init_resizeable_ram(MemoryRegion *mr,
1304 Object *owner,
1305 const char *name,
1306 uint64_t size,
1307 uint64_t max_size,
1308 void (*resized)(const char*,
1309 uint64_t length,
1310 void *host),
1311 Error **errp)
1312{
1313 memory_region_init(mr, owner, name, size);
1314 mr->ram = true;
1315 mr->terminates = true;
1316 mr->destructor = memory_region_destructor_ram;
8e41fb63
FZ		 1317 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1318 mr, errp);
677e7805 1319 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT		 1320}
1321
0b183fc8
PB		 1322#ifdef __linux__
1323void memory_region_init_ram_from_file(MemoryRegion *mr,
1324 struct Object *owner,
1325 const char *name,
1326 uint64_t size,
dbcb8981 1327 bool share,
7f56e740
PB		 1328 const char *path,
1329 Error **errp)
0b183fc8
PB		 1330{
1331 memory_region_init(mr, owner, name, size);
1332 mr->ram = true;
1333 mr->terminates = true;
1334 mr->destructor = memory_region_destructor_ram;
8e41fb63 1335 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1336 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1337}
0b183fc8 1338#endif
093bc2cd
AK		 1339
1340void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1341 Object *owner,
093bc2cd
AK		 1342 const char *name,
1343 uint64_t size,
1344 void *ptr)
1345{
2c9b15ca 1346 memory_region_init(mr, owner, name, size);
8ea9252a 1347 mr->ram = true;
14a3c10a 1348 mr->terminates = true;
fc3e7665 1349 mr->destructor = memory_region_destructor_ram;
677e7805 1350 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT		 1351
1352 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1353 assert(ptr != NULL);
8e41fb63 1354 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK		 1355}
1356
e4dc3f59
ND		 1357void memory_region_set_skip_dump(MemoryRegion *mr)
1358{
1359 mr->skip_dump = true;
1360}
1361
093bc2cd 1362void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1363 Object *owner,
093bc2cd
AK		 1364 const char *name,
1365 MemoryRegion *orig,
a8170e5e 1366 hwaddr offset,
093bc2cd
AK		 1367 uint64_t size)
1368{
2c9b15ca 1369 memory_region_init(mr, owner, name, size);
093bc2cd
AK		 1370 mr->alias = orig;
1371 mr->alias_offset = offset;
1372}
1373
a1777f7f
PM		 1374void memory_region_init_rom(MemoryRegion *mr,
1375 struct Object *owner,
1376 const char *name,
1377 uint64_t size,
1378 Error **errp)
1379{
1380 memory_region_init(mr, owner, name, size);
1381 mr->ram = true;
1382 mr->readonly = true;
1383 mr->terminates = true;
1384 mr->destructor = memory_region_destructor_ram;
1385 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1386 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1387}
1388
d0a9b5bc 1389void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1390 Object *owner,
d0a9b5bc 1391 const MemoryRegionOps *ops,
75f5941c 1392 void *opaque,
d0a9b5bc 1393 const char *name,
33e0eb52
HT		 1394 uint64_t size,
1395 Error **errp)
d0a9b5bc 1396{
39e0b03d 1397 assert(ops);
2c9b15ca 1398 memory_region_init(mr, owner, name, size);
7bc2b9cd 1399 mr->ops = ops;
75f5941c 1400 mr->opaque = opaque;
d0a9b5bc 1401 mr->terminates = true;
75c578dc 1402 mr->rom_device = true;
58268c8d 1403 mr->destructor = memory_region_destructor_ram;
8e41fb63 1404 mr->ram_block = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK		 1405}
1406
30951157 1407void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1408 Object *owner,
30951157
AK		 1409 const MemoryRegionIOMMUOps *ops,
1410 const char *name,
1411 uint64_t size)
1412{
2c9b15ca 1413 memory_region_init(mr, owner, name, size);
30951157
AK		 1414 mr->iommu_ops = ops,
1415 mr->terminates = true; /* then re-forwards */
cdb30812 1416 QLIST_INIT(&mr->iommu_notify);
30951157
AK		 1417}
1418
b4fefef9 1419static void memory_region_finalize(Object *obj)
093bc2cd 1420{
b4fefef9
PC		 1421 MemoryRegion *mr = MEMORY_REGION(obj);
1422
2e2b8eb7
PB		 1423 assert(!mr->container);
1424
1425 /* We know the region is not visible in any address space (it
1426 * does not have a container and cannot be a root either because
1427 * it has no references, so we can blindly clear mr->enabled.
1428 * memory_region_set_enabled instead could trigger a transaction
1429 * and cause an infinite loop.
1430 */
1431 mr->enabled = false;
1432 memory_region_transaction_begin();
1433 while (!QTAILQ_EMPTY(&mr->subregions)) {
1434 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1435 memory_region_del_subregion(mr, subregion);
1436 }
1437 memory_region_transaction_commit();
1438
545e92e0 1439 mr->destructor(mr);
093bc2cd 1440 memory_region_clear_coalescing(mr);
302fa283 1441 g_free((char *)mr->name);
7267c094 1442 g_free(mr->ioeventfds);
093bc2cd
AK		 1443}
1444
803c0816
PB		 1445Object *memory_region_owner(MemoryRegion *mr)
1446{
22a893e4
PB		 1447 Object *obj = OBJECT(mr);
1448 return obj->parent;
803c0816
PB		 1449}
1450
46637be2
PB		 1451void memory_region_ref(MemoryRegion *mr)
1452{
22a893e4
PB		 1453 /* MMIO callbacks most likely will access data that belongs
1454 * to the owner, hence the need to ref/unref the owner whenever
1455 * the memory region is in use.
1456 *
1457 * The memory region is a child of its owner. As long as the
1458 * owner doesn't call unparent itself on the memory region,
1459 * ref-ing the owner will also keep the memory region alive.
612263cf
PB		 1460 * Memory regions without an owner are supposed to never go away;
1461 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1462 */
612263cf
PB		 1463 if (mr && mr->owner) {
1464 object_ref(mr->owner);
46637be2
PB		 1465 }
1466}
1467
1468void memory_region_unref(MemoryRegion *mr)
1469{
612263cf
PB		 1470 if (mr && mr->owner) {
1471 object_unref(mr->owner);
46637be2
PB		 1472 }
1473}
1474
093bc2cd
AK		 1475uint64_t memory_region_size(MemoryRegion *mr)
1476{
08dafab4
AK		 1477 if (int128_eq(mr->size, int128_2_64())) {
1478 return UINT64_MAX;
1479 }
1480 return int128_get64(mr->size);
093bc2cd
AK		 1481}
1482
5d546d4b 1483const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1484{
d1dd32af
PC		 1485 if (!mr->name) {
1486 ((MemoryRegion *)mr)->name =
1487 object_get_canonical_path_component(OBJECT(mr));
1488 }
302fa283 1489 return mr->name;
8991c79b
AK		 1490}
1491
e4dc3f59
ND		 1492bool memory_region_is_skip_dump(MemoryRegion *mr)
1493{
1494 return mr->skip_dump;
1495}
1496
2d1a35be 1497uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1498{
6f6a5ef3
PB		 1499 uint8_t mask = mr->dirty_log_mask;
1500 if (global_dirty_log) {
1501 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1502 }
1503 return mask;
55043ba3
AK		 1504}
1505
2d1a35be
PB		 1506bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1507{
1508 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1509}
1510
cdb30812
PX		 1511void memory_region_register_iommu_notifier(MemoryRegion *mr,
1512 IOMMUNotifier *n)
06866575 1513{
cdb30812
PX		 1514 /* We need to register for at least one bitfield */
1515 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
d22d8956 1516 if (mr->iommu_ops->notify_started &&
cdb30812 1517 QLIST_EMPTY(&mr->iommu_notify)) {
d22d8956
AK		 1518 mr->iommu_ops->notify_started(mr);
1519 }
cdb30812 1520 QLIST_INSERT_HEAD(&mr->iommu_notify, n, node);
06866575
DG		 1521}
1522
f682e9c2 1523uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
a788f227 1524{
f682e9c2
AK		 1525 assert(memory_region_is_iommu(mr));
1526 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1527 return mr->iommu_ops->get_min_page_size(mr);
1528 }
1529 return TARGET_PAGE_SIZE;
1530}
1531
cdb30812
PX		 1532void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n,
1533 bool is_write)
f682e9c2
AK		 1534{
1535 hwaddr addr, granularity;
a788f227
DG		 1536 IOMMUTLBEntry iotlb;
1537
f682e9c2
AK		 1538 granularity = memory_region_iommu_get_min_page_size(mr);
1539
a788f227
DG		 1540 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1541 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1542 if (iotlb.perm != IOMMU_NONE) {
1543 n->notify(n, &iotlb);
1544 }
1545
1546 /* if (2^64 - MR size) < granularity, it's possible to get an
1547 * infinite loop here. This should catch such a wraparound */
1548 if ((addr + granularity) < addr) {
1549 break;
1550 }
1551 }
1552}
1553
cdb30812
PX		 1554void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1555 IOMMUNotifier *n)
06866575 1556{
cdb30812 1557 QLIST_REMOVE(n, node);
d22d8956 1558 if (mr->iommu_ops->notify_stopped &&
cdb30812 1559 QLIST_EMPTY(&mr->iommu_notify)) {
d22d8956
AK		 1560 mr->iommu_ops->notify_stopped(mr);
1561 }
06866575
DG		 1562}
1563
1564void memory_region_notify_iommu(MemoryRegion *mr,
1565 IOMMUTLBEntry entry)
1566{
cdb30812
PX		 1567 IOMMUNotifier *iommu_notifier;
1568 IOMMUNotifierFlag request_flags;
1569
06866575 1570 assert(memory_region_is_iommu(mr));
cdb30812
PX		 1571
1572 if (entry.perm & IOMMU_RW) {
1573 request_flags = IOMMU_NOTIFIER_MAP;
1574 } else {
1575 request_flags = IOMMU_NOTIFIER_UNMAP;
1576 }
1577
1578 QLIST_FOREACH(iommu_notifier, &mr->iommu_notify, node) {
1579 if (iommu_notifier->notifier_flags & request_flags) {
1580 iommu_notifier->notify(iommu_notifier, &entry);
1581 }
1582 }
06866575
DG		 1583}
1584
093bc2cd
AK		 1585void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1586{
5a583347 1587 uint8_t mask = 1 << client;
deb809ed 1588 uint8_t old_logging;
5a583347 1589
dbddac6d 1590 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB		 1591 old_logging = mr->vga_logging_count;
1592 mr->vga_logging_count += log ? 1 : -1;
1593 if (!!old_logging == !!mr->vga_logging_count) {
1594 return;
1595 }
1596
59023ef4 1597 memory_region_transaction_begin();
5a583347 1598 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1599 memory_region_update_pending |= mr->enabled;
59023ef4 1600 memory_region_transaction_commit();
093bc2cd
AK		 1601}
1602
a8170e5e
AK		 1603bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1604 hwaddr size, unsigned client)
093bc2cd 1605{
8e41fb63
FZ		 1606 assert(mr->ram_block);
1607 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1608 size, client);
093bc2cd
AK		 1609}
1610
a8170e5e
AK		 1611void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1612 hwaddr size)
093bc2cd 1613{
8e41fb63
FZ		 1614 assert(mr->ram_block);
1615 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1616 size,
58d2707e 1617 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK		 1618}
1619
6c279db8
JQ		 1620bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1621 hwaddr size, unsigned client)
1622{
8e41fb63
FZ		 1623 assert(mr->ram_block);
1624 return cpu_physical_memory_test_and_clear_dirty(
1625 memory_region_get_ram_addr(mr) + addr, size, client);
6c279db8
JQ		 1626}
1627
1628
093bc2cd
AK		 1629void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1630{
0d673e36 1631 AddressSpace *as;
5a583347
AK		 1632 FlatRange *fr;
1633
0d673e36 1634 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1635 FlatView *view = address_space_get_flatview(as);
99e86347 1636 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK		 1637 if (fr->mr == mr) {
1638 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1639 }
5a583347 1640 }
856d7245 1641 flatview_unref(view);
5a583347 1642 }
093bc2cd
AK		 1643}
1644
1645void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1646{
fb1cd6f9 1647 if (mr->readonly != readonly) {
59023ef4 1648 memory_region_transaction_begin();
fb1cd6f9 1649 mr->readonly = readonly;
22bde714 1650 memory_region_update_pending |= mr->enabled;
59023ef4 1651 memory_region_transaction_commit();
fb1cd6f9 1652 }
093bc2cd
AK		 1653}
1654
5f9a5ea1 1655void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1656{
5f9a5ea1 1657 if (mr->romd_mode != romd_mode) {
59023ef4 1658 memory_region_transaction_begin();
5f9a5ea1 1659 mr->romd_mode = romd_mode;
22bde714 1660 memory_region_update_pending |= mr->enabled;
59023ef4 1661 memory_region_transaction_commit();
d0a9b5bc
AK		 1662 }
1663}
1664
a8170e5e
AK		 1665void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1666 hwaddr size, unsigned client)
093bc2cd 1667{
8e41fb63
FZ		 1668 assert(mr->ram_block);
1669 cpu_physical_memory_test_and_clear_dirty(
1670 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK		 1671}
1672
a35ba7be
PB		 1673int memory_region_get_fd(MemoryRegion *mr)
1674{
4ff87573
PB		 1675 int fd;
1676
1677 rcu_read_lock();
1678 while (mr->alias) {
1679 mr = mr->alias;
a35ba7be 1680 }
4ff87573
PB		 1681 fd = mr->ram_block->fd;
1682 rcu_read_unlock();
a35ba7be 1683
4ff87573
PB		 1684 return fd;
1685}
a35ba7be 1686
4ff87573
PB		 1687void memory_region_set_fd(MemoryRegion *mr, int fd)
1688{
1689 rcu_read_lock();
1690 while (mr->alias) {
1691 mr = mr->alias;
1692 }
1693 mr->ram_block->fd = fd;
1694 rcu_read_unlock();
a35ba7be
PB		 1695}
1696
093bc2cd
AK		 1697void *memory_region_get_ram_ptr(MemoryRegion *mr)
1698{
49b24afc
PB		 1699 void *ptr;
1700 uint64_t offset = 0;
093bc2cd 1701
49b24afc
PB		 1702 rcu_read_lock();
1703 while (mr->alias) {
1704 offset += mr->alias_offset;
1705 mr = mr->alias;
1706 }
8e41fb63 1707 assert(mr->ram_block);
0878d0e1 1708 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
49b24afc 1709 rcu_read_unlock();
093bc2cd 1710
0878d0e1 1711 return ptr;
093bc2cd
AK		 1712}
1713
07bdaa41
PB		 1714MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1715{
1716 RAMBlock *block;
1717
1718 block = qemu_ram_block_from_host(ptr, false, offset);
1719 if (!block) {
1720 return NULL;
1721 }
1722
1723 return block->mr;
1724}
1725
7ebb2745
FZ		 1726ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1727{
1728 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1729}
1730
37d7c084
PB		 1731void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1732{
8e41fb63 1733 assert(mr->ram_block);
37d7c084 1734
fa53a0e5 1735 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB		 1736}
1737
0d673e36 1738static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1739{
99e86347 1740 FlatView *view;
093bc2cd
AK		 1741 FlatRange *fr;
1742 CoalescedMemoryRange *cmr;
1743 AddrRange tmp;
95d2994a 1744 MemoryRegionSection section;
093bc2cd 1745
856d7245 1746 view = address_space_get_flatview(as);
99e86347 1747 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1748 if (fr->mr == mr) {
95d2994a 1749 section = (MemoryRegionSection) {
f6790af6 1750 .address_space = as,
95d2994a 1751 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1752 .size = fr->addr.size,
95d2994a
AK		 1753 };
1754
1755 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1756 int128_get64(fr->addr.start),
1757 int128_get64(fr->addr.size));
093bc2cd
AK		 1758 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1759 tmp = addrrange_shift(cmr->addr,
08dafab4
AK		 1760 int128_sub(fr->addr.start,
1761 int128_make64(fr->offset_in_region)));
093bc2cd
AK		 1762 if (!addrrange_intersects(tmp, fr->addr)) {
1763 continue;
1764 }
1765 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK		 1766 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1767 int128_get64(tmp.start),
1768 int128_get64(tmp.size));
093bc2cd
AK		 1769 }
1770 }
1771 }
856d7245 1772 flatview_unref(view);
093bc2cd
AK		 1773}
1774
0d673e36
AK		 1775static void memory_region_update_coalesced_range(MemoryRegion *mr)
1776{
1777 AddressSpace *as;
1778
1779 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1780 memory_region_update_coalesced_range_as(mr, as);
1781 }
1782}
1783
093bc2cd
AK		 1784void memory_region_set_coalescing(MemoryRegion *mr)
1785{
1786 memory_region_clear_coalescing(mr);
08dafab4 1787 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK		 1788}
1789
1790void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1791 hwaddr offset,
093bc2cd
AK		 1792 uint64_t size)
1793{
7267c094 1794 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1795
08dafab4 1796 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK		 1797 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1798 memory_region_update_coalesced_range(mr);
d410515e 1799 memory_region_set_flush_coalesced(mr);
093bc2cd
AK		 1800}
1801
1802void memory_region_clear_coalescing(MemoryRegion *mr)
1803{
1804 CoalescedMemoryRange *cmr;
ab5b3db5 1805 bool updated = false;
093bc2cd 1806
d410515e
JK		 1807 qemu_flush_coalesced_mmio_buffer();
1808 mr->flush_coalesced_mmio = false;
1809
093bc2cd
AK		 1810 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1811 cmr = QTAILQ_FIRST(&mr->coalesced);
1812 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1813 g_free(cmr);
ab5b3db5
FZ		 1814 updated = true;
1815 }
1816
1817 if (updated) {
1818 memory_region_update_coalesced_range(mr);
093bc2cd 1819 }
093bc2cd
AK		 1820}
1821
d410515e
JK		 1822void memory_region_set_flush_coalesced(MemoryRegion *mr)
1823{
1824 mr->flush_coalesced_mmio = true;
1825}
1826
1827void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1828{
1829 qemu_flush_coalesced_mmio_buffer();
1830 if (QTAILQ_EMPTY(&mr->coalesced)) {
1831 mr->flush_coalesced_mmio = false;
1832 }
1833}
1834
196ea131
JK		 1835void memory_region_set_global_locking(MemoryRegion *mr)
1836{
1837 mr->global_locking = true;
1838}
1839
1840void memory_region_clear_global_locking(MemoryRegion *mr)
1841{
1842 mr->global_locking = false;
1843}
1844
8c56c1a5
PF		 1845static bool userspace_eventfd_warning;
1846
3e9d69e7 1847void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1848 hwaddr addr,
3e9d69e7
AK		 1849 unsigned size,
1850 bool match_data,
1851 uint64_t data,
753d5e14 1852 EventNotifier *e)
3e9d69e7
AK		 1853{
1854 MemoryRegionIoeventfd mrfd = {
08dafab4
AK		 1855 .addr.start = int128_make64(addr),
1856 .addr.size = int128_make64(size),
3e9d69e7
AK		 1857 .match_data = match_data,
1858 .data = data,
753d5e14 1859 .e = e,
3e9d69e7
AK		 1860 };
1861 unsigned i;
1862
8c56c1a5
PF		 1863 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1864 userspace_eventfd_warning))) {
1865 userspace_eventfd_warning = true;
1866 error_report("Using eventfd without MMIO binding in KVM. "
1867 "Suboptimal performance expected");
1868 }
1869
b8aecea2
JW		 1870 if (size) {
1871 adjust_endianness(mr, &mrfd.data, size);
1872 }
59023ef4 1873 memory_region_transaction_begin();
3e9d69e7
AK		 1874 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1875 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1876 break;
1877 }
1878 }
1879 ++mr->ioeventfd_nb;
7267c094 1880 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK		 1881 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1882 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1883 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1884 mr->ioeventfds[i] = mrfd;
4dc56152 1885 ioeventfd_update_pending |= mr->enabled;
59023ef4 1886 memory_region_transaction_commit();
3e9d69e7
AK		 1887}
1888
1889void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1890 hwaddr addr,
3e9d69e7
AK		 1891 unsigned size,
1892 bool match_data,
1893 uint64_t data,
753d5e14 1894 EventNotifier *e)
3e9d69e7
AK		 1895{
1896 MemoryRegionIoeventfd mrfd = {
08dafab4
AK		 1897 .addr.start = int128_make64(addr),
1898 .addr.size = int128_make64(size),
3e9d69e7
AK		 1899 .match_data = match_data,
1900 .data = data,
753d5e14 1901 .e = e,
3e9d69e7
AK		 1902 };
1903 unsigned i;
1904
b8aecea2
JW		 1905 if (size) {
1906 adjust_endianness(mr, &mrfd.data, size);
1907 }
59023ef4 1908 memory_region_transaction_begin();
3e9d69e7
AK		 1909 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1910 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1911 break;
1912 }
1913 }
1914 assert(i != mr->ioeventfd_nb);
1915 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1916 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1917 --mr->ioeventfd_nb;
7267c094 1918 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1919 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1920 ioeventfd_update_pending |= mr->enabled;
59023ef4 1921 memory_region_transaction_commit();
3e9d69e7
AK		 1922}
1923
feca4ac1 1924static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1925{
feca4ac1 1926 MemoryRegion *mr = subregion->container;
093bc2cd
AK		 1927 MemoryRegion *other;
1928
59023ef4
JK		 1929 memory_region_transaction_begin();
1930
dfde4e6e 1931 memory_region_ref(subregion);
093bc2cd
AK		 1932 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1933 if (subregion->priority >= other->priority) {
1934 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1935 goto done;
1936 }
1937 }
1938 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1939done:
22bde714 1940 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1941 memory_region_transaction_commit();
093bc2cd
AK		 1942}
1943
0598701a
PC		 1944static void memory_region_add_subregion_common(MemoryRegion *mr,
1945 hwaddr offset,
1946 MemoryRegion *subregion)
1947{
feca4ac1
PB		 1948 assert(!subregion->container);
1949 subregion->container = mr;
0598701a 1950 subregion->addr = offset;
feca4ac1 1951 memory_region_update_container_subregions(subregion);
0598701a 1952}
093bc2cd
AK		 1953
1954void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1955 hwaddr offset,
093bc2cd
AK		 1956 MemoryRegion *subregion)
1957{
093bc2cd
AK		 1958 subregion->priority = 0;
1959 memory_region_add_subregion_common(mr, offset, subregion);
1960}
1961
1962void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1963 hwaddr offset,
093bc2cd 1964 MemoryRegion *subregion,
a1ff8ae0 1965 int priority)
093bc2cd 1966{
093bc2cd
AK		 1967 subregion->priority = priority;
1968 memory_region_add_subregion_common(mr, offset, subregion);
1969}
1970
1971void memory_region_del_subregion(MemoryRegion *mr,
1972 MemoryRegion *subregion)
1973{
59023ef4 1974 memory_region_transaction_begin();
feca4ac1
PB		 1975 assert(subregion->container == mr);
1976 subregion->container = NULL;
093bc2cd 1977 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1978 memory_region_unref(subregion);
22bde714 1979 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1980 memory_region_transaction_commit();
6bba19ba
AK		 1981}
1982
1983void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1984{
1985 if (enabled == mr->enabled) {
1986 return;
1987 }
59023ef4 1988 memory_region_transaction_begin();
6bba19ba 1989 mr->enabled = enabled;
22bde714 1990 memory_region_update_pending = true;
59023ef4 1991 memory_region_transaction_commit();
093bc2cd 1992}
1c0ffa58 1993
e7af4c67
MT		 1994void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1995{
1996 Int128 s = int128_make64(size);
1997
1998 if (size == UINT64_MAX) {
1999 s = int128_2_64();
2000 }
2001 if (int128_eq(s, mr->size)) {
2002 return;
2003 }
2004 memory_region_transaction_begin();
2005 mr->size = s;
2006 memory_region_update_pending = true;
2007 memory_region_transaction_commit();
2008}
2009
67891b8a 2010static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 2011{
feca4ac1 2012 MemoryRegion *container = mr->container;
2282e1af 2013
feca4ac1 2014 if (container) {
67891b8a
PC		 2015 memory_region_transaction_begin();
2016 memory_region_ref(mr);
feca4ac1
PB		 2017 memory_region_del_subregion(container, mr);
2018 mr->container = container;
2019 memory_region_update_container_subregions(mr);
67891b8a
PC		 2020 memory_region_unref(mr);
2021 memory_region_transaction_commit();
2282e1af 2022 }
67891b8a 2023}
2282e1af 2024
67891b8a
PC		 2025void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2026{
2027 if (addr != mr->addr) {
2028 mr->addr = addr;
2029 memory_region_readd_subregion(mr);
2030 }
2282e1af
AK		 2031}
2032
a8170e5e 2033void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 2034{
4703359e 2035 assert(mr->alias);
4703359e 2036
59023ef4 2037 if (offset == mr->alias_offset) {
4703359e
AK		 2038 return;
2039 }
2040
59023ef4
JK		 2041 memory_region_transaction_begin();
2042 mr->alias_offset = offset;
22bde714 2043 memory_region_update_pending |= mr->enabled;
59023ef4 2044 memory_region_transaction_commit();
4703359e
AK		 2045}
2046
a2b257d6
IM		 2047uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2048{
2049 return mr->align;
2050}
2051
e2177955
AK		 2052static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2053{
2054 const AddrRange *addr = addr_;
2055 const FlatRange *fr = fr_;
2056
2057 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2058 return -1;
2059 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2060 return 1;
2061 }
2062 return 0;
2063}
2064
99e86347 2065static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2066{
99e86347 2067 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK		 2068 sizeof(FlatRange), cmp_flatrange_addr);
2069}
2070
eed2bacf
IM		 2071bool memory_region_is_mapped(MemoryRegion *mr)
2072{
2073 return mr->container ? true : false;
2074}
2075
c6742b14
PB		 2076/* Same as memory_region_find, but it does not add a reference to the
2077 * returned region. It must be called from an RCU critical section.
2078 */
2079static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2080 hwaddr addr, uint64_t size)
e2177955 2081{
052e87b0 2082 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB		 2083 MemoryRegion *root;
2084 AddressSpace *as;
2085 AddrRange range;
99e86347 2086 FlatView *view;
73034e9e
PB		 2087 FlatRange *fr;
2088
2089 addr += mr->addr;
feca4ac1
PB		 2090 for (root = mr; root->container; ) {
2091 root = root->container;
73034e9e
PB		 2092 addr += root->addr;
2093 }
e2177955 2094
73034e9e 2095 as = memory_region_to_address_space(root);
eed2bacf
IM		 2096 if (!as) {
2097 return ret;
2098 }
73034e9e 2099 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2100
2b647668 2101 view = atomic_rcu_read(&as->current_map);
99e86347 2102 fr = flatview_lookup(view, range);
e2177955 2103 if (!fr) {
c6742b14 2104 return ret;
e2177955
AK		 2105 }
2106
99e86347 2107 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK		 2108 --fr;
2109 }
2110
2111 ret.mr = fr->mr;
73034e9e 2112 ret.address_space = as;
e2177955
AK		 2113 range = addrrange_intersection(range, fr->addr);
2114 ret.offset_within_region = fr->offset_in_region;
2115 ret.offset_within_region += int128_get64(int128_sub(range.start,
2116 fr->addr.start));
052e87b0 2117 ret.size = range.size;
e2177955 2118 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2119 ret.readonly = fr->readonly;
c6742b14
PB		 2120 return ret;
2121}
2122
2123MemoryRegionSection memory_region_find(MemoryRegion *mr,
2124 hwaddr addr, uint64_t size)
2125{
2126 MemoryRegionSection ret;
2127 rcu_read_lock();
2128 ret = memory_region_find_rcu(mr, addr, size);
2129 if (ret.mr) {
2130 memory_region_ref(ret.mr);
2131 }
2b647668 2132 rcu_read_unlock();
e2177955
AK		 2133 return ret;
2134}
2135
c6742b14
PB		 2136bool memory_region_present(MemoryRegion *container, hwaddr addr)
2137{
2138 MemoryRegion *mr;
2139
2140 rcu_read_lock();
2141 mr = memory_region_find_rcu(container, addr, 1).mr;
2142 rcu_read_unlock();
2143 return mr && mr != container;
2144}
2145
1d671369 2146void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 2147{
99e86347 2148 FlatView *view;
7664e80c
AK		 2149 FlatRange *fr;
2150
856d7245 2151 view = address_space_get_flatview(as);
99e86347 2152 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 2153 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 2154 }
856d7245 2155 flatview_unref(view);
7664e80c
AK		 2156}
2157
2158void memory_global_dirty_log_start(void)
2159{
7664e80c 2160 global_dirty_log = true;
6f6a5ef3 2161
7376e582 2162 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB		 2163
2164 /* Refresh DIRTY_LOG_MIGRATION bit. */
2165 memory_region_transaction_begin();
2166 memory_region_update_pending = true;
2167 memory_region_transaction_commit();
7664e80c
AK		 2168}
2169
2170void memory_global_dirty_log_stop(void)
2171{
7664e80c 2172 global_dirty_log = false;
6f6a5ef3
PB		 2173
2174 /* Refresh DIRTY_LOG_MIGRATION bit. */
2175 memory_region_transaction_begin();
2176 memory_region_update_pending = true;
2177 memory_region_transaction_commit();
2178
7376e582 2179 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK		 2180}
2181
2182static void listener_add_address_space(MemoryListener *listener,
2183 AddressSpace *as)
2184{
99e86347 2185 FlatView *view;
7664e80c
AK		 2186 FlatRange *fr;
2187
221b3a3f 2188 if (listener->address_space_filter
f6790af6 2189 && listener->address_space_filter != as) {
221b3a3f
JG		 2190 return;
2191 }
2192
680a4783
PB		 2193 if (listener->begin) {
2194 listener->begin(listener);
2195 }
7664e80c 2196 if (global_dirty_log) {
975aefe0
AK		 2197 if (listener->log_global_start) {
2198 listener->log_global_start(listener);
2199 }
7664e80c 2200 }
975aefe0 2201
856d7245 2202 view = address_space_get_flatview(as);
99e86347 2203 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK		 2204 MemoryRegionSection section = {
2205 .mr = fr->mr,
f6790af6 2206 .address_space = as,
7664e80c 2207 .offset_within_region = fr->offset_in_region,
052e87b0 2208 .size = fr->addr.size,
7664e80c 2209 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2210 .readonly = fr->readonly,
7664e80c 2211 };
680a4783
PB		 2212 if (fr->dirty_log_mask && listener->log_start) {
2213 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2214 }
975aefe0
AK		 2215 if (listener->region_add) {
2216 listener->region_add(listener, &section);
2217 }
7664e80c 2218 }
680a4783
PB		 2219 if (listener->commit) {
2220 listener->commit(listener);
2221 }
856d7245 2222 flatview_unref(view);
7664e80c
AK		 2223}
2224
f6790af6 2225void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 2226{
72e22d2f 2227 MemoryListener *other = NULL;
0d673e36 2228 AddressSpace *as;
72e22d2f 2229
7376e582 2230 listener->address_space_filter = filter;
72e22d2f
AK		 2231 if (QTAILQ_EMPTY(&memory_listeners)
2232 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2233 memory_listeners)->priority) {
2234 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2235 } else {
2236 QTAILQ_FOREACH(other, &memory_listeners, link) {
2237 if (listener->priority < other->priority) {
2238 break;
2239 }
2240 }
2241 QTAILQ_INSERT_BEFORE(other, listener, link);
2242 }
0d673e36
AK		 2243
2244 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2245 listener_add_address_space(listener, as);
2246 }
7664e80c
AK		 2247}
2248
2249void memory_listener_unregister(MemoryListener *listener)
2250{
72e22d2f 2251 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 2252}
e2177955 2253
7dca8043 2254void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2255{
ac95190e 2256 memory_region_ref(root);
59023ef4 2257 memory_region_transaction_begin();
f0c02d15 2258 as->ref_count = 1;
8786db7c 2259 as->root = root;
f0c02d15 2260 as->malloced = false;
8786db7c
AK		 2261 as->current_map = g_new(FlatView, 1);
2262 flatview_init(as->current_map);
4c19eb72
AK		 2263 as->ioeventfd_nb = 0;
2264 as->ioeventfds = NULL;
0d673e36 2265 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2266 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2267 address_space_init_dispatch(as);
f43793c7
PB		 2268 memory_region_update_pending |= root->enabled;
2269 memory_region_transaction_commit();
1c0ffa58 2270}
658b2224 2271
374f2981 2272static void do_address_space_destroy(AddressSpace *as)
83f3c251 2273{
078c44f4 2274 MemoryListener *listener;
f0c02d15 2275 bool do_free = as->malloced;
078c44f4 2276
83f3c251 2277 address_space_destroy_dispatch(as);
078c44f4
DG		 2278
2279 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2280 assert(listener->address_space_filter != as);
2281 }
2282
856d7245 2283 flatview_unref(as->current_map);
7dca8043 2284 g_free(as->name);
4c19eb72 2285 g_free(as->ioeventfds);
ac95190e 2286 memory_region_unref(as->root);
f0c02d15
PC		 2287 if (do_free) {
2288 g_free(as);
2289 }
2290}
2291
2292AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2293{
2294 AddressSpace *as;
2295
2296 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2297 if (root == as->root && as->malloced) {
2298 as->ref_count++;
2299 return as;
2300 }
2301 }
2302
2303 as = g_malloc0(sizeof *as);
2304 address_space_init(as, root, name);
2305 as->malloced = true;
2306 return as;
83f3c251
AK		 2307}
2308
374f2981
PB		 2309void address_space_destroy(AddressSpace *as)
2310{
ac95190e
PB		 2311 MemoryRegion *root = as->root;
2312
f0c02d15
PC		 2313 as->ref_count--;
2314 if (as->ref_count) {
2315 return;
2316 }
374f2981
PB		 2317 /* Flush out anything from MemoryListeners listening in on this */
2318 memory_region_transaction_begin();
2319 as->root = NULL;
2320 memory_region_transaction_commit();
2321 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2322 address_space_unregister(as);
374f2981
PB		 2323
2324 /* At this point, as->dispatch and as->current_map are dummy
2325 * entries that the guest should never use. Wait for the old
2326 * values to expire before freeing the data.
2327 */
ac95190e 2328 as->root = root;
374f2981
PB		 2329 call_rcu(as, do_address_space_destroy, rcu);
2330}
2331
314e2987
BS		 2332typedef struct MemoryRegionList MemoryRegionList;
2333
2334struct MemoryRegionList {
2335 const MemoryRegion *mr;
314e2987
BS		 2336 QTAILQ_ENTRY(MemoryRegionList) queue;
2337};
2338
2339typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2340
2341static void mtree_print_mr(fprintf_function mon_printf, void *f,
2342 const MemoryRegion *mr, unsigned int level,
a8170e5e 2343 hwaddr base,
9479c57a 2344 MemoryRegionListHead *alias_print_queue)
314e2987 2345{
9479c57a
JK		 2346 MemoryRegionList *new_ml, *ml, *next_ml;
2347 MemoryRegionListHead submr_print_queue;
314e2987
BS		 2348 const MemoryRegion *submr;
2349 unsigned int i;
2350
f8a9f720 2351 if (!mr) {
314e2987
BS		 2352 return;
2353 }
2354
2355 for (i = 0; i < level; i++) {
2356 mon_printf(f, " ");
2357 }
2358
2359 if (mr->alias) {
2360 MemoryRegionList *ml;
2361 bool found = false;
2362
2363 /* check if the alias is already in the queue */
9479c57a 2364 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2365 if (ml->mr == mr->alias) {
314e2987
BS		 2366 found = true;
2367 }
2368 }
2369
2370 if (!found) {
2371 ml = g_new(MemoryRegionList, 1);
2372 ml->mr = mr->alias;
9479c57a 2373 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2374 }
4896d74b
JK		 2375 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2376 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
f8a9f720 2377 "-" TARGET_FMT_plx "%s\n",
314e2987 2378 base + mr->addr,
08dafab4 2379 base + mr->addr
fd1d9926
AW		 2380 + (int128_nz(mr->size) ?
2381 (hwaddr)int128_get64(int128_sub(mr->size,
2382 int128_one())) : 0),
4b474ba7 2383 mr->priority,
5f9a5ea1
JK		 2384 mr->romd_mode ? 'R' : '-',
2385 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2386 : '-',
3fb18b4d
PC		 2387 memory_region_name(mr),
2388 memory_region_name(mr->alias),
314e2987 2389 mr->alias_offset,
08dafab4 2390 mr->alias_offset
a66670c7
AK		 2391 + (int128_nz(mr->size) ?
2392 (hwaddr)int128_get64(int128_sub(mr->size,
f8a9f720
GH		 2393 int128_one())) : 0),
2394 mr->enabled ? "" : " [disabled]");
314e2987 2395 } else {
4896d74b 2396 mon_printf(f,
f8a9f720 2397 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
314e2987 2398 base + mr->addr,
08dafab4 2399 base + mr->addr
fd1d9926
AW		 2400 + (int128_nz(mr->size) ?
2401 (hwaddr)int128_get64(int128_sub(mr->size,
2402 int128_one())) : 0),
4b474ba7 2403 mr->priority,
5f9a5ea1
JK		 2404 mr->romd_mode ? 'R' : '-',
2405 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2406 : '-',
f8a9f720
GH		 2407 memory_region_name(mr),
2408 mr->enabled ? "" : " [disabled]");
314e2987 2409 }
9479c57a
JK		 2410
2411 QTAILQ_INIT(&submr_print_queue);
2412
314e2987 2413 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK		 2414 new_ml = g_new(MemoryRegionList, 1);
2415 new_ml->mr = submr;
2416 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2417 if (new_ml->mr->addr < ml->mr->addr ||
2418 (new_ml->mr->addr == ml->mr->addr &&
2419 new_ml->mr->priority > ml->mr->priority)) {
2420 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2421 new_ml = NULL;
2422 break;
2423 }
2424 }
2425 if (new_ml) {
2426 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2427 }
2428 }
2429
2430 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2431 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2432 alias_print_queue);
2433 }
2434
88365e47 2435 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2436 g_free(ml);
314e2987
BS		 2437 }
2438}
2439
2440void mtree_info(fprintf_function mon_printf, void *f)
2441{
2442 MemoryRegionListHead ml_head;
2443 MemoryRegionList *ml, *ml2;
0d673e36 2444 AddressSpace *as;
314e2987
BS		 2445
2446 QTAILQ_INIT(&ml_head);
2447
0d673e36 2448 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH		 2449 mon_printf(f, "address-space: %s\n", as->name);
2450 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2451 mon_printf(f, "\n");
b9f9be88
BS		 2452 }
2453
314e2987
BS		 2454 /* print aliased regions */
2455 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH		 2456 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2457 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2458 mon_printf(f, "\n");
314e2987
BS		 2459 }
2460
2461 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2462 g_free(ml);
314e2987 2463 }
314e2987 2464}
b4fefef9
PC		 2465
2466static const TypeInfo memory_region_info = {
2467 .parent = TYPE_OBJECT,
2468 .name = TYPE_MEMORY_REGION,
2469 .instance_size = sizeof(MemoryRegion),
2470 .instance_init = memory_region_initfn,
2471 .instance_finalize = memory_region_finalize,
2472};
2473
2474static void memory_register_types(void)
2475{
2476 type_register_static(&memory_region_info);
2477}
2478
2479type_init(memory_register_types)
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