]>
Commit | Line | Data |
---|---|---|
093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
da34e65c | 17 | #include "qapi/error.h" |
33c11879 PB |
18 | #include "qemu-common.h" |
19 | #include "cpu.h" | |
022c62cb PB |
20 | #include "exec/memory.h" |
21 | #include "exec/address-spaces.h" | |
22 | #include "exec/ioport.h" | |
409ddd01 | 23 | #include "qapi/visitor.h" |
1de7afc9 | 24 | #include "qemu/bitops.h" |
8c56c1a5 | 25 | #include "qemu/error-report.h" |
2c9b15ca | 26 | #include "qom/object.h" |
0ab8ed18 | 27 | #include "trace-root.h" |
093bc2cd | 28 | |
022c62cb | 29 | #include "exec/memory-internal.h" |
220c3ebd | 30 | #include "exec/ram_addr.h" |
8c56c1a5 | 31 | #include "sysemu/kvm.h" |
e1c57ab8 | 32 | #include "sysemu/sysemu.h" |
c9356746 FK |
33 | #include "hw/misc/mmio_interface.h" |
34 | #include "hw/qdev-properties.h" | |
b08199c6 | 35 | #include "migration/vmstate.h" |
67d95c15 | 36 | |
d197063f PB |
37 | //#define DEBUG_UNASSIGNED |
38 | ||
22bde714 JK |
39 | static unsigned memory_region_transaction_depth; |
40 | static bool memory_region_update_pending; | |
4dc56152 | 41 | static bool ioeventfd_update_pending; |
7664e80c AK |
42 | static bool global_dirty_log = false; |
43 | ||
72e22d2f AK |
44 | static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners |
45 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); | |
4ef4db86 | 46 | |
0d673e36 AK |
47 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
48 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
49 | ||
093bc2cd AK |
50 | typedef struct AddrRange AddrRange; |
51 | ||
8417cebf | 52 | /* |
c9cdaa3a | 53 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
54 | * (large MemoryRegion::alias_offset). |
55 | */ | |
093bc2cd | 56 | struct AddrRange { |
08dafab4 AK |
57 | Int128 start; |
58 | Int128 size; | |
093bc2cd AK |
59 | }; |
60 | ||
08dafab4 | 61 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
62 | { |
63 | return (AddrRange) { start, size }; | |
64 | } | |
65 | ||
66 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
67 | { | |
08dafab4 | 68 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
69 | } |
70 | ||
08dafab4 | 71 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 72 | { |
08dafab4 | 73 | return int128_add(r.start, r.size); |
093bc2cd AK |
74 | } |
75 | ||
08dafab4 | 76 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 77 | { |
08dafab4 | 78 | int128_addto(&range.start, delta); |
093bc2cd AK |
79 | return range; |
80 | } | |
81 | ||
08dafab4 AK |
82 | static bool addrrange_contains(AddrRange range, Int128 addr) |
83 | { | |
84 | return int128_ge(addr, range.start) | |
85 | && int128_lt(addr, addrrange_end(range)); | |
86 | } | |
87 | ||
093bc2cd AK |
88 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
89 | { | |
08dafab4 AK |
90 | return addrrange_contains(r1, r2.start) |
91 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
92 | } |
93 | ||
94 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
95 | { | |
08dafab4 AK |
96 | Int128 start = int128_max(r1.start, r2.start); |
97 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
98 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
99 | } |
100 | ||
0e0d36b4 AK |
101 | enum ListenerDirection { Forward, Reverse }; |
102 | ||
7376e582 | 103 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ |
0e0d36b4 AK |
104 | do { \ |
105 | MemoryListener *_listener; \ | |
106 | \ | |
107 | switch (_direction) { \ | |
108 | case Forward: \ | |
109 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
110 | if (_listener->_callback) { \ |
111 | _listener->_callback(_listener, ##_args); \ | |
112 | } \ | |
0e0d36b4 AK |
113 | } \ |
114 | break; \ | |
115 | case Reverse: \ | |
116 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ | |
117 | memory_listeners, link) { \ | |
975aefe0 AK |
118 | if (_listener->_callback) { \ |
119 | _listener->_callback(_listener, ##_args); \ | |
120 | } \ | |
0e0d36b4 AK |
121 | } \ |
122 | break; \ | |
123 | default: \ | |
124 | abort(); \ | |
125 | } \ | |
126 | } while (0) | |
127 | ||
9a54635d | 128 | #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \ |
7376e582 AK |
129 | do { \ |
130 | MemoryListener *_listener; \ | |
9a54635d | 131 | struct memory_listeners_as *list = &(_as)->listeners; \ |
7376e582 AK |
132 | \ |
133 | switch (_direction) { \ | |
134 | case Forward: \ | |
9a54635d PB |
135 | QTAILQ_FOREACH(_listener, list, link_as) { \ |
136 | if (_listener->_callback) { \ | |
7376e582 AK |
137 | _listener->_callback(_listener, _section, ##_args); \ |
138 | } \ | |
139 | } \ | |
140 | break; \ | |
141 | case Reverse: \ | |
9a54635d PB |
142 | QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \ |
143 | link_as) { \ | |
144 | if (_listener->_callback) { \ | |
7376e582 AK |
145 | _listener->_callback(_listener, _section, ##_args); \ |
146 | } \ | |
147 | } \ | |
148 | break; \ | |
149 | default: \ | |
150 | abort(); \ | |
151 | } \ | |
152 | } while (0) | |
153 | ||
dfde4e6e | 154 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 155 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
9c1f8f44 PB |
156 | do { \ |
157 | MemoryRegionSection mrs = section_from_flat_range(fr, as); \ | |
9a54635d | 158 | MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \ |
9c1f8f44 | 159 | } while(0) |
0e0d36b4 | 160 | |
093bc2cd AK |
161 | struct CoalescedMemoryRange { |
162 | AddrRange addr; | |
163 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
164 | }; | |
165 | ||
3e9d69e7 AK |
166 | struct MemoryRegionIoeventfd { |
167 | AddrRange addr; | |
168 | bool match_data; | |
169 | uint64_t data; | |
753d5e14 | 170 | EventNotifier *e; |
3e9d69e7 AK |
171 | }; |
172 | ||
173 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, | |
174 | MemoryRegionIoeventfd b) | |
175 | { | |
08dafab4 | 176 | if (int128_lt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 177 | return true; |
08dafab4 | 178 | } else if (int128_gt(a.addr.start, b.addr.start)) { |
3e9d69e7 | 179 | return false; |
08dafab4 | 180 | } else if (int128_lt(a.addr.size, b.addr.size)) { |
3e9d69e7 | 181 | return true; |
08dafab4 | 182 | } else if (int128_gt(a.addr.size, b.addr.size)) { |
3e9d69e7 AK |
183 | return false; |
184 | } else if (a.match_data < b.match_data) { | |
185 | return true; | |
186 | } else if (a.match_data > b.match_data) { | |
187 | return false; | |
188 | } else if (a.match_data) { | |
189 | if (a.data < b.data) { | |
190 | return true; | |
191 | } else if (a.data > b.data) { | |
192 | return false; | |
193 | } | |
194 | } | |
753d5e14 | 195 | if (a.e < b.e) { |
3e9d69e7 | 196 | return true; |
753d5e14 | 197 | } else if (a.e > b.e) { |
3e9d69e7 AK |
198 | return false; |
199 | } | |
200 | return false; | |
201 | } | |
202 | ||
203 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, | |
204 | MemoryRegionIoeventfd b) | |
205 | { | |
206 | return !memory_region_ioeventfd_before(a, b) | |
207 | && !memory_region_ioeventfd_before(b, a); | |
208 | } | |
209 | ||
093bc2cd AK |
210 | typedef struct FlatRange FlatRange; |
211 | typedef struct FlatView FlatView; | |
212 | ||
213 | /* Range of memory in the global map. Addresses are absolute. */ | |
214 | struct FlatRange { | |
215 | MemoryRegion *mr; | |
a8170e5e | 216 | hwaddr offset_in_region; |
093bc2cd | 217 | AddrRange addr; |
5a583347 | 218 | uint8_t dirty_log_mask; |
b138e654 | 219 | bool romd_mode; |
fb1cd6f9 | 220 | bool readonly; |
093bc2cd AK |
221 | }; |
222 | ||
223 | /* Flattened global view of current active memory hierarchy. Kept in sorted | |
224 | * order. | |
225 | */ | |
226 | struct FlatView { | |
374f2981 | 227 | struct rcu_head rcu; |
856d7245 | 228 | unsigned ref; |
093bc2cd AK |
229 | FlatRange *ranges; |
230 | unsigned nr; | |
231 | unsigned nr_allocated; | |
232 | }; | |
233 | ||
cc31e6e7 AK |
234 | typedef struct AddressSpaceOps AddressSpaceOps; |
235 | ||
093bc2cd AK |
236 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
237 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
238 | ||
9c1f8f44 PB |
239 | static inline MemoryRegionSection |
240 | section_from_flat_range(FlatRange *fr, AddressSpace *as) | |
241 | { | |
242 | return (MemoryRegionSection) { | |
243 | .mr = fr->mr, | |
244 | .address_space = as, | |
245 | .offset_within_region = fr->offset_in_region, | |
246 | .size = fr->addr.size, | |
247 | .offset_within_address_space = int128_get64(fr->addr.start), | |
248 | .readonly = fr->readonly, | |
249 | }; | |
250 | } | |
251 | ||
093bc2cd AK |
252 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
253 | { | |
254 | return a->mr == b->mr | |
255 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 256 | && a->offset_in_region == b->offset_in_region |
b138e654 | 257 | && a->romd_mode == b->romd_mode |
fb1cd6f9 | 258 | && a->readonly == b->readonly; |
093bc2cd AK |
259 | } |
260 | ||
261 | static void flatview_init(FlatView *view) | |
262 | { | |
856d7245 | 263 | view->ref = 1; |
093bc2cd AK |
264 | view->ranges = NULL; |
265 | view->nr = 0; | |
266 | view->nr_allocated = 0; | |
267 | } | |
268 | ||
269 | /* Insert a range into a given position. Caller is responsible for maintaining | |
270 | * sorting order. | |
271 | */ | |
272 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
273 | { | |
274 | if (view->nr == view->nr_allocated) { | |
275 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 276 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
277 | view->nr_allocated * sizeof(*view->ranges)); |
278 | } | |
279 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
280 | (view->nr - pos) * sizeof(FlatRange)); | |
281 | view->ranges[pos] = *range; | |
dfde4e6e | 282 | memory_region_ref(range->mr); |
093bc2cd AK |
283 | ++view->nr; |
284 | } | |
285 | ||
286 | static void flatview_destroy(FlatView *view) | |
287 | { | |
dfde4e6e PB |
288 | int i; |
289 | ||
290 | for (i = 0; i < view->nr; i++) { | |
291 | memory_region_unref(view->ranges[i].mr); | |
292 | } | |
7267c094 | 293 | g_free(view->ranges); |
a9a0c06d | 294 | g_free(view); |
093bc2cd AK |
295 | } |
296 | ||
856d7245 PB |
297 | static void flatview_ref(FlatView *view) |
298 | { | |
299 | atomic_inc(&view->ref); | |
300 | } | |
301 | ||
302 | static void flatview_unref(FlatView *view) | |
303 | { | |
304 | if (atomic_fetch_dec(&view->ref) == 1) { | |
305 | flatview_destroy(view); | |
306 | } | |
307 | } | |
308 | ||
3d8e6bf9 AK |
309 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
310 | { | |
08dafab4 | 311 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 312 | && r1->mr == r2->mr |
08dafab4 AK |
313 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
314 | r1->addr.size), | |
315 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 316 | && r1->dirty_log_mask == r2->dirty_log_mask |
b138e654 | 317 | && r1->romd_mode == r2->romd_mode |
fb1cd6f9 | 318 | && r1->readonly == r2->readonly; |
3d8e6bf9 AK |
319 | } |
320 | ||
8508e024 | 321 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
322 | static void flatview_simplify(FlatView *view) |
323 | { | |
324 | unsigned i, j; | |
325 | ||
326 | i = 0; | |
327 | while (i < view->nr) { | |
328 | j = i + 1; | |
329 | while (j < view->nr | |
330 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 331 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
332 | ++j; |
333 | } | |
334 | ++i; | |
335 | memmove(&view->ranges[i], &view->ranges[j], | |
336 | (view->nr - j) * sizeof(view->ranges[j])); | |
337 | view->nr -= j - i; | |
338 | } | |
339 | } | |
340 | ||
e7342aa3 PB |
341 | static bool memory_region_big_endian(MemoryRegion *mr) |
342 | { | |
343 | #ifdef TARGET_WORDS_BIGENDIAN | |
344 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
345 | #else | |
346 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
347 | #endif | |
348 | } | |
349 | ||
e11ef3d1 PB |
350 | static bool memory_region_wrong_endianness(MemoryRegion *mr) |
351 | { | |
352 | #ifdef TARGET_WORDS_BIGENDIAN | |
353 | return mr->ops->endianness == DEVICE_LITTLE_ENDIAN; | |
354 | #else | |
355 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
356 | #endif | |
357 | } | |
358 | ||
359 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) | |
360 | { | |
361 | if (memory_region_wrong_endianness(mr)) { | |
362 | switch (size) { | |
363 | case 1: | |
364 | break; | |
365 | case 2: | |
366 | *data = bswap16(*data); | |
367 | break; | |
368 | case 4: | |
369 | *data = bswap32(*data); | |
370 | break; | |
371 | case 8: | |
372 | *data = bswap64(*data); | |
373 | break; | |
374 | default: | |
375 | abort(); | |
376 | } | |
377 | } | |
378 | } | |
379 | ||
4779dc1d HB |
380 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
381 | { | |
382 | MemoryRegion *root; | |
383 | hwaddr abs_addr = offset; | |
384 | ||
385 | abs_addr += mr->addr; | |
386 | for (root = mr; root->container; ) { | |
387 | root = root->container; | |
388 | abs_addr += root->addr; | |
389 | } | |
390 | ||
391 | return abs_addr; | |
392 | } | |
393 | ||
5a68be94 HB |
394 | static int get_cpu_index(void) |
395 | { | |
396 | if (current_cpu) { | |
397 | return current_cpu->cpu_index; | |
398 | } | |
399 | return -1; | |
400 | } | |
401 | ||
cc05c43a PM |
402 | static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
403 | hwaddr addr, | |
404 | uint64_t *value, | |
405 | unsigned size, | |
406 | unsigned shift, | |
407 | uint64_t mask, | |
408 | MemTxAttrs attrs) | |
409 | { | |
410 | uint64_t tmp; | |
411 | ||
412 | tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); | |
23d92d68 | 413 | if (mr->subpage) { |
5a68be94 | 414 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
415 | } else if (mr == &io_mem_notdirty) { |
416 | /* Accesses to code which has previously been translated into a TB show | |
417 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
418 | * MemoryRegion. */ | |
419 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
420 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
421 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 422 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 423 | } |
cc05c43a PM |
424 | *value |= (tmp & mask) << shift; |
425 | return MEMTX_OK; | |
426 | } | |
427 | ||
428 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, | |
ce5d2f33 PB |
429 | hwaddr addr, |
430 | uint64_t *value, | |
431 | unsigned size, | |
432 | unsigned shift, | |
cc05c43a PM |
433 | uint64_t mask, |
434 | MemTxAttrs attrs) | |
ce5d2f33 | 435 | { |
ce5d2f33 PB |
436 | uint64_t tmp; |
437 | ||
cc05c43a | 438 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 439 | if (mr->subpage) { |
5a68be94 | 440 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
441 | } else if (mr == &io_mem_notdirty) { |
442 | /* Accesses to code which has previously been translated into a TB show | |
443 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
444 | * MemoryRegion. */ | |
445 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
446 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
447 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 448 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 449 | } |
ce5d2f33 | 450 | *value |= (tmp & mask) << shift; |
cc05c43a | 451 | return MEMTX_OK; |
ce5d2f33 PB |
452 | } |
453 | ||
cc05c43a PM |
454 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
455 | hwaddr addr, | |
456 | uint64_t *value, | |
457 | unsigned size, | |
458 | unsigned shift, | |
459 | uint64_t mask, | |
460 | MemTxAttrs attrs) | |
164a4dcd | 461 | { |
cc05c43a PM |
462 | uint64_t tmp = 0; |
463 | MemTxResult r; | |
164a4dcd | 464 | |
cc05c43a | 465 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 466 | if (mr->subpage) { |
5a68be94 | 467 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
468 | } else if (mr == &io_mem_notdirty) { |
469 | /* Accesses to code which has previously been translated into a TB show | |
470 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
471 | * MemoryRegion. */ | |
472 | trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
473 | } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { |
474 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 475 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 476 | } |
164a4dcd | 477 | *value |= (tmp & mask) << shift; |
cc05c43a | 478 | return r; |
164a4dcd AK |
479 | } |
480 | ||
cc05c43a PM |
481 | static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
482 | hwaddr addr, | |
483 | uint64_t *value, | |
484 | unsigned size, | |
485 | unsigned shift, | |
486 | uint64_t mask, | |
487 | MemTxAttrs attrs) | |
ce5d2f33 | 488 | { |
ce5d2f33 PB |
489 | uint64_t tmp; |
490 | ||
491 | tmp = (*value >> shift) & mask; | |
23d92d68 | 492 | if (mr->subpage) { |
5a68be94 | 493 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
494 | } else if (mr == &io_mem_notdirty) { |
495 | /* Accesses to code which has previously been translated into a TB show | |
496 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
497 | * MemoryRegion. */ | |
498 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
499 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
500 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 501 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 502 | } |
ce5d2f33 | 503 | mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
cc05c43a | 504 | return MEMTX_OK; |
ce5d2f33 PB |
505 | } |
506 | ||
cc05c43a PM |
507 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
508 | hwaddr addr, | |
509 | uint64_t *value, | |
510 | unsigned size, | |
511 | unsigned shift, | |
512 | uint64_t mask, | |
513 | MemTxAttrs attrs) | |
164a4dcd | 514 | { |
164a4dcd AK |
515 | uint64_t tmp; |
516 | ||
517 | tmp = (*value >> shift) & mask; | |
23d92d68 | 518 | if (mr->subpage) { |
5a68be94 | 519 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
520 | } else if (mr == &io_mem_notdirty) { |
521 | /* Accesses to code which has previously been translated into a TB show | |
522 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
523 | * MemoryRegion. */ | |
524 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
525 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
526 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 527 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 528 | } |
164a4dcd | 529 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 530 | return MEMTX_OK; |
164a4dcd AK |
531 | } |
532 | ||
cc05c43a PM |
533 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
534 | hwaddr addr, | |
535 | uint64_t *value, | |
536 | unsigned size, | |
537 | unsigned shift, | |
538 | uint64_t mask, | |
539 | MemTxAttrs attrs) | |
540 | { | |
541 | uint64_t tmp; | |
542 | ||
cc05c43a | 543 | tmp = (*value >> shift) & mask; |
23d92d68 | 544 | if (mr->subpage) { |
5a68be94 | 545 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
f2d08942 HB |
546 | } else if (mr == &io_mem_notdirty) { |
547 | /* Accesses to code which has previously been translated into a TB show | |
548 | * up in the MMIO path, as accesses to the io_mem_notdirty | |
549 | * MemoryRegion. */ | |
550 | trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size); | |
4779dc1d HB |
551 | } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { |
552 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); | |
5a68be94 | 553 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 554 | } |
cc05c43a PM |
555 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
556 | } | |
557 | ||
558 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
559 | uint64_t *value, |
560 | unsigned size, | |
561 | unsigned access_size_min, | |
562 | unsigned access_size_max, | |
05e015f7 KF |
563 | MemTxResult (*access_fn) |
564 | (MemoryRegion *mr, | |
565 | hwaddr addr, | |
566 | uint64_t *value, | |
567 | unsigned size, | |
568 | unsigned shift, | |
569 | uint64_t mask, | |
570 | MemTxAttrs attrs), | |
cc05c43a PM |
571 | MemoryRegion *mr, |
572 | MemTxAttrs attrs) | |
164a4dcd AK |
573 | { |
574 | uint64_t access_mask; | |
575 | unsigned access_size; | |
576 | unsigned i; | |
cc05c43a | 577 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
578 | |
579 | if (!access_size_min) { | |
580 | access_size_min = 1; | |
581 | } | |
582 | if (!access_size_max) { | |
583 | access_size_max = 4; | |
584 | } | |
ce5d2f33 PB |
585 | |
586 | /* FIXME: support unaligned access? */ | |
164a4dcd AK |
587 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
588 | access_mask = -1ULL >> (64 - access_size * 8); | |
e7342aa3 PB |
589 | if (memory_region_big_endian(mr)) { |
590 | for (i = 0; i < size; i += access_size) { | |
05e015f7 | 591 | r |= access_fn(mr, addr + i, value, access_size, |
cc05c43a | 592 | (size - access_size - i) * 8, access_mask, attrs); |
e7342aa3 PB |
593 | } |
594 | } else { | |
595 | for (i = 0; i < size; i += access_size) { | |
05e015f7 | 596 | r |= access_fn(mr, addr + i, value, access_size, i * 8, |
cc05c43a | 597 | access_mask, attrs); |
e7342aa3 | 598 | } |
164a4dcd | 599 | } |
cc05c43a | 600 | return r; |
164a4dcd AK |
601 | } |
602 | ||
e2177955 AK |
603 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
604 | { | |
0d673e36 AK |
605 | AddressSpace *as; |
606 | ||
feca4ac1 PB |
607 | while (mr->container) { |
608 | mr = mr->container; | |
e2177955 | 609 | } |
0d673e36 AK |
610 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
611 | if (mr == as->root) { | |
612 | return as; | |
613 | } | |
e2177955 | 614 | } |
eed2bacf | 615 | return NULL; |
e2177955 AK |
616 | } |
617 | ||
093bc2cd AK |
618 | /* Render a memory region into the global view. Ranges in @view obscure |
619 | * ranges in @mr. | |
620 | */ | |
621 | static void render_memory_region(FlatView *view, | |
622 | MemoryRegion *mr, | |
08dafab4 | 623 | Int128 base, |
fb1cd6f9 AK |
624 | AddrRange clip, |
625 | bool readonly) | |
093bc2cd AK |
626 | { |
627 | MemoryRegion *subregion; | |
628 | unsigned i; | |
a8170e5e | 629 | hwaddr offset_in_region; |
08dafab4 AK |
630 | Int128 remain; |
631 | Int128 now; | |
093bc2cd AK |
632 | FlatRange fr; |
633 | AddrRange tmp; | |
634 | ||
6bba19ba AK |
635 | if (!mr->enabled) { |
636 | return; | |
637 | } | |
638 | ||
08dafab4 | 639 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 640 | readonly |= mr->readonly; |
093bc2cd AK |
641 | |
642 | tmp = addrrange_make(base, mr->size); | |
643 | ||
644 | if (!addrrange_intersects(tmp, clip)) { | |
645 | return; | |
646 | } | |
647 | ||
648 | clip = addrrange_intersection(tmp, clip); | |
649 | ||
650 | if (mr->alias) { | |
08dafab4 AK |
651 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
652 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
fb1cd6f9 | 653 | render_memory_region(view, mr->alias, base, clip, readonly); |
093bc2cd AK |
654 | return; |
655 | } | |
656 | ||
657 | /* Render subregions in priority order. */ | |
658 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
fb1cd6f9 | 659 | render_memory_region(view, subregion, base, clip, readonly); |
093bc2cd AK |
660 | } |
661 | ||
14a3c10a | 662 | if (!mr->terminates) { |
093bc2cd AK |
663 | return; |
664 | } | |
665 | ||
08dafab4 | 666 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
667 | base = clip.start; |
668 | remain = clip.size; | |
669 | ||
2eb74e1a | 670 | fr.mr = mr; |
6f6a5ef3 | 671 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
b138e654 | 672 | fr.romd_mode = mr->romd_mode; |
2eb74e1a PC |
673 | fr.readonly = readonly; |
674 | ||
093bc2cd | 675 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
676 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
677 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
678 | continue; |
679 | } | |
08dafab4 AK |
680 | if (int128_lt(base, view->ranges[i].addr.start)) { |
681 | now = int128_min(remain, | |
682 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
683 | fr.offset_in_region = offset_in_region; |
684 | fr.addr = addrrange_make(base, now); | |
685 | flatview_insert(view, i, &fr); | |
686 | ++i; | |
08dafab4 AK |
687 | int128_addto(&base, now); |
688 | offset_in_region += int128_get64(now); | |
689 | int128_subfrom(&remain, now); | |
093bc2cd | 690 | } |
d26a8cae AK |
691 | now = int128_sub(int128_min(int128_add(base, remain), |
692 | addrrange_end(view->ranges[i].addr)), | |
693 | base); | |
694 | int128_addto(&base, now); | |
695 | offset_in_region += int128_get64(now); | |
696 | int128_subfrom(&remain, now); | |
093bc2cd | 697 | } |
08dafab4 | 698 | if (int128_nz(remain)) { |
093bc2cd AK |
699 | fr.offset_in_region = offset_in_region; |
700 | fr.addr = addrrange_make(base, remain); | |
701 | flatview_insert(view, i, &fr); | |
702 | } | |
703 | } | |
704 | ||
705 | /* Render a memory topology into a list of disjoint absolute ranges. */ | |
a9a0c06d | 706 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 707 | { |
a9a0c06d | 708 | FlatView *view; |
093bc2cd | 709 | |
a9a0c06d PB |
710 | view = g_new(FlatView, 1); |
711 | flatview_init(view); | |
093bc2cd | 712 | |
83f3c251 | 713 | if (mr) { |
a9a0c06d | 714 | render_memory_region(view, mr, int128_zero(), |
83f3c251 AK |
715 | addrrange_make(int128_zero(), int128_2_64()), false); |
716 | } | |
a9a0c06d | 717 | flatview_simplify(view); |
093bc2cd AK |
718 | |
719 | return view; | |
720 | } | |
721 | ||
3e9d69e7 AK |
722 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
723 | MemoryRegionIoeventfd *fds_new, | |
724 | unsigned fds_new_nb, | |
725 | MemoryRegionIoeventfd *fds_old, | |
726 | unsigned fds_old_nb) | |
727 | { | |
728 | unsigned iold, inew; | |
80a1ea37 AK |
729 | MemoryRegionIoeventfd *fd; |
730 | MemoryRegionSection section; | |
3e9d69e7 AK |
731 | |
732 | /* Generate a symmetric difference of the old and new fd sets, adding | |
733 | * and deleting as necessary. | |
734 | */ | |
735 | ||
736 | iold = inew = 0; | |
737 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
738 | if (iold < fds_old_nb | |
739 | && (inew == fds_new_nb | |
740 | || memory_region_ioeventfd_before(fds_old[iold], | |
741 | fds_new[inew]))) { | |
80a1ea37 AK |
742 | fd = &fds_old[iold]; |
743 | section = (MemoryRegionSection) { | |
f6790af6 | 744 | .address_space = as, |
80a1ea37 | 745 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 746 | .size = fd->addr.size, |
80a1ea37 | 747 | }; |
9a54635d | 748 | MEMORY_LISTENER_CALL(as, eventfd_del, Forward, §ion, |
753d5e14 | 749 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
750 | ++iold; |
751 | } else if (inew < fds_new_nb | |
752 | && (iold == fds_old_nb | |
753 | || memory_region_ioeventfd_before(fds_new[inew], | |
754 | fds_old[iold]))) { | |
80a1ea37 AK |
755 | fd = &fds_new[inew]; |
756 | section = (MemoryRegionSection) { | |
f6790af6 | 757 | .address_space = as, |
80a1ea37 | 758 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 759 | .size = fd->addr.size, |
80a1ea37 | 760 | }; |
9a54635d | 761 | MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, §ion, |
753d5e14 | 762 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
763 | ++inew; |
764 | } else { | |
765 | ++iold; | |
766 | ++inew; | |
767 | } | |
768 | } | |
769 | } | |
770 | ||
856d7245 PB |
771 | static FlatView *address_space_get_flatview(AddressSpace *as) |
772 | { | |
773 | FlatView *view; | |
774 | ||
374f2981 PB |
775 | rcu_read_lock(); |
776 | view = atomic_rcu_read(&as->current_map); | |
856d7245 | 777 | flatview_ref(view); |
374f2981 | 778 | rcu_read_unlock(); |
856d7245 PB |
779 | return view; |
780 | } | |
781 | ||
3e9d69e7 AK |
782 | static void address_space_update_ioeventfds(AddressSpace *as) |
783 | { | |
99e86347 | 784 | FlatView *view; |
3e9d69e7 AK |
785 | FlatRange *fr; |
786 | unsigned ioeventfd_nb = 0; | |
787 | MemoryRegionIoeventfd *ioeventfds = NULL; | |
788 | AddrRange tmp; | |
789 | unsigned i; | |
790 | ||
856d7245 | 791 | view = address_space_get_flatview(as); |
99e86347 | 792 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
793 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
794 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
795 | int128_sub(fr->addr.start, |
796 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
797 | if (addrrange_intersects(fr->addr, tmp)) { |
798 | ++ioeventfd_nb; | |
7267c094 | 799 | ioeventfds = g_realloc(ioeventfds, |
3e9d69e7 AK |
800 | ioeventfd_nb * sizeof(*ioeventfds)); |
801 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; | |
802 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
803 | } | |
804 | } | |
805 | } | |
806 | ||
807 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
808 | as->ioeventfds, as->ioeventfd_nb); | |
809 | ||
7267c094 | 810 | g_free(as->ioeventfds); |
3e9d69e7 AK |
811 | as->ioeventfds = ioeventfds; |
812 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 813 | flatview_unref(view); |
3e9d69e7 AK |
814 | } |
815 | ||
b8af1afb | 816 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
817 | const FlatView *old_view, |
818 | const FlatView *new_view, | |
b8af1afb | 819 | bool adding) |
093bc2cd | 820 | { |
093bc2cd AK |
821 | unsigned iold, inew; |
822 | FlatRange *frold, *frnew; | |
093bc2cd AK |
823 | |
824 | /* Generate a symmetric difference of the old and new memory maps. | |
825 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
826 | */ | |
827 | iold = inew = 0; | |
a9a0c06d PB |
828 | while (iold < old_view->nr || inew < new_view->nr) { |
829 | if (iold < old_view->nr) { | |
830 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
831 | } else { |
832 | frold = NULL; | |
833 | } | |
a9a0c06d PB |
834 | if (inew < new_view->nr) { |
835 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
836 | } else { |
837 | frnew = NULL; | |
838 | } | |
839 | ||
840 | if (frold | |
841 | && (!frnew | |
08dafab4 AK |
842 | || int128_lt(frold->addr.start, frnew->addr.start) |
843 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 844 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 845 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 846 | |
b8af1afb | 847 | if (!adding) { |
72e22d2f | 848 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
849 | } |
850 | ||
093bc2cd AK |
851 | ++iold; |
852 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 853 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 854 | |
b8af1afb | 855 | if (adding) { |
50c1e149 | 856 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
857 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
858 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
859 | frold->dirty_log_mask, | |
860 | frnew->dirty_log_mask); | |
861 | } | |
862 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
863 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
864 | frold->dirty_log_mask, | |
865 | frnew->dirty_log_mask); | |
b8af1afb | 866 | } |
5a583347 AK |
867 | } |
868 | ||
093bc2cd AK |
869 | ++iold; |
870 | ++inew; | |
093bc2cd AK |
871 | } else { |
872 | /* In new */ | |
873 | ||
b8af1afb | 874 | if (adding) { |
72e22d2f | 875 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
b8af1afb AK |
876 | } |
877 | ||
093bc2cd AK |
878 | ++inew; |
879 | } | |
880 | } | |
b8af1afb AK |
881 | } |
882 | ||
883 | ||
884 | static void address_space_update_topology(AddressSpace *as) | |
885 | { | |
856d7245 | 886 | FlatView *old_view = address_space_get_flatview(as); |
a9a0c06d | 887 | FlatView *new_view = generate_memory_topology(as->root); |
b8af1afb AK |
888 | |
889 | address_space_update_topology_pass(as, old_view, new_view, false); | |
890 | address_space_update_topology_pass(as, old_view, new_view, true); | |
891 | ||
374f2981 PB |
892 | /* Writes are protected by the BQL. */ |
893 | atomic_rcu_set(&as->current_map, new_view); | |
894 | call_rcu(old_view, flatview_unref, rcu); | |
856d7245 PB |
895 | |
896 | /* Note that all the old MemoryRegions are still alive up to this | |
897 | * point. This relieves most MemoryListeners from the need to | |
898 | * ref/unref the MemoryRegions they get---unless they use them | |
899 | * outside the iothread mutex, in which case precise reference | |
900 | * counting is necessary. | |
901 | */ | |
902 | flatview_unref(old_view); | |
903 | ||
3e9d69e7 | 904 | address_space_update_ioeventfds(as); |
093bc2cd AK |
905 | } |
906 | ||
4ef4db86 AK |
907 | void memory_region_transaction_begin(void) |
908 | { | |
bb880ded | 909 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
910 | ++memory_region_transaction_depth; |
911 | } | |
912 | ||
913 | void memory_region_transaction_commit(void) | |
914 | { | |
0d673e36 AK |
915 | AddressSpace *as; |
916 | ||
4ef4db86 | 917 | assert(memory_region_transaction_depth); |
8d04fb55 JK |
918 | assert(qemu_mutex_iothread_locked()); |
919 | ||
4ef4db86 | 920 | --memory_region_transaction_depth; |
4dc56152 GA |
921 | if (!memory_region_transaction_depth) { |
922 | if (memory_region_update_pending) { | |
923 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); | |
02e2b95f | 924 | |
4dc56152 GA |
925 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
926 | address_space_update_topology(as); | |
927 | } | |
ade9c1aa | 928 | memory_region_update_pending = false; |
4dc56152 GA |
929 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
930 | } else if (ioeventfd_update_pending) { | |
931 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
932 | address_space_update_ioeventfds(as); | |
933 | } | |
ade9c1aa | 934 | ioeventfd_update_pending = false; |
4dc56152 | 935 | } |
4dc56152 | 936 | } |
4ef4db86 AK |
937 | } |
938 | ||
545e92e0 AK |
939 | static void memory_region_destructor_none(MemoryRegion *mr) |
940 | { | |
941 | } | |
942 | ||
943 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
944 | { | |
f1060c55 | 945 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
946 | } |
947 | ||
b4fefef9 PC |
948 | static bool memory_region_need_escape(char c) |
949 | { | |
950 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
951 | } | |
952 | ||
953 | static char *memory_region_escape_name(const char *name) | |
954 | { | |
955 | const char *p; | |
956 | char *escaped, *q; | |
957 | uint8_t c; | |
958 | size_t bytes = 0; | |
959 | ||
960 | for (p = name; *p; p++) { | |
961 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
962 | } | |
963 | if (bytes == p - name) { | |
964 | return g_memdup(name, bytes + 1); | |
965 | } | |
966 | ||
967 | escaped = g_malloc(bytes + 1); | |
968 | for (p = name, q = escaped; *p; p++) { | |
969 | c = *p; | |
970 | if (unlikely(memory_region_need_escape(c))) { | |
971 | *q++ = '\\'; | |
972 | *q++ = 'x'; | |
973 | *q++ = "0123456789abcdef"[c >> 4]; | |
974 | c = "0123456789abcdef"[c & 15]; | |
975 | } | |
976 | *q++ = c; | |
977 | } | |
978 | *q = 0; | |
979 | return escaped; | |
980 | } | |
981 | ||
3df9d748 AK |
982 | static void memory_region_do_init(MemoryRegion *mr, |
983 | Object *owner, | |
984 | const char *name, | |
985 | uint64_t size) | |
093bc2cd | 986 | { |
08dafab4 AK |
987 | mr->size = int128_make64(size); |
988 | if (size == UINT64_MAX) { | |
989 | mr->size = int128_2_64(); | |
990 | } | |
302fa283 | 991 | mr->name = g_strdup(name); |
612263cf | 992 | mr->owner = owner; |
58eaa217 | 993 | mr->ram_block = NULL; |
b4fefef9 PC |
994 | |
995 | if (name) { | |
843ef73a PC |
996 | char *escaped_name = memory_region_escape_name(name); |
997 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
998 | |
999 | if (!owner) { | |
1000 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1001 | } | |
1002 | ||
843ef73a | 1003 | object_property_add_child(owner, name_array, OBJECT(mr), &error_abort); |
b4fefef9 | 1004 | object_unref(OBJECT(mr)); |
843ef73a PC |
1005 | g_free(name_array); |
1006 | g_free(escaped_name); | |
b4fefef9 PC |
1007 | } |
1008 | } | |
1009 | ||
3df9d748 AK |
1010 | void memory_region_init(MemoryRegion *mr, |
1011 | Object *owner, | |
1012 | const char *name, | |
1013 | uint64_t size) | |
1014 | { | |
1015 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); | |
1016 | memory_region_do_init(mr, owner, name, size); | |
1017 | } | |
1018 | ||
d7bce999 EB |
1019 | static void memory_region_get_addr(Object *obj, Visitor *v, const char *name, |
1020 | void *opaque, Error **errp) | |
409ddd01 PC |
1021 | { |
1022 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1023 | uint64_t value = mr->addr; | |
1024 | ||
51e72bc1 | 1025 | visit_type_uint64(v, name, &value, errp); |
409ddd01 PC |
1026 | } |
1027 | ||
d7bce999 EB |
1028 | static void memory_region_get_container(Object *obj, Visitor *v, |
1029 | const char *name, void *opaque, | |
1030 | Error **errp) | |
409ddd01 PC |
1031 | { |
1032 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1033 | gchar *path = (gchar *)""; | |
1034 | ||
1035 | if (mr->container) { | |
1036 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1037 | } | |
51e72bc1 | 1038 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1039 | if (mr->container) { |
1040 | g_free(path); | |
1041 | } | |
1042 | } | |
1043 | ||
1044 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1045 | const char *part) | |
1046 | { | |
1047 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1048 | ||
1049 | return OBJECT(mr->container); | |
1050 | } | |
1051 | ||
d7bce999 EB |
1052 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1053 | const char *name, void *opaque, | |
1054 | Error **errp) | |
d33382da PC |
1055 | { |
1056 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1057 | int32_t value = mr->priority; | |
1058 | ||
51e72bc1 | 1059 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1060 | } |
1061 | ||
d7bce999 EB |
1062 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1063 | void *opaque, Error **errp) | |
52aef7bb PC |
1064 | { |
1065 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1066 | uint64_t value = memory_region_size(mr); | |
1067 | ||
51e72bc1 | 1068 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1069 | } |
1070 | ||
b4fefef9 PC |
1071 | static void memory_region_initfn(Object *obj) |
1072 | { | |
1073 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1074 | ObjectProperty *op; |
b4fefef9 PC |
1075 | |
1076 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1077 | mr->enabled = true; |
5f9a5ea1 | 1078 | mr->romd_mode = true; |
196ea131 | 1079 | mr->global_locking = true; |
545e92e0 | 1080 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1081 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1082 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1083 | |
1084 | op = object_property_add(OBJECT(mr), "container", | |
1085 | "link<" TYPE_MEMORY_REGION ">", | |
1086 | memory_region_get_container, | |
1087 | NULL, /* memory_region_set_container */ | |
1088 | NULL, NULL, &error_abort); | |
1089 | op->resolve = memory_region_resolve_container; | |
1090 | ||
1091 | object_property_add(OBJECT(mr), "addr", "uint64", | |
1092 | memory_region_get_addr, | |
1093 | NULL, /* memory_region_set_addr */ | |
1094 | NULL, NULL, &error_abort); | |
d33382da PC |
1095 | object_property_add(OBJECT(mr), "priority", "uint32", |
1096 | memory_region_get_priority, | |
1097 | NULL, /* memory_region_set_priority */ | |
1098 | NULL, NULL, &error_abort); | |
52aef7bb PC |
1099 | object_property_add(OBJECT(mr), "size", "uint64", |
1100 | memory_region_get_size, | |
1101 | NULL, /* memory_region_set_size, */ | |
1102 | NULL, NULL, &error_abort); | |
093bc2cd AK |
1103 | } |
1104 | ||
3df9d748 AK |
1105 | static void iommu_memory_region_initfn(Object *obj) |
1106 | { | |
1107 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1108 | ||
1109 | mr->is_iommu = true; | |
1110 | } | |
1111 | ||
b018ddf6 PB |
1112 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1113 | unsigned size) | |
1114 | { | |
1115 | #ifdef DEBUG_UNASSIGNED | |
1116 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1117 | #endif | |
4917cf44 AF |
1118 | if (current_cpu != NULL) { |
1119 | cpu_unassigned_access(current_cpu, addr, false, false, 0, size); | |
c658b94f | 1120 | } |
68a7439a | 1121 | return 0; |
b018ddf6 PB |
1122 | } |
1123 | ||
1124 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1125 | uint64_t val, unsigned size) | |
1126 | { | |
1127 | #ifdef DEBUG_UNASSIGNED | |
1128 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1129 | #endif | |
4917cf44 AF |
1130 | if (current_cpu != NULL) { |
1131 | cpu_unassigned_access(current_cpu, addr, true, false, 0, size); | |
c658b94f | 1132 | } |
b018ddf6 PB |
1133 | } |
1134 | ||
d197063f PB |
1135 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
1136 | unsigned size, bool is_write) | |
1137 | { | |
1138 | return false; | |
1139 | } | |
1140 | ||
1141 | const MemoryRegionOps unassigned_mem_ops = { | |
1142 | .valid.accepts = unassigned_mem_accepts, | |
1143 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1144 | }; | |
1145 | ||
4a2e242b AW |
1146 | static uint64_t memory_region_ram_device_read(void *opaque, |
1147 | hwaddr addr, unsigned size) | |
1148 | { | |
1149 | MemoryRegion *mr = opaque; | |
1150 | uint64_t data = (uint64_t)~0; | |
1151 | ||
1152 | switch (size) { | |
1153 | case 1: | |
1154 | data = *(uint8_t *)(mr->ram_block->host + addr); | |
1155 | break; | |
1156 | case 2: | |
1157 | data = *(uint16_t *)(mr->ram_block->host + addr); | |
1158 | break; | |
1159 | case 4: | |
1160 | data = *(uint32_t *)(mr->ram_block->host + addr); | |
1161 | break; | |
1162 | case 8: | |
1163 | data = *(uint64_t *)(mr->ram_block->host + addr); | |
1164 | break; | |
1165 | } | |
1166 | ||
1167 | trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size); | |
1168 | ||
1169 | return data; | |
1170 | } | |
1171 | ||
1172 | static void memory_region_ram_device_write(void *opaque, hwaddr addr, | |
1173 | uint64_t data, unsigned size) | |
1174 | { | |
1175 | MemoryRegion *mr = opaque; | |
1176 | ||
1177 | trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size); | |
1178 | ||
1179 | switch (size) { | |
1180 | case 1: | |
1181 | *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data; | |
1182 | break; | |
1183 | case 2: | |
1184 | *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data; | |
1185 | break; | |
1186 | case 4: | |
1187 | *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data; | |
1188 | break; | |
1189 | case 8: | |
1190 | *(uint64_t *)(mr->ram_block->host + addr) = data; | |
1191 | break; | |
1192 | } | |
1193 | } | |
1194 | ||
1195 | static const MemoryRegionOps ram_device_mem_ops = { | |
1196 | .read = memory_region_ram_device_read, | |
1197 | .write = memory_region_ram_device_write, | |
c99a29e7 | 1198 | .endianness = DEVICE_HOST_ENDIAN, |
4a2e242b AW |
1199 | .valid = { |
1200 | .min_access_size = 1, | |
1201 | .max_access_size = 8, | |
1202 | .unaligned = true, | |
1203 | }, | |
1204 | .impl = { | |
1205 | .min_access_size = 1, | |
1206 | .max_access_size = 8, | |
1207 | .unaligned = true, | |
1208 | }, | |
1209 | }; | |
1210 | ||
d2702032 PB |
1211 | bool memory_region_access_valid(MemoryRegion *mr, |
1212 | hwaddr addr, | |
1213 | unsigned size, | |
1214 | bool is_write) | |
093bc2cd | 1215 | { |
a014ed07 PB |
1216 | int access_size_min, access_size_max; |
1217 | int access_size, i; | |
897fa7cf | 1218 | |
093bc2cd AK |
1219 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
1220 | return false; | |
1221 | } | |
1222 | ||
a014ed07 | 1223 | if (!mr->ops->valid.accepts) { |
093bc2cd AK |
1224 | return true; |
1225 | } | |
1226 | ||
a014ed07 PB |
1227 | access_size_min = mr->ops->valid.min_access_size; |
1228 | if (!mr->ops->valid.min_access_size) { | |
1229 | access_size_min = 1; | |
1230 | } | |
1231 | ||
1232 | access_size_max = mr->ops->valid.max_access_size; | |
1233 | if (!mr->ops->valid.max_access_size) { | |
1234 | access_size_max = 4; | |
1235 | } | |
1236 | ||
1237 | access_size = MAX(MIN(size, access_size_max), access_size_min); | |
1238 | for (i = 0; i < size; i += access_size) { | |
1239 | if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, | |
1240 | is_write)) { | |
1241 | return false; | |
1242 | } | |
093bc2cd | 1243 | } |
a014ed07 | 1244 | |
093bc2cd AK |
1245 | return true; |
1246 | } | |
1247 | ||
cc05c43a PM |
1248 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1249 | hwaddr addr, | |
1250 | uint64_t *pval, | |
1251 | unsigned size, | |
1252 | MemTxAttrs attrs) | |
093bc2cd | 1253 | { |
cc05c43a | 1254 | *pval = 0; |
093bc2cd | 1255 | |
ce5d2f33 | 1256 | if (mr->ops->read) { |
cc05c43a PM |
1257 | return access_with_adjusted_size(addr, pval, size, |
1258 | mr->ops->impl.min_access_size, | |
1259 | mr->ops->impl.max_access_size, | |
1260 | memory_region_read_accessor, | |
1261 | mr, attrs); | |
1262 | } else if (mr->ops->read_with_attrs) { | |
1263 | return access_with_adjusted_size(addr, pval, size, | |
1264 | mr->ops->impl.min_access_size, | |
1265 | mr->ops->impl.max_access_size, | |
1266 | memory_region_read_with_attrs_accessor, | |
1267 | mr, attrs); | |
ce5d2f33 | 1268 | } else { |
cc05c43a PM |
1269 | return access_with_adjusted_size(addr, pval, size, 1, 4, |
1270 | memory_region_oldmmio_read_accessor, | |
1271 | mr, attrs); | |
74901c3b | 1272 | } |
093bc2cd AK |
1273 | } |
1274 | ||
3b643495 PM |
1275 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1276 | hwaddr addr, | |
1277 | uint64_t *pval, | |
1278 | unsigned size, | |
1279 | MemTxAttrs attrs) | |
a621f38d | 1280 | { |
cc05c43a PM |
1281 | MemTxResult r; |
1282 | ||
791af8c8 PB |
1283 | if (!memory_region_access_valid(mr, addr, size, false)) { |
1284 | *pval = unassigned_mem_read(mr, addr, size); | |
cc05c43a | 1285 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1286 | } |
a621f38d | 1287 | |
cc05c43a | 1288 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
791af8c8 | 1289 | adjust_endianness(mr, pval, size); |
cc05c43a | 1290 | return r; |
a621f38d | 1291 | } |
093bc2cd | 1292 | |
8c56c1a5 PF |
1293 | /* Return true if an eventfd was signalled */ |
1294 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1295 | hwaddr addr, | |
1296 | uint64_t data, | |
1297 | unsigned size, | |
1298 | MemTxAttrs attrs) | |
1299 | { | |
1300 | MemoryRegionIoeventfd ioeventfd = { | |
1301 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1302 | .data = data, | |
1303 | }; | |
1304 | unsigned i; | |
1305 | ||
1306 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1307 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1308 | ioeventfd.e = mr->ioeventfds[i].e; | |
1309 | ||
1310 | if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) { | |
1311 | event_notifier_set(ioeventfd.e); | |
1312 | return true; | |
1313 | } | |
1314 | } | |
1315 | ||
1316 | return false; | |
1317 | } | |
1318 | ||
3b643495 PM |
1319 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1320 | hwaddr addr, | |
1321 | uint64_t data, | |
1322 | unsigned size, | |
1323 | MemTxAttrs attrs) | |
a621f38d | 1324 | { |
897fa7cf | 1325 | if (!memory_region_access_valid(mr, addr, size, true)) { |
b018ddf6 | 1326 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1327 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1328 | } |
1329 | ||
a621f38d AK |
1330 | adjust_endianness(mr, &data, size); |
1331 | ||
8c56c1a5 PF |
1332 | if ((!kvm_eventfds_enabled()) && |
1333 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1334 | return MEMTX_OK; | |
1335 | } | |
1336 | ||
ce5d2f33 | 1337 | if (mr->ops->write) { |
cc05c43a PM |
1338 | return access_with_adjusted_size(addr, &data, size, |
1339 | mr->ops->impl.min_access_size, | |
1340 | mr->ops->impl.max_access_size, | |
1341 | memory_region_write_accessor, mr, | |
1342 | attrs); | |
1343 | } else if (mr->ops->write_with_attrs) { | |
1344 | return | |
1345 | access_with_adjusted_size(addr, &data, size, | |
1346 | mr->ops->impl.min_access_size, | |
1347 | mr->ops->impl.max_access_size, | |
1348 | memory_region_write_with_attrs_accessor, | |
1349 | mr, attrs); | |
ce5d2f33 | 1350 | } else { |
cc05c43a PM |
1351 | return access_with_adjusted_size(addr, &data, size, 1, 4, |
1352 | memory_region_oldmmio_write_accessor, | |
1353 | mr, attrs); | |
74901c3b | 1354 | } |
093bc2cd AK |
1355 | } |
1356 | ||
093bc2cd | 1357 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1358 | Object *owner, |
093bc2cd AK |
1359 | const MemoryRegionOps *ops, |
1360 | void *opaque, | |
1361 | const char *name, | |
1362 | uint64_t size) | |
1363 | { | |
2c9b15ca | 1364 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1365 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1366 | mr->opaque = opaque; |
14a3c10a | 1367 | mr->terminates = true; |
093bc2cd AK |
1368 | } |
1369 | ||
1cfe48c1 PM |
1370 | void memory_region_init_ram_nomigrate(MemoryRegion *mr, |
1371 | Object *owner, | |
1372 | const char *name, | |
1373 | uint64_t size, | |
1374 | Error **errp) | |
093bc2cd | 1375 | { |
2c9b15ca | 1376 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1377 | mr->ram = true; |
14a3c10a | 1378 | mr->terminates = true; |
545e92e0 | 1379 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1380 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
677e7805 | 1381 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
0b183fc8 PB |
1382 | } |
1383 | ||
60786ef3 MT |
1384 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1385 | Object *owner, | |
1386 | const char *name, | |
1387 | uint64_t size, | |
1388 | uint64_t max_size, | |
1389 | void (*resized)(const char*, | |
1390 | uint64_t length, | |
1391 | void *host), | |
1392 | Error **errp) | |
1393 | { | |
1394 | memory_region_init(mr, owner, name, size); | |
1395 | mr->ram = true; | |
1396 | mr->terminates = true; | |
1397 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 FZ |
1398 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1399 | mr, errp); | |
677e7805 | 1400 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
60786ef3 MT |
1401 | } |
1402 | ||
0b183fc8 PB |
1403 | #ifdef __linux__ |
1404 | void memory_region_init_ram_from_file(MemoryRegion *mr, | |
1405 | struct Object *owner, | |
1406 | const char *name, | |
1407 | uint64_t size, | |
dbcb8981 | 1408 | bool share, |
7f56e740 PB |
1409 | const char *path, |
1410 | Error **errp) | |
0b183fc8 PB |
1411 | { |
1412 | memory_region_init(mr, owner, name, size); | |
1413 | mr->ram = true; | |
1414 | mr->terminates = true; | |
1415 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1416 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp); |
677e7805 | 1417 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
093bc2cd | 1418 | } |
fea617c5 MAL |
1419 | |
1420 | void memory_region_init_ram_from_fd(MemoryRegion *mr, | |
1421 | struct Object *owner, | |
1422 | const char *name, | |
1423 | uint64_t size, | |
1424 | bool share, | |
1425 | int fd, | |
1426 | Error **errp) | |
1427 | { | |
1428 | memory_region_init(mr, owner, name, size); | |
1429 | mr->ram = true; | |
1430 | mr->terminates = true; | |
1431 | mr->destructor = memory_region_destructor_ram; | |
1432 | mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp); | |
1433 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1434 | } | |
0b183fc8 | 1435 | #endif |
093bc2cd AK |
1436 | |
1437 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1438 | Object *owner, |
093bc2cd AK |
1439 | const char *name, |
1440 | uint64_t size, | |
1441 | void *ptr) | |
1442 | { | |
2c9b15ca | 1443 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1444 | mr->ram = true; |
14a3c10a | 1445 | mr->terminates = true; |
fc3e7665 | 1446 | mr->destructor = memory_region_destructor_ram; |
677e7805 | 1447 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; |
ef701d7b HT |
1448 | |
1449 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1450 | assert(ptr != NULL); | |
8e41fb63 | 1451 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1452 | } |
1453 | ||
21e00fa5 AW |
1454 | void memory_region_init_ram_device_ptr(MemoryRegion *mr, |
1455 | Object *owner, | |
1456 | const char *name, | |
1457 | uint64_t size, | |
1458 | void *ptr) | |
e4dc3f59 | 1459 | { |
21e00fa5 AW |
1460 | memory_region_init_ram_ptr(mr, owner, name, size, ptr); |
1461 | mr->ram_device = true; | |
4a2e242b AW |
1462 | mr->ops = &ram_device_mem_ops; |
1463 | mr->opaque = mr; | |
e4dc3f59 ND |
1464 | } |
1465 | ||
093bc2cd | 1466 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1467 | Object *owner, |
093bc2cd AK |
1468 | const char *name, |
1469 | MemoryRegion *orig, | |
a8170e5e | 1470 | hwaddr offset, |
093bc2cd AK |
1471 | uint64_t size) |
1472 | { | |
2c9b15ca | 1473 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1474 | mr->alias = orig; |
1475 | mr->alias_offset = offset; | |
1476 | } | |
1477 | ||
b59821a9 PM |
1478 | void memory_region_init_rom_nomigrate(MemoryRegion *mr, |
1479 | struct Object *owner, | |
1480 | const char *name, | |
1481 | uint64_t size, | |
1482 | Error **errp) | |
a1777f7f PM |
1483 | { |
1484 | memory_region_init(mr, owner, name, size); | |
1485 | mr->ram = true; | |
1486 | mr->readonly = true; | |
1487 | mr->terminates = true; | |
1488 | mr->destructor = memory_region_destructor_ram; | |
1489 | mr->ram_block = qemu_ram_alloc(size, mr, errp); | |
1490 | mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; | |
1491 | } | |
1492 | ||
b59821a9 PM |
1493 | void memory_region_init_rom_device_nomigrate(MemoryRegion *mr, |
1494 | Object *owner, | |
1495 | const MemoryRegionOps *ops, | |
1496 | void *opaque, | |
1497 | const char *name, | |
1498 | uint64_t size, | |
1499 | Error **errp) | |
d0a9b5bc | 1500 | { |
39e0b03d | 1501 | assert(ops); |
2c9b15ca | 1502 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1503 | mr->ops = ops; |
75f5941c | 1504 | mr->opaque = opaque; |
d0a9b5bc | 1505 | mr->terminates = true; |
75c578dc | 1506 | mr->rom_device = true; |
58268c8d | 1507 | mr->destructor = memory_region_destructor_ram; |
8e41fb63 | 1508 | mr->ram_block = qemu_ram_alloc(size, mr, errp); |
d0a9b5bc AK |
1509 | } |
1510 | ||
1221a474 AK |
1511 | void memory_region_init_iommu(void *_iommu_mr, |
1512 | size_t instance_size, | |
1513 | const char *mrtypename, | |
2c9b15ca | 1514 | Object *owner, |
30951157 AK |
1515 | const char *name, |
1516 | uint64_t size) | |
1517 | { | |
1221a474 | 1518 | struct IOMMUMemoryRegion *iommu_mr; |
3df9d748 AK |
1519 | struct MemoryRegion *mr; |
1520 | ||
1221a474 AK |
1521 | object_initialize(_iommu_mr, instance_size, mrtypename); |
1522 | mr = MEMORY_REGION(_iommu_mr); | |
3df9d748 AK |
1523 | memory_region_do_init(mr, owner, name, size); |
1524 | iommu_mr = IOMMU_MEMORY_REGION(mr); | |
30951157 | 1525 | mr->terminates = true; /* then re-forwards */ |
3df9d748 AK |
1526 | QLIST_INIT(&iommu_mr->iommu_notify); |
1527 | iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE; | |
30951157 AK |
1528 | } |
1529 | ||
b4fefef9 | 1530 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1531 | { |
b4fefef9 PC |
1532 | MemoryRegion *mr = MEMORY_REGION(obj); |
1533 | ||
2e2b8eb7 PB |
1534 | assert(!mr->container); |
1535 | ||
1536 | /* We know the region is not visible in any address space (it | |
1537 | * does not have a container and cannot be a root either because | |
1538 | * it has no references, so we can blindly clear mr->enabled. | |
1539 | * memory_region_set_enabled instead could trigger a transaction | |
1540 | * and cause an infinite loop. | |
1541 | */ | |
1542 | mr->enabled = false; | |
1543 | memory_region_transaction_begin(); | |
1544 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1545 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1546 | memory_region_del_subregion(mr, subregion); | |
1547 | } | |
1548 | memory_region_transaction_commit(); | |
1549 | ||
545e92e0 | 1550 | mr->destructor(mr); |
093bc2cd | 1551 | memory_region_clear_coalescing(mr); |
302fa283 | 1552 | g_free((char *)mr->name); |
7267c094 | 1553 | g_free(mr->ioeventfds); |
093bc2cd AK |
1554 | } |
1555 | ||
803c0816 PB |
1556 | Object *memory_region_owner(MemoryRegion *mr) |
1557 | { | |
22a893e4 PB |
1558 | Object *obj = OBJECT(mr); |
1559 | return obj->parent; | |
803c0816 PB |
1560 | } |
1561 | ||
46637be2 PB |
1562 | void memory_region_ref(MemoryRegion *mr) |
1563 | { | |
22a893e4 PB |
1564 | /* MMIO callbacks most likely will access data that belongs |
1565 | * to the owner, hence the need to ref/unref the owner whenever | |
1566 | * the memory region is in use. | |
1567 | * | |
1568 | * The memory region is a child of its owner. As long as the | |
1569 | * owner doesn't call unparent itself on the memory region, | |
1570 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1571 | * Memory regions without an owner are supposed to never go away; |
1572 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1573 | */ |
612263cf PB |
1574 | if (mr && mr->owner) { |
1575 | object_ref(mr->owner); | |
46637be2 PB |
1576 | } |
1577 | } | |
1578 | ||
1579 | void memory_region_unref(MemoryRegion *mr) | |
1580 | { | |
612263cf PB |
1581 | if (mr && mr->owner) { |
1582 | object_unref(mr->owner); | |
46637be2 PB |
1583 | } |
1584 | } | |
1585 | ||
093bc2cd AK |
1586 | uint64_t memory_region_size(MemoryRegion *mr) |
1587 | { | |
08dafab4 AK |
1588 | if (int128_eq(mr->size, int128_2_64())) { |
1589 | return UINT64_MAX; | |
1590 | } | |
1591 | return int128_get64(mr->size); | |
093bc2cd AK |
1592 | } |
1593 | ||
5d546d4b | 1594 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1595 | { |
d1dd32af PC |
1596 | if (!mr->name) { |
1597 | ((MemoryRegion *)mr)->name = | |
1598 | object_get_canonical_path_component(OBJECT(mr)); | |
1599 | } | |
302fa283 | 1600 | return mr->name; |
8991c79b AK |
1601 | } |
1602 | ||
21e00fa5 | 1603 | bool memory_region_is_ram_device(MemoryRegion *mr) |
e4dc3f59 | 1604 | { |
21e00fa5 | 1605 | return mr->ram_device; |
e4dc3f59 ND |
1606 | } |
1607 | ||
2d1a35be | 1608 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1609 | { |
6f6a5ef3 | 1610 | uint8_t mask = mr->dirty_log_mask; |
adaad61c | 1611 | if (global_dirty_log && mr->ram_block) { |
6f6a5ef3 PB |
1612 | mask |= (1 << DIRTY_MEMORY_MIGRATION); |
1613 | } | |
1614 | return mask; | |
55043ba3 AK |
1615 | } |
1616 | ||
2d1a35be PB |
1617 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1618 | { | |
1619 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1620 | } | |
1621 | ||
3df9d748 | 1622 | static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr) |
5bf3d319 PX |
1623 | { |
1624 | IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE; | |
1625 | IOMMUNotifier *iommu_notifier; | |
1221a474 | 1626 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
5bf3d319 | 1627 | |
3df9d748 | 1628 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { |
5bf3d319 PX |
1629 | flags |= iommu_notifier->notifier_flags; |
1630 | } | |
1631 | ||
1221a474 AK |
1632 | if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) { |
1633 | imrc->notify_flag_changed(iommu_mr, | |
1634 | iommu_mr->iommu_notify_flags, | |
1635 | flags); | |
5bf3d319 PX |
1636 | } |
1637 | ||
3df9d748 | 1638 | iommu_mr->iommu_notify_flags = flags; |
5bf3d319 PX |
1639 | } |
1640 | ||
cdb30812 PX |
1641 | void memory_region_register_iommu_notifier(MemoryRegion *mr, |
1642 | IOMMUNotifier *n) | |
06866575 | 1643 | { |
3df9d748 AK |
1644 | IOMMUMemoryRegion *iommu_mr; |
1645 | ||
efcd38c5 JW |
1646 | if (mr->alias) { |
1647 | memory_region_register_iommu_notifier(mr->alias, n); | |
1648 | return; | |
1649 | } | |
1650 | ||
cdb30812 | 1651 | /* We need to register for at least one bitfield */ |
3df9d748 | 1652 | iommu_mr = IOMMU_MEMORY_REGION(mr); |
cdb30812 | 1653 | assert(n->notifier_flags != IOMMU_NOTIFIER_NONE); |
698feb5e | 1654 | assert(n->start <= n->end); |
3df9d748 AK |
1655 | QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node); |
1656 | memory_region_update_iommu_notify_flags(iommu_mr); | |
06866575 DG |
1657 | } |
1658 | ||
3df9d748 | 1659 | uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr) |
a788f227 | 1660 | { |
1221a474 AK |
1661 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
1662 | ||
1663 | if (imrc->get_min_page_size) { | |
1664 | return imrc->get_min_page_size(iommu_mr); | |
f682e9c2 AK |
1665 | } |
1666 | return TARGET_PAGE_SIZE; | |
1667 | } | |
1668 | ||
3df9d748 | 1669 | void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n) |
f682e9c2 | 1670 | { |
3df9d748 | 1671 | MemoryRegion *mr = MEMORY_REGION(iommu_mr); |
1221a474 | 1672 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
f682e9c2 | 1673 | hwaddr addr, granularity; |
a788f227 DG |
1674 | IOMMUTLBEntry iotlb; |
1675 | ||
faa362e3 | 1676 | /* If the IOMMU has its own replay callback, override */ |
1221a474 AK |
1677 | if (imrc->replay) { |
1678 | imrc->replay(iommu_mr, n); | |
faa362e3 PX |
1679 | return; |
1680 | } | |
1681 | ||
3df9d748 | 1682 | granularity = memory_region_iommu_get_min_page_size(iommu_mr); |
f682e9c2 | 1683 | |
a788f227 | 1684 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { |
1221a474 | 1685 | iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE); |
a788f227 DG |
1686 | if (iotlb.perm != IOMMU_NONE) { |
1687 | n->notify(n, &iotlb); | |
1688 | } | |
1689 | ||
1690 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1691 | * infinite loop here. This should catch such a wraparound */ | |
1692 | if ((addr + granularity) < addr) { | |
1693 | break; | |
1694 | } | |
1695 | } | |
1696 | } | |
1697 | ||
3df9d748 | 1698 | void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr) |
de472e4a PX |
1699 | { |
1700 | IOMMUNotifier *notifier; | |
1701 | ||
3df9d748 AK |
1702 | IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) { |
1703 | memory_region_iommu_replay(iommu_mr, notifier); | |
de472e4a PX |
1704 | } |
1705 | } | |
1706 | ||
cdb30812 PX |
1707 | void memory_region_unregister_iommu_notifier(MemoryRegion *mr, |
1708 | IOMMUNotifier *n) | |
06866575 | 1709 | { |
3df9d748 AK |
1710 | IOMMUMemoryRegion *iommu_mr; |
1711 | ||
efcd38c5 JW |
1712 | if (mr->alias) { |
1713 | memory_region_unregister_iommu_notifier(mr->alias, n); | |
1714 | return; | |
1715 | } | |
cdb30812 | 1716 | QLIST_REMOVE(n, node); |
3df9d748 AK |
1717 | iommu_mr = IOMMU_MEMORY_REGION(mr); |
1718 | memory_region_update_iommu_notify_flags(iommu_mr); | |
06866575 DG |
1719 | } |
1720 | ||
bd2bfa4c PX |
1721 | void memory_region_notify_one(IOMMUNotifier *notifier, |
1722 | IOMMUTLBEntry *entry) | |
06866575 | 1723 | { |
cdb30812 PX |
1724 | IOMMUNotifierFlag request_flags; |
1725 | ||
bd2bfa4c PX |
1726 | /* |
1727 | * Skip the notification if the notification does not overlap | |
1728 | * with registered range. | |
1729 | */ | |
1730 | if (notifier->start > entry->iova + entry->addr_mask + 1 || | |
1731 | notifier->end < entry->iova) { | |
1732 | return; | |
1733 | } | |
cdb30812 | 1734 | |
bd2bfa4c | 1735 | if (entry->perm & IOMMU_RW) { |
cdb30812 PX |
1736 | request_flags = IOMMU_NOTIFIER_MAP; |
1737 | } else { | |
1738 | request_flags = IOMMU_NOTIFIER_UNMAP; | |
1739 | } | |
1740 | ||
bd2bfa4c PX |
1741 | if (notifier->notifier_flags & request_flags) { |
1742 | notifier->notify(notifier, entry); | |
1743 | } | |
1744 | } | |
1745 | ||
3df9d748 | 1746 | void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, |
bd2bfa4c PX |
1747 | IOMMUTLBEntry entry) |
1748 | { | |
1749 | IOMMUNotifier *iommu_notifier; | |
1750 | ||
3df9d748 | 1751 | assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr))); |
bd2bfa4c | 1752 | |
3df9d748 | 1753 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { |
bd2bfa4c | 1754 | memory_region_notify_one(iommu_notifier, &entry); |
cdb30812 | 1755 | } |
06866575 DG |
1756 | } |
1757 | ||
093bc2cd AK |
1758 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1759 | { | |
5a583347 | 1760 | uint8_t mask = 1 << client; |
deb809ed | 1761 | uint8_t old_logging; |
5a583347 | 1762 | |
dbddac6d | 1763 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
1764 | old_logging = mr->vga_logging_count; |
1765 | mr->vga_logging_count += log ? 1 : -1; | |
1766 | if (!!old_logging == !!mr->vga_logging_count) { | |
1767 | return; | |
1768 | } | |
1769 | ||
59023ef4 | 1770 | memory_region_transaction_begin(); |
5a583347 | 1771 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 1772 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1773 | memory_region_transaction_commit(); |
093bc2cd AK |
1774 | } |
1775 | ||
a8170e5e AK |
1776 | bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr, |
1777 | hwaddr size, unsigned client) | |
093bc2cd | 1778 | { |
8e41fb63 FZ |
1779 | assert(mr->ram_block); |
1780 | return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr, | |
1781 | size, client); | |
093bc2cd AK |
1782 | } |
1783 | ||
a8170e5e AK |
1784 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
1785 | hwaddr size) | |
093bc2cd | 1786 | { |
8e41fb63 FZ |
1787 | assert(mr->ram_block); |
1788 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
1789 | size, | |
58d2707e | 1790 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
1791 | } |
1792 | ||
6c279db8 JQ |
1793 | bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr, |
1794 | hwaddr size, unsigned client) | |
1795 | { | |
8e41fb63 FZ |
1796 | assert(mr->ram_block); |
1797 | return cpu_physical_memory_test_and_clear_dirty( | |
1798 | memory_region_get_ram_addr(mr) + addr, size, client); | |
6c279db8 JQ |
1799 | } |
1800 | ||
8deaf12c GH |
1801 | DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr, |
1802 | hwaddr addr, | |
1803 | hwaddr size, | |
1804 | unsigned client) | |
1805 | { | |
1806 | assert(mr->ram_block); | |
1807 | return cpu_physical_memory_snapshot_and_clear_dirty( | |
1808 | memory_region_get_ram_addr(mr) + addr, size, client); | |
1809 | } | |
1810 | ||
1811 | bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap, | |
1812 | hwaddr addr, hwaddr size) | |
1813 | { | |
1814 | assert(mr->ram_block); | |
1815 | return cpu_physical_memory_snapshot_get_dirty(snap, | |
1816 | memory_region_get_ram_addr(mr) + addr, size); | |
1817 | } | |
6c279db8 | 1818 | |
093bc2cd AK |
1819 | void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
1820 | { | |
0a752eee | 1821 | MemoryListener *listener; |
0d673e36 | 1822 | AddressSpace *as; |
0a752eee | 1823 | FlatView *view; |
5a583347 AK |
1824 | FlatRange *fr; |
1825 | ||
0a752eee PB |
1826 | /* If the same address space has multiple log_sync listeners, we |
1827 | * visit that address space's FlatView multiple times. But because | |
1828 | * log_sync listeners are rare, it's still cheaper than walking each | |
1829 | * address space once. | |
1830 | */ | |
1831 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
1832 | if (!listener->log_sync) { | |
1833 | continue; | |
1834 | } | |
1835 | as = listener->address_space; | |
1836 | view = address_space_get_flatview(as); | |
99e86347 | 1837 | FOR_EACH_FLAT_RANGE(fr, view) { |
0d673e36 | 1838 | if (fr->mr == mr) { |
0a752eee PB |
1839 | MemoryRegionSection mrs = section_from_flat_range(fr, as); |
1840 | listener->log_sync(listener, &mrs); | |
0d673e36 | 1841 | } |
5a583347 | 1842 | } |
856d7245 | 1843 | flatview_unref(view); |
5a583347 | 1844 | } |
093bc2cd AK |
1845 | } |
1846 | ||
1847 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) | |
1848 | { | |
fb1cd6f9 | 1849 | if (mr->readonly != readonly) { |
59023ef4 | 1850 | memory_region_transaction_begin(); |
fb1cd6f9 | 1851 | mr->readonly = readonly; |
22bde714 | 1852 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1853 | memory_region_transaction_commit(); |
fb1cd6f9 | 1854 | } |
093bc2cd AK |
1855 | } |
1856 | ||
5f9a5ea1 | 1857 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 1858 | { |
5f9a5ea1 | 1859 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 1860 | memory_region_transaction_begin(); |
5f9a5ea1 | 1861 | mr->romd_mode = romd_mode; |
22bde714 | 1862 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 1863 | memory_region_transaction_commit(); |
d0a9b5bc AK |
1864 | } |
1865 | } | |
1866 | ||
a8170e5e AK |
1867 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
1868 | hwaddr size, unsigned client) | |
093bc2cd | 1869 | { |
8e41fb63 FZ |
1870 | assert(mr->ram_block); |
1871 | cpu_physical_memory_test_and_clear_dirty( | |
1872 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
1873 | } |
1874 | ||
a35ba7be PB |
1875 | int memory_region_get_fd(MemoryRegion *mr) |
1876 | { | |
4ff87573 PB |
1877 | int fd; |
1878 | ||
1879 | rcu_read_lock(); | |
1880 | while (mr->alias) { | |
1881 | mr = mr->alias; | |
a35ba7be | 1882 | } |
4ff87573 PB |
1883 | fd = mr->ram_block->fd; |
1884 | rcu_read_unlock(); | |
a35ba7be | 1885 | |
4ff87573 PB |
1886 | return fd; |
1887 | } | |
a35ba7be | 1888 | |
093bc2cd AK |
1889 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
1890 | { | |
49b24afc PB |
1891 | void *ptr; |
1892 | uint64_t offset = 0; | |
093bc2cd | 1893 | |
49b24afc PB |
1894 | rcu_read_lock(); |
1895 | while (mr->alias) { | |
1896 | offset += mr->alias_offset; | |
1897 | mr = mr->alias; | |
1898 | } | |
8e41fb63 | 1899 | assert(mr->ram_block); |
0878d0e1 | 1900 | ptr = qemu_map_ram_ptr(mr->ram_block, offset); |
49b24afc | 1901 | rcu_read_unlock(); |
093bc2cd | 1902 | |
0878d0e1 | 1903 | return ptr; |
093bc2cd AK |
1904 | } |
1905 | ||
07bdaa41 PB |
1906 | MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset) |
1907 | { | |
1908 | RAMBlock *block; | |
1909 | ||
1910 | block = qemu_ram_block_from_host(ptr, false, offset); | |
1911 | if (!block) { | |
1912 | return NULL; | |
1913 | } | |
1914 | ||
1915 | return block->mr; | |
1916 | } | |
1917 | ||
7ebb2745 FZ |
1918 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1919 | { | |
1920 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
1921 | } | |
1922 | ||
37d7c084 PB |
1923 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
1924 | { | |
8e41fb63 | 1925 | assert(mr->ram_block); |
37d7c084 | 1926 | |
fa53a0e5 | 1927 | qemu_ram_resize(mr->ram_block, newsize, errp); |
37d7c084 PB |
1928 | } |
1929 | ||
0d673e36 | 1930 | static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
093bc2cd | 1931 | { |
99e86347 | 1932 | FlatView *view; |
093bc2cd AK |
1933 | FlatRange *fr; |
1934 | CoalescedMemoryRange *cmr; | |
1935 | AddrRange tmp; | |
95d2994a | 1936 | MemoryRegionSection section; |
093bc2cd | 1937 | |
856d7245 | 1938 | view = address_space_get_flatview(as); |
99e86347 | 1939 | FOR_EACH_FLAT_RANGE(fr, view) { |
093bc2cd | 1940 | if (fr->mr == mr) { |
95d2994a | 1941 | section = (MemoryRegionSection) { |
f6790af6 | 1942 | .address_space = as, |
95d2994a | 1943 | .offset_within_address_space = int128_get64(fr->addr.start), |
052e87b0 | 1944 | .size = fr->addr.size, |
95d2994a AK |
1945 | }; |
1946 | ||
9a54635d | 1947 | MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, §ion, |
95d2994a AK |
1948 | int128_get64(fr->addr.start), |
1949 | int128_get64(fr->addr.size)); | |
093bc2cd AK |
1950 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1951 | tmp = addrrange_shift(cmr->addr, | |
08dafab4 AK |
1952 | int128_sub(fr->addr.start, |
1953 | int128_make64(fr->offset_in_region))); | |
093bc2cd AK |
1954 | if (!addrrange_intersects(tmp, fr->addr)) { |
1955 | continue; | |
1956 | } | |
1957 | tmp = addrrange_intersection(tmp, fr->addr); | |
9a54635d | 1958 | MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, §ion, |
95d2994a AK |
1959 | int128_get64(tmp.start), |
1960 | int128_get64(tmp.size)); | |
093bc2cd AK |
1961 | } |
1962 | } | |
1963 | } | |
856d7245 | 1964 | flatview_unref(view); |
093bc2cd AK |
1965 | } |
1966 | ||
0d673e36 AK |
1967 | static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1968 | { | |
1969 | AddressSpace *as; | |
1970 | ||
1971 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1972 | memory_region_update_coalesced_range_as(mr, as); | |
1973 | } | |
1974 | } | |
1975 | ||
093bc2cd AK |
1976 | void memory_region_set_coalescing(MemoryRegion *mr) |
1977 | { | |
1978 | memory_region_clear_coalescing(mr); | |
08dafab4 | 1979 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
1980 | } |
1981 | ||
1982 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 1983 | hwaddr offset, |
093bc2cd AK |
1984 | uint64_t size) |
1985 | { | |
7267c094 | 1986 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 1987 | |
08dafab4 | 1988 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd AK |
1989 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1990 | memory_region_update_coalesced_range(mr); | |
d410515e | 1991 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
1992 | } |
1993 | ||
1994 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
1995 | { | |
1996 | CoalescedMemoryRange *cmr; | |
ab5b3db5 | 1997 | bool updated = false; |
093bc2cd | 1998 | |
d410515e JK |
1999 | qemu_flush_coalesced_mmio_buffer(); |
2000 | mr->flush_coalesced_mmio = false; | |
2001 | ||
093bc2cd AK |
2002 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
2003 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
2004 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
7267c094 | 2005 | g_free(cmr); |
ab5b3db5 FZ |
2006 | updated = true; |
2007 | } | |
2008 | ||
2009 | if (updated) { | |
2010 | memory_region_update_coalesced_range(mr); | |
093bc2cd | 2011 | } |
093bc2cd AK |
2012 | } |
2013 | ||
d410515e JK |
2014 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
2015 | { | |
2016 | mr->flush_coalesced_mmio = true; | |
2017 | } | |
2018 | ||
2019 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
2020 | { | |
2021 | qemu_flush_coalesced_mmio_buffer(); | |
2022 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
2023 | mr->flush_coalesced_mmio = false; | |
2024 | } | |
2025 | } | |
2026 | ||
196ea131 JK |
2027 | void memory_region_set_global_locking(MemoryRegion *mr) |
2028 | { | |
2029 | mr->global_locking = true; | |
2030 | } | |
2031 | ||
2032 | void memory_region_clear_global_locking(MemoryRegion *mr) | |
2033 | { | |
2034 | mr->global_locking = false; | |
2035 | } | |
2036 | ||
8c56c1a5 PF |
2037 | static bool userspace_eventfd_warning; |
2038 | ||
3e9d69e7 | 2039 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 2040 | hwaddr addr, |
3e9d69e7 AK |
2041 | unsigned size, |
2042 | bool match_data, | |
2043 | uint64_t data, | |
753d5e14 | 2044 | EventNotifier *e) |
3e9d69e7 AK |
2045 | { |
2046 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2047 | .addr.start = int128_make64(addr), |
2048 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2049 | .match_data = match_data, |
2050 | .data = data, | |
753d5e14 | 2051 | .e = e, |
3e9d69e7 AK |
2052 | }; |
2053 | unsigned i; | |
2054 | ||
8c56c1a5 PF |
2055 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
2056 | userspace_eventfd_warning))) { | |
2057 | userspace_eventfd_warning = true; | |
2058 | error_report("Using eventfd without MMIO binding in KVM. " | |
2059 | "Suboptimal performance expected"); | |
2060 | } | |
2061 | ||
b8aecea2 JW |
2062 | if (size) { |
2063 | adjust_endianness(mr, &mrfd.data, size); | |
2064 | } | |
59023ef4 | 2065 | memory_region_transaction_begin(); |
3e9d69e7 AK |
2066 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
2067 | if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) { | |
2068 | break; | |
2069 | } | |
2070 | } | |
2071 | ++mr->ioeventfd_nb; | |
7267c094 | 2072 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
2073 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
2074 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
2075 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
2076 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 2077 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2078 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2079 | } |
2080 | ||
2081 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 2082 | hwaddr addr, |
3e9d69e7 AK |
2083 | unsigned size, |
2084 | bool match_data, | |
2085 | uint64_t data, | |
753d5e14 | 2086 | EventNotifier *e) |
3e9d69e7 AK |
2087 | { |
2088 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2089 | .addr.start = int128_make64(addr), |
2090 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2091 | .match_data = match_data, |
2092 | .data = data, | |
753d5e14 | 2093 | .e = e, |
3e9d69e7 AK |
2094 | }; |
2095 | unsigned i; | |
2096 | ||
b8aecea2 JW |
2097 | if (size) { |
2098 | adjust_endianness(mr, &mrfd.data, size); | |
2099 | } | |
59023ef4 | 2100 | memory_region_transaction_begin(); |
3e9d69e7 AK |
2101 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
2102 | if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) { | |
2103 | break; | |
2104 | } | |
2105 | } | |
2106 | assert(i != mr->ioeventfd_nb); | |
2107 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
2108 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
2109 | --mr->ioeventfd_nb; | |
7267c094 | 2110 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 2111 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 2112 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2113 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2114 | } |
2115 | ||
feca4ac1 | 2116 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 2117 | { |
feca4ac1 | 2118 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
2119 | MemoryRegion *other; |
2120 | ||
59023ef4 JK |
2121 | memory_region_transaction_begin(); |
2122 | ||
dfde4e6e | 2123 | memory_region_ref(subregion); |
093bc2cd AK |
2124 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
2125 | if (subregion->priority >= other->priority) { | |
2126 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
2127 | goto done; | |
2128 | } | |
2129 | } | |
2130 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
2131 | done: | |
22bde714 | 2132 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2133 | memory_region_transaction_commit(); |
093bc2cd AK |
2134 | } |
2135 | ||
0598701a PC |
2136 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
2137 | hwaddr offset, | |
2138 | MemoryRegion *subregion) | |
2139 | { | |
feca4ac1 PB |
2140 | assert(!subregion->container); |
2141 | subregion->container = mr; | |
0598701a | 2142 | subregion->addr = offset; |
feca4ac1 | 2143 | memory_region_update_container_subregions(subregion); |
0598701a | 2144 | } |
093bc2cd AK |
2145 | |
2146 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 2147 | hwaddr offset, |
093bc2cd AK |
2148 | MemoryRegion *subregion) |
2149 | { | |
093bc2cd AK |
2150 | subregion->priority = 0; |
2151 | memory_region_add_subregion_common(mr, offset, subregion); | |
2152 | } | |
2153 | ||
2154 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 2155 | hwaddr offset, |
093bc2cd | 2156 | MemoryRegion *subregion, |
a1ff8ae0 | 2157 | int priority) |
093bc2cd | 2158 | { |
093bc2cd AK |
2159 | subregion->priority = priority; |
2160 | memory_region_add_subregion_common(mr, offset, subregion); | |
2161 | } | |
2162 | ||
2163 | void memory_region_del_subregion(MemoryRegion *mr, | |
2164 | MemoryRegion *subregion) | |
2165 | { | |
59023ef4 | 2166 | memory_region_transaction_begin(); |
feca4ac1 PB |
2167 | assert(subregion->container == mr); |
2168 | subregion->container = NULL; | |
093bc2cd | 2169 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 2170 | memory_region_unref(subregion); |
22bde714 | 2171 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2172 | memory_region_transaction_commit(); |
6bba19ba AK |
2173 | } |
2174 | ||
2175 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
2176 | { | |
2177 | if (enabled == mr->enabled) { | |
2178 | return; | |
2179 | } | |
59023ef4 | 2180 | memory_region_transaction_begin(); |
6bba19ba | 2181 | mr->enabled = enabled; |
22bde714 | 2182 | memory_region_update_pending = true; |
59023ef4 | 2183 | memory_region_transaction_commit(); |
093bc2cd | 2184 | } |
1c0ffa58 | 2185 | |
e7af4c67 MT |
2186 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
2187 | { | |
2188 | Int128 s = int128_make64(size); | |
2189 | ||
2190 | if (size == UINT64_MAX) { | |
2191 | s = int128_2_64(); | |
2192 | } | |
2193 | if (int128_eq(s, mr->size)) { | |
2194 | return; | |
2195 | } | |
2196 | memory_region_transaction_begin(); | |
2197 | mr->size = s; | |
2198 | memory_region_update_pending = true; | |
2199 | memory_region_transaction_commit(); | |
2200 | } | |
2201 | ||
67891b8a | 2202 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 2203 | { |
feca4ac1 | 2204 | MemoryRegion *container = mr->container; |
2282e1af | 2205 | |
feca4ac1 | 2206 | if (container) { |
67891b8a PC |
2207 | memory_region_transaction_begin(); |
2208 | memory_region_ref(mr); | |
feca4ac1 PB |
2209 | memory_region_del_subregion(container, mr); |
2210 | mr->container = container; | |
2211 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
2212 | memory_region_unref(mr); |
2213 | memory_region_transaction_commit(); | |
2282e1af | 2214 | } |
67891b8a | 2215 | } |
2282e1af | 2216 | |
67891b8a PC |
2217 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2218 | { | |
2219 | if (addr != mr->addr) { | |
2220 | mr->addr = addr; | |
2221 | memory_region_readd_subregion(mr); | |
2222 | } | |
2282e1af AK |
2223 | } |
2224 | ||
a8170e5e | 2225 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 2226 | { |
4703359e | 2227 | assert(mr->alias); |
4703359e | 2228 | |
59023ef4 | 2229 | if (offset == mr->alias_offset) { |
4703359e AK |
2230 | return; |
2231 | } | |
2232 | ||
59023ef4 JK |
2233 | memory_region_transaction_begin(); |
2234 | mr->alias_offset = offset; | |
22bde714 | 2235 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2236 | memory_region_transaction_commit(); |
4703359e AK |
2237 | } |
2238 | ||
a2b257d6 IM |
2239 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
2240 | { | |
2241 | return mr->align; | |
2242 | } | |
2243 | ||
e2177955 AK |
2244 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
2245 | { | |
2246 | const AddrRange *addr = addr_; | |
2247 | const FlatRange *fr = fr_; | |
2248 | ||
2249 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2250 | return -1; | |
2251 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2252 | return 1; | |
2253 | } | |
2254 | return 0; | |
2255 | } | |
2256 | ||
99e86347 | 2257 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 2258 | { |
99e86347 | 2259 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
2260 | sizeof(FlatRange), cmp_flatrange_addr); |
2261 | } | |
2262 | ||
eed2bacf IM |
2263 | bool memory_region_is_mapped(MemoryRegion *mr) |
2264 | { | |
2265 | return mr->container ? true : false; | |
2266 | } | |
2267 | ||
c6742b14 PB |
2268 | /* Same as memory_region_find, but it does not add a reference to the |
2269 | * returned region. It must be called from an RCU critical section. | |
2270 | */ | |
2271 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2272 | hwaddr addr, uint64_t size) | |
e2177955 | 2273 | { |
052e87b0 | 2274 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2275 | MemoryRegion *root; |
2276 | AddressSpace *as; | |
2277 | AddrRange range; | |
99e86347 | 2278 | FlatView *view; |
73034e9e PB |
2279 | FlatRange *fr; |
2280 | ||
2281 | addr += mr->addr; | |
feca4ac1 PB |
2282 | for (root = mr; root->container; ) { |
2283 | root = root->container; | |
73034e9e PB |
2284 | addr += root->addr; |
2285 | } | |
e2177955 | 2286 | |
73034e9e | 2287 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2288 | if (!as) { |
2289 | return ret; | |
2290 | } | |
73034e9e | 2291 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2292 | |
2b647668 | 2293 | view = atomic_rcu_read(&as->current_map); |
99e86347 | 2294 | fr = flatview_lookup(view, range); |
e2177955 | 2295 | if (!fr) { |
c6742b14 | 2296 | return ret; |
e2177955 AK |
2297 | } |
2298 | ||
99e86347 | 2299 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2300 | --fr; |
2301 | } | |
2302 | ||
2303 | ret.mr = fr->mr; | |
73034e9e | 2304 | ret.address_space = as; |
e2177955 AK |
2305 | range = addrrange_intersection(range, fr->addr); |
2306 | ret.offset_within_region = fr->offset_in_region; | |
2307 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2308 | fr->addr.start)); | |
052e87b0 | 2309 | ret.size = range.size; |
e2177955 | 2310 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2311 | ret.readonly = fr->readonly; |
c6742b14 PB |
2312 | return ret; |
2313 | } | |
2314 | ||
2315 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2316 | hwaddr addr, uint64_t size) | |
2317 | { | |
2318 | MemoryRegionSection ret; | |
2319 | rcu_read_lock(); | |
2320 | ret = memory_region_find_rcu(mr, addr, size); | |
2321 | if (ret.mr) { | |
2322 | memory_region_ref(ret.mr); | |
2323 | } | |
2b647668 | 2324 | rcu_read_unlock(); |
e2177955 AK |
2325 | return ret; |
2326 | } | |
2327 | ||
c6742b14 PB |
2328 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2329 | { | |
2330 | MemoryRegion *mr; | |
2331 | ||
2332 | rcu_read_lock(); | |
2333 | mr = memory_region_find_rcu(container, addr, 1).mr; | |
2334 | rcu_read_unlock(); | |
2335 | return mr && mr != container; | |
2336 | } | |
2337 | ||
9c1f8f44 | 2338 | void memory_global_dirty_log_sync(void) |
86e775c6 | 2339 | { |
9c1f8f44 PB |
2340 | MemoryListener *listener; |
2341 | AddressSpace *as; | |
99e86347 | 2342 | FlatView *view; |
7664e80c AK |
2343 | FlatRange *fr; |
2344 | ||
9c1f8f44 PB |
2345 | QTAILQ_FOREACH(listener, &memory_listeners, link) { |
2346 | if (!listener->log_sync) { | |
2347 | continue; | |
2348 | } | |
d45fa784 | 2349 | as = listener->address_space; |
9c1f8f44 PB |
2350 | view = address_space_get_flatview(as); |
2351 | FOR_EACH_FLAT_RANGE(fr, view) { | |
adaad61c PB |
2352 | if (fr->dirty_log_mask) { |
2353 | MemoryRegionSection mrs = section_from_flat_range(fr, as); | |
2354 | listener->log_sync(listener, &mrs); | |
2355 | } | |
9c1f8f44 PB |
2356 | } |
2357 | flatview_unref(view); | |
7664e80c AK |
2358 | } |
2359 | } | |
2360 | ||
19310760 JZ |
2361 | static VMChangeStateEntry *vmstate_change; |
2362 | ||
7664e80c AK |
2363 | void memory_global_dirty_log_start(void) |
2364 | { | |
19310760 JZ |
2365 | if (vmstate_change) { |
2366 | qemu_del_vm_change_state_handler(vmstate_change); | |
2367 | vmstate_change = NULL; | |
2368 | } | |
2369 | ||
7664e80c | 2370 | global_dirty_log = true; |
6f6a5ef3 | 2371 | |
7376e582 | 2372 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 PB |
2373 | |
2374 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2375 | memory_region_transaction_begin(); | |
2376 | memory_region_update_pending = true; | |
2377 | memory_region_transaction_commit(); | |
7664e80c AK |
2378 | } |
2379 | ||
19310760 | 2380 | static void memory_global_dirty_log_do_stop(void) |
7664e80c | 2381 | { |
7664e80c | 2382 | global_dirty_log = false; |
6f6a5ef3 PB |
2383 | |
2384 | /* Refresh DIRTY_LOG_MIGRATION bit. */ | |
2385 | memory_region_transaction_begin(); | |
2386 | memory_region_update_pending = true; | |
2387 | memory_region_transaction_commit(); | |
2388 | ||
7376e582 | 2389 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2390 | } |
2391 | ||
19310760 JZ |
2392 | static void memory_vm_change_state_handler(void *opaque, int running, |
2393 | RunState state) | |
2394 | { | |
2395 | if (running) { | |
2396 | memory_global_dirty_log_do_stop(); | |
2397 | ||
2398 | if (vmstate_change) { | |
2399 | qemu_del_vm_change_state_handler(vmstate_change); | |
2400 | vmstate_change = NULL; | |
2401 | } | |
2402 | } | |
2403 | } | |
2404 | ||
2405 | void memory_global_dirty_log_stop(void) | |
2406 | { | |
2407 | if (!runstate_is_running()) { | |
2408 | if (vmstate_change) { | |
2409 | return; | |
2410 | } | |
2411 | vmstate_change = qemu_add_vm_change_state_handler( | |
2412 | memory_vm_change_state_handler, NULL); | |
2413 | return; | |
2414 | } | |
2415 | ||
2416 | memory_global_dirty_log_do_stop(); | |
2417 | } | |
2418 | ||
7664e80c AK |
2419 | static void listener_add_address_space(MemoryListener *listener, |
2420 | AddressSpace *as) | |
2421 | { | |
99e86347 | 2422 | FlatView *view; |
7664e80c AK |
2423 | FlatRange *fr; |
2424 | ||
680a4783 PB |
2425 | if (listener->begin) { |
2426 | listener->begin(listener); | |
2427 | } | |
7664e80c | 2428 | if (global_dirty_log) { |
975aefe0 AK |
2429 | if (listener->log_global_start) { |
2430 | listener->log_global_start(listener); | |
2431 | } | |
7664e80c | 2432 | } |
975aefe0 | 2433 | |
856d7245 | 2434 | view = address_space_get_flatview(as); |
99e86347 | 2435 | FOR_EACH_FLAT_RANGE(fr, view) { |
7664e80c AK |
2436 | MemoryRegionSection section = { |
2437 | .mr = fr->mr, | |
f6790af6 | 2438 | .address_space = as, |
7664e80c | 2439 | .offset_within_region = fr->offset_in_region, |
052e87b0 | 2440 | .size = fr->addr.size, |
7664e80c | 2441 | .offset_within_address_space = int128_get64(fr->addr.start), |
7a8499e8 | 2442 | .readonly = fr->readonly, |
7664e80c | 2443 | }; |
680a4783 PB |
2444 | if (fr->dirty_log_mask && listener->log_start) { |
2445 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2446 | } | |
975aefe0 AK |
2447 | if (listener->region_add) { |
2448 | listener->region_add(listener, §ion); | |
2449 | } | |
7664e80c | 2450 | } |
680a4783 PB |
2451 | if (listener->commit) { |
2452 | listener->commit(listener); | |
2453 | } | |
856d7245 | 2454 | flatview_unref(view); |
7664e80c AK |
2455 | } |
2456 | ||
d45fa784 | 2457 | void memory_listener_register(MemoryListener *listener, AddressSpace *as) |
7664e80c | 2458 | { |
72e22d2f AK |
2459 | MemoryListener *other = NULL; |
2460 | ||
d45fa784 | 2461 | listener->address_space = as; |
72e22d2f AK |
2462 | if (QTAILQ_EMPTY(&memory_listeners) |
2463 | || listener->priority >= QTAILQ_LAST(&memory_listeners, | |
2464 | memory_listeners)->priority) { | |
2465 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); | |
2466 | } else { | |
2467 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2468 | if (listener->priority < other->priority) { | |
2469 | break; | |
2470 | } | |
2471 | } | |
2472 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2473 | } | |
0d673e36 | 2474 | |
9a54635d PB |
2475 | if (QTAILQ_EMPTY(&as->listeners) |
2476 | || listener->priority >= QTAILQ_LAST(&as->listeners, | |
2477 | memory_listeners)->priority) { | |
2478 | QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as); | |
2479 | } else { | |
2480 | QTAILQ_FOREACH(other, &as->listeners, link_as) { | |
2481 | if (listener->priority < other->priority) { | |
2482 | break; | |
2483 | } | |
2484 | } | |
2485 | QTAILQ_INSERT_BEFORE(other, listener, link_as); | |
2486 | } | |
2487 | ||
d45fa784 | 2488 | listener_add_address_space(listener, as); |
7664e80c AK |
2489 | } |
2490 | ||
2491 | void memory_listener_unregister(MemoryListener *listener) | |
2492 | { | |
1d8280c1 PB |
2493 | if (!listener->address_space) { |
2494 | return; | |
2495 | } | |
2496 | ||
72e22d2f | 2497 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
9a54635d | 2498 | QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as); |
1d8280c1 | 2499 | listener->address_space = NULL; |
86e775c6 | 2500 | } |
e2177955 | 2501 | |
c9356746 FK |
2502 | bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr) |
2503 | { | |
2504 | void *host; | |
2505 | unsigned size = 0; | |
2506 | unsigned offset = 0; | |
2507 | Object *new_interface; | |
2508 | ||
2509 | if (!mr || !mr->ops->request_ptr) { | |
2510 | return false; | |
2511 | } | |
2512 | ||
2513 | /* | |
2514 | * Avoid an update if the request_ptr call | |
2515 | * memory_region_invalidate_mmio_ptr which seems to be likely when we use | |
2516 | * a cache. | |
2517 | */ | |
2518 | memory_region_transaction_begin(); | |
2519 | ||
2520 | host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset); | |
2521 | ||
2522 | if (!host || !size) { | |
2523 | memory_region_transaction_commit(); | |
2524 | return false; | |
2525 | } | |
2526 | ||
2527 | new_interface = object_new("mmio_interface"); | |
2528 | qdev_prop_set_uint64(DEVICE(new_interface), "start", offset); | |
2529 | qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1); | |
2530 | qdev_prop_set_bit(DEVICE(new_interface), "ro", true); | |
2531 | qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host); | |
2532 | qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr); | |
2533 | object_property_set_bool(OBJECT(new_interface), true, "realized", NULL); | |
2534 | ||
2535 | memory_region_transaction_commit(); | |
2536 | return true; | |
2537 | } | |
2538 | ||
2539 | typedef struct MMIOPtrInvalidate { | |
2540 | MemoryRegion *mr; | |
2541 | hwaddr offset; | |
2542 | unsigned size; | |
2543 | int busy; | |
2544 | int allocated; | |
2545 | } MMIOPtrInvalidate; | |
2546 | ||
2547 | #define MAX_MMIO_INVALIDATE 10 | |
2548 | static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE]; | |
2549 | ||
2550 | static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu, | |
2551 | run_on_cpu_data data) | |
2552 | { | |
2553 | MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr; | |
2554 | MemoryRegion *mr = invalidate_data->mr; | |
2555 | hwaddr offset = invalidate_data->offset; | |
2556 | unsigned size = invalidate_data->size; | |
2557 | MemoryRegionSection section = memory_region_find(mr, offset, size); | |
2558 | ||
2559 | qemu_mutex_lock_iothread(); | |
2560 | ||
2561 | /* Reset dirty so this doesn't happen later. */ | |
2562 | cpu_physical_memory_test_and_clear_dirty(offset, size, 1); | |
2563 | ||
2564 | if (section.mr != mr) { | |
2565 | /* memory_region_find add a ref on section.mr */ | |
2566 | memory_region_unref(section.mr); | |
2567 | if (MMIO_INTERFACE(section.mr->owner)) { | |
2568 | /* We found the interface just drop it. */ | |
2569 | object_property_set_bool(section.mr->owner, false, "realized", | |
2570 | NULL); | |
2571 | object_unref(section.mr->owner); | |
2572 | object_unparent(section.mr->owner); | |
2573 | } | |
2574 | } | |
2575 | ||
2576 | qemu_mutex_unlock_iothread(); | |
2577 | ||
2578 | if (invalidate_data->allocated) { | |
2579 | g_free(invalidate_data); | |
2580 | } else { | |
2581 | invalidate_data->busy = 0; | |
2582 | } | |
2583 | } | |
2584 | ||
2585 | void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset, | |
2586 | unsigned size) | |
2587 | { | |
2588 | size_t i; | |
2589 | MMIOPtrInvalidate *invalidate_data = NULL; | |
2590 | ||
2591 | for (i = 0; i < MAX_MMIO_INVALIDATE; i++) { | |
2592 | if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) { | |
2593 | invalidate_data = &mmio_ptr_invalidate_list[i]; | |
2594 | break; | |
2595 | } | |
2596 | } | |
2597 | ||
2598 | if (!invalidate_data) { | |
2599 | invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate)); | |
2600 | invalidate_data->allocated = 1; | |
2601 | } | |
2602 | ||
2603 | invalidate_data->mr = mr; | |
2604 | invalidate_data->offset = offset; | |
2605 | invalidate_data->size = size; | |
2606 | ||
2607 | async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr, | |
2608 | RUN_ON_CPU_HOST_PTR(invalidate_data)); | |
2609 | } | |
2610 | ||
7dca8043 | 2611 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2612 | { |
ac95190e | 2613 | memory_region_ref(root); |
59023ef4 | 2614 | memory_region_transaction_begin(); |
f0c02d15 | 2615 | as->ref_count = 1; |
8786db7c | 2616 | as->root = root; |
f0c02d15 | 2617 | as->malloced = false; |
8786db7c AK |
2618 | as->current_map = g_new(FlatView, 1); |
2619 | flatview_init(as->current_map); | |
4c19eb72 AK |
2620 | as->ioeventfd_nb = 0; |
2621 | as->ioeventfds = NULL; | |
9a54635d | 2622 | QTAILQ_INIT(&as->listeners); |
0d673e36 | 2623 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2624 | as->name = g_strdup(name ? name : "anonymous"); |
ac1970fb | 2625 | address_space_init_dispatch(as); |
f43793c7 PB |
2626 | memory_region_update_pending |= root->enabled; |
2627 | memory_region_transaction_commit(); | |
1c0ffa58 | 2628 | } |
658b2224 | 2629 | |
374f2981 | 2630 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2631 | { |
f0c02d15 | 2632 | bool do_free = as->malloced; |
078c44f4 | 2633 | |
83f3c251 | 2634 | address_space_destroy_dispatch(as); |
9a54635d | 2635 | assert(QTAILQ_EMPTY(&as->listeners)); |
078c44f4 | 2636 | |
856d7245 | 2637 | flatview_unref(as->current_map); |
7dca8043 | 2638 | g_free(as->name); |
4c19eb72 | 2639 | g_free(as->ioeventfds); |
ac95190e | 2640 | memory_region_unref(as->root); |
f0c02d15 PC |
2641 | if (do_free) { |
2642 | g_free(as); | |
2643 | } | |
2644 | } | |
2645 | ||
2646 | AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name) | |
2647 | { | |
2648 | AddressSpace *as; | |
2649 | ||
2650 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2651 | if (root == as->root && as->malloced) { | |
2652 | as->ref_count++; | |
2653 | return as; | |
2654 | } | |
2655 | } | |
2656 | ||
2657 | as = g_malloc0(sizeof *as); | |
2658 | address_space_init(as, root, name); | |
2659 | as->malloced = true; | |
2660 | return as; | |
83f3c251 AK |
2661 | } |
2662 | ||
374f2981 PB |
2663 | void address_space_destroy(AddressSpace *as) |
2664 | { | |
ac95190e PB |
2665 | MemoryRegion *root = as->root; |
2666 | ||
f0c02d15 PC |
2667 | as->ref_count--; |
2668 | if (as->ref_count) { | |
2669 | return; | |
2670 | } | |
374f2981 PB |
2671 | /* Flush out anything from MemoryListeners listening in on this */ |
2672 | memory_region_transaction_begin(); | |
2673 | as->root = NULL; | |
2674 | memory_region_transaction_commit(); | |
2675 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
6e48e8f9 | 2676 | address_space_unregister(as); |
374f2981 PB |
2677 | |
2678 | /* At this point, as->dispatch and as->current_map are dummy | |
2679 | * entries that the guest should never use. Wait for the old | |
2680 | * values to expire before freeing the data. | |
2681 | */ | |
ac95190e | 2682 | as->root = root; |
374f2981 PB |
2683 | call_rcu(as, do_address_space_destroy, rcu); |
2684 | } | |
2685 | ||
4e831901 PX |
2686 | static const char *memory_region_type(MemoryRegion *mr) |
2687 | { | |
2688 | if (memory_region_is_ram_device(mr)) { | |
2689 | return "ramd"; | |
2690 | } else if (memory_region_is_romd(mr)) { | |
2691 | return "romd"; | |
2692 | } else if (memory_region_is_rom(mr)) { | |
2693 | return "rom"; | |
2694 | } else if (memory_region_is_ram(mr)) { | |
2695 | return "ram"; | |
2696 | } else { | |
2697 | return "i/o"; | |
2698 | } | |
2699 | } | |
2700 | ||
314e2987 BS |
2701 | typedef struct MemoryRegionList MemoryRegionList; |
2702 | ||
2703 | struct MemoryRegionList { | |
2704 | const MemoryRegion *mr; | |
a16878d2 | 2705 | QTAILQ_ENTRY(MemoryRegionList) mrqueue; |
314e2987 BS |
2706 | }; |
2707 | ||
a16878d2 | 2708 | typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead; |
314e2987 | 2709 | |
4e831901 PX |
2710 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
2711 | int128_sub((size), int128_one())) : 0) | |
2712 | #define MTREE_INDENT " " | |
2713 | ||
314e2987 BS |
2714 | static void mtree_print_mr(fprintf_function mon_printf, void *f, |
2715 | const MemoryRegion *mr, unsigned int level, | |
a8170e5e | 2716 | hwaddr base, |
9479c57a | 2717 | MemoryRegionListHead *alias_print_queue) |
314e2987 | 2718 | { |
9479c57a JK |
2719 | MemoryRegionList *new_ml, *ml, *next_ml; |
2720 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2721 | const MemoryRegion *submr; |
2722 | unsigned int i; | |
b31f8412 | 2723 | hwaddr cur_start, cur_end; |
314e2987 | 2724 | |
f8a9f720 | 2725 | if (!mr) { |
314e2987 BS |
2726 | return; |
2727 | } | |
2728 | ||
2729 | for (i = 0; i < level; i++) { | |
4e831901 | 2730 | mon_printf(f, MTREE_INDENT); |
314e2987 BS |
2731 | } |
2732 | ||
b31f8412 PX |
2733 | cur_start = base + mr->addr; |
2734 | cur_end = cur_start + MR_SIZE(mr->size); | |
2735 | ||
2736 | /* | |
2737 | * Try to detect overflow of memory region. This should never | |
2738 | * happen normally. When it happens, we dump something to warn the | |
2739 | * user who is observing this. | |
2740 | */ | |
2741 | if (cur_start < base || cur_end < cur_start) { | |
2742 | mon_printf(f, "[DETECTED OVERFLOW!] "); | |
2743 | } | |
2744 | ||
314e2987 BS |
2745 | if (mr->alias) { |
2746 | MemoryRegionList *ml; | |
2747 | bool found = false; | |
2748 | ||
2749 | /* check if the alias is already in the queue */ | |
a16878d2 | 2750 | QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) { |
f54bb15f | 2751 | if (ml->mr == mr->alias) { |
314e2987 BS |
2752 | found = true; |
2753 | } | |
2754 | } | |
2755 | ||
2756 | if (!found) { | |
2757 | ml = g_new(MemoryRegionList, 1); | |
2758 | ml->mr = mr->alias; | |
a16878d2 | 2759 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue); |
314e2987 | 2760 | } |
4896d74b | 2761 | mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx |
4e831901 | 2762 | " (prio %d, %s): alias %s @%s " TARGET_FMT_plx |
f8a9f720 | 2763 | "-" TARGET_FMT_plx "%s\n", |
b31f8412 | 2764 | cur_start, cur_end, |
4b474ba7 | 2765 | mr->priority, |
4e831901 | 2766 | memory_region_type((MemoryRegion *)mr), |
3fb18b4d PC |
2767 | memory_region_name(mr), |
2768 | memory_region_name(mr->alias), | |
314e2987 | 2769 | mr->alias_offset, |
4e831901 | 2770 | mr->alias_offset + MR_SIZE(mr->size), |
f8a9f720 | 2771 | mr->enabled ? "" : " [disabled]"); |
314e2987 | 2772 | } else { |
4896d74b | 2773 | mon_printf(f, |
4e831901 | 2774 | TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n", |
b31f8412 | 2775 | cur_start, cur_end, |
4b474ba7 | 2776 | mr->priority, |
4e831901 | 2777 | memory_region_type((MemoryRegion *)mr), |
f8a9f720 GH |
2778 | memory_region_name(mr), |
2779 | mr->enabled ? "" : " [disabled]"); | |
314e2987 | 2780 | } |
9479c57a JK |
2781 | |
2782 | QTAILQ_INIT(&submr_print_queue); | |
2783 | ||
314e2987 | 2784 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
2785 | new_ml = g_new(MemoryRegionList, 1); |
2786 | new_ml->mr = submr; | |
a16878d2 | 2787 | QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { |
9479c57a JK |
2788 | if (new_ml->mr->addr < ml->mr->addr || |
2789 | (new_ml->mr->addr == ml->mr->addr && | |
2790 | new_ml->mr->priority > ml->mr->priority)) { | |
a16878d2 | 2791 | QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue); |
9479c57a JK |
2792 | new_ml = NULL; |
2793 | break; | |
2794 | } | |
2795 | } | |
2796 | if (new_ml) { | |
a16878d2 | 2797 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue); |
9479c57a JK |
2798 | } |
2799 | } | |
2800 | ||
a16878d2 | 2801 | QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { |
b31f8412 | 2802 | mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start, |
9479c57a JK |
2803 | alias_print_queue); |
2804 | } | |
2805 | ||
a16878d2 | 2806 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) { |
9479c57a | 2807 | g_free(ml); |
314e2987 BS |
2808 | } |
2809 | } | |
2810 | ||
57bb40c9 PX |
2811 | static void mtree_print_flatview(fprintf_function p, void *f, |
2812 | AddressSpace *as) | |
2813 | { | |
2814 | FlatView *view = address_space_get_flatview(as); | |
2815 | FlatRange *range = &view->ranges[0]; | |
2816 | MemoryRegion *mr; | |
2817 | int n = view->nr; | |
2818 | ||
2819 | if (n <= 0) { | |
2820 | p(f, MTREE_INDENT "No rendered FlatView for " | |
2821 | "address space '%s'\n", as->name); | |
2822 | flatview_unref(view); | |
2823 | return; | |
2824 | } | |
2825 | ||
2826 | while (n--) { | |
2827 | mr = range->mr; | |
377a07aa PB |
2828 | if (range->offset_in_region) { |
2829 | p(f, MTREE_INDENT TARGET_FMT_plx "-" | |
2830 | TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n", | |
2831 | int128_get64(range->addr.start), | |
2832 | int128_get64(range->addr.start) + MR_SIZE(range->addr.size), | |
2833 | mr->priority, | |
2834 | range->readonly ? "rom" : memory_region_type(mr), | |
2835 | memory_region_name(mr), | |
2836 | range->offset_in_region); | |
2837 | } else { | |
2838 | p(f, MTREE_INDENT TARGET_FMT_plx "-" | |
2839 | TARGET_FMT_plx " (prio %d, %s): %s\n", | |
2840 | int128_get64(range->addr.start), | |
2841 | int128_get64(range->addr.start) + MR_SIZE(range->addr.size), | |
2842 | mr->priority, | |
2843 | range->readonly ? "rom" : memory_region_type(mr), | |
2844 | memory_region_name(mr)); | |
2845 | } | |
57bb40c9 PX |
2846 | range++; |
2847 | } | |
2848 | ||
2849 | flatview_unref(view); | |
2850 | } | |
2851 | ||
2852 | void mtree_info(fprintf_function mon_printf, void *f, bool flatview) | |
314e2987 BS |
2853 | { |
2854 | MemoryRegionListHead ml_head; | |
2855 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 2856 | AddressSpace *as; |
314e2987 | 2857 | |
57bb40c9 PX |
2858 | if (flatview) { |
2859 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
2860 | mon_printf(f, "address-space (flat view): %s\n", as->name); | |
2861 | mtree_print_flatview(mon_printf, f, as); | |
2862 | mon_printf(f, "\n"); | |
2863 | } | |
2864 | return; | |
2865 | } | |
2866 | ||
314e2987 BS |
2867 | QTAILQ_INIT(&ml_head); |
2868 | ||
0d673e36 | 2869 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
e48816aa GH |
2870 | mon_printf(f, "address-space: %s\n", as->name); |
2871 | mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head); | |
2872 | mon_printf(f, "\n"); | |
b9f9be88 BS |
2873 | } |
2874 | ||
314e2987 | 2875 | /* print aliased regions */ |
a16878d2 | 2876 | QTAILQ_FOREACH(ml, &ml_head, mrqueue) { |
e48816aa GH |
2877 | mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); |
2878 | mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head); | |
2879 | mon_printf(f, "\n"); | |
314e2987 BS |
2880 | } |
2881 | ||
a16878d2 | 2882 | QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) { |
88365e47 | 2883 | g_free(ml); |
314e2987 | 2884 | } |
314e2987 | 2885 | } |
b4fefef9 | 2886 | |
b08199c6 PM |
2887 | void memory_region_init_ram(MemoryRegion *mr, |
2888 | struct Object *owner, | |
2889 | const char *name, | |
2890 | uint64_t size, | |
2891 | Error **errp) | |
2892 | { | |
2893 | DeviceState *owner_dev; | |
2894 | Error *err = NULL; | |
2895 | ||
2896 | memory_region_init_ram_nomigrate(mr, owner, name, size, &err); | |
2897 | if (err) { | |
2898 | error_propagate(errp, err); | |
2899 | return; | |
2900 | } | |
2901 | /* This will assert if owner is neither NULL nor a DeviceState. | |
2902 | * We only want the owner here for the purposes of defining a | |
2903 | * unique name for migration. TODO: Ideally we should implement | |
2904 | * a naming scheme for Objects which are not DeviceStates, in | |
2905 | * which case we can relax this restriction. | |
2906 | */ | |
2907 | owner_dev = DEVICE(owner); | |
2908 | vmstate_register_ram(mr, owner_dev); | |
2909 | } | |
2910 | ||
2911 | void memory_region_init_rom(MemoryRegion *mr, | |
2912 | struct Object *owner, | |
2913 | const char *name, | |
2914 | uint64_t size, | |
2915 | Error **errp) | |
2916 | { | |
2917 | DeviceState *owner_dev; | |
2918 | Error *err = NULL; | |
2919 | ||
2920 | memory_region_init_rom_nomigrate(mr, owner, name, size, &err); | |
2921 | if (err) { | |
2922 | error_propagate(errp, err); | |
2923 | return; | |
2924 | } | |
2925 | /* This will assert if owner is neither NULL nor a DeviceState. | |
2926 | * We only want the owner here for the purposes of defining a | |
2927 | * unique name for migration. TODO: Ideally we should implement | |
2928 | * a naming scheme for Objects which are not DeviceStates, in | |
2929 | * which case we can relax this restriction. | |
2930 | */ | |
2931 | owner_dev = DEVICE(owner); | |
2932 | vmstate_register_ram(mr, owner_dev); | |
2933 | } | |
2934 | ||
2935 | void memory_region_init_rom_device(MemoryRegion *mr, | |
2936 | struct Object *owner, | |
2937 | const MemoryRegionOps *ops, | |
2938 | void *opaque, | |
2939 | const char *name, | |
2940 | uint64_t size, | |
2941 | Error **errp) | |
2942 | { | |
2943 | DeviceState *owner_dev; | |
2944 | Error *err = NULL; | |
2945 | ||
2946 | memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque, | |
2947 | name, size, &err); | |
2948 | if (err) { | |
2949 | error_propagate(errp, err); | |
2950 | return; | |
2951 | } | |
2952 | /* This will assert if owner is neither NULL nor a DeviceState. | |
2953 | * We only want the owner here for the purposes of defining a | |
2954 | * unique name for migration. TODO: Ideally we should implement | |
2955 | * a naming scheme for Objects which are not DeviceStates, in | |
2956 | * which case we can relax this restriction. | |
2957 | */ | |
2958 | owner_dev = DEVICE(owner); | |
2959 | vmstate_register_ram(mr, owner_dev); | |
2960 | } | |
2961 | ||
b4fefef9 PC |
2962 | static const TypeInfo memory_region_info = { |
2963 | .parent = TYPE_OBJECT, | |
2964 | .name = TYPE_MEMORY_REGION, | |
2965 | .instance_size = sizeof(MemoryRegion), | |
2966 | .instance_init = memory_region_initfn, | |
2967 | .instance_finalize = memory_region_finalize, | |
2968 | }; | |
2969 | ||
3df9d748 AK |
2970 | static const TypeInfo iommu_memory_region_info = { |
2971 | .parent = TYPE_MEMORY_REGION, | |
2972 | .name = TYPE_IOMMU_MEMORY_REGION, | |
1221a474 | 2973 | .class_size = sizeof(IOMMUMemoryRegionClass), |
3df9d748 AK |
2974 | .instance_size = sizeof(IOMMUMemoryRegion), |
2975 | .instance_init = iommu_memory_region_initfn, | |
1221a474 | 2976 | .abstract = true, |
3df9d748 AK |
2977 | }; |
2978 | ||
b4fefef9 PC |
2979 | static void memory_register_types(void) |
2980 | { | |
2981 | type_register_static(&memory_region_info); | |
3df9d748 | 2982 | type_register_static(&iommu_memory_region_info); |
b4fefef9 PC |
2983 | } |
2984 | ||
2985 | type_init(memory_register_types) |