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exec: remove ram_addr argument from qemu_ram_block_from_host
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CommitLineData
093bc2cd
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
d38ea87a 16#include "qemu/osdep.h"
da34e65c 17#include "qapi/error.h"
33c11879
PB
18#include "qemu-common.h"
19#include "cpu.h"
022c62cb
PB
20#include "exec/memory.h"
21#include "exec/address-spaces.h"
22#include "exec/ioport.h"
409ddd01 23#include "qapi/visitor.h"
1de7afc9 24#include "qemu/bitops.h"
8c56c1a5 25#include "qemu/error-report.h"
2c9b15ca 26#include "qom/object.h"
55d5d048 27#include "trace.h"
093bc2cd 28
022c62cb 29#include "exec/memory-internal.h"
220c3ebd 30#include "exec/ram_addr.h"
8c56c1a5 31#include "sysemu/kvm.h"
e1c57ab8 32#include "sysemu/sysemu.h"
67d95c15 33
d197063f
PB
34//#define DEBUG_UNASSIGNED
35
ec05ec26
PB
36#define RAM_ADDR_INVALID (~(ram_addr_t)0)
37
22bde714
JK
38static unsigned memory_region_transaction_depth;
39static bool memory_region_update_pending;
4dc56152 40static bool ioeventfd_update_pending;
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41static bool global_dirty_log = false;
42
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43static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
44 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 45
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46static QTAILQ_HEAD(, AddressSpace) address_spaces
47 = QTAILQ_HEAD_INITIALIZER(address_spaces);
48
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49typedef struct AddrRange AddrRange;
50
8417cebf 51/*
c9cdaa3a 52 * Note that signed integers are needed for negative offsetting in aliases
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53 * (large MemoryRegion::alias_offset).
54 */
093bc2cd 55struct AddrRange {
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56 Int128 start;
57 Int128 size;
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58};
59
08dafab4 60static AddrRange addrrange_make(Int128 start, Int128 size)
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61{
62 return (AddrRange) { start, size };
63}
64
65static bool addrrange_equal(AddrRange r1, AddrRange r2)
66{
08dafab4 67 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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68}
69
08dafab4 70static Int128 addrrange_end(AddrRange r)
093bc2cd 71{
08dafab4 72 return int128_add(r.start, r.size);
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73}
74
08dafab4 75static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 76{
08dafab4 77 int128_addto(&range.start, delta);
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78 return range;
79}
80
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81static bool addrrange_contains(AddrRange range, Int128 addr)
82{
83 return int128_ge(addr, range.start)
84 && int128_lt(addr, addrrange_end(range));
85}
86
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87static bool addrrange_intersects(AddrRange r1, AddrRange r2)
88{
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89 return addrrange_contains(r1, r2.start)
90 || addrrange_contains(r2, r1.start);
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91}
92
93static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
94{
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95 Int128 start = int128_max(r1.start, r2.start);
96 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
97 return addrrange_make(start, int128_sub(end, start));
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98}
99
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100enum ListenerDirection { Forward, Reverse };
101
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102static bool memory_listener_match(MemoryListener *listener,
103 MemoryRegionSection *section)
104{
105 return !listener->address_space_filter
106 || listener->address_space_filter == section->address_space;
107}
108
109#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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110 do { \
111 MemoryListener *_listener; \
112 \
113 switch (_direction) { \
114 case Forward: \
115 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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116 if (_listener->_callback) { \
117 _listener->_callback(_listener, ##_args); \
118 } \
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119 } \
120 break; \
121 case Reverse: \
122 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
123 memory_listeners, link) { \
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124 if (_listener->_callback) { \
125 _listener->_callback(_listener, ##_args); \
126 } \
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127 } \
128 break; \
129 default: \
130 abort(); \
131 } \
132 } while (0)
133
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134#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
135 do { \
136 MemoryListener *_listener; \
137 \
138 switch (_direction) { \
139 case Forward: \
140 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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141 if (_listener->_callback \
142 && memory_listener_match(_listener, _section)) { \
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143 _listener->_callback(_listener, _section, ##_args); \
144 } \
145 } \
146 break; \
147 case Reverse: \
148 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
149 memory_listeners, link) { \
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150 if (_listener->_callback \
151 && memory_listener_match(_listener, _section)) { \
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152 _listener->_callback(_listener, _section, ##_args); \
153 } \
154 } \
155 break; \
156 default: \
157 abort(); \
158 } \
159 } while (0)
160
dfde4e6e 161/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 162#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
7376e582 163 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 164 .mr = (fr)->mr, \
f6790af6 165 .address_space = (as), \
0e0d36b4 166 .offset_within_region = (fr)->offset_in_region, \
052e87b0 167 .size = (fr)->addr.size, \
0e0d36b4 168 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 169 .readonly = (fr)->readonly, \
b2dfd71c 170 }), ##_args)
0e0d36b4 171
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172struct CoalescedMemoryRange {
173 AddrRange addr;
174 QTAILQ_ENTRY(CoalescedMemoryRange) link;
175};
176
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177struct MemoryRegionIoeventfd {
178 AddrRange addr;
179 bool match_data;
180 uint64_t data;
753d5e14 181 EventNotifier *e;
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182};
183
184static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
185 MemoryRegionIoeventfd b)
186{
08dafab4 187 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 188 return true;
08dafab4 189 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 190 return false;
08dafab4 191 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 192 return true;
08dafab4 193 } else if (int128_gt(a.addr.size, b.addr.size)) {
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194 return false;
195 } else if (a.match_data < b.match_data) {
196 return true;
197 } else if (a.match_data > b.match_data) {
198 return false;
199 } else if (a.match_data) {
200 if (a.data < b.data) {
201 return true;
202 } else if (a.data > b.data) {
203 return false;
204 }
205 }
753d5e14 206 if (a.e < b.e) {
3e9d69e7 207 return true;
753d5e14 208 } else if (a.e > b.e) {
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209 return false;
210 }
211 return false;
212}
213
214static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
215 MemoryRegionIoeventfd b)
216{
217 return !memory_region_ioeventfd_before(a, b)
218 && !memory_region_ioeventfd_before(b, a);
219}
220
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221typedef struct FlatRange FlatRange;
222typedef struct FlatView FlatView;
223
224/* Range of memory in the global map. Addresses are absolute. */
225struct FlatRange {
226 MemoryRegion *mr;
a8170e5e 227 hwaddr offset_in_region;
093bc2cd 228 AddrRange addr;
5a583347 229 uint8_t dirty_log_mask;
b138e654 230 bool romd_mode;
fb1cd6f9 231 bool readonly;
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232};
233
234/* Flattened global view of current active memory hierarchy. Kept in sorted
235 * order.
236 */
237struct FlatView {
374f2981 238 struct rcu_head rcu;
856d7245 239 unsigned ref;
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240 FlatRange *ranges;
241 unsigned nr;
242 unsigned nr_allocated;
243};
244
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245typedef struct AddressSpaceOps AddressSpaceOps;
246
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247#define FOR_EACH_FLAT_RANGE(var, view) \
248 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
249
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250static bool flatrange_equal(FlatRange *a, FlatRange *b)
251{
252 return a->mr == b->mr
253 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 254 && a->offset_in_region == b->offset_in_region
b138e654 255 && a->romd_mode == b->romd_mode
fb1cd6f9 256 && a->readonly == b->readonly;
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257}
258
259static void flatview_init(FlatView *view)
260{
856d7245 261 view->ref = 1;
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262 view->ranges = NULL;
263 view->nr = 0;
264 view->nr_allocated = 0;
265}
266
267/* Insert a range into a given position. Caller is responsible for maintaining
268 * sorting order.
269 */
270static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
271{
272 if (view->nr == view->nr_allocated) {
273 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 274 view->ranges = g_realloc(view->ranges,
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275 view->nr_allocated * sizeof(*view->ranges));
276 }
277 memmove(view->ranges + pos + 1, view->ranges + pos,
278 (view->nr - pos) * sizeof(FlatRange));
279 view->ranges[pos] = *range;
dfde4e6e 280 memory_region_ref(range->mr);
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281 ++view->nr;
282}
283
284static void flatview_destroy(FlatView *view)
285{
dfde4e6e
PB
286 int i;
287
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
7267c094 291 g_free(view->ranges);
a9a0c06d 292 g_free(view);
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293}
294
856d7245
PB
295static void flatview_ref(FlatView *view)
296{
297 atomic_inc(&view->ref);
298}
299
300static void flatview_unref(FlatView *view)
301{
302 if (atomic_fetch_dec(&view->ref) == 1) {
303 flatview_destroy(view);
304 }
305}
306
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307static bool can_merge(FlatRange *r1, FlatRange *r2)
308{
08dafab4 309 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 310 && r1->mr == r2->mr
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311 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
312 r1->addr.size),
313 int128_make64(r2->offset_in_region))
d0a9b5bc 314 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 315 && r1->romd_mode == r2->romd_mode
fb1cd6f9 316 && r1->readonly == r2->readonly;
3d8e6bf9
AK
317}
318
8508e024 319/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
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320static void flatview_simplify(FlatView *view)
321{
322 unsigned i, j;
323
324 i = 0;
325 while (i < view->nr) {
326 j = i + 1;
327 while (j < view->nr
328 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 329 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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330 ++j;
331 }
332 ++i;
333 memmove(&view->ranges[i], &view->ranges[j],
334 (view->nr - j) * sizeof(view->ranges[j]));
335 view->nr -= j - i;
336 }
337}
338
e7342aa3
PB
339static bool memory_region_big_endian(MemoryRegion *mr)
340{
341#ifdef TARGET_WORDS_BIGENDIAN
342 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
343#else
344 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
345#endif
346}
347
e11ef3d1
PB
348static bool memory_region_wrong_endianness(MemoryRegion *mr)
349{
350#ifdef TARGET_WORDS_BIGENDIAN
351 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
352#else
353 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
354#endif
355}
356
357static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
358{
359 if (memory_region_wrong_endianness(mr)) {
360 switch (size) {
361 case 1:
362 break;
363 case 2:
364 *data = bswap16(*data);
365 break;
366 case 4:
367 *data = bswap32(*data);
368 break;
369 case 8:
370 *data = bswap64(*data);
371 break;
372 default:
373 abort();
374 }
375 }
376}
377
4779dc1d
HB
378static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
379{
380 MemoryRegion *root;
381 hwaddr abs_addr = offset;
382
383 abs_addr += mr->addr;
384 for (root = mr; root->container; ) {
385 root = root->container;
386 abs_addr += root->addr;
387 }
388
389 return abs_addr;
390}
391
5a68be94
HB
392static int get_cpu_index(void)
393{
394 if (current_cpu) {
395 return current_cpu->cpu_index;
396 }
397 return -1;
398}
399
cc05c43a
PM
400static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
401 hwaddr addr,
402 uint64_t *value,
403 unsigned size,
404 unsigned shift,
405 uint64_t mask,
406 MemTxAttrs attrs)
407{
408 uint64_t tmp;
409
410 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68 411 if (mr->subpage) {
5a68be94 412 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
413 } else if (mr == &io_mem_notdirty) {
414 /* Accesses to code which has previously been translated into a TB show
415 * up in the MMIO path, as accesses to the io_mem_notdirty
416 * MemoryRegion. */
417 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
418 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
419 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 420 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 421 }
cc05c43a
PM
422 *value |= (tmp & mask) << shift;
423 return MEMTX_OK;
424}
425
426static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
cc05c43a
PM
431 uint64_t mask,
432 MemTxAttrs attrs)
ce5d2f33 433{
ce5d2f33
PB
434 uint64_t tmp;
435
cc05c43a 436 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 437 if (mr->subpage) {
5a68be94 438 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
439 } else if (mr == &io_mem_notdirty) {
440 /* Accesses to code which has previously been translated into a TB show
441 * up in the MMIO path, as accesses to the io_mem_notdirty
442 * MemoryRegion. */
443 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
444 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
445 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 446 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 447 }
ce5d2f33 448 *value |= (tmp & mask) << shift;
cc05c43a 449 return MEMTX_OK;
ce5d2f33
PB
450}
451
cc05c43a
PM
452static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 unsigned shift,
457 uint64_t mask,
458 MemTxAttrs attrs)
164a4dcd 459{
cc05c43a
PM
460 uint64_t tmp = 0;
461 MemTxResult r;
164a4dcd 462
cc05c43a 463 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 464 if (mr->subpage) {
5a68be94 465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
466 } else if (mr == &io_mem_notdirty) {
467 /* Accesses to code which has previously been translated into a TB show
468 * up in the MMIO path, as accesses to the io_mem_notdirty
469 * MemoryRegion. */
470 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
471 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 474 }
164a4dcd 475 *value |= (tmp & mask) << shift;
cc05c43a 476 return r;
164a4dcd
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477}
478
cc05c43a
PM
479static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
480 hwaddr addr,
481 uint64_t *value,
482 unsigned size,
483 unsigned shift,
484 uint64_t mask,
485 MemTxAttrs attrs)
ce5d2f33 486{
ce5d2f33
PB
487 uint64_t tmp;
488
489 tmp = (*value >> shift) & mask;
23d92d68 490 if (mr->subpage) {
5a68be94 491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
492 } else if (mr == &io_mem_notdirty) {
493 /* Accesses to code which has previously been translated into a TB show
494 * up in the MMIO path, as accesses to the io_mem_notdirty
495 * MemoryRegion. */
496 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
497 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
498 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 499 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 500 }
ce5d2f33 501 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 502 return MEMTX_OK;
ce5d2f33
PB
503}
504
cc05c43a
PM
505static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
506 hwaddr addr,
507 uint64_t *value,
508 unsigned size,
509 unsigned shift,
510 uint64_t mask,
511 MemTxAttrs attrs)
164a4dcd 512{
164a4dcd
AK
513 uint64_t tmp;
514
515 tmp = (*value >> shift) & mask;
23d92d68 516 if (mr->subpage) {
5a68be94 517 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
518 } else if (mr == &io_mem_notdirty) {
519 /* Accesses to code which has previously been translated into a TB show
520 * up in the MMIO path, as accesses to the io_mem_notdirty
521 * MemoryRegion. */
522 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
523 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
524 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 525 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 526 }
164a4dcd 527 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 528 return MEMTX_OK;
164a4dcd
AK
529}
530
cc05c43a
PM
531static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
532 hwaddr addr,
533 uint64_t *value,
534 unsigned size,
535 unsigned shift,
536 uint64_t mask,
537 MemTxAttrs attrs)
538{
539 uint64_t tmp;
540
cc05c43a 541 tmp = (*value >> shift) & mask;
23d92d68 542 if (mr->subpage) {
5a68be94 543 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
544 } else if (mr == &io_mem_notdirty) {
545 /* Accesses to code which has previously been translated into a TB show
546 * up in the MMIO path, as accesses to the io_mem_notdirty
547 * MemoryRegion. */
548 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
549 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
550 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 551 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 552 }
cc05c43a
PM
553 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
554}
555
556static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
557 uint64_t *value,
558 unsigned size,
559 unsigned access_size_min,
560 unsigned access_size_max,
cc05c43a
PM
561 MemTxResult (*access)(MemoryRegion *mr,
562 hwaddr addr,
563 uint64_t *value,
564 unsigned size,
565 unsigned shift,
566 uint64_t mask,
567 MemTxAttrs attrs),
568 MemoryRegion *mr,
569 MemTxAttrs attrs)
164a4dcd
AK
570{
571 uint64_t access_mask;
572 unsigned access_size;
573 unsigned i;
cc05c43a 574 MemTxResult r = MEMTX_OK;
164a4dcd
AK
575
576 if (!access_size_min) {
577 access_size_min = 1;
578 }
579 if (!access_size_max) {
580 access_size_max = 4;
581 }
ce5d2f33
PB
582
583 /* FIXME: support unaligned access? */
164a4dcd
AK
584 access_size = MAX(MIN(size, access_size_max), access_size_min);
585 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
586 if (memory_region_big_endian(mr)) {
587 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
588 r |= access(mr, addr + i, value, access_size,
589 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
590 }
591 } else {
592 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
593 r |= access(mr, addr + i, value, access_size, i * 8,
594 access_mask, attrs);
e7342aa3 595 }
164a4dcd 596 }
cc05c43a 597 return r;
164a4dcd
AK
598}
599
e2177955
AK
600static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
601{
0d673e36
AK
602 AddressSpace *as;
603
feca4ac1
PB
604 while (mr->container) {
605 mr = mr->container;
e2177955 606 }
0d673e36
AK
607 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
608 if (mr == as->root) {
609 return as;
610 }
e2177955 611 }
eed2bacf 612 return NULL;
e2177955
AK
613}
614
093bc2cd
AK
615/* Render a memory region into the global view. Ranges in @view obscure
616 * ranges in @mr.
617 */
618static void render_memory_region(FlatView *view,
619 MemoryRegion *mr,
08dafab4 620 Int128 base,
fb1cd6f9
AK
621 AddrRange clip,
622 bool readonly)
093bc2cd
AK
623{
624 MemoryRegion *subregion;
625 unsigned i;
a8170e5e 626 hwaddr offset_in_region;
08dafab4
AK
627 Int128 remain;
628 Int128 now;
093bc2cd
AK
629 FlatRange fr;
630 AddrRange tmp;
631
6bba19ba
AK
632 if (!mr->enabled) {
633 return;
634 }
635
08dafab4 636 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 637 readonly |= mr->readonly;
093bc2cd
AK
638
639 tmp = addrrange_make(base, mr->size);
640
641 if (!addrrange_intersects(tmp, clip)) {
642 return;
643 }
644
645 clip = addrrange_intersection(tmp, clip);
646
647 if (mr->alias) {
08dafab4
AK
648 int128_subfrom(&base, int128_make64(mr->alias->addr));
649 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 650 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK
651 return;
652 }
653
654 /* Render subregions in priority order. */
655 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 656 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
657 }
658
14a3c10a 659 if (!mr->terminates) {
093bc2cd
AK
660 return;
661 }
662
08dafab4 663 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
664 base = clip.start;
665 remain = clip.size;
666
2eb74e1a 667 fr.mr = mr;
6f6a5ef3 668 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 669 fr.romd_mode = mr->romd_mode;
2eb74e1a
PC
670 fr.readonly = readonly;
671
093bc2cd 672 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
673 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
674 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
675 continue;
676 }
08dafab4
AK
677 if (int128_lt(base, view->ranges[i].addr.start)) {
678 now = int128_min(remain,
679 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
680 fr.offset_in_region = offset_in_region;
681 fr.addr = addrrange_make(base, now);
682 flatview_insert(view, i, &fr);
683 ++i;
08dafab4
AK
684 int128_addto(&base, now);
685 offset_in_region += int128_get64(now);
686 int128_subfrom(&remain, now);
093bc2cd 687 }
d26a8cae
AK
688 now = int128_sub(int128_min(int128_add(base, remain),
689 addrrange_end(view->ranges[i].addr)),
690 base);
691 int128_addto(&base, now);
692 offset_in_region += int128_get64(now);
693 int128_subfrom(&remain, now);
093bc2cd 694 }
08dafab4 695 if (int128_nz(remain)) {
093bc2cd
AK
696 fr.offset_in_region = offset_in_region;
697 fr.addr = addrrange_make(base, remain);
698 flatview_insert(view, i, &fr);
699 }
700}
701
702/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 703static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 704{
a9a0c06d 705 FlatView *view;
093bc2cd 706
a9a0c06d
PB
707 view = g_new(FlatView, 1);
708 flatview_init(view);
093bc2cd 709
83f3c251 710 if (mr) {
a9a0c06d 711 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
712 addrrange_make(int128_zero(), int128_2_64()), false);
713 }
a9a0c06d 714 flatview_simplify(view);
093bc2cd
AK
715
716 return view;
717}
718
3e9d69e7
AK
719static void address_space_add_del_ioeventfds(AddressSpace *as,
720 MemoryRegionIoeventfd *fds_new,
721 unsigned fds_new_nb,
722 MemoryRegionIoeventfd *fds_old,
723 unsigned fds_old_nb)
724{
725 unsigned iold, inew;
80a1ea37
AK
726 MemoryRegionIoeventfd *fd;
727 MemoryRegionSection section;
3e9d69e7
AK
728
729 /* Generate a symmetric difference of the old and new fd sets, adding
730 * and deleting as necessary.
731 */
732
733 iold = inew = 0;
734 while (iold < fds_old_nb || inew < fds_new_nb) {
735 if (iold < fds_old_nb
736 && (inew == fds_new_nb
737 || memory_region_ioeventfd_before(fds_old[iold],
738 fds_new[inew]))) {
80a1ea37
AK
739 fd = &fds_old[iold];
740 section = (MemoryRegionSection) {
f6790af6 741 .address_space = as,
80a1ea37 742 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 743 .size = fd->addr.size,
80a1ea37
AK
744 };
745 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 746 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
747 ++iold;
748 } else if (inew < fds_new_nb
749 && (iold == fds_old_nb
750 || memory_region_ioeventfd_before(fds_new[inew],
751 fds_old[iold]))) {
80a1ea37
AK
752 fd = &fds_new[inew];
753 section = (MemoryRegionSection) {
f6790af6 754 .address_space = as,
80a1ea37 755 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 756 .size = fd->addr.size,
80a1ea37
AK
757 };
758 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 759 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
760 ++inew;
761 } else {
762 ++iold;
763 ++inew;
764 }
765 }
766}
767
856d7245
PB
768static FlatView *address_space_get_flatview(AddressSpace *as)
769{
770 FlatView *view;
771
374f2981
PB
772 rcu_read_lock();
773 view = atomic_rcu_read(&as->current_map);
856d7245 774 flatview_ref(view);
374f2981 775 rcu_read_unlock();
856d7245
PB
776 return view;
777}
778
3e9d69e7
AK
779static void address_space_update_ioeventfds(AddressSpace *as)
780{
99e86347 781 FlatView *view;
3e9d69e7
AK
782 FlatRange *fr;
783 unsigned ioeventfd_nb = 0;
784 MemoryRegionIoeventfd *ioeventfds = NULL;
785 AddrRange tmp;
786 unsigned i;
787
856d7245 788 view = address_space_get_flatview(as);
99e86347 789 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
790 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
791 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
792 int128_sub(fr->addr.start,
793 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
794 if (addrrange_intersects(fr->addr, tmp)) {
795 ++ioeventfd_nb;
7267c094 796 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
797 ioeventfd_nb * sizeof(*ioeventfds));
798 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
799 ioeventfds[ioeventfd_nb-1].addr = tmp;
800 }
801 }
802 }
803
804 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
805 as->ioeventfds, as->ioeventfd_nb);
806
7267c094 807 g_free(as->ioeventfds);
3e9d69e7
AK
808 as->ioeventfds = ioeventfds;
809 as->ioeventfd_nb = ioeventfd_nb;
856d7245 810 flatview_unref(view);
3e9d69e7
AK
811}
812
b8af1afb 813static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
814 const FlatView *old_view,
815 const FlatView *new_view,
b8af1afb 816 bool adding)
093bc2cd 817{
093bc2cd
AK
818 unsigned iold, inew;
819 FlatRange *frold, *frnew;
093bc2cd
AK
820
821 /* Generate a symmetric difference of the old and new memory maps.
822 * Kill ranges in the old map, and instantiate ranges in the new map.
823 */
824 iold = inew = 0;
a9a0c06d
PB
825 while (iold < old_view->nr || inew < new_view->nr) {
826 if (iold < old_view->nr) {
827 frold = &old_view->ranges[iold];
093bc2cd
AK
828 } else {
829 frold = NULL;
830 }
a9a0c06d
PB
831 if (inew < new_view->nr) {
832 frnew = &new_view->ranges[inew];
093bc2cd
AK
833 } else {
834 frnew = NULL;
835 }
836
837 if (frold
838 && (!frnew
08dafab4
AK
839 || int128_lt(frold->addr.start, frnew->addr.start)
840 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 841 && !flatrange_equal(frold, frnew)))) {
41a6e477 842 /* In old but not in new, or in both but attributes changed. */
093bc2cd 843
b8af1afb 844 if (!adding) {
72e22d2f 845 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
846 }
847
093bc2cd
AK
848 ++iold;
849 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 850 /* In both and unchanged (except logging may have changed) */
093bc2cd 851
b8af1afb 852 if (adding) {
50c1e149 853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB
854 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
855 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
856 frold->dirty_log_mask,
857 frnew->dirty_log_mask);
858 }
859 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
860 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
861 frold->dirty_log_mask,
862 frnew->dirty_log_mask);
b8af1afb 863 }
5a583347
AK
864 }
865
093bc2cd
AK
866 ++iold;
867 ++inew;
093bc2cd
AK
868 } else {
869 /* In new */
870
b8af1afb 871 if (adding) {
72e22d2f 872 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
873 }
874
093bc2cd
AK
875 ++inew;
876 }
877 }
b8af1afb
AK
878}
879
880
881static void address_space_update_topology(AddressSpace *as)
882{
856d7245 883 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 884 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
885
886 address_space_update_topology_pass(as, old_view, new_view, false);
887 address_space_update_topology_pass(as, old_view, new_view, true);
888
374f2981
PB
889 /* Writes are protected by the BQL. */
890 atomic_rcu_set(&as->current_map, new_view);
891 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB
892
893 /* Note that all the old MemoryRegions are still alive up to this
894 * point. This relieves most MemoryListeners from the need to
895 * ref/unref the MemoryRegions they get---unless they use them
896 * outside the iothread mutex, in which case precise reference
897 * counting is necessary.
898 */
899 flatview_unref(old_view);
900
3e9d69e7 901 address_space_update_ioeventfds(as);
093bc2cd
AK
902}
903
4ef4db86
AK
904void memory_region_transaction_begin(void)
905{
bb880ded 906 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
907 ++memory_region_transaction_depth;
908}
909
4dc56152
GA
910static void memory_region_clear_pending(void)
911{
912 memory_region_update_pending = false;
913 ioeventfd_update_pending = false;
914}
915
4ef4db86
AK
916void memory_region_transaction_commit(void)
917{
0d673e36
AK
918 AddressSpace *as;
919
4ef4db86
AK
920 assert(memory_region_transaction_depth);
921 --memory_region_transaction_depth;
4dc56152
GA
922 if (!memory_region_transaction_depth) {
923 if (memory_region_update_pending) {
924 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 925
4dc56152
GA
926 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
927 address_space_update_topology(as);
928 }
02e2b95f 929
4dc56152
GA
930 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
931 } else if (ioeventfd_update_pending) {
932 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
933 address_space_update_ioeventfds(as);
934 }
935 }
936 memory_region_clear_pending();
937 }
4ef4db86
AK
938}
939
545e92e0
AK
940static void memory_region_destructor_none(MemoryRegion *mr)
941{
942}
943
944static void memory_region_destructor_ram(MemoryRegion *mr)
945{
f1060c55 946 qemu_ram_free(mr->ram_block);
545e92e0
AK
947}
948
d0a9b5bc
AK
949static void memory_region_destructor_rom_device(MemoryRegion *mr)
950{
f1060c55 951 qemu_ram_free(mr->ram_block);
d0a9b5bc
AK
952}
953
b4fefef9
PC
954static bool memory_region_need_escape(char c)
955{
956 return c == '/' || c == '[' || c == '\\' || c == ']';
957}
958
959static char *memory_region_escape_name(const char *name)
960{
961 const char *p;
962 char *escaped, *q;
963 uint8_t c;
964 size_t bytes = 0;
965
966 for (p = name; *p; p++) {
967 bytes += memory_region_need_escape(*p) ? 4 : 1;
968 }
969 if (bytes == p - name) {
970 return g_memdup(name, bytes + 1);
971 }
972
973 escaped = g_malloc(bytes + 1);
974 for (p = name, q = escaped; *p; p++) {
975 c = *p;
976 if (unlikely(memory_region_need_escape(c))) {
977 *q++ = '\\';
978 *q++ = 'x';
979 *q++ = "0123456789abcdef"[c >> 4];
980 c = "0123456789abcdef"[c & 15];
981 }
982 *q++ = c;
983 }
984 *q = 0;
985 return escaped;
986}
987
093bc2cd 988void memory_region_init(MemoryRegion *mr,
2c9b15ca 989 Object *owner,
093bc2cd
AK
990 const char *name,
991 uint64_t size)
992{
22a893e4 993 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
994 mr->size = int128_make64(size);
995 if (size == UINT64_MAX) {
996 mr->size = int128_2_64();
997 }
302fa283 998 mr->name = g_strdup(name);
612263cf 999 mr->owner = owner;
58eaa217 1000 mr->ram_block = NULL;
b4fefef9
PC
1001
1002 if (name) {
843ef73a
PC
1003 char *escaped_name = memory_region_escape_name(name);
1004 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB
1005
1006 if (!owner) {
1007 owner = container_get(qdev_get_machine(), "/unattached");
1008 }
1009
843ef73a 1010 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 1011 object_unref(OBJECT(mr));
843ef73a
PC
1012 g_free(name_array);
1013 g_free(escaped_name);
b4fefef9
PC
1014 }
1015}
1016
d7bce999
EB
1017static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1018 void *opaque, Error **errp)
409ddd01
PC
1019{
1020 MemoryRegion *mr = MEMORY_REGION(obj);
1021 uint64_t value = mr->addr;
1022
51e72bc1 1023 visit_type_uint64(v, name, &value, errp);
409ddd01
PC
1024}
1025
d7bce999
EB
1026static void memory_region_get_container(Object *obj, Visitor *v,
1027 const char *name, void *opaque,
1028 Error **errp)
409ddd01
PC
1029{
1030 MemoryRegion *mr = MEMORY_REGION(obj);
1031 gchar *path = (gchar *)"";
1032
1033 if (mr->container) {
1034 path = object_get_canonical_path(OBJECT(mr->container));
1035 }
51e72bc1 1036 visit_type_str(v, name, &path, errp);
409ddd01
PC
1037 if (mr->container) {
1038 g_free(path);
1039 }
1040}
1041
1042static Object *memory_region_resolve_container(Object *obj, void *opaque,
1043 const char *part)
1044{
1045 MemoryRegion *mr = MEMORY_REGION(obj);
1046
1047 return OBJECT(mr->container);
1048}
1049
d7bce999
EB
1050static void memory_region_get_priority(Object *obj, Visitor *v,
1051 const char *name, void *opaque,
1052 Error **errp)
d33382da
PC
1053{
1054 MemoryRegion *mr = MEMORY_REGION(obj);
1055 int32_t value = mr->priority;
1056
51e72bc1 1057 visit_type_int32(v, name, &value, errp);
d33382da
PC
1058}
1059
d7bce999
EB
1060static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1061 void *opaque, Error **errp)
52aef7bb
PC
1062{
1063 MemoryRegion *mr = MEMORY_REGION(obj);
1064 uint64_t value = memory_region_size(mr);
1065
51e72bc1 1066 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC
1067}
1068
b4fefef9
PC
1069static void memory_region_initfn(Object *obj)
1070{
1071 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1072 ObjectProperty *op;
b4fefef9
PC
1073
1074 mr->ops = &unassigned_mem_ops;
6bba19ba 1075 mr->enabled = true;
5f9a5ea1 1076 mr->romd_mode = true;
196ea131 1077 mr->global_locking = true;
545e92e0 1078 mr->destructor = memory_region_destructor_none;
093bc2cd 1079 QTAILQ_INIT(&mr->subregions);
093bc2cd 1080 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1081
1082 op = object_property_add(OBJECT(mr), "container",
1083 "link<" TYPE_MEMORY_REGION ">",
1084 memory_region_get_container,
1085 NULL, /* memory_region_set_container */
1086 NULL, NULL, &error_abort);
1087 op->resolve = memory_region_resolve_container;
1088
1089 object_property_add(OBJECT(mr), "addr", "uint64",
1090 memory_region_get_addr,
1091 NULL, /* memory_region_set_addr */
1092 NULL, NULL, &error_abort);
d33382da
PC
1093 object_property_add(OBJECT(mr), "priority", "uint32",
1094 memory_region_get_priority,
1095 NULL, /* memory_region_set_priority */
1096 NULL, NULL, &error_abort);
52aef7bb
PC
1097 object_property_add(OBJECT(mr), "size", "uint64",
1098 memory_region_get_size,
1099 NULL, /* memory_region_set_size, */
1100 NULL, NULL, &error_abort);
093bc2cd
AK
1101}
1102
b018ddf6
PB
1103static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1104 unsigned size)
1105{
1106#ifdef DEBUG_UNASSIGNED
1107 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1108#endif
4917cf44
AF
1109 if (current_cpu != NULL) {
1110 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1111 }
68a7439a 1112 return 0;
b018ddf6
PB
1113}
1114
1115static void unassigned_mem_write(void *opaque, hwaddr addr,
1116 uint64_t val, unsigned size)
1117{
1118#ifdef DEBUG_UNASSIGNED
1119 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1120#endif
4917cf44
AF
1121 if (current_cpu != NULL) {
1122 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1123 }
b018ddf6
PB
1124}
1125
d197063f
PB
1126static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1127 unsigned size, bool is_write)
1128{
1129 return false;
1130}
1131
1132const MemoryRegionOps unassigned_mem_ops = {
1133 .valid.accepts = unassigned_mem_accepts,
1134 .endianness = DEVICE_NATIVE_ENDIAN,
1135};
1136
d2702032
PB
1137bool memory_region_access_valid(MemoryRegion *mr,
1138 hwaddr addr,
1139 unsigned size,
1140 bool is_write)
093bc2cd 1141{
a014ed07
PB
1142 int access_size_min, access_size_max;
1143 int access_size, i;
897fa7cf 1144
093bc2cd
AK
1145 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1146 return false;
1147 }
1148
a014ed07 1149 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1150 return true;
1151 }
1152
a014ed07
PB
1153 access_size_min = mr->ops->valid.min_access_size;
1154 if (!mr->ops->valid.min_access_size) {
1155 access_size_min = 1;
1156 }
1157
1158 access_size_max = mr->ops->valid.max_access_size;
1159 if (!mr->ops->valid.max_access_size) {
1160 access_size_max = 4;
1161 }
1162
1163 access_size = MAX(MIN(size, access_size_max), access_size_min);
1164 for (i = 0; i < size; i += access_size) {
1165 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1166 is_write)) {
1167 return false;
1168 }
093bc2cd 1169 }
a014ed07 1170
093bc2cd
AK
1171 return true;
1172}
1173
cc05c43a
PM
1174static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1175 hwaddr addr,
1176 uint64_t *pval,
1177 unsigned size,
1178 MemTxAttrs attrs)
093bc2cd 1179{
cc05c43a 1180 *pval = 0;
093bc2cd 1181
ce5d2f33 1182 if (mr->ops->read) {
cc05c43a
PM
1183 return access_with_adjusted_size(addr, pval, size,
1184 mr->ops->impl.min_access_size,
1185 mr->ops->impl.max_access_size,
1186 memory_region_read_accessor,
1187 mr, attrs);
1188 } else if (mr->ops->read_with_attrs) {
1189 return access_with_adjusted_size(addr, pval, size,
1190 mr->ops->impl.min_access_size,
1191 mr->ops->impl.max_access_size,
1192 memory_region_read_with_attrs_accessor,
1193 mr, attrs);
ce5d2f33 1194 } else {
cc05c43a
PM
1195 return access_with_adjusted_size(addr, pval, size, 1, 4,
1196 memory_region_oldmmio_read_accessor,
1197 mr, attrs);
74901c3b 1198 }
093bc2cd
AK
1199}
1200
3b643495
PM
1201MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1202 hwaddr addr,
1203 uint64_t *pval,
1204 unsigned size,
1205 MemTxAttrs attrs)
a621f38d 1206{
cc05c43a
PM
1207 MemTxResult r;
1208
791af8c8
PB
1209 if (!memory_region_access_valid(mr, addr, size, false)) {
1210 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1211 return MEMTX_DECODE_ERROR;
791af8c8 1212 }
a621f38d 1213
cc05c43a 1214 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1215 adjust_endianness(mr, pval, size);
cc05c43a 1216 return r;
a621f38d 1217}
093bc2cd 1218
8c56c1a5
PF
1219/* Return true if an eventfd was signalled */
1220static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1221 hwaddr addr,
1222 uint64_t data,
1223 unsigned size,
1224 MemTxAttrs attrs)
1225{
1226 MemoryRegionIoeventfd ioeventfd = {
1227 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1228 .data = data,
1229 };
1230 unsigned i;
1231
1232 for (i = 0; i < mr->ioeventfd_nb; i++) {
1233 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1234 ioeventfd.e = mr->ioeventfds[i].e;
1235
1236 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1237 event_notifier_set(ioeventfd.e);
1238 return true;
1239 }
1240 }
1241
1242 return false;
1243}
1244
3b643495
PM
1245MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1246 hwaddr addr,
1247 uint64_t data,
1248 unsigned size,
1249 MemTxAttrs attrs)
a621f38d 1250{
897fa7cf 1251 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1252 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1253 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1254 }
1255
a621f38d
AK
1256 adjust_endianness(mr, &data, size);
1257
8c56c1a5
PF
1258 if ((!kvm_eventfds_enabled()) &&
1259 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1260 return MEMTX_OK;
1261 }
1262
ce5d2f33 1263 if (mr->ops->write) {
cc05c43a
PM
1264 return access_with_adjusted_size(addr, &data, size,
1265 mr->ops->impl.min_access_size,
1266 mr->ops->impl.max_access_size,
1267 memory_region_write_accessor, mr,
1268 attrs);
1269 } else if (mr->ops->write_with_attrs) {
1270 return
1271 access_with_adjusted_size(addr, &data, size,
1272 mr->ops->impl.min_access_size,
1273 mr->ops->impl.max_access_size,
1274 memory_region_write_with_attrs_accessor,
1275 mr, attrs);
ce5d2f33 1276 } else {
cc05c43a
PM
1277 return access_with_adjusted_size(addr, &data, size, 1, 4,
1278 memory_region_oldmmio_write_accessor,
1279 mr, attrs);
74901c3b 1280 }
093bc2cd
AK
1281}
1282
093bc2cd 1283void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1284 Object *owner,
093bc2cd
AK
1285 const MemoryRegionOps *ops,
1286 void *opaque,
1287 const char *name,
1288 uint64_t size)
1289{
2c9b15ca 1290 memory_region_init(mr, owner, name, size);
6d6d2abf 1291 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1292 mr->opaque = opaque;
14a3c10a 1293 mr->terminates = true;
093bc2cd
AK
1294}
1295
1296void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1297 Object *owner,
093bc2cd 1298 const char *name,
49946538
HT
1299 uint64_t size,
1300 Error **errp)
093bc2cd 1301{
2c9b15ca 1302 memory_region_init(mr, owner, name, size);
8ea9252a 1303 mr->ram = true;
14a3c10a 1304 mr->terminates = true;
545e92e0 1305 mr->destructor = memory_region_destructor_ram;
8e41fb63 1306 mr->ram_block = qemu_ram_alloc(size, mr, errp);
677e7805 1307 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB
1308}
1309
60786ef3
MT
1310void memory_region_init_resizeable_ram(MemoryRegion *mr,
1311 Object *owner,
1312 const char *name,
1313 uint64_t size,
1314 uint64_t max_size,
1315 void (*resized)(const char*,
1316 uint64_t length,
1317 void *host),
1318 Error **errp)
1319{
1320 memory_region_init(mr, owner, name, size);
1321 mr->ram = true;
1322 mr->terminates = true;
1323 mr->destructor = memory_region_destructor_ram;
8e41fb63
FZ
1324 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1325 mr, errp);
677e7805 1326 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT
1327}
1328
0b183fc8
PB
1329#ifdef __linux__
1330void memory_region_init_ram_from_file(MemoryRegion *mr,
1331 struct Object *owner,
1332 const char *name,
1333 uint64_t size,
dbcb8981 1334 bool share,
7f56e740
PB
1335 const char *path,
1336 Error **errp)
0b183fc8
PB
1337{
1338 memory_region_init(mr, owner, name, size);
1339 mr->ram = true;
1340 mr->terminates = true;
1341 mr->destructor = memory_region_destructor_ram;
8e41fb63 1342 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1343 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1344}
0b183fc8 1345#endif
093bc2cd
AK
1346
1347void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1348 Object *owner,
093bc2cd
AK
1349 const char *name,
1350 uint64_t size,
1351 void *ptr)
1352{
2c9b15ca 1353 memory_region_init(mr, owner, name, size);
8ea9252a 1354 mr->ram = true;
14a3c10a 1355 mr->terminates = true;
fc3e7665 1356 mr->destructor = memory_region_destructor_ram;
677e7805 1357 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT
1358
1359 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1360 assert(ptr != NULL);
8e41fb63 1361 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK
1362}
1363
e4dc3f59
ND
1364void memory_region_set_skip_dump(MemoryRegion *mr)
1365{
1366 mr->skip_dump = true;
1367}
1368
093bc2cd 1369void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1370 Object *owner,
093bc2cd
AK
1371 const char *name,
1372 MemoryRegion *orig,
a8170e5e 1373 hwaddr offset,
093bc2cd
AK
1374 uint64_t size)
1375{
2c9b15ca 1376 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1377 mr->alias = orig;
1378 mr->alias_offset = offset;
1379}
1380
d0a9b5bc 1381void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1382 Object *owner,
d0a9b5bc 1383 const MemoryRegionOps *ops,
75f5941c 1384 void *opaque,
d0a9b5bc 1385 const char *name,
33e0eb52
HT
1386 uint64_t size,
1387 Error **errp)
d0a9b5bc 1388{
2c9b15ca 1389 memory_region_init(mr, owner, name, size);
7bc2b9cd 1390 mr->ops = ops;
75f5941c 1391 mr->opaque = opaque;
d0a9b5bc 1392 mr->terminates = true;
75c578dc 1393 mr->rom_device = true;
d0a9b5bc 1394 mr->destructor = memory_region_destructor_rom_device;
8e41fb63 1395 mr->ram_block = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK
1396}
1397
30951157 1398void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1399 Object *owner,
30951157
AK
1400 const MemoryRegionIOMMUOps *ops,
1401 const char *name,
1402 uint64_t size)
1403{
2c9b15ca 1404 memory_region_init(mr, owner, name, size);
30951157
AK
1405 mr->iommu_ops = ops,
1406 mr->terminates = true; /* then re-forwards */
06866575 1407 notifier_list_init(&mr->iommu_notify);
30951157
AK
1408}
1409
b4fefef9 1410static void memory_region_finalize(Object *obj)
093bc2cd 1411{
b4fefef9
PC
1412 MemoryRegion *mr = MEMORY_REGION(obj);
1413
2e2b8eb7
PB
1414 assert(!mr->container);
1415
1416 /* We know the region is not visible in any address space (it
1417 * does not have a container and cannot be a root either because
1418 * it has no references, so we can blindly clear mr->enabled.
1419 * memory_region_set_enabled instead could trigger a transaction
1420 * and cause an infinite loop.
1421 */
1422 mr->enabled = false;
1423 memory_region_transaction_begin();
1424 while (!QTAILQ_EMPTY(&mr->subregions)) {
1425 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1426 memory_region_del_subregion(mr, subregion);
1427 }
1428 memory_region_transaction_commit();
1429
545e92e0 1430 mr->destructor(mr);
093bc2cd 1431 memory_region_clear_coalescing(mr);
302fa283 1432 g_free((char *)mr->name);
7267c094 1433 g_free(mr->ioeventfds);
093bc2cd
AK
1434}
1435
803c0816
PB
1436Object *memory_region_owner(MemoryRegion *mr)
1437{
22a893e4
PB
1438 Object *obj = OBJECT(mr);
1439 return obj->parent;
803c0816
PB
1440}
1441
46637be2
PB
1442void memory_region_ref(MemoryRegion *mr)
1443{
22a893e4
PB
1444 /* MMIO callbacks most likely will access data that belongs
1445 * to the owner, hence the need to ref/unref the owner whenever
1446 * the memory region is in use.
1447 *
1448 * The memory region is a child of its owner. As long as the
1449 * owner doesn't call unparent itself on the memory region,
1450 * ref-ing the owner will also keep the memory region alive.
612263cf
PB
1451 * Memory regions without an owner are supposed to never go away;
1452 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1453 */
612263cf
PB
1454 if (mr && mr->owner) {
1455 object_ref(mr->owner);
46637be2
PB
1456 }
1457}
1458
1459void memory_region_unref(MemoryRegion *mr)
1460{
612263cf
PB
1461 if (mr && mr->owner) {
1462 object_unref(mr->owner);
46637be2
PB
1463 }
1464}
1465
093bc2cd
AK
1466uint64_t memory_region_size(MemoryRegion *mr)
1467{
08dafab4
AK
1468 if (int128_eq(mr->size, int128_2_64())) {
1469 return UINT64_MAX;
1470 }
1471 return int128_get64(mr->size);
093bc2cd
AK
1472}
1473
5d546d4b 1474const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1475{
d1dd32af
PC
1476 if (!mr->name) {
1477 ((MemoryRegion *)mr)->name =
1478 object_get_canonical_path_component(OBJECT(mr));
1479 }
302fa283 1480 return mr->name;
8991c79b
AK
1481}
1482
e4dc3f59
ND
1483bool memory_region_is_skip_dump(MemoryRegion *mr)
1484{
1485 return mr->skip_dump;
1486}
1487
2d1a35be 1488uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1489{
6f6a5ef3
PB
1490 uint8_t mask = mr->dirty_log_mask;
1491 if (global_dirty_log) {
1492 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1493 }
1494 return mask;
55043ba3
AK
1495}
1496
2d1a35be
PB
1497bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1498{
1499 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1500}
1501
06866575
DG
1502void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1503{
1504 notifier_list_add(&mr->iommu_notify, n);
1505}
1506
a788f227
DG
1507void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1508 hwaddr granularity, bool is_write)
1509{
1510 hwaddr addr;
1511 IOMMUTLBEntry iotlb;
1512
1513 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1514 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1515 if (iotlb.perm != IOMMU_NONE) {
1516 n->notify(n, &iotlb);
1517 }
1518
1519 /* if (2^64 - MR size) < granularity, it's possible to get an
1520 * infinite loop here. This should catch such a wraparound */
1521 if ((addr + granularity) < addr) {
1522 break;
1523 }
1524 }
1525}
1526
06866575
DG
1527void memory_region_unregister_iommu_notifier(Notifier *n)
1528{
1529 notifier_remove(n);
1530}
1531
1532void memory_region_notify_iommu(MemoryRegion *mr,
1533 IOMMUTLBEntry entry)
1534{
1535 assert(memory_region_is_iommu(mr));
1536 notifier_list_notify(&mr->iommu_notify, &entry);
1537}
1538
093bc2cd
AK
1539void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1540{
5a583347 1541 uint8_t mask = 1 << client;
deb809ed 1542 uint8_t old_logging;
5a583347 1543
dbddac6d 1544 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB
1545 old_logging = mr->vga_logging_count;
1546 mr->vga_logging_count += log ? 1 : -1;
1547 if (!!old_logging == !!mr->vga_logging_count) {
1548 return;
1549 }
1550
59023ef4 1551 memory_region_transaction_begin();
5a583347 1552 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1553 memory_region_update_pending |= mr->enabled;
59023ef4 1554 memory_region_transaction_commit();
093bc2cd
AK
1555}
1556
a8170e5e
AK
1557bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1558 hwaddr size, unsigned client)
093bc2cd 1559{
8e41fb63
FZ
1560 assert(mr->ram_block);
1561 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1562 size, client);
093bc2cd
AK
1563}
1564
a8170e5e
AK
1565void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1566 hwaddr size)
093bc2cd 1567{
8e41fb63
FZ
1568 assert(mr->ram_block);
1569 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1570 size,
58d2707e 1571 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK
1572}
1573
6c279db8
JQ
1574bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1575 hwaddr size, unsigned client)
1576{
8e41fb63
FZ
1577 assert(mr->ram_block);
1578 return cpu_physical_memory_test_and_clear_dirty(
1579 memory_region_get_ram_addr(mr) + addr, size, client);
6c279db8
JQ
1580}
1581
1582
093bc2cd
AK
1583void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1584{
0d673e36 1585 AddressSpace *as;
5a583347
AK
1586 FlatRange *fr;
1587
0d673e36 1588 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1589 FlatView *view = address_space_get_flatview(as);
99e86347 1590 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1591 if (fr->mr == mr) {
1592 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1593 }
5a583347 1594 }
856d7245 1595 flatview_unref(view);
5a583347 1596 }
093bc2cd
AK
1597}
1598
1599void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1600{
fb1cd6f9 1601 if (mr->readonly != readonly) {
59023ef4 1602 memory_region_transaction_begin();
fb1cd6f9 1603 mr->readonly = readonly;
22bde714 1604 memory_region_update_pending |= mr->enabled;
59023ef4 1605 memory_region_transaction_commit();
fb1cd6f9 1606 }
093bc2cd
AK
1607}
1608
5f9a5ea1 1609void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1610{
5f9a5ea1 1611 if (mr->romd_mode != romd_mode) {
59023ef4 1612 memory_region_transaction_begin();
5f9a5ea1 1613 mr->romd_mode = romd_mode;
22bde714 1614 memory_region_update_pending |= mr->enabled;
59023ef4 1615 memory_region_transaction_commit();
d0a9b5bc
AK
1616 }
1617}
1618
a8170e5e
AK
1619void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1620 hwaddr size, unsigned client)
093bc2cd 1621{
8e41fb63
FZ
1622 assert(mr->ram_block);
1623 cpu_physical_memory_test_and_clear_dirty(
1624 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK
1625}
1626
a35ba7be
PB
1627int memory_region_get_fd(MemoryRegion *mr)
1628{
4ff87573
PB
1629 int fd;
1630
1631 rcu_read_lock();
1632 while (mr->alias) {
1633 mr = mr->alias;
a35ba7be 1634 }
4ff87573
PB
1635 fd = mr->ram_block->fd;
1636 rcu_read_unlock();
a35ba7be 1637
4ff87573
PB
1638 return fd;
1639}
a35ba7be 1640
4ff87573
PB
1641void memory_region_set_fd(MemoryRegion *mr, int fd)
1642{
1643 rcu_read_lock();
1644 while (mr->alias) {
1645 mr = mr->alias;
1646 }
1647 mr->ram_block->fd = fd;
1648 rcu_read_unlock();
a35ba7be
PB
1649}
1650
093bc2cd
AK
1651void *memory_region_get_ram_ptr(MemoryRegion *mr)
1652{
49b24afc
PB
1653 void *ptr;
1654 uint64_t offset = 0;
093bc2cd 1655
49b24afc
PB
1656 rcu_read_lock();
1657 while (mr->alias) {
1658 offset += mr->alias_offset;
1659 mr = mr->alias;
1660 }
8e41fb63 1661 assert(mr->ram_block);
e4e69794 1662 ptr = qemu_get_ram_ptr(mr->ram_block, memory_region_get_ram_addr(mr));
49b24afc 1663 rcu_read_unlock();
093bc2cd 1664
49b24afc 1665 return ptr + offset;
093bc2cd
AK
1666}
1667
7ebb2745
FZ
1668ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1669{
1670 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1671}
1672
37d7c084
PB
1673void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1674{
8e41fb63 1675 assert(mr->ram_block);
37d7c084 1676
fa53a0e5 1677 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB
1678}
1679
0d673e36 1680static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1681{
99e86347 1682 FlatView *view;
093bc2cd
AK
1683 FlatRange *fr;
1684 CoalescedMemoryRange *cmr;
1685 AddrRange tmp;
95d2994a 1686 MemoryRegionSection section;
093bc2cd 1687
856d7245 1688 view = address_space_get_flatview(as);
99e86347 1689 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1690 if (fr->mr == mr) {
95d2994a 1691 section = (MemoryRegionSection) {
f6790af6 1692 .address_space = as,
95d2994a 1693 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1694 .size = fr->addr.size,
95d2994a
AK
1695 };
1696
1697 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1698 int128_get64(fr->addr.start),
1699 int128_get64(fr->addr.size));
093bc2cd
AK
1700 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1701 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1702 int128_sub(fr->addr.start,
1703 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1704 if (!addrrange_intersects(tmp, fr->addr)) {
1705 continue;
1706 }
1707 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1708 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1709 int128_get64(tmp.start),
1710 int128_get64(tmp.size));
093bc2cd
AK
1711 }
1712 }
1713 }
856d7245 1714 flatview_unref(view);
093bc2cd
AK
1715}
1716
0d673e36
AK
1717static void memory_region_update_coalesced_range(MemoryRegion *mr)
1718{
1719 AddressSpace *as;
1720
1721 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1722 memory_region_update_coalesced_range_as(mr, as);
1723 }
1724}
1725
093bc2cd
AK
1726void memory_region_set_coalescing(MemoryRegion *mr)
1727{
1728 memory_region_clear_coalescing(mr);
08dafab4 1729 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1730}
1731
1732void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1733 hwaddr offset,
093bc2cd
AK
1734 uint64_t size)
1735{
7267c094 1736 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1737
08dafab4 1738 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1739 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1740 memory_region_update_coalesced_range(mr);
d410515e 1741 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1742}
1743
1744void memory_region_clear_coalescing(MemoryRegion *mr)
1745{
1746 CoalescedMemoryRange *cmr;
ab5b3db5 1747 bool updated = false;
093bc2cd 1748
d410515e
JK
1749 qemu_flush_coalesced_mmio_buffer();
1750 mr->flush_coalesced_mmio = false;
1751
093bc2cd
AK
1752 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1753 cmr = QTAILQ_FIRST(&mr->coalesced);
1754 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1755 g_free(cmr);
ab5b3db5
FZ
1756 updated = true;
1757 }
1758
1759 if (updated) {
1760 memory_region_update_coalesced_range(mr);
093bc2cd 1761 }
093bc2cd
AK
1762}
1763
d410515e
JK
1764void memory_region_set_flush_coalesced(MemoryRegion *mr)
1765{
1766 mr->flush_coalesced_mmio = true;
1767}
1768
1769void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1770{
1771 qemu_flush_coalesced_mmio_buffer();
1772 if (QTAILQ_EMPTY(&mr->coalesced)) {
1773 mr->flush_coalesced_mmio = false;
1774 }
1775}
1776
196ea131
JK
1777void memory_region_set_global_locking(MemoryRegion *mr)
1778{
1779 mr->global_locking = true;
1780}
1781
1782void memory_region_clear_global_locking(MemoryRegion *mr)
1783{
1784 mr->global_locking = false;
1785}
1786
8c56c1a5
PF
1787static bool userspace_eventfd_warning;
1788
3e9d69e7 1789void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1790 hwaddr addr,
3e9d69e7
AK
1791 unsigned size,
1792 bool match_data,
1793 uint64_t data,
753d5e14 1794 EventNotifier *e)
3e9d69e7
AK
1795{
1796 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1797 .addr.start = int128_make64(addr),
1798 .addr.size = int128_make64(size),
3e9d69e7
AK
1799 .match_data = match_data,
1800 .data = data,
753d5e14 1801 .e = e,
3e9d69e7
AK
1802 };
1803 unsigned i;
1804
8c56c1a5
PF
1805 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1806 userspace_eventfd_warning))) {
1807 userspace_eventfd_warning = true;
1808 error_report("Using eventfd without MMIO binding in KVM. "
1809 "Suboptimal performance expected");
1810 }
1811
b8aecea2
JW
1812 if (size) {
1813 adjust_endianness(mr, &mrfd.data, size);
1814 }
59023ef4 1815 memory_region_transaction_begin();
3e9d69e7
AK
1816 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1817 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1818 break;
1819 }
1820 }
1821 ++mr->ioeventfd_nb;
7267c094 1822 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1823 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1824 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1825 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1826 mr->ioeventfds[i] = mrfd;
4dc56152 1827 ioeventfd_update_pending |= mr->enabled;
59023ef4 1828 memory_region_transaction_commit();
3e9d69e7
AK
1829}
1830
1831void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1832 hwaddr addr,
3e9d69e7
AK
1833 unsigned size,
1834 bool match_data,
1835 uint64_t data,
753d5e14 1836 EventNotifier *e)
3e9d69e7
AK
1837{
1838 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1839 .addr.start = int128_make64(addr),
1840 .addr.size = int128_make64(size),
3e9d69e7
AK
1841 .match_data = match_data,
1842 .data = data,
753d5e14 1843 .e = e,
3e9d69e7
AK
1844 };
1845 unsigned i;
1846
b8aecea2
JW
1847 if (size) {
1848 adjust_endianness(mr, &mrfd.data, size);
1849 }
59023ef4 1850 memory_region_transaction_begin();
3e9d69e7
AK
1851 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1852 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1853 break;
1854 }
1855 }
1856 assert(i != mr->ioeventfd_nb);
1857 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1858 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1859 --mr->ioeventfd_nb;
7267c094 1860 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1861 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1862 ioeventfd_update_pending |= mr->enabled;
59023ef4 1863 memory_region_transaction_commit();
3e9d69e7
AK
1864}
1865
feca4ac1 1866static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1867{
feca4ac1 1868 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1869 MemoryRegion *other;
1870
59023ef4
JK
1871 memory_region_transaction_begin();
1872
dfde4e6e 1873 memory_region_ref(subregion);
093bc2cd
AK
1874 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1875 if (subregion->priority >= other->priority) {
1876 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1877 goto done;
1878 }
1879 }
1880 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1881done:
22bde714 1882 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1883 memory_region_transaction_commit();
093bc2cd
AK
1884}
1885
0598701a
PC
1886static void memory_region_add_subregion_common(MemoryRegion *mr,
1887 hwaddr offset,
1888 MemoryRegion *subregion)
1889{
feca4ac1
PB
1890 assert(!subregion->container);
1891 subregion->container = mr;
0598701a 1892 subregion->addr = offset;
feca4ac1 1893 memory_region_update_container_subregions(subregion);
0598701a 1894}
093bc2cd
AK
1895
1896void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1897 hwaddr offset,
093bc2cd
AK
1898 MemoryRegion *subregion)
1899{
093bc2cd
AK
1900 subregion->priority = 0;
1901 memory_region_add_subregion_common(mr, offset, subregion);
1902}
1903
1904void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1905 hwaddr offset,
093bc2cd 1906 MemoryRegion *subregion,
a1ff8ae0 1907 int priority)
093bc2cd 1908{
093bc2cd
AK
1909 subregion->priority = priority;
1910 memory_region_add_subregion_common(mr, offset, subregion);
1911}
1912
1913void memory_region_del_subregion(MemoryRegion *mr,
1914 MemoryRegion *subregion)
1915{
59023ef4 1916 memory_region_transaction_begin();
feca4ac1
PB
1917 assert(subregion->container == mr);
1918 subregion->container = NULL;
093bc2cd 1919 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1920 memory_region_unref(subregion);
22bde714 1921 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1922 memory_region_transaction_commit();
6bba19ba
AK
1923}
1924
1925void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1926{
1927 if (enabled == mr->enabled) {
1928 return;
1929 }
59023ef4 1930 memory_region_transaction_begin();
6bba19ba 1931 mr->enabled = enabled;
22bde714 1932 memory_region_update_pending = true;
59023ef4 1933 memory_region_transaction_commit();
093bc2cd 1934}
1c0ffa58 1935
e7af4c67
MT
1936void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1937{
1938 Int128 s = int128_make64(size);
1939
1940 if (size == UINT64_MAX) {
1941 s = int128_2_64();
1942 }
1943 if (int128_eq(s, mr->size)) {
1944 return;
1945 }
1946 memory_region_transaction_begin();
1947 mr->size = s;
1948 memory_region_update_pending = true;
1949 memory_region_transaction_commit();
1950}
1951
67891b8a 1952static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1953{
feca4ac1 1954 MemoryRegion *container = mr->container;
2282e1af 1955
feca4ac1 1956 if (container) {
67891b8a
PC
1957 memory_region_transaction_begin();
1958 memory_region_ref(mr);
feca4ac1
PB
1959 memory_region_del_subregion(container, mr);
1960 mr->container = container;
1961 memory_region_update_container_subregions(mr);
67891b8a
PC
1962 memory_region_unref(mr);
1963 memory_region_transaction_commit();
2282e1af 1964 }
67891b8a 1965}
2282e1af 1966
67891b8a
PC
1967void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1968{
1969 if (addr != mr->addr) {
1970 mr->addr = addr;
1971 memory_region_readd_subregion(mr);
1972 }
2282e1af
AK
1973}
1974
a8170e5e 1975void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1976{
4703359e 1977 assert(mr->alias);
4703359e 1978
59023ef4 1979 if (offset == mr->alias_offset) {
4703359e
AK
1980 return;
1981 }
1982
59023ef4
JK
1983 memory_region_transaction_begin();
1984 mr->alias_offset = offset;
22bde714 1985 memory_region_update_pending |= mr->enabled;
59023ef4 1986 memory_region_transaction_commit();
4703359e
AK
1987}
1988
a2b257d6
IM
1989uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1990{
1991 return mr->align;
1992}
1993
e2177955
AK
1994static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1995{
1996 const AddrRange *addr = addr_;
1997 const FlatRange *fr = fr_;
1998
1999 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2000 return -1;
2001 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2002 return 1;
2003 }
2004 return 0;
2005}
2006
99e86347 2007static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2008{
99e86347 2009 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
2010 sizeof(FlatRange), cmp_flatrange_addr);
2011}
2012
eed2bacf
IM
2013bool memory_region_is_mapped(MemoryRegion *mr)
2014{
2015 return mr->container ? true : false;
2016}
2017
c6742b14
PB
2018/* Same as memory_region_find, but it does not add a reference to the
2019 * returned region. It must be called from an RCU critical section.
2020 */
2021static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2022 hwaddr addr, uint64_t size)
e2177955 2023{
052e87b0 2024 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
2025 MemoryRegion *root;
2026 AddressSpace *as;
2027 AddrRange range;
99e86347 2028 FlatView *view;
73034e9e
PB
2029 FlatRange *fr;
2030
2031 addr += mr->addr;
feca4ac1
PB
2032 for (root = mr; root->container; ) {
2033 root = root->container;
73034e9e
PB
2034 addr += root->addr;
2035 }
e2177955 2036
73034e9e 2037 as = memory_region_to_address_space(root);
eed2bacf
IM
2038 if (!as) {
2039 return ret;
2040 }
73034e9e 2041 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2042
2b647668 2043 view = atomic_rcu_read(&as->current_map);
99e86347 2044 fr = flatview_lookup(view, range);
e2177955 2045 if (!fr) {
c6742b14 2046 return ret;
e2177955
AK
2047 }
2048
99e86347 2049 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
2050 --fr;
2051 }
2052
2053 ret.mr = fr->mr;
73034e9e 2054 ret.address_space = as;
e2177955
AK
2055 range = addrrange_intersection(range, fr->addr);
2056 ret.offset_within_region = fr->offset_in_region;
2057 ret.offset_within_region += int128_get64(int128_sub(range.start,
2058 fr->addr.start));
052e87b0 2059 ret.size = range.size;
e2177955 2060 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2061 ret.readonly = fr->readonly;
c6742b14
PB
2062 return ret;
2063}
2064
2065MemoryRegionSection memory_region_find(MemoryRegion *mr,
2066 hwaddr addr, uint64_t size)
2067{
2068 MemoryRegionSection ret;
2069 rcu_read_lock();
2070 ret = memory_region_find_rcu(mr, addr, size);
2071 if (ret.mr) {
2072 memory_region_ref(ret.mr);
2073 }
2b647668 2074 rcu_read_unlock();
e2177955
AK
2075 return ret;
2076}
2077
c6742b14
PB
2078bool memory_region_present(MemoryRegion *container, hwaddr addr)
2079{
2080 MemoryRegion *mr;
2081
2082 rcu_read_lock();
2083 mr = memory_region_find_rcu(container, addr, 1).mr;
2084 rcu_read_unlock();
2085 return mr && mr != container;
2086}
2087
1d671369 2088void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 2089{
99e86347 2090 FlatView *view;
7664e80c
AK
2091 FlatRange *fr;
2092
856d7245 2093 view = address_space_get_flatview(as);
99e86347 2094 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 2095 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 2096 }
856d7245 2097 flatview_unref(view);
7664e80c
AK
2098}
2099
2100void memory_global_dirty_log_start(void)
2101{
7664e80c 2102 global_dirty_log = true;
6f6a5ef3 2103
7376e582 2104 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB
2105
2106 /* Refresh DIRTY_LOG_MIGRATION bit. */
2107 memory_region_transaction_begin();
2108 memory_region_update_pending = true;
2109 memory_region_transaction_commit();
7664e80c
AK
2110}
2111
2112void memory_global_dirty_log_stop(void)
2113{
7664e80c 2114 global_dirty_log = false;
6f6a5ef3
PB
2115
2116 /* Refresh DIRTY_LOG_MIGRATION bit. */
2117 memory_region_transaction_begin();
2118 memory_region_update_pending = true;
2119 memory_region_transaction_commit();
2120
7376e582 2121 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
2122}
2123
2124static void listener_add_address_space(MemoryListener *listener,
2125 AddressSpace *as)
2126{
99e86347 2127 FlatView *view;
7664e80c
AK
2128 FlatRange *fr;
2129
221b3a3f 2130 if (listener->address_space_filter
f6790af6 2131 && listener->address_space_filter != as) {
221b3a3f
JG
2132 return;
2133 }
2134
680a4783
PB
2135 if (listener->begin) {
2136 listener->begin(listener);
2137 }
7664e80c 2138 if (global_dirty_log) {
975aefe0
AK
2139 if (listener->log_global_start) {
2140 listener->log_global_start(listener);
2141 }
7664e80c 2142 }
975aefe0 2143
856d7245 2144 view = address_space_get_flatview(as);
99e86347 2145 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
2146 MemoryRegionSection section = {
2147 .mr = fr->mr,
f6790af6 2148 .address_space = as,
7664e80c 2149 .offset_within_region = fr->offset_in_region,
052e87b0 2150 .size = fr->addr.size,
7664e80c 2151 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2152 .readonly = fr->readonly,
7664e80c 2153 };
680a4783
PB
2154 if (fr->dirty_log_mask && listener->log_start) {
2155 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2156 }
975aefe0
AK
2157 if (listener->region_add) {
2158 listener->region_add(listener, &section);
2159 }
7664e80c 2160 }
680a4783
PB
2161 if (listener->commit) {
2162 listener->commit(listener);
2163 }
856d7245 2164 flatview_unref(view);
7664e80c
AK
2165}
2166
f6790af6 2167void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 2168{
72e22d2f 2169 MemoryListener *other = NULL;
0d673e36 2170 AddressSpace *as;
72e22d2f 2171
7376e582 2172 listener->address_space_filter = filter;
72e22d2f
AK
2173 if (QTAILQ_EMPTY(&memory_listeners)
2174 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2175 memory_listeners)->priority) {
2176 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2177 } else {
2178 QTAILQ_FOREACH(other, &memory_listeners, link) {
2179 if (listener->priority < other->priority) {
2180 break;
2181 }
2182 }
2183 QTAILQ_INSERT_BEFORE(other, listener, link);
2184 }
0d673e36
AK
2185
2186 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2187 listener_add_address_space(listener, as);
2188 }
7664e80c
AK
2189}
2190
2191void memory_listener_unregister(MemoryListener *listener)
2192{
72e22d2f 2193 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 2194}
e2177955 2195
7dca8043 2196void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2197{
ac95190e 2198 memory_region_ref(root);
59023ef4 2199 memory_region_transaction_begin();
f0c02d15 2200 as->ref_count = 1;
8786db7c 2201 as->root = root;
f0c02d15 2202 as->malloced = false;
8786db7c
AK
2203 as->current_map = g_new(FlatView, 1);
2204 flatview_init(as->current_map);
4c19eb72
AK
2205 as->ioeventfd_nb = 0;
2206 as->ioeventfds = NULL;
0d673e36 2207 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2208 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2209 address_space_init_dispatch(as);
f43793c7
PB
2210 memory_region_update_pending |= root->enabled;
2211 memory_region_transaction_commit();
1c0ffa58 2212}
658b2224 2213
374f2981 2214static void do_address_space_destroy(AddressSpace *as)
83f3c251 2215{
078c44f4 2216 MemoryListener *listener;
f0c02d15 2217 bool do_free = as->malloced;
078c44f4 2218
83f3c251 2219 address_space_destroy_dispatch(as);
078c44f4
DG
2220
2221 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2222 assert(listener->address_space_filter != as);
2223 }
2224
856d7245 2225 flatview_unref(as->current_map);
7dca8043 2226 g_free(as->name);
4c19eb72 2227 g_free(as->ioeventfds);
ac95190e 2228 memory_region_unref(as->root);
f0c02d15
PC
2229 if (do_free) {
2230 g_free(as);
2231 }
2232}
2233
2234AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2235{
2236 AddressSpace *as;
2237
2238 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2239 if (root == as->root && as->malloced) {
2240 as->ref_count++;
2241 return as;
2242 }
2243 }
2244
2245 as = g_malloc0(sizeof *as);
2246 address_space_init(as, root, name);
2247 as->malloced = true;
2248 return as;
83f3c251
AK
2249}
2250
374f2981
PB
2251void address_space_destroy(AddressSpace *as)
2252{
ac95190e
PB
2253 MemoryRegion *root = as->root;
2254
f0c02d15
PC
2255 as->ref_count--;
2256 if (as->ref_count) {
2257 return;
2258 }
374f2981
PB
2259 /* Flush out anything from MemoryListeners listening in on this */
2260 memory_region_transaction_begin();
2261 as->root = NULL;
2262 memory_region_transaction_commit();
2263 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2264 address_space_unregister(as);
374f2981
PB
2265
2266 /* At this point, as->dispatch and as->current_map are dummy
2267 * entries that the guest should never use. Wait for the old
2268 * values to expire before freeing the data.
2269 */
ac95190e 2270 as->root = root;
374f2981
PB
2271 call_rcu(as, do_address_space_destroy, rcu);
2272}
2273
314e2987
BS
2274typedef struct MemoryRegionList MemoryRegionList;
2275
2276struct MemoryRegionList {
2277 const MemoryRegion *mr;
314e2987
BS
2278 QTAILQ_ENTRY(MemoryRegionList) queue;
2279};
2280
2281typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2282
2283static void mtree_print_mr(fprintf_function mon_printf, void *f,
2284 const MemoryRegion *mr, unsigned int level,
a8170e5e 2285 hwaddr base,
9479c57a 2286 MemoryRegionListHead *alias_print_queue)
314e2987 2287{
9479c57a
JK
2288 MemoryRegionList *new_ml, *ml, *next_ml;
2289 MemoryRegionListHead submr_print_queue;
314e2987
BS
2290 const MemoryRegion *submr;
2291 unsigned int i;
2292
f8a9f720 2293 if (!mr) {
314e2987
BS
2294 return;
2295 }
2296
2297 for (i = 0; i < level; i++) {
2298 mon_printf(f, " ");
2299 }
2300
2301 if (mr->alias) {
2302 MemoryRegionList *ml;
2303 bool found = false;
2304
2305 /* check if the alias is already in the queue */
9479c57a 2306 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2307 if (ml->mr == mr->alias) {
314e2987
BS
2308 found = true;
2309 }
2310 }
2311
2312 if (!found) {
2313 ml = g_new(MemoryRegionList, 1);
2314 ml->mr = mr->alias;
9479c57a 2315 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2316 }
4896d74b
JK
2317 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2318 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
f8a9f720 2319 "-" TARGET_FMT_plx "%s\n",
314e2987 2320 base + mr->addr,
08dafab4 2321 base + mr->addr
fd1d9926
AW
2322 + (int128_nz(mr->size) ?
2323 (hwaddr)int128_get64(int128_sub(mr->size,
2324 int128_one())) : 0),
4b474ba7 2325 mr->priority,
5f9a5ea1
JK
2326 mr->romd_mode ? 'R' : '-',
2327 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2328 : '-',
3fb18b4d
PC
2329 memory_region_name(mr),
2330 memory_region_name(mr->alias),
314e2987 2331 mr->alias_offset,
08dafab4 2332 mr->alias_offset
a66670c7
AK
2333 + (int128_nz(mr->size) ?
2334 (hwaddr)int128_get64(int128_sub(mr->size,
f8a9f720
GH
2335 int128_one())) : 0),
2336 mr->enabled ? "" : " [disabled]");
314e2987 2337 } else {
4896d74b 2338 mon_printf(f,
f8a9f720 2339 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
314e2987 2340 base + mr->addr,
08dafab4 2341 base + mr->addr
fd1d9926
AW
2342 + (int128_nz(mr->size) ?
2343 (hwaddr)int128_get64(int128_sub(mr->size,
2344 int128_one())) : 0),
4b474ba7 2345 mr->priority,
5f9a5ea1
JK
2346 mr->romd_mode ? 'R' : '-',
2347 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2348 : '-',
f8a9f720
GH
2349 memory_region_name(mr),
2350 mr->enabled ? "" : " [disabled]");
314e2987 2351 }
9479c57a
JK
2352
2353 QTAILQ_INIT(&submr_print_queue);
2354
314e2987 2355 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2356 new_ml = g_new(MemoryRegionList, 1);
2357 new_ml->mr = submr;
2358 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2359 if (new_ml->mr->addr < ml->mr->addr ||
2360 (new_ml->mr->addr == ml->mr->addr &&
2361 new_ml->mr->priority > ml->mr->priority)) {
2362 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2363 new_ml = NULL;
2364 break;
2365 }
2366 }
2367 if (new_ml) {
2368 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2369 }
2370 }
2371
2372 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2373 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2374 alias_print_queue);
2375 }
2376
88365e47 2377 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2378 g_free(ml);
314e2987
BS
2379 }
2380}
2381
2382void mtree_info(fprintf_function mon_printf, void *f)
2383{
2384 MemoryRegionListHead ml_head;
2385 MemoryRegionList *ml, *ml2;
0d673e36 2386 AddressSpace *as;
314e2987
BS
2387
2388 QTAILQ_INIT(&ml_head);
2389
0d673e36 2390 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH
2391 mon_printf(f, "address-space: %s\n", as->name);
2392 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2393 mon_printf(f, "\n");
b9f9be88
BS
2394 }
2395
314e2987
BS
2396 /* print aliased regions */
2397 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH
2398 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2399 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2400 mon_printf(f, "\n");
314e2987
BS
2401 }
2402
2403 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2404 g_free(ml);
314e2987 2405 }
314e2987 2406}
b4fefef9
PC
2407
2408static const TypeInfo memory_region_info = {
2409 .parent = TYPE_OBJECT,
2410 .name = TYPE_MEMORY_REGION,
2411 .instance_size = sizeof(MemoryRegion),
2412 .instance_init = memory_region_initfn,
2413 .instance_finalize = memory_region_finalize,
2414};
2415
2416static void memory_register_types(void)
2417{
2418 type_register_static(&memory_region_info);
2419}
2420
2421type_init(memory_register_types)