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1/** @file\r
2Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r
3\r
4Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>\r
5Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
6\r
7SPDX-License-Identifier: BSD-2-Clause-Patent\r
8\r
9**/\r
10\r
11#ifndef _CPU_PISMMCPUDXESMM_H_\r
12#define _CPU_PISMMCPUDXESMM_H_\r
13\r
14#include <PiSmm.h>\r
15\r
16#include <Protocol/MpService.h>\r
17#include <Protocol/SmmConfiguration.h>\r
18#include <Protocol/SmmCpu.h>\r
19#include <Protocol/SmmAccess2.h>\r
20#include <Protocol/SmmReadyToLock.h>\r
21#include <Protocol/SmmCpuService.h>\r
22#include <Protocol/SmmMemoryAttribute.h>\r
23#include <Protocol/MmMp.h>\r
24\r
25#include <Guid/AcpiS3Context.h>\r
26#include <Guid/MemoryAttributesTable.h>\r
27#include <Guid/PiSmmMemoryAttributesTable.h>\r
28\r
29#include <Library/BaseLib.h>\r
30#include <Library/IoLib.h>\r
31#include <Library/TimerLib.h>\r
32#include <Library/SynchronizationLib.h>\r
33#include <Library/DebugLib.h>\r
34#include <Library/BaseMemoryLib.h>\r
35#include <Library/PcdLib.h>\r
36#include <Library/MtrrLib.h>\r
37#include <Library/SmmCpuPlatformHookLib.h>\r
38#include <Library/SmmServicesTableLib.h>\r
39#include <Library/MemoryAllocationLib.h>\r
40#include <Library/UefiBootServicesTableLib.h>\r
41#include <Library/UefiRuntimeServicesTableLib.h>\r
42#include <Library/DebugAgentLib.h>\r
43#include <Library/UefiLib.h>\r
44#include <Library/HobLib.h>\r
45#include <Library/LocalApicLib.h>\r
46#include <Library/UefiCpuLib.h>\r
47#include <Library/CpuExceptionHandlerLib.h>\r
48#include <Library/ReportStatusCodeLib.h>\r
49#include <Library/SmmCpuFeaturesLib.h>\r
50#include <Library/PeCoffGetEntryPointLib.h>\r
51#include <Library/RegisterCpuFeaturesLib.h>\r
52\r
53#include <AcpiCpuData.h>\r
54#include <CpuHotPlugData.h>\r
55\r
56#include <Register/Intel/Cpuid.h>\r
57#include <Register/Intel/Msr.h>\r
58\r
59#include "CpuService.h"\r
60#include "SmmProfile.h"\r
61\r
62//\r
63// CET definition\r
64//\r
65#define CPUID_CET_SS BIT7\r
66#define CPUID_CET_IBT BIT20\r
67\r
68#define CR4_CET_ENABLE BIT23\r
69\r
70#define MSR_IA32_S_CET 0x6A2\r
71#define MSR_IA32_PL0_SSP 0x6A4\r
72#define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8\r
73\r
74typedef union {\r
75 struct {\r
76 // enable shadow stacks\r
77 UINT32 SH_STK_ENP : 1;\r
78 // enable the WRSS{D,Q}W instructions.\r
79 UINT32 WR_SHSTK_EN : 1;\r
80 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.\r
81 UINT32 ENDBR_EN : 1;\r
82 // enable legacy compatibility treatment for indirect call/jmp tracking.\r
83 UINT32 LEG_IW_EN : 1;\r
84 // enable use of no-track prefix on indirect call/jmp.\r
85 UINT32 NO_TRACK_EN : 1;\r
86 // disable suppression of CET indirect branch tracking on legacy compatibility.\r
87 UINT32 SUPPRESS_DIS : 1;\r
88 UINT32 RSVD : 4;\r
89 // indirect branch tracking is suppressed.\r
90 // This bit can be written to 1 only if TRACKER is written as IDLE.\r
91 UINT32 SUPPRESS : 1;\r
92 // Value of the endbranch state machine\r
93 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).\r
94 UINT32 TRACKER : 1;\r
95 // linear address of a bitmap in memory indicating valid\r
96 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled\r
97 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on\r
98 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are\r
99 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address\r
100 // (this automatically aligns the address on a 4-Kbyte boundary).\r
101 UINT32 EB_LEG_BITMAP_BASE_low : 12;\r
102 UINT32 EB_LEG_BITMAP_BASE_high : 32;\r
103 } Bits;\r
104 UINT64 Uint64;\r
105} MSR_IA32_CET;\r
106\r
107//\r
108// MSRs required for configuration of SMM Code Access Check\r
109//\r
110#define EFI_MSR_SMM_MCA_CAP 0x17D\r
111#define SMM_CODE_ACCESS_CHK_BIT BIT58\r
112\r
113#define SMM_FEATURE_CONTROL_LOCK_BIT BIT0\r
114#define SMM_CODE_CHK_EN_BIT BIT2\r
115\r
116///\r
117/// Page Table Entry\r
118///\r
119#define IA32_PG_P BIT0\r
120#define IA32_PG_RW BIT1\r
121#define IA32_PG_U BIT2\r
122#define IA32_PG_WT BIT3\r
123#define IA32_PG_CD BIT4\r
124#define IA32_PG_A BIT5\r
125#define IA32_PG_D BIT6\r
126#define IA32_PG_PS BIT7\r
127#define IA32_PG_PAT_2M BIT12\r
128#define IA32_PG_PAT_4K IA32_PG_PS\r
129#define IA32_PG_PMNT BIT62\r
130#define IA32_PG_NX BIT63\r
131\r
132#define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)\r
133//\r
134// Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE\r
135// X64 PAE PDPTE does not have such restriction\r
136//\r
137#define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)\r
138\r
139#define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)\r
140\r
141#define PAGING_4K_MASK 0xFFF\r
142#define PAGING_2M_MASK 0x1FFFFF\r
143#define PAGING_1G_MASK 0x3FFFFFFF\r
144\r
145#define PAGING_PAE_INDEX_MASK 0x1FF\r
146\r
147#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r
148#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r
149#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r
150\r
151#define SMRR_MAX_ADDRESS BASE_4GB\r
152\r
153typedef enum {\r
154 PageNone,\r
155 Page4K,\r
156 Page2M,\r
157 Page1G,\r
158} PAGE_ATTRIBUTE;\r
159\r
160typedef struct {\r
161 PAGE_ATTRIBUTE Attribute;\r
162 UINT64 Length;\r
163 UINT64 AddressMask;\r
164} PAGE_ATTRIBUTE_TABLE;\r
165\r
166//\r
167// Size of Task-State Segment defined in IA32 Manual\r
168//\r
169#define TSS_SIZE 104\r
170#define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP\r
171#define TSS_X64_IST1_OFFSET 36\r
172#define TSS_IA32_CR3_OFFSET 28\r
173#define TSS_IA32_ESP_OFFSET 56\r
174#define TSS_IA32_SSP_OFFSET 104\r
175\r
176#define CR0_WP BIT16\r
177\r
178//\r
179// Code select value\r
180//\r
181#define PROTECT_MODE_CODE_SEGMENT 0x08\r
182#define LONG_MODE_CODE_SEGMENT 0x38\r
183\r
184//\r
185// The size 0x20 must be bigger than\r
186// the size of template code of SmmInit. Currently,\r
187// the size of SmmInit requires the 0x16 Bytes buffer\r
188// at least.\r
189//\r
190#define BACK_BUF_SIZE 0x20\r
191\r
192#define EXCEPTION_VECTOR_NUMBER 0x20\r
193\r
194#define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL\r
195\r
196typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;\r
197#define ARRIVAL_EXCEPTION_BLOCKED 0x1\r
198#define ARRIVAL_EXCEPTION_DELAYED 0x2\r
199#define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4\r
200\r
201//\r
202// Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.\r
203//\r
204typedef struct {\r
205 EFI_AP_PROCEDURE Procedure;\r
206 VOID *ProcedureArgument;\r
207} PROCEDURE_WRAPPER;\r
208\r
209#define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')\r
210\r
211typedef struct {\r
212 UINTN Signature;\r
213 LIST_ENTRY Link;\r
214\r
215 SPIN_LOCK *SpinLock;\r
216 volatile UINT32 RunningApCount;\r
217} PROCEDURE_TOKEN;\r
218\r
219#define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)\r
220\r
221#define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')\r
222\r
223typedef struct {\r
224 UINTN Signature;\r
225 LIST_ENTRY Link;\r
226\r
227 UINT8 *Buffer;\r
228} TOKEN_BUFFER;\r
229\r
230#define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)\r
231\r
232//\r
233// Private structure for the SMM CPU module that is stored in DXE Runtime memory\r
234// Contains the SMM Configuration Protocols that is produced.\r
235// Contains a mix of DXE and SMM contents. All the fields must be used properly.\r
236//\r
237#define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')\r
238\r
239typedef struct {\r
240 UINTN Signature;\r
241\r
242 EFI_HANDLE SmmCpuHandle;\r
243\r
244 EFI_PROCESSOR_INFORMATION *ProcessorInfo;\r
245 SMM_CPU_OPERATION *Operation;\r
246 UINTN *CpuSaveStateSize;\r
247 VOID **CpuSaveState;\r
248\r
249 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];\r
250 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;\r
251 EFI_SMM_ENTRY_POINT SmmCoreEntry;\r
252\r
253 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;\r
254\r
255 PROCEDURE_WRAPPER *ApWrapperFunc;\r
256 LIST_ENTRY TokenList;\r
257 LIST_ENTRY *FirstFreeToken;\r
258} SMM_CPU_PRIVATE_DATA;\r
259\r
260extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;\r
261extern CPU_HOT_PLUG_DATA mCpuHotPlugData;\r
262extern UINTN mMaxNumberOfCpus;\r
263extern UINTN mNumberOfCpus;\r
264extern EFI_SMM_CPU_PROTOCOL mSmmCpu;\r
265extern EFI_MM_MP_PROTOCOL mSmmMp;\r
266extern UINTN mInternalCr3;\r
267\r
268///\r
269/// The mode of the CPU at the time an SMI occurs\r
270///\r
271extern UINT8 mSmmSaveStateRegisterLma;\r
272\r
273//\r
274// SMM CPU Protocol function prototypes.\r
275//\r
276\r
277/**\r
278 Read information from the CPU save state.\r
279\r
280 @param This EFI_SMM_CPU_PROTOCOL instance\r
281 @param Width The number of bytes to read from the CPU save state.\r
282 @param Register Specifies the CPU register to read form the save state.\r
283 @param CpuIndex Specifies the zero-based index of the CPU save state\r
284 @param Buffer Upon return, this holds the CPU register value read from the save state.\r
285\r
286 @retval EFI_SUCCESS The register was read from Save State\r
287 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r
288 @retval EFI_INVALID_PARAMETER This or Buffer is NULL.\r
289\r
290**/\r
291EFI_STATUS\r
292EFIAPI\r
293SmmReadSaveState (\r
294 IN CONST EFI_SMM_CPU_PROTOCOL *This,\r
295 IN UINTN Width,\r
296 IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
297 IN UINTN CpuIndex,\r
298 OUT VOID *Buffer\r
299 );\r
300\r
301/**\r
302 Write data to the CPU save state.\r
303\r
304 @param This EFI_SMM_CPU_PROTOCOL instance\r
305 @param Width The number of bytes to read from the CPU save state.\r
306 @param Register Specifies the CPU register to write to the save state.\r
307 @param CpuIndex Specifies the zero-based index of the CPU save state\r
308 @param Buffer Upon entry, this holds the new CPU register value.\r
309\r
310 @retval EFI_SUCCESS The register was written from Save State\r
311 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r
312 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct\r
313\r
314**/\r
315EFI_STATUS\r
316EFIAPI\r
317SmmWriteSaveState (\r
318 IN CONST EFI_SMM_CPU_PROTOCOL *This,\r
319 IN UINTN Width,\r
320 IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
321 IN UINTN CpuIndex,\r
322 IN CONST VOID *Buffer\r
323 );\r
324\r
325/**\r
326Read a CPU Save State register on the target processor.\r
327\r
328This function abstracts the differences that whether the CPU Save State register is in the\r
329IA32 CPU Save State Map or X64 CPU Save State Map.\r
330\r
331This function supports reading a CPU Save State register in SMBase relocation handler.\r
332\r
333@param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r
334@param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r
335@param[in] Width The number of bytes to read from the CPU save state.\r
336@param[out] Buffer Upon return, this holds the CPU register value read from the save state.\r
337\r
338@retval EFI_SUCCESS The register was read from Save State.\r
339@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r
340@retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.\r
341\r
342**/\r
343EFI_STATUS\r
344EFIAPI\r
345ReadSaveStateRegister (\r
346 IN UINTN CpuIndex,\r
347 IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
348 IN UINTN Width,\r
349 OUT VOID *Buffer\r
350 );\r
351\r
352/**\r
353Write value to a CPU Save State register on the target processor.\r
354\r
355This function abstracts the differences that whether the CPU Save State register is in the\r
356IA32 CPU Save State Map or X64 CPU Save State Map.\r
357\r
358This function supports writing a CPU Save State register in SMBase relocation handler.\r
359\r
360@param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r
361@param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r
362@param[in] Width The number of bytes to read from the CPU save state.\r
363@param[in] Buffer Upon entry, this holds the new CPU register value.\r
364\r
365@retval EFI_SUCCESS The register was written to Save State.\r
366@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r
367@retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.\r
368\r
369**/\r
370EFI_STATUS\r
371EFIAPI\r
372WriteSaveStateRegister (\r
373 IN UINTN CpuIndex,\r
374 IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
375 IN UINTN Width,\r
376 IN CONST VOID *Buffer\r
377 );\r
378\r
379extern CONST UINT8 gcSmmInitTemplate[];\r
380extern CONST UINT16 gcSmmInitSize;\r
381X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;\r
382extern UINT32 mSmmCr0;\r
383X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;\r
384extern UINT32 mSmmCr4;\r
385X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;\r
386X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;\r
387X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;\r
388extern BOOLEAN mCetSupported;\r
389\r
390/**\r
391 Semaphore operation for all processor relocate SMMBase.\r
392**/\r
393VOID\r
394EFIAPI\r
395SmmRelocationSemaphoreComplete (\r
396 VOID\r
397 );\r
398\r
399///\r
400/// The type of SMM CPU Information\r
401///\r
402typedef struct {\r
403 SPIN_LOCK *Busy;\r
404 volatile EFI_AP_PROCEDURE2 Procedure;\r
405 volatile VOID *Parameter;\r
406 volatile UINT32 *Run;\r
407 volatile BOOLEAN *Present;\r
408 PROCEDURE_TOKEN *Token;\r
409 EFI_STATUS *Status;\r
410} SMM_CPU_DATA_BLOCK;\r
411\r
412typedef enum {\r
413 SmmCpuSyncModeTradition,\r
414 SmmCpuSyncModeRelaxedAp,\r
415 SmmCpuSyncModeMax\r
416} SMM_CPU_SYNC_MODE;\r
417\r
418typedef struct {\r
419 //\r
420 // Pointer to an array. The array should be located immediately after this structure\r
421 // so that UC cache-ability can be set together.\r
422 //\r
423 SMM_CPU_DATA_BLOCK *CpuData;\r
424 volatile UINT32 *Counter;\r
425 volatile UINT32 BspIndex;\r
426 volatile BOOLEAN *InsideSmm;\r
427 volatile BOOLEAN *AllCpusInSync;\r
428 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;\r
429 volatile BOOLEAN SwitchBsp;\r
430 volatile BOOLEAN *CandidateBsp;\r
431 EFI_AP_PROCEDURE StartupProcedure;\r
432 VOID *StartupProcArgs;\r
433} SMM_DISPATCHER_MP_SYNC_DATA;\r
434\r
435#define SMM_PSD_OFFSET 0xfb00\r
436\r
437///\r
438/// All global semaphores' pointer\r
439///\r
440typedef struct {\r
441 volatile UINT32 *Counter;\r
442 volatile BOOLEAN *InsideSmm;\r
443 volatile BOOLEAN *AllCpusInSync;\r
444 SPIN_LOCK *PFLock;\r
445 SPIN_LOCK *CodeAccessCheckLock;\r
446} SMM_CPU_SEMAPHORE_GLOBAL;\r
447\r
448///\r
449/// All semaphores for each processor\r
450///\r
451typedef struct {\r
452 SPIN_LOCK *Busy;\r
453 volatile UINT32 *Run;\r
454 volatile BOOLEAN *Present;\r
455 SPIN_LOCK *Token;\r
456} SMM_CPU_SEMAPHORE_CPU;\r
457\r
458///\r
459/// All semaphores' information\r
460///\r
461typedef struct {\r
462 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;\r
463 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;\r
464} SMM_CPU_SEMAPHORES;\r
465\r
466extern IA32_DESCRIPTOR gcSmiGdtr;\r
467extern EFI_PHYSICAL_ADDRESS mGdtBuffer;\r
468extern UINTN mGdtBufferSize;\r
469extern IA32_DESCRIPTOR gcSmiIdtr;\r
470extern VOID *gcSmiIdtrPtr;\r
471extern UINT64 gPhyMask;\r
472extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;\r
473extern UINTN mSmmStackArrayBase;\r
474extern UINTN mSmmStackArrayEnd;\r
475extern UINTN mSmmStackSize;\r
476extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;\r
477extern IA32_DESCRIPTOR gcSmiInitGdtr;\r
478extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r
479extern UINTN mSemaphoreSize;\r
480extern SPIN_LOCK *mPFLock;\r
481extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;\r
482extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;\r
483extern UINTN mSmmCpuSmramRangeCount;\r
484extern UINT8 mPhysicalAddressBits;\r
485\r
486//\r
487// Copy of the PcdPteMemoryEncryptionAddressOrMask\r
488//\r
489extern UINT64 mAddressEncMask;\r
490\r
491/**\r
492 Create 4G PageTable in SMRAM.\r
493\r
494 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE\r
495 @return PageTable Address\r
496\r
497**/\r
498UINT32\r
499Gen4GPageTable (\r
500 IN BOOLEAN Is32BitPageTable\r
501 );\r
502\r
503/**\r
504 Initialize global data for MP synchronization.\r
505\r
506 @param Stacks Base address of SMI stack buffer for all processors.\r
507 @param StackSize Stack size for each processor in SMM.\r
508 @param ShadowStackSize Shadow Stack size for each processor in SMM.\r
509\r
510**/\r
511UINT32\r
512InitializeMpServiceData (\r
513 IN VOID *Stacks,\r
514 IN UINTN StackSize,\r
515 IN UINTN ShadowStackSize\r
516 );\r
517\r
518/**\r
519 Initialize Timer for SMM AP Sync.\r
520\r
521**/\r
522VOID\r
523InitializeSmmTimer (\r
524 VOID\r
525 );\r
526\r
527/**\r
528 Start Timer for SMM AP Sync.\r
529\r
530**/\r
531UINT64\r
532EFIAPI\r
533StartSyncTimer (\r
534 VOID\r
535 );\r
536\r
537/**\r
538 Check if the SMM AP Sync timer is timeout.\r
539\r
540 @param Timer The start timer from the begin.\r
541\r
542**/\r
543BOOLEAN\r
544EFIAPI\r
545IsSyncTimerTimeout (\r
546 IN UINT64 Timer\r
547 );\r
548\r
549/**\r
550 Initialize IDT for SMM Stack Guard.\r
551\r
552**/\r
553VOID\r
554EFIAPI\r
555InitializeIDTSmmStackGuard (\r
556 VOID\r
557 );\r
558\r
559/**\r
560 Initialize IDT IST Field.\r
561\r
562 @param[in] ExceptionType Exception type.\r
563 @param[in] Ist IST value.\r
564\r
565**/\r
566VOID\r
567EFIAPI\r
568InitializeIdtIst (\r
569 IN EFI_EXCEPTION_TYPE ExceptionType,\r
570 IN UINT8 Ist\r
571 );\r
572\r
573/**\r
574 Initialize Gdt for all processors.\r
575\r
576 @param[in] Cr3 CR3 value.\r
577 @param[out] GdtStepSize The step size for GDT table.\r
578\r
579 @return GdtBase for processor 0.\r
580 GdtBase for processor X is: GdtBase + (GdtStepSize * X)\r
581**/\r
582VOID *\r
583InitGdt (\r
584 IN UINTN Cr3,\r
585 OUT UINTN *GdtStepSize\r
586 );\r
587\r
588/**\r
589\r
590 Register the SMM Foundation entry point.\r
591\r
592 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance\r
593 @param SmmEntryPoint SMM Foundation EntryPoint\r
594\r
595 @retval EFI_SUCCESS Successfully to register SMM foundation entry point\r
596\r
597**/\r
598EFI_STATUS\r
599EFIAPI\r
600RegisterSmmEntry (\r
601 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,\r
602 IN EFI_SMM_ENTRY_POINT SmmEntryPoint\r
603 );\r
604\r
605/**\r
606 Create PageTable for SMM use.\r
607\r
608 @return PageTable Address\r
609\r
610**/\r
611UINT32\r
612SmmInitPageTable (\r
613 VOID\r
614 );\r
615\r
616/**\r
617 Schedule a procedure to run on the specified CPU.\r
618\r
619 @param Procedure The address of the procedure to run\r
620 @param CpuIndex Target CPU number\r
621 @param ProcArguments The parameter to pass to the procedure\r
622\r
623 @retval EFI_INVALID_PARAMETER CpuNumber not valid\r
624 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r
625 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r
626 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r
627 @retval EFI_SUCCESS - The procedure has been successfully scheduled\r
628\r
629**/\r
630EFI_STATUS\r
631EFIAPI\r
632SmmStartupThisAp (\r
633 IN EFI_AP_PROCEDURE Procedure,\r
634 IN UINTN CpuIndex,\r
635 IN OUT VOID *ProcArguments OPTIONAL\r
636 );\r
637\r
638/**\r
639 Schedule a procedure to run on the specified CPU in a blocking fashion.\r
640\r
641 @param Procedure The address of the procedure to run\r
642 @param CpuIndex Target CPU Index\r
643 @param ProcArguments The parameter to pass to the procedure\r
644\r
645 @retval EFI_INVALID_PARAMETER CpuNumber not valid\r
646 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r
647 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r
648 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r
649 @retval EFI_SUCCESS The procedure has been successfully scheduled\r
650\r
651**/\r
652EFI_STATUS\r
653EFIAPI\r
654SmmBlockingStartupThisAp (\r
655 IN EFI_AP_PROCEDURE Procedure,\r
656 IN UINTN CpuIndex,\r
657 IN OUT VOID *ProcArguments OPTIONAL\r
658 );\r
659\r
660/**\r
661 This function sets the attributes for the memory region specified by BaseAddress and\r
662 Length from their current attributes to the attributes specified by Attributes.\r
663\r
664 @param[in] BaseAddress The physical address that is the start address of a memory region.\r
665 @param[in] Length The size in bytes of the memory region.\r
666 @param[in] Attributes The bit mask of attributes to set for the memory region.\r
667\r
668 @retval EFI_SUCCESS The attributes were set for the memory region.\r
669 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r
670 BaseAddress and Length cannot be modified.\r
671 @retval EFI_INVALID_PARAMETER Length is zero.\r
672 Attributes specified an illegal combination of attributes that\r
673 cannot be set together.\r
674 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r
675 the memory resource range.\r
676 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r
677 resource range specified by BaseAddress and Length.\r
678 The bit mask of attributes is not support for the memory resource\r
679 range specified by BaseAddress and Length.\r
680\r
681**/\r
682EFI_STATUS\r
683EFIAPI\r
684SmmSetMemoryAttributes (\r
685 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
686 IN UINT64 Length,\r
687 IN UINT64 Attributes\r
688 );\r
689\r
690/**\r
691 This function clears the attributes for the memory region specified by BaseAddress and\r
692 Length from their current attributes to the attributes specified by Attributes.\r
693\r
694 @param[in] BaseAddress The physical address that is the start address of a memory region.\r
695 @param[in] Length The size in bytes of the memory region.\r
696 @param[in] Attributes The bit mask of attributes to clear for the memory region.\r
697\r
698 @retval EFI_SUCCESS The attributes were cleared for the memory region.\r
699 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r
700 BaseAddress and Length cannot be modified.\r
701 @retval EFI_INVALID_PARAMETER Length is zero.\r
702 Attributes specified an illegal combination of attributes that\r
703 cannot be set together.\r
704 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r
705 the memory resource range.\r
706 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r
707 resource range specified by BaseAddress and Length.\r
708 The bit mask of attributes is not support for the memory resource\r
709 range specified by BaseAddress and Length.\r
710\r
711**/\r
712EFI_STATUS\r
713EFIAPI\r
714SmmClearMemoryAttributes (\r
715 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
716 IN UINT64 Length,\r
717 IN UINT64 Attributes\r
718 );\r
719\r
720/**\r
721 Initialize MP synchronization data.\r
722\r
723**/\r
724VOID\r
725EFIAPI\r
726InitializeMpSyncData (\r
727 VOID\r
728 );\r
729\r
730/**\r
731\r
732 Find out SMRAM information including SMRR base and SMRR size.\r
733\r
734 @param SmrrBase SMRR base\r
735 @param SmrrSize SMRR size\r
736\r
737**/\r
738VOID\r
739FindSmramInfo (\r
740 OUT UINT32 *SmrrBase,\r
741 OUT UINT32 *SmrrSize\r
742 );\r
743\r
744/**\r
745 Relocate SmmBases for each processor.\r
746\r
747 Execute on first boot and all S3 resumes\r
748\r
749**/\r
750VOID\r
751EFIAPI\r
752SmmRelocateBases (\r
753 VOID\r
754 );\r
755\r
756/**\r
757 Page Fault handler for SMM use.\r
758\r
759 @param InterruptType Defines the type of interrupt or exception that\r
760 occurred on the processor.This parameter is processor architecture specific.\r
761 @param SystemContext A pointer to the processor context when\r
762 the interrupt occurred on the processor.\r
763**/\r
764VOID\r
765EFIAPI\r
766SmiPFHandler (\r
767 IN EFI_EXCEPTION_TYPE InterruptType,\r
768 IN EFI_SYSTEM_CONTEXT SystemContext\r
769 );\r
770\r
771/**\r
772 Perform the remaining tasks.\r
773\r
774**/\r
775VOID\r
776PerformRemainingTasks (\r
777 VOID\r
778 );\r
779\r
780/**\r
781 Perform the pre tasks.\r
782\r
783**/\r
784VOID\r
785PerformPreTasks (\r
786 VOID\r
787 );\r
788\r
789/**\r
790 Initialize MSR spin lock by MSR index.\r
791\r
792 @param MsrIndex MSR index value.\r
793\r
794**/\r
795VOID\r
796InitMsrSpinLockByIndex (\r
797 IN UINT32 MsrIndex\r
798 );\r
799\r
800/**\r
801 Hook return address of SMM Save State so that semaphore code\r
802 can be executed immediately after AP exits SMM to indicate to\r
803 the BSP that an AP has exited SMM after SMBASE relocation.\r
804\r
805 @param[in] CpuIndex The processor index.\r
806 @param[in] RebasedFlag A pointer to a flag that is set to TRUE\r
807 immediately after AP exits SMM.\r
808\r
809**/\r
810VOID\r
811SemaphoreHook (\r
812 IN UINTN CpuIndex,\r
813 IN volatile BOOLEAN *RebasedFlag\r
814 );\r
815\r
816/**\r
817Configure SMM Code Access Check feature for all processors.\r
818SMM Feature Control MSR will be locked after configuration.\r
819**/\r
820VOID\r
821ConfigSmmCodeAccessCheck (\r
822 VOID\r
823 );\r
824\r
825/**\r
826 Hook the code executed immediately after an RSM instruction on the currently\r
827 executing CPU. The mode of code executed immediately after RSM must be\r
828 detected, and the appropriate hook must be selected. Always clear the auto\r
829 HALT restart flag if it is set.\r
830\r
831 @param[in] CpuIndex The processor index for the currently\r
832 executing CPU.\r
833 @param[in] CpuState Pointer to SMRAM Save State Map for the\r
834 currently executing CPU.\r
835 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r
836 32-bit mode from 64-bit SMM.\r
837 @param[in] NewInstructionPointer Instruction pointer to use if resuming to\r
838 same mode as SMM.\r
839\r
840 @retval The value of the original instruction pointer before it was hooked.\r
841\r
842**/\r
843UINT64\r
844EFIAPI\r
845HookReturnFromSmm (\r
846 IN UINTN CpuIndex,\r
847 SMRAM_SAVE_STATE_MAP *CpuState,\r
848 UINT64 NewInstructionPointer32,\r
849 UINT64 NewInstructionPointer\r
850 );\r
851\r
852/**\r
853 Get the size of the SMI Handler in bytes.\r
854\r
855 @retval The size, in bytes, of the SMI Handler.\r
856\r
857**/\r
858UINTN\r
859EFIAPI\r
860GetSmiHandlerSize (\r
861 VOID\r
862 );\r
863\r
864/**\r
865 Install the SMI handler for the CPU specified by CpuIndex. This function\r
866 is called by the CPU that was elected as monarch during System Management\r
867 Mode initialization.\r
868\r
869 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.\r
870 The value must be between 0 and the NumberOfCpus field\r
871 in the System Management System Table (SMST).\r
872 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.\r
873 @param[in] SmiStack The stack to use when an SMI is processed by the\r
874 the CPU specified by CpuIndex.\r
875 @param[in] StackSize The size, in bytes, if the stack used when an SMI is\r
876 processed by the CPU specified by CpuIndex.\r
877 @param[in] GdtBase The base address of the GDT to use when an SMI is\r
878 processed by the CPU specified by CpuIndex.\r
879 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is\r
880 processed by the CPU specified by CpuIndex.\r
881 @param[in] IdtBase The base address of the IDT to use when an SMI is\r
882 processed by the CPU specified by CpuIndex.\r
883 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is\r
884 processed by the CPU specified by CpuIndex.\r
885 @param[in] Cr3 The base address of the page tables to use when an SMI\r
886 is processed by the CPU specified by CpuIndex.\r
887**/\r
888VOID\r
889EFIAPI\r
890InstallSmiHandler (\r
891 IN UINTN CpuIndex,\r
892 IN UINT32 SmBase,\r
893 IN VOID *SmiStack,\r
894 IN UINTN StackSize,\r
895 IN UINTN GdtBase,\r
896 IN UINTN GdtSize,\r
897 IN UINTN IdtBase,\r
898 IN UINTN IdtSize,\r
899 IN UINT32 Cr3\r
900 );\r
901\r
902/**\r
903 Search module name by input IP address and output it.\r
904\r
905 @param CallerIpAddress Caller instruction pointer.\r
906\r
907**/\r
908VOID\r
909DumpModuleInfoByIp (\r
910 IN UINTN CallerIpAddress\r
911 );\r
912\r
913/**\r
914 This function sets memory attribute according to MemoryAttributesTable.\r
915**/\r
916VOID\r
917SetMemMapAttributes (\r
918 VOID\r
919 );\r
920\r
921/**\r
922 This function sets UEFI memory attribute according to UEFI memory map.\r
923**/\r
924VOID\r
925SetUefiMemMapAttributes (\r
926 VOID\r
927 );\r
928\r
929/**\r
930 Return if the Address is forbidden as SMM communication buffer.\r
931\r
932 @param[in] Address the address to be checked\r
933\r
934 @return TRUE The address is forbidden as SMM communication buffer.\r
935 @return FALSE The address is allowed as SMM communication buffer.\r
936**/\r
937BOOLEAN\r
938IsSmmCommBufferForbiddenAddress (\r
939 IN UINT64 Address\r
940 );\r
941\r
942/**\r
943 This function caches the UEFI memory map information.\r
944**/\r
945VOID\r
946GetUefiMemoryMap (\r
947 VOID\r
948 );\r
949\r
950/**\r
951 This function sets memory attribute for page table.\r
952**/\r
953VOID\r
954SetPageTableAttributes (\r
955 VOID\r
956 );\r
957\r
958/**\r
959 Get page table base address and the depth of the page table.\r
960\r
961 @param[out] Base Page table base address.\r
962 @param[out] FiveLevels TRUE means 5 level paging. FALSE means 4 level paging.\r
963**/\r
964VOID\r
965GetPageTable (\r
966 OUT UINTN *Base,\r
967 OUT BOOLEAN *FiveLevels OPTIONAL\r
968 );\r
969\r
970/**\r
971 This function sets the attributes for the memory region specified by BaseAddress and\r
972 Length from their current attributes to the attributes specified by Attributes.\r
973\r
974 @param[in] BaseAddress The physical address that is the start address of a memory region.\r
975 @param[in] Length The size in bytes of the memory region.\r
976 @param[in] Attributes The bit mask of attributes to set for the memory region.\r
977 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r
978\r
979 @retval EFI_SUCCESS The attributes were set for the memory region.\r
980 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r
981 BaseAddress and Length cannot be modified.\r
982 @retval EFI_INVALID_PARAMETER Length is zero.\r
983 Attributes specified an illegal combination of attributes that\r
984 cannot be set together.\r
985 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r
986 the memory resource range.\r
987 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r
988 resource range specified by BaseAddress and Length.\r
989 The bit mask of attributes is not support for the memory resource\r
990 range specified by BaseAddress and Length.\r
991\r
992**/\r
993EFI_STATUS\r
994EFIAPI\r
995SmmSetMemoryAttributesEx (\r
996 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
997 IN UINT64 Length,\r
998 IN UINT64 Attributes,\r
999 OUT BOOLEAN *IsSplitted OPTIONAL\r
1000 );\r
1001\r
1002/**\r
1003 This function clears the attributes for the memory region specified by BaseAddress and\r
1004 Length from their current attributes to the attributes specified by Attributes.\r
1005\r
1006 @param[in] BaseAddress The physical address that is the start address of a memory region.\r
1007 @param[in] Length The size in bytes of the memory region.\r
1008 @param[in] Attributes The bit mask of attributes to clear for the memory region.\r
1009 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r
1010\r
1011 @retval EFI_SUCCESS The attributes were cleared for the memory region.\r
1012 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r
1013 BaseAddress and Length cannot be modified.\r
1014 @retval EFI_INVALID_PARAMETER Length is zero.\r
1015 Attributes specified an illegal combination of attributes that\r
1016 cannot be set together.\r
1017 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r
1018 the memory resource range.\r
1019 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r
1020 resource range specified by BaseAddress and Length.\r
1021 The bit mask of attributes is not support for the memory resource\r
1022 range specified by BaseAddress and Length.\r
1023\r
1024**/\r
1025EFI_STATUS\r
1026EFIAPI\r
1027SmmClearMemoryAttributesEx (\r
1028 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
1029 IN UINT64 Length,\r
1030 IN UINT64 Attributes,\r
1031 OUT BOOLEAN *IsSplitted OPTIONAL\r
1032 );\r
1033\r
1034/**\r
1035 This API provides a way to allocate memory for page table.\r
1036\r
1037 This API can be called more once to allocate memory for page tables.\r
1038\r
1039 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r
1040 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r
1041 is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r
1042 returned.\r
1043\r
1044 @param Pages The number of 4 KB pages to allocate.\r
1045\r
1046 @return A pointer to the allocated buffer or NULL if allocation fails.\r
1047\r
1048**/\r
1049VOID *\r
1050AllocatePageTableMemory (\r
1051 IN UINTN Pages\r
1052 );\r
1053\r
1054/**\r
1055 Allocate pages for code.\r
1056\r
1057 @param[in] Pages Number of pages to be allocated.\r
1058\r
1059 @return Allocated memory.\r
1060**/\r
1061VOID *\r
1062AllocateCodePages (\r
1063 IN UINTN Pages\r
1064 );\r
1065\r
1066/**\r
1067 Allocate aligned pages for code.\r
1068\r
1069 @param[in] Pages Number of pages to be allocated.\r
1070 @param[in] Alignment The requested alignment of the allocation.\r
1071 Must be a power of two.\r
1072 If Alignment is zero, then byte alignment is used.\r
1073\r
1074 @return Allocated memory.\r
1075**/\r
1076VOID *\r
1077AllocateAlignedCodePages (\r
1078 IN UINTN Pages,\r
1079 IN UINTN Alignment\r
1080 );\r
1081\r
1082//\r
1083// S3 related global variable and function prototype.\r
1084//\r
1085\r
1086extern BOOLEAN mSmmS3Flag;\r
1087\r
1088/**\r
1089 Initialize SMM S3 resume state structure used during S3 Resume.\r
1090\r
1091 @param[in] Cr3 The base address of the page tables to use in SMM.\r
1092\r
1093**/\r
1094VOID\r
1095InitSmmS3ResumeState (\r
1096 IN UINT32 Cr3\r
1097 );\r
1098\r
1099/**\r
1100 Get ACPI CPU data.\r
1101\r
1102**/\r
1103VOID\r
1104GetAcpiCpuData (\r
1105 VOID\r
1106 );\r
1107\r
1108/**\r
1109 Restore SMM Configuration in S3 boot path.\r
1110\r
1111**/\r
1112VOID\r
1113RestoreSmmConfigurationInS3 (\r
1114 VOID\r
1115 );\r
1116\r
1117/**\r
1118 Get ACPI S3 enable flag.\r
1119\r
1120**/\r
1121VOID\r
1122GetAcpiS3EnableFlag (\r
1123 VOID\r
1124 );\r
1125\r
1126/**\r
1127 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.\r
1128\r
1129 @param[in] ApHltLoopCode The address of the safe hlt-loop function.\r
1130 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.\r
1131 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.\r
1132\r
1133**/\r
1134VOID\r
1135TransferApToSafeState (\r
1136 IN UINTN ApHltLoopCode,\r
1137 IN UINTN TopOfStack,\r
1138 IN UINTN NumberToFinishAddress\r
1139 );\r
1140\r
1141/**\r
1142 Set ShadowStack memory.\r
1143\r
1144 @param[in] Cr3 The page table base address.\r
1145 @param[in] BaseAddress The physical address that is the start address of a memory region.\r
1146 @param[in] Length The size in bytes of the memory region.\r
1147\r
1148 @retval EFI_SUCCESS The shadow stack memory is set.\r
1149**/\r
1150EFI_STATUS\r
1151SetShadowStack (\r
1152 IN UINTN Cr3,\r
1153 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
1154 IN UINT64 Length\r
1155 );\r
1156\r
1157/**\r
1158 Set not present memory.\r
1159\r
1160 @param[in] Cr3 The page table base address.\r
1161 @param[in] BaseAddress The physical address that is the start address of a memory region.\r
1162 @param[in] Length The size in bytes of the memory region.\r
1163\r
1164 @retval EFI_SUCCESS The not present memory is set.\r
1165**/\r
1166EFI_STATUS\r
1167SetNotPresentPage (\r
1168 IN UINTN Cr3,\r
1169 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
1170 IN UINT64 Length\r
1171 );\r
1172\r
1173/**\r
1174 Initialize the shadow stack related data structure.\r
1175\r
1176 @param CpuIndex The index of CPU.\r
1177 @param ShadowStack The bottom of the shadow stack for this CPU.\r
1178**/\r
1179VOID\r
1180InitShadowStack (\r
1181 IN UINTN CpuIndex,\r
1182 IN VOID *ShadowStack\r
1183 );\r
1184\r
1185/**\r
1186 This function set given attributes of the memory region specified by\r
1187 BaseAddress and Length.\r
1188\r
1189 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r
1190 @param BaseAddress The physical address that is the start address of\r
1191 a memory region.\r
1192 @param Length The size in bytes of the memory region.\r
1193 @param Attributes The bit mask of attributes to set for the memory\r
1194 region.\r
1195\r
1196 @retval EFI_SUCCESS The attributes were set for the memory region.\r
1197 @retval EFI_INVALID_PARAMETER Length is zero.\r
1198 Attributes specified an illegal combination of\r
1199 attributes that cannot be set together.\r
1200 @retval EFI_UNSUPPORTED The processor does not support one or more\r
1201 bytes of the memory resource range specified\r
1202 by BaseAddress and Length.\r
1203 The bit mask of attributes is not supported for\r
1204 the memory resource range specified by\r
1205 BaseAddress and Length.\r
1206\r
1207**/\r
1208EFI_STATUS\r
1209EFIAPI\r
1210EdkiiSmmSetMemoryAttributes (\r
1211 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r
1212 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
1213 IN UINT64 Length,\r
1214 IN UINT64 Attributes\r
1215 );\r
1216\r
1217/**\r
1218 This function clears given attributes of the memory region specified by\r
1219 BaseAddress and Length.\r
1220\r
1221 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r
1222 @param BaseAddress The physical address that is the start address of\r
1223 a memory region.\r
1224 @param Length The size in bytes of the memory region.\r
1225 @param Attributes The bit mask of attributes to clear for the memory\r
1226 region.\r
1227\r
1228 @retval EFI_SUCCESS The attributes were cleared for the memory region.\r
1229 @retval EFI_INVALID_PARAMETER Length is zero.\r
1230 Attributes specified an illegal combination of\r
1231 attributes that cannot be cleared together.\r
1232 @retval EFI_UNSUPPORTED The processor does not support one or more\r
1233 bytes of the memory resource range specified\r
1234 by BaseAddress and Length.\r
1235 The bit mask of attributes is not supported for\r
1236 the memory resource range specified by\r
1237 BaseAddress and Length.\r
1238\r
1239**/\r
1240EFI_STATUS\r
1241EFIAPI\r
1242EdkiiSmmClearMemoryAttributes (\r
1243 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r
1244 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
1245 IN UINT64 Length,\r
1246 IN UINT64 Attributes\r
1247 );\r
1248\r
1249/**\r
1250 This function retrieves the attributes of the memory region specified by\r
1251 BaseAddress and Length. If different attributes are got from different part\r
1252 of the memory region, EFI_NO_MAPPING will be returned.\r
1253\r
1254 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r
1255 @param BaseAddress The physical address that is the start address of\r
1256 a memory region.\r
1257 @param Length The size in bytes of the memory region.\r
1258 @param Attributes Pointer to attributes returned.\r
1259\r
1260 @retval EFI_SUCCESS The attributes got for the memory region.\r
1261 @retval EFI_INVALID_PARAMETER Length is zero.\r
1262 Attributes is NULL.\r
1263 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory\r
1264 region.\r
1265 @retval EFI_UNSUPPORTED The processor does not support one or more\r
1266 bytes of the memory resource range specified\r
1267 by BaseAddress and Length.\r
1268\r
1269**/\r
1270EFI_STATUS\r
1271EFIAPI\r
1272EdkiiSmmGetMemoryAttributes (\r
1273 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r
1274 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
1275 IN UINT64 Length,\r
1276 IN UINT64 *Attributes\r
1277 );\r
1278\r
1279/**\r
1280 This function fixes up the address of the global variable or function\r
1281 referred in SmmInit assembly files to be the absolute address.\r
1282**/\r
1283VOID\r
1284EFIAPI\r
1285PiSmmCpuSmmInitFixupAddress (\r
1286 );\r
1287\r
1288/**\r
1289 This function fixes up the address of the global variable or function\r
1290 referred in SmiEntry assembly files to be the absolute address.\r
1291**/\r
1292VOID\r
1293EFIAPI\r
1294PiSmmCpuSmiEntryFixupAddress (\r
1295 );\r
1296\r
1297/**\r
1298 This function reads CR2 register when on-demand paging is enabled\r
1299 for 64 bit and no action for 32 bit.\r
1300\r
1301 @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r
1302**/\r
1303VOID\r
1304SaveCr2 (\r
1305 OUT UINTN *Cr2\r
1306 );\r
1307\r
1308/**\r
1309 This function writes into CR2 register when on-demand paging is enabled\r
1310 for 64 bit and no action for 32 bit.\r
1311\r
1312 @param[in] Cr2 Value to write into CR2 register.\r
1313**/\r
1314VOID\r
1315RestoreCr2 (\r
1316 IN UINTN Cr2\r
1317 );\r
1318\r
1319/**\r
1320 Schedule a procedure to run on the specified CPU.\r
1321\r
1322 @param[in] Procedure The address of the procedure to run\r
1323 @param[in] CpuIndex Target CPU Index\r
1324 @param[in,out] ProcArguments The parameter to pass to the procedure\r
1325 @param[in,out] Token This is an optional parameter that allows the caller to execute the\r
1326 procedure in a blocking or non-blocking fashion. If it is NULL the\r
1327 call is blocking, and the call will not return until the AP has\r
1328 completed the procedure. If the token is not NULL, the call will\r
1329 return immediately. The caller can check whether the procedure has\r
1330 completed with CheckOnProcedure or WaitForProcedure.\r
1331 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish\r
1332 execution of Procedure, either for blocking or non-blocking mode.\r
1333 Zero means infinity. If the timeout expires before all APs return\r
1334 from Procedure, then Procedure on the failed APs is terminated. If\r
1335 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.\r
1336 If the timeout expires in non-blocking mode, the timeout determined\r
1337 can be through CheckOnProcedure or WaitForProcedure.\r
1338 Note that timeout support is optional. Whether an implementation\r
1339 supports this feature can be determined via the Attributes data\r
1340 member.\r
1341 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned\r
1342 by Procedure when it completes execution on the target AP, or with\r
1343 EFI_TIMEOUT if the Procedure fails to complete within the optional\r
1344 timeout. The implementation will update this variable with\r
1345 EFI_NOT_READY prior to starting Procedure on the target AP.\r
1346\r
1347 @retval EFI_INVALID_PARAMETER CpuNumber not valid\r
1348 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r
1349 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r
1350 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r
1351 @retval EFI_SUCCESS The procedure has been successfully scheduled\r
1352\r
1353**/\r
1354EFI_STATUS\r
1355InternalSmmStartupThisAp (\r
1356 IN EFI_AP_PROCEDURE2 Procedure,\r
1357 IN UINTN CpuIndex,\r
1358 IN OUT VOID *ProcArguments OPTIONAL,\r
1359 IN OUT MM_COMPLETION *Token,\r
1360 IN UINTN TimeoutInMicroseconds,\r
1361 IN OUT EFI_STATUS *CpuStatus\r
1362 );\r
1363\r
1364/**\r
1365 Checks whether the input token is the current used token.\r
1366\r
1367 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r
1368 BroadcastProcedure.\r
1369\r
1370 @retval TRUE The input token is the current used token.\r
1371 @retval FALSE The input token is not the current used token.\r
1372**/\r
1373BOOLEAN\r
1374IsTokenInUse (\r
1375 IN SPIN_LOCK *Token\r
1376 );\r
1377\r
1378/**\r
1379 Checks status of specified AP.\r
1380\r
1381 This function checks whether the specified AP has finished the task assigned\r
1382 by StartupThisAP(), and whether timeout expires.\r
1383\r
1384 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r
1385 BroadcastProcedure.\r
1386\r
1387 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
1388 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
1389**/\r
1390EFI_STATUS\r
1391IsApReady (\r
1392 IN SPIN_LOCK *Token\r
1393 );\r
1394\r
1395/**\r
1396 Check whether it is an present AP.\r
1397\r
1398 @param CpuIndex The AP index which calls this function.\r
1399\r
1400 @retval TRUE It's a present AP.\r
1401 @retval TRUE This is not an AP or it is not present.\r
1402\r
1403**/\r
1404BOOLEAN\r
1405IsPresentAp (\r
1406 IN UINTN CpuIndex\r
1407 );\r
1408\r
1409/**\r
1410 Worker function to execute a caller provided function on all enabled APs.\r
1411\r
1412 @param[in] Procedure A pointer to the function to be run on\r
1413 enabled APs of the system.\r
1414 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
1415 APs to return from Procedure, either for\r
1416 blocking or non-blocking mode.\r
1417 @param[in,out] ProcedureArguments The parameter passed into Procedure for\r
1418 all APs.\r
1419 @param[in,out] Token This is an optional parameter that allows the caller to execute the\r
1420 procedure in a blocking or non-blocking fashion. If it is NULL the\r
1421 call is blocking, and the call will not return until the AP has\r
1422 completed the procedure. If the token is not NULL, the call will\r
1423 return immediately. The caller can check whether the procedure has\r
1424 completed with CheckOnProcedure or WaitForProcedure.\r
1425 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned\r
1426 by Procedure when it completes execution on the target AP, or with\r
1427 EFI_TIMEOUT if the Procedure fails to complete within the optional\r
1428 timeout. The implementation will update this variable with\r
1429 EFI_NOT_READY prior to starting Procedure on the target AP.\r
1430\r
1431 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
1432 the timeout expired.\r
1433 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
1434 to all enabled APs.\r
1435 @retval others Failed to Startup all APs.\r
1436\r
1437**/\r
1438EFI_STATUS\r
1439InternalSmmStartupAllAPs (\r
1440 IN EFI_AP_PROCEDURE2 Procedure,\r
1441 IN UINTN TimeoutInMicroseconds,\r
1442 IN OUT VOID *ProcedureArguments OPTIONAL,\r
1443 IN OUT MM_COMPLETION *Token,\r
1444 IN OUT EFI_STATUS *CPUStatus\r
1445 );\r
1446\r
1447/**\r
1448\r
1449 Register the SMM Foundation entry point.\r
1450\r
1451 @param[in] Procedure A pointer to the code stream to be run on the designated target AP\r
1452 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2\r
1453 with the related definitions of\r
1454 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.\r
1455 If caller may pass a value of NULL to deregister any existing\r
1456 startup procedure.\r
1457 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is\r
1458 run by the AP. It is an optional common mailbox between APs and\r
1459 the caller to share information\r
1460\r
1461 @retval EFI_SUCCESS The Procedure has been set successfully.\r
1462 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.\r
1463\r
1464**/\r
1465EFI_STATUS\r
1466RegisterStartupProcedure (\r
1467 IN EFI_AP_PROCEDURE Procedure,\r
1468 IN OUT VOID *ProcedureArguments OPTIONAL\r
1469 );\r
1470\r
1471/**\r
1472 Allocate buffer for SpinLock and Wrapper function buffer.\r
1473\r
1474**/\r
1475VOID\r
1476InitializeDataForMmMp (\r
1477 VOID\r
1478 );\r
1479\r
1480/**\r
1481 Return whether access to non-SMRAM is restricted.\r
1482\r
1483 @retval TRUE Access to non-SMRAM is restricted.\r
1484 @retval FALSE Access to non-SMRAM is not restricted.\r
1485**/\r
1486BOOLEAN\r
1487IsRestrictedMemoryAccess (\r
1488 VOID\r
1489 );\r
1490\r
1491#endif\r
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