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1 /** @file
2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4 Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef _CPU_PISMMCPUDXESMM_H_
12 #define _CPU_PISMMCPUDXESMM_H_
13
14 #include <PiSmm.h>
15
16 #include <Protocol/MpService.h>
17 #include <Protocol/SmmConfiguration.h>
18 #include <Protocol/SmmCpu.h>
19 #include <Protocol/SmmAccess2.h>
20 #include <Protocol/SmmReadyToLock.h>
21 #include <Protocol/SmmCpuService.h>
22 #include <Protocol/SmmMemoryAttribute.h>
23 #include <Protocol/MmMp.h>
24
25 #include <Guid/AcpiS3Context.h>
26 #include <Guid/MemoryAttributesTable.h>
27 #include <Guid/PiSmmMemoryAttributesTable.h>
28
29 #include <Library/BaseLib.h>
30 #include <Library/IoLib.h>
31 #include <Library/TimerLib.h>
32 #include <Library/SynchronizationLib.h>
33 #include <Library/DebugLib.h>
34 #include <Library/BaseMemoryLib.h>
35 #include <Library/PcdLib.h>
36 #include <Library/MtrrLib.h>
37 #include <Library/SmmCpuPlatformHookLib.h>
38 #include <Library/SmmServicesTableLib.h>
39 #include <Library/MemoryAllocationLib.h>
40 #include <Library/UefiBootServicesTableLib.h>
41 #include <Library/UefiRuntimeServicesTableLib.h>
42 #include <Library/DebugAgentLib.h>
43 #include <Library/UefiLib.h>
44 #include <Library/HobLib.h>
45 #include <Library/LocalApicLib.h>
46 #include <Library/UefiCpuLib.h>
47 #include <Library/CpuExceptionHandlerLib.h>
48 #include <Library/ReportStatusCodeLib.h>
49 #include <Library/SmmCpuFeaturesLib.h>
50 #include <Library/PeCoffGetEntryPointLib.h>
51 #include <Library/RegisterCpuFeaturesLib.h>
52
53 #include <AcpiCpuData.h>
54 #include <CpuHotPlugData.h>
55
56 #include <Register/Intel/Cpuid.h>
57 #include <Register/Intel/Msr.h>
58
59 #include "CpuService.h"
60 #include "SmmProfile.h"
61
62 //
63 // CET definition
64 //
65 #define CPUID_CET_SS BIT7
66 #define CPUID_CET_IBT BIT20
67
68 #define CR4_CET_ENABLE BIT23
69
70 #define MSR_IA32_S_CET 0x6A2
71 #define MSR_IA32_PL0_SSP 0x6A4
72 #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
73
74 typedef union {
75 struct {
76 // enable shadow stacks
77 UINT32 SH_STK_ENP : 1;
78 // enable the WRSS{D,Q}W instructions.
79 UINT32 WR_SHSTK_EN : 1;
80 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
81 UINT32 ENDBR_EN : 1;
82 // enable legacy compatibility treatment for indirect call/jmp tracking.
83 UINT32 LEG_IW_EN : 1;
84 // enable use of no-track prefix on indirect call/jmp.
85 UINT32 NO_TRACK_EN : 1;
86 // disable suppression of CET indirect branch tracking on legacy compatibility.
87 UINT32 SUPPRESS_DIS : 1;
88 UINT32 RSVD : 4;
89 // indirect branch tracking is suppressed.
90 // This bit can be written to 1 only if TRACKER is written as IDLE.
91 UINT32 SUPPRESS : 1;
92 // Value of the endbranch state machine
93 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
94 UINT32 TRACKER : 1;
95 // linear address of a bitmap in memory indicating valid
96 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
97 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
98 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
99 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
100 // (this automatically aligns the address on a 4-Kbyte boundary).
101 UINT32 EB_LEG_BITMAP_BASE_low : 12;
102 UINT32 EB_LEG_BITMAP_BASE_high : 32;
103 } Bits;
104 UINT64 Uint64;
105 } MSR_IA32_CET;
106
107 //
108 // MSRs required for configuration of SMM Code Access Check
109 //
110 #define EFI_MSR_SMM_MCA_CAP 0x17D
111 #define SMM_CODE_ACCESS_CHK_BIT BIT58
112
113 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
114 #define SMM_CODE_CHK_EN_BIT BIT2
115
116 ///
117 /// Page Table Entry
118 ///
119 #define IA32_PG_P BIT0
120 #define IA32_PG_RW BIT1
121 #define IA32_PG_U BIT2
122 #define IA32_PG_WT BIT3
123 #define IA32_PG_CD BIT4
124 #define IA32_PG_A BIT5
125 #define IA32_PG_D BIT6
126 #define IA32_PG_PS BIT7
127 #define IA32_PG_PAT_2M BIT12
128 #define IA32_PG_PAT_4K IA32_PG_PS
129 #define IA32_PG_PMNT BIT62
130 #define IA32_PG_NX BIT63
131
132 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
133 //
134 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
135 // X64 PAE PDPTE does not have such restriction
136 //
137 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
138
139 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
140
141 #define PAGING_4K_MASK 0xFFF
142 #define PAGING_2M_MASK 0x1FFFFF
143 #define PAGING_1G_MASK 0x3FFFFFFF
144
145 #define PAGING_PAE_INDEX_MASK 0x1FF
146
147 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
148 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
149 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
150
151 #define SMRR_MAX_ADDRESS BASE_4GB
152
153 typedef enum {
154 PageNone,
155 Page4K,
156 Page2M,
157 Page1G,
158 } PAGE_ATTRIBUTE;
159
160 typedef struct {
161 PAGE_ATTRIBUTE Attribute;
162 UINT64 Length;
163 UINT64 AddressMask;
164 } PAGE_ATTRIBUTE_TABLE;
165
166 //
167 // Size of Task-State Segment defined in IA32 Manual
168 //
169 #define TSS_SIZE 104
170 #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP
171 #define TSS_X64_IST1_OFFSET 36
172 #define TSS_IA32_CR3_OFFSET 28
173 #define TSS_IA32_ESP_OFFSET 56
174 #define TSS_IA32_SSP_OFFSET 104
175
176 #define CR0_WP BIT16
177
178 //
179 // Code select value
180 //
181 #define PROTECT_MODE_CODE_SEGMENT 0x08
182 #define LONG_MODE_CODE_SEGMENT 0x38
183
184 //
185 // The size 0x20 must be bigger than
186 // the size of template code of SmmInit. Currently,
187 // the size of SmmInit requires the 0x16 Bytes buffer
188 // at least.
189 //
190 #define BACK_BUF_SIZE 0x20
191
192 #define EXCEPTION_VECTOR_NUMBER 0x20
193
194 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
195
196 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;
197 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
198 #define ARRIVAL_EXCEPTION_DELAYED 0x2
199 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
200
201 //
202 // Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.
203 //
204 typedef struct {
205 EFI_AP_PROCEDURE Procedure;
206 VOID *ProcedureArgument;
207 } PROCEDURE_WRAPPER;
208
209 #define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')
210
211 typedef struct {
212 UINTN Signature;
213 LIST_ENTRY Link;
214
215 SPIN_LOCK *SpinLock;
216 volatile UINT32 RunningApCount;
217 } PROCEDURE_TOKEN;
218
219 #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)
220
221 #define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')
222
223 typedef struct {
224 UINTN Signature;
225 LIST_ENTRY Link;
226
227 UINT8 *Buffer;
228 } TOKEN_BUFFER;
229
230 #define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)
231
232 //
233 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
234 // Contains the SMM Configuration Protocols that is produced.
235 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
236 //
237 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
238
239 typedef struct {
240 UINTN Signature;
241
242 EFI_HANDLE SmmCpuHandle;
243
244 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
245 SMM_CPU_OPERATION *Operation;
246 UINTN *CpuSaveStateSize;
247 VOID **CpuSaveState;
248
249 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
250 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
251 EFI_SMM_ENTRY_POINT SmmCoreEntry;
252
253 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
254
255 PROCEDURE_WRAPPER *ApWrapperFunc;
256 LIST_ENTRY TokenList;
257 LIST_ENTRY *FirstFreeToken;
258 } SMM_CPU_PRIVATE_DATA;
259
260 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
261 extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
262 extern UINTN mMaxNumberOfCpus;
263 extern UINTN mNumberOfCpus;
264 extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
265 extern EFI_MM_MP_PROTOCOL mSmmMp;
266 extern UINTN mInternalCr3;
267
268 ///
269 /// The mode of the CPU at the time an SMI occurs
270 ///
271 extern UINT8 mSmmSaveStateRegisterLma;
272
273 //
274 // SMM CPU Protocol function prototypes.
275 //
276
277 /**
278 Read information from the CPU save state.
279
280 @param This EFI_SMM_CPU_PROTOCOL instance
281 @param Width The number of bytes to read from the CPU save state.
282 @param Register Specifies the CPU register to read form the save state.
283 @param CpuIndex Specifies the zero-based index of the CPU save state
284 @param Buffer Upon return, this holds the CPU register value read from the save state.
285
286 @retval EFI_SUCCESS The register was read from Save State
287 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
288 @retval EFI_INVALID_PARAMETER This or Buffer is NULL.
289
290 **/
291 EFI_STATUS
292 EFIAPI
293 SmmReadSaveState (
294 IN CONST EFI_SMM_CPU_PROTOCOL *This,
295 IN UINTN Width,
296 IN EFI_SMM_SAVE_STATE_REGISTER Register,
297 IN UINTN CpuIndex,
298 OUT VOID *Buffer
299 );
300
301 /**
302 Write data to the CPU save state.
303
304 @param This EFI_SMM_CPU_PROTOCOL instance
305 @param Width The number of bytes to read from the CPU save state.
306 @param Register Specifies the CPU register to write to the save state.
307 @param CpuIndex Specifies the zero-based index of the CPU save state
308 @param Buffer Upon entry, this holds the new CPU register value.
309
310 @retval EFI_SUCCESS The register was written from Save State
311 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
312 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct
313
314 **/
315 EFI_STATUS
316 EFIAPI
317 SmmWriteSaveState (
318 IN CONST EFI_SMM_CPU_PROTOCOL *This,
319 IN UINTN Width,
320 IN EFI_SMM_SAVE_STATE_REGISTER Register,
321 IN UINTN CpuIndex,
322 IN CONST VOID *Buffer
323 );
324
325 /**
326 Read a CPU Save State register on the target processor.
327
328 This function abstracts the differences that whether the CPU Save State register is in the
329 IA32 CPU Save State Map or X64 CPU Save State Map.
330
331 This function supports reading a CPU Save State register in SMBase relocation handler.
332
333 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
334 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
335 @param[in] Width The number of bytes to read from the CPU save state.
336 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
337
338 @retval EFI_SUCCESS The register was read from Save State.
339 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
340 @retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.
341
342 **/
343 EFI_STATUS
344 EFIAPI
345 ReadSaveStateRegister (
346 IN UINTN CpuIndex,
347 IN EFI_SMM_SAVE_STATE_REGISTER Register,
348 IN UINTN Width,
349 OUT VOID *Buffer
350 );
351
352 /**
353 Write value to a CPU Save State register on the target processor.
354
355 This function abstracts the differences that whether the CPU Save State register is in the
356 IA32 CPU Save State Map or X64 CPU Save State Map.
357
358 This function supports writing a CPU Save State register in SMBase relocation handler.
359
360 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
361 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
362 @param[in] Width The number of bytes to read from the CPU save state.
363 @param[in] Buffer Upon entry, this holds the new CPU register value.
364
365 @retval EFI_SUCCESS The register was written to Save State.
366 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
367 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.
368
369 **/
370 EFI_STATUS
371 EFIAPI
372 WriteSaveStateRegister (
373 IN UINTN CpuIndex,
374 IN EFI_SMM_SAVE_STATE_REGISTER Register,
375 IN UINTN Width,
376 IN CONST VOID *Buffer
377 );
378
379 extern CONST UINT8 gcSmmInitTemplate[];
380 extern CONST UINT16 gcSmmInitSize;
381 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
382 extern UINT32 mSmmCr0;
383 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
384 extern UINT32 mSmmCr4;
385 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
386 X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
387 X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;
388 extern BOOLEAN mCetSupported;
389
390 /**
391 Semaphore operation for all processor relocate SMMBase.
392 **/
393 VOID
394 EFIAPI
395 SmmRelocationSemaphoreComplete (
396 VOID
397 );
398
399 ///
400 /// The type of SMM CPU Information
401 ///
402 typedef struct {
403 SPIN_LOCK *Busy;
404 volatile EFI_AP_PROCEDURE2 Procedure;
405 volatile VOID *Parameter;
406 volatile UINT32 *Run;
407 volatile BOOLEAN *Present;
408 PROCEDURE_TOKEN *Token;
409 EFI_STATUS *Status;
410 } SMM_CPU_DATA_BLOCK;
411
412 typedef enum {
413 SmmCpuSyncModeTradition,
414 SmmCpuSyncModeRelaxedAp,
415 SmmCpuSyncModeMax
416 } SMM_CPU_SYNC_MODE;
417
418 typedef struct {
419 //
420 // Pointer to an array. The array should be located immediately after this structure
421 // so that UC cache-ability can be set together.
422 //
423 SMM_CPU_DATA_BLOCK *CpuData;
424 volatile UINT32 *Counter;
425 volatile UINT32 BspIndex;
426 volatile BOOLEAN *InsideSmm;
427 volatile BOOLEAN *AllCpusInSync;
428 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
429 volatile BOOLEAN SwitchBsp;
430 volatile BOOLEAN *CandidateBsp;
431 EFI_AP_PROCEDURE StartupProcedure;
432 VOID *StartupProcArgs;
433 } SMM_DISPATCHER_MP_SYNC_DATA;
434
435 #define SMM_PSD_OFFSET 0xfb00
436
437 ///
438 /// All global semaphores' pointer
439 ///
440 typedef struct {
441 volatile UINT32 *Counter;
442 volatile BOOLEAN *InsideSmm;
443 volatile BOOLEAN *AllCpusInSync;
444 SPIN_LOCK *PFLock;
445 SPIN_LOCK *CodeAccessCheckLock;
446 } SMM_CPU_SEMAPHORE_GLOBAL;
447
448 ///
449 /// All semaphores for each processor
450 ///
451 typedef struct {
452 SPIN_LOCK *Busy;
453 volatile UINT32 *Run;
454 volatile BOOLEAN *Present;
455 SPIN_LOCK *Token;
456 } SMM_CPU_SEMAPHORE_CPU;
457
458 ///
459 /// All semaphores' information
460 ///
461 typedef struct {
462 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
463 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
464 } SMM_CPU_SEMAPHORES;
465
466 extern IA32_DESCRIPTOR gcSmiGdtr;
467 extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
468 extern UINTN mGdtBufferSize;
469 extern IA32_DESCRIPTOR gcSmiIdtr;
470 extern VOID *gcSmiIdtrPtr;
471 extern UINT64 gPhyMask;
472 extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
473 extern UINTN mSmmStackArrayBase;
474 extern UINTN mSmmStackArrayEnd;
475 extern UINTN mSmmStackSize;
476 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
477 extern IA32_DESCRIPTOR gcSmiInitGdtr;
478 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
479 extern UINTN mSemaphoreSize;
480 extern SPIN_LOCK *mPFLock;
481 extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
482 extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
483 extern UINTN mSmmCpuSmramRangeCount;
484 extern UINT8 mPhysicalAddressBits;
485
486 //
487 // Copy of the PcdPteMemoryEncryptionAddressOrMask
488 //
489 extern UINT64 mAddressEncMask;
490
491 /**
492 Create 4G PageTable in SMRAM.
493
494 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
495 @return PageTable Address
496
497 **/
498 UINT32
499 Gen4GPageTable (
500 IN BOOLEAN Is32BitPageTable
501 );
502
503 /**
504 Initialize global data for MP synchronization.
505
506 @param Stacks Base address of SMI stack buffer for all processors.
507 @param StackSize Stack size for each processor in SMM.
508 @param ShadowStackSize Shadow Stack size for each processor in SMM.
509
510 **/
511 UINT32
512 InitializeMpServiceData (
513 IN VOID *Stacks,
514 IN UINTN StackSize,
515 IN UINTN ShadowStackSize
516 );
517
518 /**
519 Initialize Timer for SMM AP Sync.
520
521 **/
522 VOID
523 InitializeSmmTimer (
524 VOID
525 );
526
527 /**
528 Start Timer for SMM AP Sync.
529
530 **/
531 UINT64
532 EFIAPI
533 StartSyncTimer (
534 VOID
535 );
536
537 /**
538 Check if the SMM AP Sync timer is timeout.
539
540 @param Timer The start timer from the begin.
541
542 **/
543 BOOLEAN
544 EFIAPI
545 IsSyncTimerTimeout (
546 IN UINT64 Timer
547 );
548
549 /**
550 Initialize IDT for SMM Stack Guard.
551
552 **/
553 VOID
554 EFIAPI
555 InitializeIDTSmmStackGuard (
556 VOID
557 );
558
559 /**
560 Initialize IDT IST Field.
561
562 @param[in] ExceptionType Exception type.
563 @param[in] Ist IST value.
564
565 **/
566 VOID
567 EFIAPI
568 InitializeIdtIst (
569 IN EFI_EXCEPTION_TYPE ExceptionType,
570 IN UINT8 Ist
571 );
572
573 /**
574 Initialize Gdt for all processors.
575
576 @param[in] Cr3 CR3 value.
577 @param[out] GdtStepSize The step size for GDT table.
578
579 @return GdtBase for processor 0.
580 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
581 **/
582 VOID *
583 InitGdt (
584 IN UINTN Cr3,
585 OUT UINTN *GdtStepSize
586 );
587
588 /**
589
590 Register the SMM Foundation entry point.
591
592 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
593 @param SmmEntryPoint SMM Foundation EntryPoint
594
595 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
596
597 **/
598 EFI_STATUS
599 EFIAPI
600 RegisterSmmEntry (
601 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
602 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
603 );
604
605 /**
606 Create PageTable for SMM use.
607
608 @return PageTable Address
609
610 **/
611 UINT32
612 SmmInitPageTable (
613 VOID
614 );
615
616 /**
617 Schedule a procedure to run on the specified CPU.
618
619 @param Procedure The address of the procedure to run
620 @param CpuIndex Target CPU number
621 @param ProcArguments The parameter to pass to the procedure
622
623 @retval EFI_INVALID_PARAMETER CpuNumber not valid
624 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
625 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
626 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
627 @retval EFI_SUCCESS - The procedure has been successfully scheduled
628
629 **/
630 EFI_STATUS
631 EFIAPI
632 SmmStartupThisAp (
633 IN EFI_AP_PROCEDURE Procedure,
634 IN UINTN CpuIndex,
635 IN OUT VOID *ProcArguments OPTIONAL
636 );
637
638 /**
639 Schedule a procedure to run on the specified CPU in a blocking fashion.
640
641 @param Procedure The address of the procedure to run
642 @param CpuIndex Target CPU Index
643 @param ProcArguments The parameter to pass to the procedure
644
645 @retval EFI_INVALID_PARAMETER CpuNumber not valid
646 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
647 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
648 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
649 @retval EFI_SUCCESS The procedure has been successfully scheduled
650
651 **/
652 EFI_STATUS
653 EFIAPI
654 SmmBlockingStartupThisAp (
655 IN EFI_AP_PROCEDURE Procedure,
656 IN UINTN CpuIndex,
657 IN OUT VOID *ProcArguments OPTIONAL
658 );
659
660 /**
661 This function sets the attributes for the memory region specified by BaseAddress and
662 Length from their current attributes to the attributes specified by Attributes.
663
664 @param[in] BaseAddress The physical address that is the start address of a memory region.
665 @param[in] Length The size in bytes of the memory region.
666 @param[in] Attributes The bit mask of attributes to set for the memory region.
667
668 @retval EFI_SUCCESS The attributes were set for the memory region.
669 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
670 BaseAddress and Length cannot be modified.
671 @retval EFI_INVALID_PARAMETER Length is zero.
672 Attributes specified an illegal combination of attributes that
673 cannot be set together.
674 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
675 the memory resource range.
676 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
677 resource range specified by BaseAddress and Length.
678 The bit mask of attributes is not support for the memory resource
679 range specified by BaseAddress and Length.
680
681 **/
682 EFI_STATUS
683 EFIAPI
684 SmmSetMemoryAttributes (
685 IN EFI_PHYSICAL_ADDRESS BaseAddress,
686 IN UINT64 Length,
687 IN UINT64 Attributes
688 );
689
690 /**
691 This function clears the attributes for the memory region specified by BaseAddress and
692 Length from their current attributes to the attributes specified by Attributes.
693
694 @param[in] BaseAddress The physical address that is the start address of a memory region.
695 @param[in] Length The size in bytes of the memory region.
696 @param[in] Attributes The bit mask of attributes to clear for the memory region.
697
698 @retval EFI_SUCCESS The attributes were cleared for the memory region.
699 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
700 BaseAddress and Length cannot be modified.
701 @retval EFI_INVALID_PARAMETER Length is zero.
702 Attributes specified an illegal combination of attributes that
703 cannot be set together.
704 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
705 the memory resource range.
706 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
707 resource range specified by BaseAddress and Length.
708 The bit mask of attributes is not support for the memory resource
709 range specified by BaseAddress and Length.
710
711 **/
712 EFI_STATUS
713 EFIAPI
714 SmmClearMemoryAttributes (
715 IN EFI_PHYSICAL_ADDRESS BaseAddress,
716 IN UINT64 Length,
717 IN UINT64 Attributes
718 );
719
720 /**
721 Initialize MP synchronization data.
722
723 **/
724 VOID
725 EFIAPI
726 InitializeMpSyncData (
727 VOID
728 );
729
730 /**
731
732 Find out SMRAM information including SMRR base and SMRR size.
733
734 @param SmrrBase SMRR base
735 @param SmrrSize SMRR size
736
737 **/
738 VOID
739 FindSmramInfo (
740 OUT UINT32 *SmrrBase,
741 OUT UINT32 *SmrrSize
742 );
743
744 /**
745 Relocate SmmBases for each processor.
746
747 Execute on first boot and all S3 resumes
748
749 **/
750 VOID
751 EFIAPI
752 SmmRelocateBases (
753 VOID
754 );
755
756 /**
757 Page Fault handler for SMM use.
758
759 @param InterruptType Defines the type of interrupt or exception that
760 occurred on the processor.This parameter is processor architecture specific.
761 @param SystemContext A pointer to the processor context when
762 the interrupt occurred on the processor.
763 **/
764 VOID
765 EFIAPI
766 SmiPFHandler (
767 IN EFI_EXCEPTION_TYPE InterruptType,
768 IN EFI_SYSTEM_CONTEXT SystemContext
769 );
770
771 /**
772 Perform the remaining tasks.
773
774 **/
775 VOID
776 PerformRemainingTasks (
777 VOID
778 );
779
780 /**
781 Perform the pre tasks.
782
783 **/
784 VOID
785 PerformPreTasks (
786 VOID
787 );
788
789 /**
790 Initialize MSR spin lock by MSR index.
791
792 @param MsrIndex MSR index value.
793
794 **/
795 VOID
796 InitMsrSpinLockByIndex (
797 IN UINT32 MsrIndex
798 );
799
800 /**
801 Hook return address of SMM Save State so that semaphore code
802 can be executed immediately after AP exits SMM to indicate to
803 the BSP that an AP has exited SMM after SMBASE relocation.
804
805 @param[in] CpuIndex The processor index.
806 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
807 immediately after AP exits SMM.
808
809 **/
810 VOID
811 SemaphoreHook (
812 IN UINTN CpuIndex,
813 IN volatile BOOLEAN *RebasedFlag
814 );
815
816 /**
817 Configure SMM Code Access Check feature for all processors.
818 SMM Feature Control MSR will be locked after configuration.
819 **/
820 VOID
821 ConfigSmmCodeAccessCheck (
822 VOID
823 );
824
825 /**
826 Hook the code executed immediately after an RSM instruction on the currently
827 executing CPU. The mode of code executed immediately after RSM must be
828 detected, and the appropriate hook must be selected. Always clear the auto
829 HALT restart flag if it is set.
830
831 @param[in] CpuIndex The processor index for the currently
832 executing CPU.
833 @param[in] CpuState Pointer to SMRAM Save State Map for the
834 currently executing CPU.
835 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
836 32-bit mode from 64-bit SMM.
837 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
838 same mode as SMM.
839
840 @retval The value of the original instruction pointer before it was hooked.
841
842 **/
843 UINT64
844 EFIAPI
845 HookReturnFromSmm (
846 IN UINTN CpuIndex,
847 SMRAM_SAVE_STATE_MAP *CpuState,
848 UINT64 NewInstructionPointer32,
849 UINT64 NewInstructionPointer
850 );
851
852 /**
853 Get the size of the SMI Handler in bytes.
854
855 @retval The size, in bytes, of the SMI Handler.
856
857 **/
858 UINTN
859 EFIAPI
860 GetSmiHandlerSize (
861 VOID
862 );
863
864 /**
865 Install the SMI handler for the CPU specified by CpuIndex. This function
866 is called by the CPU that was elected as monarch during System Management
867 Mode initialization.
868
869 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
870 The value must be between 0 and the NumberOfCpus field
871 in the System Management System Table (SMST).
872 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
873 @param[in] SmiStack The stack to use when an SMI is processed by the
874 the CPU specified by CpuIndex.
875 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
876 processed by the CPU specified by CpuIndex.
877 @param[in] GdtBase The base address of the GDT to use when an SMI is
878 processed by the CPU specified by CpuIndex.
879 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
880 processed by the CPU specified by CpuIndex.
881 @param[in] IdtBase The base address of the IDT to use when an SMI is
882 processed by the CPU specified by CpuIndex.
883 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
884 processed by the CPU specified by CpuIndex.
885 @param[in] Cr3 The base address of the page tables to use when an SMI
886 is processed by the CPU specified by CpuIndex.
887 **/
888 VOID
889 EFIAPI
890 InstallSmiHandler (
891 IN UINTN CpuIndex,
892 IN UINT32 SmBase,
893 IN VOID *SmiStack,
894 IN UINTN StackSize,
895 IN UINTN GdtBase,
896 IN UINTN GdtSize,
897 IN UINTN IdtBase,
898 IN UINTN IdtSize,
899 IN UINT32 Cr3
900 );
901
902 /**
903 Search module name by input IP address and output it.
904
905 @param CallerIpAddress Caller instruction pointer.
906
907 **/
908 VOID
909 DumpModuleInfoByIp (
910 IN UINTN CallerIpAddress
911 );
912
913 /**
914 This function sets memory attribute according to MemoryAttributesTable.
915 **/
916 VOID
917 SetMemMapAttributes (
918 VOID
919 );
920
921 /**
922 This function sets UEFI memory attribute according to UEFI memory map.
923 **/
924 VOID
925 SetUefiMemMapAttributes (
926 VOID
927 );
928
929 /**
930 Return if the Address is forbidden as SMM communication buffer.
931
932 @param[in] Address the address to be checked
933
934 @return TRUE The address is forbidden as SMM communication buffer.
935 @return FALSE The address is allowed as SMM communication buffer.
936 **/
937 BOOLEAN
938 IsSmmCommBufferForbiddenAddress (
939 IN UINT64 Address
940 );
941
942 /**
943 This function caches the UEFI memory map information.
944 **/
945 VOID
946 GetUefiMemoryMap (
947 VOID
948 );
949
950 /**
951 This function sets memory attribute for page table.
952 **/
953 VOID
954 SetPageTableAttributes (
955 VOID
956 );
957
958 /**
959 Get page table base address and the depth of the page table.
960
961 @param[out] Base Page table base address.
962 @param[out] FiveLevels TRUE means 5 level paging. FALSE means 4 level paging.
963 **/
964 VOID
965 GetPageTable (
966 OUT UINTN *Base,
967 OUT BOOLEAN *FiveLevels OPTIONAL
968 );
969
970 /**
971 This function sets the attributes for the memory region specified by BaseAddress and
972 Length from their current attributes to the attributes specified by Attributes.
973
974 @param[in] BaseAddress The physical address that is the start address of a memory region.
975 @param[in] Length The size in bytes of the memory region.
976 @param[in] Attributes The bit mask of attributes to set for the memory region.
977 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
978
979 @retval EFI_SUCCESS The attributes were set for the memory region.
980 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
981 BaseAddress and Length cannot be modified.
982 @retval EFI_INVALID_PARAMETER Length is zero.
983 Attributes specified an illegal combination of attributes that
984 cannot be set together.
985 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
986 the memory resource range.
987 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
988 resource range specified by BaseAddress and Length.
989 The bit mask of attributes is not support for the memory resource
990 range specified by BaseAddress and Length.
991
992 **/
993 EFI_STATUS
994 EFIAPI
995 SmmSetMemoryAttributesEx (
996 IN EFI_PHYSICAL_ADDRESS BaseAddress,
997 IN UINT64 Length,
998 IN UINT64 Attributes,
999 OUT BOOLEAN *IsSplitted OPTIONAL
1000 );
1001
1002 /**
1003 This function clears the attributes for the memory region specified by BaseAddress and
1004 Length from their current attributes to the attributes specified by Attributes.
1005
1006 @param[in] BaseAddress The physical address that is the start address of a memory region.
1007 @param[in] Length The size in bytes of the memory region.
1008 @param[in] Attributes The bit mask of attributes to clear for the memory region.
1009 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
1010
1011 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1012 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
1013 BaseAddress and Length cannot be modified.
1014 @retval EFI_INVALID_PARAMETER Length is zero.
1015 Attributes specified an illegal combination of attributes that
1016 cannot be set together.
1017 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1018 the memory resource range.
1019 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1020 resource range specified by BaseAddress and Length.
1021 The bit mask of attributes is not support for the memory resource
1022 range specified by BaseAddress and Length.
1023
1024 **/
1025 EFI_STATUS
1026 EFIAPI
1027 SmmClearMemoryAttributesEx (
1028 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1029 IN UINT64 Length,
1030 IN UINT64 Attributes,
1031 OUT BOOLEAN *IsSplitted OPTIONAL
1032 );
1033
1034 /**
1035 This API provides a way to allocate memory for page table.
1036
1037 This API can be called more once to allocate memory for page tables.
1038
1039 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
1040 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
1041 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
1042 returned.
1043
1044 @param Pages The number of 4 KB pages to allocate.
1045
1046 @return A pointer to the allocated buffer or NULL if allocation fails.
1047
1048 **/
1049 VOID *
1050 AllocatePageTableMemory (
1051 IN UINTN Pages
1052 );
1053
1054 /**
1055 Allocate pages for code.
1056
1057 @param[in] Pages Number of pages to be allocated.
1058
1059 @return Allocated memory.
1060 **/
1061 VOID *
1062 AllocateCodePages (
1063 IN UINTN Pages
1064 );
1065
1066 /**
1067 Allocate aligned pages for code.
1068
1069 @param[in] Pages Number of pages to be allocated.
1070 @param[in] Alignment The requested alignment of the allocation.
1071 Must be a power of two.
1072 If Alignment is zero, then byte alignment is used.
1073
1074 @return Allocated memory.
1075 **/
1076 VOID *
1077 AllocateAlignedCodePages (
1078 IN UINTN Pages,
1079 IN UINTN Alignment
1080 );
1081
1082 //
1083 // S3 related global variable and function prototype.
1084 //
1085
1086 extern BOOLEAN mSmmS3Flag;
1087
1088 /**
1089 Initialize SMM S3 resume state structure used during S3 Resume.
1090
1091 @param[in] Cr3 The base address of the page tables to use in SMM.
1092
1093 **/
1094 VOID
1095 InitSmmS3ResumeState (
1096 IN UINT32 Cr3
1097 );
1098
1099 /**
1100 Get ACPI CPU data.
1101
1102 **/
1103 VOID
1104 GetAcpiCpuData (
1105 VOID
1106 );
1107
1108 /**
1109 Restore SMM Configuration in S3 boot path.
1110
1111 **/
1112 VOID
1113 RestoreSmmConfigurationInS3 (
1114 VOID
1115 );
1116
1117 /**
1118 Get ACPI S3 enable flag.
1119
1120 **/
1121 VOID
1122 GetAcpiS3EnableFlag (
1123 VOID
1124 );
1125
1126 /**
1127 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1128
1129 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1130 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1131 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1132
1133 **/
1134 VOID
1135 TransferApToSafeState (
1136 IN UINTN ApHltLoopCode,
1137 IN UINTN TopOfStack,
1138 IN UINTN NumberToFinishAddress
1139 );
1140
1141 /**
1142 Set ShadowStack memory.
1143
1144 @param[in] Cr3 The page table base address.
1145 @param[in] BaseAddress The physical address that is the start address of a memory region.
1146 @param[in] Length The size in bytes of the memory region.
1147
1148 @retval EFI_SUCCESS The shadow stack memory is set.
1149 **/
1150 EFI_STATUS
1151 SetShadowStack (
1152 IN UINTN Cr3,
1153 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1154 IN UINT64 Length
1155 );
1156
1157 /**
1158 Set not present memory.
1159
1160 @param[in] Cr3 The page table base address.
1161 @param[in] BaseAddress The physical address that is the start address of a memory region.
1162 @param[in] Length The size in bytes of the memory region.
1163
1164 @retval EFI_SUCCESS The not present memory is set.
1165 **/
1166 EFI_STATUS
1167 SetNotPresentPage (
1168 IN UINTN Cr3,
1169 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1170 IN UINT64 Length
1171 );
1172
1173 /**
1174 Initialize the shadow stack related data structure.
1175
1176 @param CpuIndex The index of CPU.
1177 @param ShadowStack The bottom of the shadow stack for this CPU.
1178 **/
1179 VOID
1180 InitShadowStack (
1181 IN UINTN CpuIndex,
1182 IN VOID *ShadowStack
1183 );
1184
1185 /**
1186 This function set given attributes of the memory region specified by
1187 BaseAddress and Length.
1188
1189 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1190 @param BaseAddress The physical address that is the start address of
1191 a memory region.
1192 @param Length The size in bytes of the memory region.
1193 @param Attributes The bit mask of attributes to set for the memory
1194 region.
1195
1196 @retval EFI_SUCCESS The attributes were set for the memory region.
1197 @retval EFI_INVALID_PARAMETER Length is zero.
1198 Attributes specified an illegal combination of
1199 attributes that cannot be set together.
1200 @retval EFI_UNSUPPORTED The processor does not support one or more
1201 bytes of the memory resource range specified
1202 by BaseAddress and Length.
1203 The bit mask of attributes is not supported for
1204 the memory resource range specified by
1205 BaseAddress and Length.
1206
1207 **/
1208 EFI_STATUS
1209 EFIAPI
1210 EdkiiSmmSetMemoryAttributes (
1211 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1212 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1213 IN UINT64 Length,
1214 IN UINT64 Attributes
1215 );
1216
1217 /**
1218 This function clears given attributes of the memory region specified by
1219 BaseAddress and Length.
1220
1221 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1222 @param BaseAddress The physical address that is the start address of
1223 a memory region.
1224 @param Length The size in bytes of the memory region.
1225 @param Attributes The bit mask of attributes to clear for the memory
1226 region.
1227
1228 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1229 @retval EFI_INVALID_PARAMETER Length is zero.
1230 Attributes specified an illegal combination of
1231 attributes that cannot be cleared together.
1232 @retval EFI_UNSUPPORTED The processor does not support one or more
1233 bytes of the memory resource range specified
1234 by BaseAddress and Length.
1235 The bit mask of attributes is not supported for
1236 the memory resource range specified by
1237 BaseAddress and Length.
1238
1239 **/
1240 EFI_STATUS
1241 EFIAPI
1242 EdkiiSmmClearMemoryAttributes (
1243 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1244 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1245 IN UINT64 Length,
1246 IN UINT64 Attributes
1247 );
1248
1249 /**
1250 This function retrieves the attributes of the memory region specified by
1251 BaseAddress and Length. If different attributes are got from different part
1252 of the memory region, EFI_NO_MAPPING will be returned.
1253
1254 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1255 @param BaseAddress The physical address that is the start address of
1256 a memory region.
1257 @param Length The size in bytes of the memory region.
1258 @param Attributes Pointer to attributes returned.
1259
1260 @retval EFI_SUCCESS The attributes got for the memory region.
1261 @retval EFI_INVALID_PARAMETER Length is zero.
1262 Attributes is NULL.
1263 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1264 region.
1265 @retval EFI_UNSUPPORTED The processor does not support one or more
1266 bytes of the memory resource range specified
1267 by BaseAddress and Length.
1268
1269 **/
1270 EFI_STATUS
1271 EFIAPI
1272 EdkiiSmmGetMemoryAttributes (
1273 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1274 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1275 IN UINT64 Length,
1276 IN UINT64 *Attributes
1277 );
1278
1279 /**
1280 This function fixes up the address of the global variable or function
1281 referred in SmmInit assembly files to be the absolute address.
1282 **/
1283 VOID
1284 EFIAPI
1285 PiSmmCpuSmmInitFixupAddress (
1286 );
1287
1288 /**
1289 This function fixes up the address of the global variable or function
1290 referred in SmiEntry assembly files to be the absolute address.
1291 **/
1292 VOID
1293 EFIAPI
1294 PiSmmCpuSmiEntryFixupAddress (
1295 );
1296
1297 /**
1298 This function reads CR2 register when on-demand paging is enabled
1299 for 64 bit and no action for 32 bit.
1300
1301 @param[out] *Cr2 Pointer to variable to hold CR2 register value.
1302 **/
1303 VOID
1304 SaveCr2 (
1305 OUT UINTN *Cr2
1306 );
1307
1308 /**
1309 This function writes into CR2 register when on-demand paging is enabled
1310 for 64 bit and no action for 32 bit.
1311
1312 @param[in] Cr2 Value to write into CR2 register.
1313 **/
1314 VOID
1315 RestoreCr2 (
1316 IN UINTN Cr2
1317 );
1318
1319 /**
1320 Schedule a procedure to run on the specified CPU.
1321
1322 @param[in] Procedure The address of the procedure to run
1323 @param[in] CpuIndex Target CPU Index
1324 @param[in,out] ProcArguments The parameter to pass to the procedure
1325 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1326 procedure in a blocking or non-blocking fashion. If it is NULL the
1327 call is blocking, and the call will not return until the AP has
1328 completed the procedure. If the token is not NULL, the call will
1329 return immediately. The caller can check whether the procedure has
1330 completed with CheckOnProcedure or WaitForProcedure.
1331 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1332 execution of Procedure, either for blocking or non-blocking mode.
1333 Zero means infinity. If the timeout expires before all APs return
1334 from Procedure, then Procedure on the failed APs is terminated. If
1335 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1336 If the timeout expires in non-blocking mode, the timeout determined
1337 can be through CheckOnProcedure or WaitForProcedure.
1338 Note that timeout support is optional. Whether an implementation
1339 supports this feature can be determined via the Attributes data
1340 member.
1341 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1342 by Procedure when it completes execution on the target AP, or with
1343 EFI_TIMEOUT if the Procedure fails to complete within the optional
1344 timeout. The implementation will update this variable with
1345 EFI_NOT_READY prior to starting Procedure on the target AP.
1346
1347 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1348 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1349 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1350 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1351 @retval EFI_SUCCESS The procedure has been successfully scheduled
1352
1353 **/
1354 EFI_STATUS
1355 InternalSmmStartupThisAp (
1356 IN EFI_AP_PROCEDURE2 Procedure,
1357 IN UINTN CpuIndex,
1358 IN OUT VOID *ProcArguments OPTIONAL,
1359 IN OUT MM_COMPLETION *Token,
1360 IN UINTN TimeoutInMicroseconds,
1361 IN OUT EFI_STATUS *CpuStatus
1362 );
1363
1364 /**
1365 Checks whether the input token is the current used token.
1366
1367 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1368 BroadcastProcedure.
1369
1370 @retval TRUE The input token is the current used token.
1371 @retval FALSE The input token is not the current used token.
1372 **/
1373 BOOLEAN
1374 IsTokenInUse (
1375 IN SPIN_LOCK *Token
1376 );
1377
1378 /**
1379 Checks status of specified AP.
1380
1381 This function checks whether the specified AP has finished the task assigned
1382 by StartupThisAP(), and whether timeout expires.
1383
1384 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1385 BroadcastProcedure.
1386
1387 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1388 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1389 **/
1390 EFI_STATUS
1391 IsApReady (
1392 IN SPIN_LOCK *Token
1393 );
1394
1395 /**
1396 Check whether it is an present AP.
1397
1398 @param CpuIndex The AP index which calls this function.
1399
1400 @retval TRUE It's a present AP.
1401 @retval TRUE This is not an AP or it is not present.
1402
1403 **/
1404 BOOLEAN
1405 IsPresentAp (
1406 IN UINTN CpuIndex
1407 );
1408
1409 /**
1410 Worker function to execute a caller provided function on all enabled APs.
1411
1412 @param[in] Procedure A pointer to the function to be run on
1413 enabled APs of the system.
1414 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1415 APs to return from Procedure, either for
1416 blocking or non-blocking mode.
1417 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1418 all APs.
1419 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1420 procedure in a blocking or non-blocking fashion. If it is NULL the
1421 call is blocking, and the call will not return until the AP has
1422 completed the procedure. If the token is not NULL, the call will
1423 return immediately. The caller can check whether the procedure has
1424 completed with CheckOnProcedure or WaitForProcedure.
1425 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1426 by Procedure when it completes execution on the target AP, or with
1427 EFI_TIMEOUT if the Procedure fails to complete within the optional
1428 timeout. The implementation will update this variable with
1429 EFI_NOT_READY prior to starting Procedure on the target AP.
1430
1431 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1432 the timeout expired.
1433 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1434 to all enabled APs.
1435 @retval others Failed to Startup all APs.
1436
1437 **/
1438 EFI_STATUS
1439 InternalSmmStartupAllAPs (
1440 IN EFI_AP_PROCEDURE2 Procedure,
1441 IN UINTN TimeoutInMicroseconds,
1442 IN OUT VOID *ProcedureArguments OPTIONAL,
1443 IN OUT MM_COMPLETION *Token,
1444 IN OUT EFI_STATUS *CPUStatus
1445 );
1446
1447 /**
1448
1449 Register the SMM Foundation entry point.
1450
1451 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1452 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1453 with the related definitions of
1454 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1455 If caller may pass a value of NULL to deregister any existing
1456 startup procedure.
1457 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1458 run by the AP. It is an optional common mailbox between APs and
1459 the caller to share information
1460
1461 @retval EFI_SUCCESS The Procedure has been set successfully.
1462 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1463
1464 **/
1465 EFI_STATUS
1466 RegisterStartupProcedure (
1467 IN EFI_AP_PROCEDURE Procedure,
1468 IN OUT VOID *ProcedureArguments OPTIONAL
1469 );
1470
1471 /**
1472 Allocate buffer for SpinLock and Wrapper function buffer.
1473
1474 **/
1475 VOID
1476 InitializeDataForMmMp (
1477 VOID
1478 );
1479
1480 /**
1481 Return whether access to non-SMRAM is restricted.
1482
1483 @retval TRUE Access to non-SMRAM is restricted.
1484 @retval FALSE Access to non-SMRAM is not restricted.
1485 **/
1486 BOOLEAN
1487 IsRestrictedMemoryAccess (
1488 VOID
1489 );
1490
1491 #endif