ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Pptt/PpttParser.c

   1 /** @file
   2   PPTT table parser
   3
   4   Copyright (c) 2019, ARM Limited. All rights reserved.
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7   @par Reference(s):
   8     - ACPI 6.3 Specification - January 2019
   9     - ARM Architecture Reference Manual ARMv8 (D.a)
  10 **/
  11
  12 #include <Library/PrintLib.h>
  13 #include <Library/UefiLib.h>
  14 #include "AcpiParser.h"
  15 #include "AcpiView.h"
  16 #include "PpttParser.h"
  17
  18 // Local variables
  19 STATIC CONST UINT8*  ProcessorTopologyStructureType;
  20 STATIC CONST UINT8*  ProcessorTopologyStructureLength;
  21 STATIC CONST UINT32* NumberOfPrivateResources;
  22 STATIC ACPI_DESCRIPTION_HEADER_INFO AcpiHdrInfo;
  23
  24 /**
  25   This function validates the Cache Type Structure (Type 1) 'Number of sets'
  26   field.
  27
  28   @param [in] Ptr       Pointer to the start of the field data.
  29   @param [in] Context   Pointer to context specific information e.g. this
  30                         could be a pointer to the ACPI table header.
  31 **/
  32 STATIC
  33 VOID
  34 EFIAPI
  35 ValidateCacheNumberOfSets (
  36   IN UINT8* Ptr,
  37   IN VOID*  Context
  38   )
  39 {
  40   UINT32 NumberOfSets;
  41   NumberOfSets = *(UINT32*)Ptr;
  42
  43   if (NumberOfSets == 0) {
  44     IncrementErrorCount ();
  45     Print (L"\nERROR: Cache number of sets must be greater than 0");
  46     return;
  47   }
  48
  49 #if defined(MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
  50   if (NumberOfSets > PPTT_ARM_CCIDX_CACHE_NUMBER_OF_SETS_MAX) {
  51     IncrementErrorCount ();
  52     Print (
  53       L"\nERROR: When ARMv8.3-CCIDX is implemented the maximum cache number of "
  54         L"sets must be less than or equal to %d",
  55       PPTT_ARM_CCIDX_CACHE_NUMBER_OF_SETS_MAX
  56       );
  57     return;
  58   }
  59
  60   if (NumberOfSets > PPTT_ARM_CACHE_NUMBER_OF_SETS_MAX) {
  61     IncrementWarningCount ();
  62     Print (
  63       L"\nWARNING: Without ARMv8.3-CCIDX, the maximum cache number of sets "
  64         L"must be less than or equal to %d. Ignore this message if "
  65         L"ARMv8.3-CCIDX is implemented",
  66       PPTT_ARM_CACHE_NUMBER_OF_SETS_MAX
  67       );
  68     return;
  69   }
  70 #endif
  71
  72 }
  73
  74 /**
  75   This function validates the Cache Type Structure (Type 1) 'Associativity'
  76   field.
  77
  78   @param [in] Ptr       Pointer to the start of the field data.
  79   @param [in] Context   Pointer to context specific information e.g. this
  80                         could be a pointer to the ACPI table header.
  81 **/
  82 STATIC
  83 VOID
  84 EFIAPI
  85 ValidateCacheAssociativity (
  86   IN UINT8* Ptr,
  87   IN VOID*  Context
  88   )
  89 {
  90   UINT8 Associativity;
  91   Associativity = *(UINT8*)Ptr;
  92
  93   if (Associativity == 0) {
  94     IncrementErrorCount ();
  95     Print (L"\nERROR: Cache associativity must be greater than 0");
  96     return;
  97   }
  98 }
  99
 100 /**
 101   This function validates the Cache Type Structure (Type 1) Line size field.
 102
 103   @param [in] Ptr     Pointer to the start of the field data.
 104   @param [in] Context Pointer to context specific information e.g. this
 105                       could be a pointer to the ACPI table header.
 106 **/
 107 STATIC
 108 VOID
 109 EFIAPI
 110 ValidateCacheLineSize (
 111   IN UINT8* Ptr,
 112   IN VOID*  Context
 113   )
 114 {
 115 #if defined(MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
 116   // Reference: ARM Architecture Reference Manual ARMv8 (D.a)
 117   // Section D12.2.25: CCSIDR_EL1, Current Cache Size ID Register
 118   //   LineSize, bits [2:0]
 119   //     (Log2(Number of bytes in cache line)) - 4.
 120
 121   UINT16 LineSize;
 122   LineSize = *(UINT16*)Ptr;
 123
 124   if ((LineSize < PPTT_ARM_CACHE_LINE_SIZE_MIN) ||
 125       (LineSize > PPTT_ARM_CACHE_LINE_SIZE_MAX)) {
 126     IncrementErrorCount ();
 127     Print (
 128       L"\nERROR: The cache line size must be between %d and %d bytes"
 129         L" on ARM Platforms.",
 130       PPTT_ARM_CACHE_LINE_SIZE_MIN,
 131       PPTT_ARM_CACHE_LINE_SIZE_MAX
 132       );
 133     return;
 134   }
 135
 136   if ((LineSize & (LineSize - 1)) != 0) {
 137     IncrementErrorCount ();
 138     Print (L"\nERROR: The cache line size is not a power of 2.");
 139   }
 140 #endif
 141 }
 142
 143 /**
 144   This function validates the Cache Type Structure (Type 1) Attributes field.
 145
 146   @param [in] Ptr     Pointer to the start of the field data.
 147   @param [in] Context Pointer to context specific information e.g. this
 148                       could be a pointer to the ACPI table header.
 149 **/
 150 STATIC
 151 VOID
 152 EFIAPI
 153 ValidateCacheAttributes (
 154   IN UINT8* Ptr,
 155   IN VOID*  Context
 156   )
 157 {
 158   // Reference: Advanced Configuration and Power Interface (ACPI) Specification
 159   //            Version 6.2 Errata A, September 2017
 160   // Table 5-153: Cache Type Structure
 161   UINT8 Attributes;
 162   Attributes = *(UINT8*)Ptr;
 163
 164   if ((Attributes & 0xE0) != 0) {
 165     IncrementErrorCount ();
 166     Print (
 167       L"\nERROR: Attributes bits [7:5] are reserved and must be zero.",
 168       Attributes
 169       );
 170     return;
 171   }
 172 }
 173
 174 /**
 175   An ACPI_PARSER array describing the ACPI PPTT Table.
 176 **/
 177 STATIC CONST ACPI_PARSER PpttParser[] = {
 178   PARSE_ACPI_HEADER (&AcpiHdrInfo)
 179 };
 180
 181 /**
 182   An ACPI_PARSER array describing the processor topology structure header.
 183 **/
 184 STATIC CONST ACPI_PARSER ProcessorTopologyStructureHeaderParser[] = {
 185   {L"Type", 1, 0, NULL, NULL, (VOID**)&ProcessorTopologyStructureType,
 186    NULL, NULL},
 187   {L"Length", 1, 1, NULL, NULL, (VOID**)&ProcessorTopologyStructureLength,
 188    NULL, NULL},
 189   {L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL}
 190 };
 191
 192 /**
 193   An ACPI_PARSER array describing the Processor Hierarchy Node Structure - Type 0.
 194 **/
 195 STATIC CONST ACPI_PARSER ProcessorHierarchyNodeStructureParser[] = {
 196   {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
 197   {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
 198   {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
 199
 200   {L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
 201   {L"Parent", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},
 202   {L"ACPI Processor ID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},
 203   {L"Number of private resources", 4, 16, L"%d", NULL,
 204    (VOID**)&NumberOfPrivateResources, NULL, NULL}
 205 };
 206
 207 /**
 208   An ACPI_PARSER array describing the Cache Type Structure - Type 1.
 209 **/
 210 STATIC CONST ACPI_PARSER CacheTypeStructureParser[] = {
 211   {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
 212   {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
 213   {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
 214
 215   {L"Flags", 4, 4, L"0x%x", NULL, NULL, NULL, NULL},
 216   {L"Next Level of Cache", 4, 8, L"0x%x", NULL, NULL, NULL, NULL},
 217   {L"Size", 4, 12, L"0x%x", NULL, NULL, NULL, NULL},
 218   {L"Number of sets", 4, 16, L"%d", NULL, NULL, ValidateCacheNumberOfSets, NULL},
 219   {L"Associativity", 1, 20, L"%d", NULL, NULL, ValidateCacheAssociativity, NULL},
 220   {L"Attributes", 1, 21, L"0x%x", NULL, NULL, ValidateCacheAttributes, NULL},
 221   {L"Line size", 2, 22, L"%d", NULL, NULL, ValidateCacheLineSize, NULL}
 222 };
 223
 224 /**
 225   An ACPI_PARSER array describing the ID Type Structure - Type 2.
 226 **/
 227 STATIC CONST ACPI_PARSER IdStructureParser[] = {
 228   {L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL},
 229   {L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL},
 230   {L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL},
 231
 232   {L"VENDOR_ID", 4, 4, NULL, Dump4Chars, NULL, NULL, NULL},
 233   {L"LEVEL_1_ID", 8, 8, L"0x%x", NULL, NULL, NULL, NULL},
 234   {L"LEVEL_2_ID", 8, 16, L"0x%x", NULL, NULL, NULL, NULL},
 235   {L"MAJOR_REV", 2, 24, L"0x%x", NULL, NULL, NULL, NULL},
 236   {L"MINOR_REV", 2, 26, L"0x%x", NULL, NULL, NULL, NULL},
 237   {L"SPIN_REV", 2, 28, L"0x%x", NULL, NULL, NULL, NULL},
 238 };
 239
 240 /**
 241   This function parses the Processor Hierarchy Node Structure (Type 0).
 242
 243   @param [in] Ptr     Pointer to the start of the Processor Hierarchy Node
 244                       Structure data.
 245   @param [in] Length  Length of the Processor Hierarchy Node Structure.
 246 **/
 247 STATIC
 248 VOID
 249 DumpProcessorHierarchyNodeStructure (
 250   IN UINT8* Ptr,
 251   IN UINT8  Length
 252   )
 253 {
 254   UINT32 Offset;
 255   UINT8* PrivateResourcePtr;
 256   UINT32 Index;
 257   CHAR16 Buffer[OUTPUT_FIELD_COLUMN_WIDTH];
 258
 259   Offset = ParseAcpi (
 260              TRUE,
 261              2,
 262              "Processor Hierarchy Node Structure",
 263              Ptr,
 264              Length,
 265              PARSER_PARAMS (ProcessorHierarchyNodeStructureParser)
 266              );
 267
 268   PrivateResourcePtr = Ptr + Offset;
 269   Index = 0;
 270   while (Index < *NumberOfPrivateResources) {
 271     UnicodeSPrint (
 272       Buffer,
 273       sizeof (Buffer),
 274       L"Private resources [%d]",
 275       Index
 276       );
 277
 278     PrintFieldName (4, Buffer);
 279     Print (
 280       L"0x%x\n",
 281       *((UINT32*) PrivateResourcePtr)
 282       );
 283
 284     PrivateResourcePtr += sizeof(UINT32);
 285     Index++;
 286   }
 287 }
 288
 289 /**
 290   This function parses the Cache Type Structure (Type 1).
 291
 292   @param [in] Ptr     Pointer to the start of the Cache Type Structure data.
 293   @param [in] Length  Length of the Cache Type Structure.
 294 **/
 295 STATIC
 296 VOID
 297 DumpCacheTypeStructure (
 298   IN UINT8* Ptr,
 299   IN UINT8  Length
 300   )
 301 {
 302   ParseAcpi (
 303     TRUE,
 304     2,
 305     "Cache Type Structure",
 306     Ptr,
 307     Length,
 308     PARSER_PARAMS (CacheTypeStructureParser)
 309     );
 310 }
 311
 312 /**
 313   This function parses the ID Structure (Type 2).
 314
 315   @param [in] Ptr     Pointer to the start of the ID Structure data.
 316   @param [in] Length  Length of the ID Structure.
 317 **/
 318 STATIC
 319 VOID
 320 DumpIDStructure (
 321   IN UINT8* Ptr,
 322   IN UINT8 Length
 323   )
 324 {
 325   ParseAcpi (
 326     TRUE,
 327     2,
 328     "ID Structure",
 329     Ptr,
 330     Length,
 331     PARSER_PARAMS (IdStructureParser)
 332     );
 333 }
 334
 335 /**
 336   This function parses the ACPI PPTT table.
 337   When trace is enabled this function parses the PPTT table and
 338   traces the ACPI table fields.
 339
 340   This function parses the following processor topology structures:
 341     - Processor hierarchy node structure (Type 0)
 342     - Cache Type Structure (Type 1)
 343     - ID structure (Type 2)
 344
 345   This function also performs validation of the ACPI table fields.
 346
 347   @param [in] Trace              If TRUE, trace the ACPI fields.
 348   @param [in] Ptr                Pointer to the start of the buffer.
 349   @param [in] AcpiTableLength    Length of the ACPI table.
 350   @param [in] AcpiTableRevision  Revision of the ACPI table.
 351 **/
 352 VOID
 353 EFIAPI
 354 ParseAcpiPptt (
 355   IN BOOLEAN Trace,
 356   IN UINT8*  Ptr,
 357   IN UINT32  AcpiTableLength,
 358   IN UINT8   AcpiTableRevision
 359   )
 360 {
 361   UINT32 Offset;
 362   UINT8* ProcessorTopologyStructurePtr;
 363
 364   if (!Trace) {
 365     return;
 366   }
 367
 368   Offset = ParseAcpi (
 369              TRUE,
 370              0,
 371              "PPTT",
 372              Ptr,
 373              AcpiTableLength,
 374              PARSER_PARAMS (PpttParser)
 375              );
 376   ProcessorTopologyStructurePtr = Ptr + Offset;
 377
 378   while (Offset < AcpiTableLength) {
 379     // Parse Processor Hierarchy Node Structure to obtain Type and Length.
 380     ParseAcpi (
 381       FALSE,
 382       0,
 383       NULL,
 384       ProcessorTopologyStructurePtr,
 385       4,  // Length of the processor topology structure header is 4 bytes
 386       PARSER_PARAMS (ProcessorTopologyStructureHeaderParser)
 387       );
 388
 389     if ((Offset + (*ProcessorTopologyStructureLength)) > AcpiTableLength) {
 390       IncrementErrorCount ();
 391       Print (
 392         L"ERROR: Invalid processor topology structure length:"
 393           L" Type = %d, Length = %d\n",
 394         *ProcessorTopologyStructureType,
 395         *ProcessorTopologyStructureLength
 396         );
 397       break;
 398     }
 399
 400     PrintFieldName (2, L"* Structure Offset *");
 401     Print (L"0x%x\n", Offset);
 402
 403     switch (*ProcessorTopologyStructureType) {
 404       case EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR:
 405         DumpProcessorHierarchyNodeStructure (
 406           ProcessorTopologyStructurePtr,
 407           *ProcessorTopologyStructureLength
 408           );
 409         break;
 410       case EFI_ACPI_6_2_PPTT_TYPE_CACHE:
 411         DumpCacheTypeStructure (
 412           ProcessorTopologyStructurePtr,
 413           *ProcessorTopologyStructureLength
 414           );
 415         break;
 416       case EFI_ACPI_6_2_PPTT_TYPE_ID:
 417         DumpIDStructure (
 418           ProcessorTopologyStructurePtr,
 419           *ProcessorTopologyStructureLength
 420           );
 421         break;
 422       default:
 423         IncrementErrorCount ();
 424         Print (
 425           L"ERROR: Unknown processor topology structure:"
 426             L" Type = %d, Length = %d\n",
 427           *ProcessorTopologyStructureType,
 428           *ProcessorTopologyStructureLength
 429           );
 430     }
 431
 432     ProcessorTopologyStructurePtr += *ProcessorTopologyStructureLength;
 433     Offset += *ProcessorTopologyStructureLength;
 434   } // while
 435 }