2 CPU DXE Module to produce CPU ARCH Protocol.
4 Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
21 BOOLEAN InterruptState
= FALSE
;
22 EFI_HANDLE mCpuHandle
= NULL
;
23 BOOLEAN mIsFlushingGCD
;
24 UINT64 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
25 UINT64 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
27 FIXED_MTRR mFixedMtrrTable
[] = {
29 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
34 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
39 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
44 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
49 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
54 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
59 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
64 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
69 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
74 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
79 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
86 EFI_CPU_ARCH_PROTOCOL gCpu
= {
92 CpuRegisterInterruptHandler
,
94 CpuSetMemoryAttributes
,
96 4 // DmaBufferAlignment
100 // CPU Arch Protocol Functions
104 Flush CPU data cache. If the instruction cache is fully coherent
105 with all DMA operations then function can just return EFI_SUCCESS.
107 @param This Protocol instance structure
108 @param Start Physical address to start flushing from.
109 @param Length Number of bytes to flush. Round up to chipset
111 @param FlushType Specifies the type of flush operation to perform.
113 @retval EFI_SUCCESS If cache was flushed
114 @retval EFI_UNSUPPORTED If flush type is not supported.
115 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
120 CpuFlushCpuDataCache (
121 IN EFI_CPU_ARCH_PROTOCOL
*This
,
122 IN EFI_PHYSICAL_ADDRESS Start
,
124 IN EFI_CPU_FLUSH_TYPE FlushType
127 if (FlushType
== EfiCpuFlushTypeWriteBackInvalidate
) {
130 } else if (FlushType
== EfiCpuFlushTypeInvalidate
) {
134 return EFI_UNSUPPORTED
;
140 Enables CPU interrupts.
142 @param This Protocol instance structure
144 @retval EFI_SUCCESS If interrupts were enabled in the CPU
145 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
151 IN EFI_CPU_ARCH_PROTOCOL
*This
156 InterruptState
= TRUE
;
162 Disables CPU interrupts.
164 @param This Protocol instance structure
166 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
167 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
172 CpuDisableInterrupt (
173 IN EFI_CPU_ARCH_PROTOCOL
*This
176 DisableInterrupts ();
178 InterruptState
= FALSE
;
184 Return the state of interrupts.
186 @param This Protocol instance structure
187 @param State Pointer to the CPU's current interrupt state
189 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
190 @retval EFI_INVALID_PARAMETER State is NULL.
195 CpuGetInterruptState (
196 IN EFI_CPU_ARCH_PROTOCOL
*This
,
201 return EFI_INVALID_PARAMETER
;
204 *State
= InterruptState
;
210 Generates an INIT to the CPU.
212 @param This Protocol instance structure
213 @param InitType Type of CPU INIT to perform
215 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
217 @retval EFI_DEVICE_ERROR If CPU INIT failed.
218 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
224 IN EFI_CPU_ARCH_PROTOCOL
*This
,
225 IN EFI_CPU_INIT_TYPE InitType
228 return EFI_UNSUPPORTED
;
233 Registers a function to be called from the CPU interrupt handler.
235 @param This Protocol instance structure
236 @param InterruptType Defines which interrupt to hook. IA-32
237 valid range is 0x00 through 0xFF
238 @param InterruptHandler A pointer to a function of type
239 EFI_CPU_INTERRUPT_HANDLER that is called
240 when a processor interrupt occurs. A null
241 pointer is an error condition.
243 @retval EFI_SUCCESS If handler installed or uninstalled.
244 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
245 for InterruptType was previously installed.
246 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
247 InterruptType was not previously installed.
248 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
254 CpuRegisterInterruptHandler (
255 IN EFI_CPU_ARCH_PROTOCOL
*This
,
256 IN EFI_EXCEPTION_TYPE InterruptType
,
257 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
260 return RegisterCpuInterruptHandler (InterruptType
, InterruptHandler
);
265 Returns a timer value from one of the CPU's internal timers. There is no
266 inherent time interval between ticks but is a function of the CPU frequency.
268 @param This - Protocol instance structure.
269 @param TimerIndex - Specifies which CPU timer is requested.
270 @param TimerValue - Pointer to the returned timer value.
271 @param TimerPeriod - A pointer to the amount of time that passes
272 in femtoseconds (10-15) for each increment
273 of TimerValue. If TimerValue does not
274 increment at a predictable rate, then 0 is
275 returned. The amount of time that has
276 passed between two calls to GetTimerValue()
277 can be calculated with the formula
278 (TimerValue2 - TimerValue1) * TimerPeriod.
279 This parameter is optional and may be NULL.
281 @retval EFI_SUCCESS - If the CPU timer count was returned.
282 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
283 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
284 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
290 IN EFI_CPU_ARCH_PROTOCOL
*This
,
291 IN UINT32 TimerIndex
,
292 OUT UINT64
*TimerValue
,
293 OUT UINT64
*TimerPeriod OPTIONAL
296 if (TimerValue
== NULL
) {
297 return EFI_INVALID_PARAMETER
;
300 if (TimerIndex
!= 0) {
301 return EFI_INVALID_PARAMETER
;
304 *TimerValue
= AsmReadTsc ();
306 if (TimerPeriod
!= NULL
) {
308 // BugBug: Hard coded. Don't know how to do this generically
310 *TimerPeriod
= 1000000000;
317 A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
318 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
320 @param[in] Buffer Pointer to an MTRR_SETTINGS object, to be passed to
329 MtrrSetAllMtrrs (Buffer
);
333 Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.
335 This function modifies the attributes for the memory region specified by BaseAddress and
336 Length from their current attributes to the attributes specified by Attributes.
338 @param This The EFI_CPU_ARCH_PROTOCOL instance.
339 @param BaseAddress The physical address that is the start address of a memory region.
340 @param Length The size in bytes of the memory region.
341 @param Attributes The bit mask of attributes to set for the memory region.
343 @retval EFI_SUCCESS The attributes were set for the memory region.
344 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
345 BaseAddress and Length cannot be modified.
346 @retval EFI_INVALID_PARAMETER Length is zero.
347 Attributes specified an illegal combination of attributes that
348 cannot be set together.
349 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
350 the memory resource range.
351 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
352 resource range specified by BaseAddress and Length.
353 The bit mask of attributes is not support for the memory resource
354 range specified by BaseAddress and Length.
359 CpuSetMemoryAttributes (
360 IN EFI_CPU_ARCH_PROTOCOL
*This
,
361 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
366 RETURN_STATUS Status
;
367 MTRR_MEMORY_CACHE_TYPE CacheType
;
369 EFI_MP_SERVICES_PROTOCOL
*MpService
;
370 MTRR_SETTINGS MtrrSettings
;
372 if (!IsMtrrSupported ()) {
373 return EFI_UNSUPPORTED
;
377 // If this function is called because GCD SetMemorySpaceAttributes () is called
378 // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
379 // map with MTRR values. So there is no need to modify MTRRs, just return immediately
380 // to avoid unnecessary computing.
382 if (mIsFlushingGCD
) {
383 DEBUG((EFI_D_INFO
, " Flushing GCD\n"));
387 switch (Attributes
) {
389 CacheType
= CacheUncacheable
;
393 CacheType
= CacheWriteCombining
;
397 CacheType
= CacheWriteThrough
;
401 CacheType
= CacheWriteProtected
;
405 CacheType
= CacheWriteBack
;
411 case EFI_MEMORY_RUNTIME
:
412 return EFI_UNSUPPORTED
;
415 return EFI_INVALID_PARAMETER
;
418 // call MTRR libary function
420 Status
= MtrrSetMemoryAttribute (
426 if (!RETURN_ERROR (Status
)) {
427 MpStatus
= gBS
->LocateProtocol (
428 &gEfiMpServiceProtocolGuid
,
433 // Synchronize the update with all APs
435 if (!EFI_ERROR (MpStatus
)) {
436 MtrrGetAllMtrrs (&MtrrSettings
);
437 MpStatus
= MpService
->StartupAllAPs (
439 SetMtrrsFromBuffer
, // Procedure
440 FALSE
, // SingleThread
442 0, // TimeoutInMicrosecsond
443 &MtrrSettings
, // ProcedureArgument
444 NULL
// FailedCpuList
446 ASSERT (MpStatus
== EFI_SUCCESS
|| MpStatus
== EFI_NOT_STARTED
);
449 return (EFI_STATUS
) Status
;
453 Initializes the valid bits mask and valid address mask for MTRRs.
455 This function initializes the valid bits mask and valid address mask for MTRRs.
464 UINT8 PhysicalAddressBits
;
466 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
468 if (RegEax
>= 0x80000008) {
469 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
471 PhysicalAddressBits
= (UINT8
) RegEax
;
473 mValidMtrrBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
474 mValidMtrrAddressMask
= mValidMtrrBitsMask
& 0xfffffffffffff000ULL
;
476 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
477 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
482 Gets GCD Mem Space type from MTRR Type.
484 This function gets GCD Mem Space type from MTRR Type.
486 @param MtrrAttributes MTRR memory type
488 @return GCD Mem Space type
492 GetMemorySpaceAttributeFromMtrrType (
493 IN UINT8 MtrrAttributes
496 switch (MtrrAttributes
) {
497 case MTRR_CACHE_UNCACHEABLE
:
498 return EFI_MEMORY_UC
;
499 case MTRR_CACHE_WRITE_COMBINING
:
500 return EFI_MEMORY_WC
;
501 case MTRR_CACHE_WRITE_THROUGH
:
502 return EFI_MEMORY_WT
;
503 case MTRR_CACHE_WRITE_PROTECTED
:
504 return EFI_MEMORY_WP
;
505 case MTRR_CACHE_WRITE_BACK
:
506 return EFI_MEMORY_WB
;
513 Searches memory descriptors covered by given memory range.
515 This function searches into the Gcd Memory Space for descriptors
516 (from StartIndex to EndIndex) that contains the memory range
517 specified by BaseAddress and Length.
519 @param MemorySpaceMap Gcd Memory Space Map as array.
520 @param NumberOfDescriptors Number of descriptors in map.
521 @param BaseAddress BaseAddress for the requested range.
522 @param Length Length for the requested range.
523 @param StartIndex Start index into the Gcd Memory Space Map.
524 @param EndIndex End index into the Gcd Memory Space Map.
526 @retval EFI_SUCCESS Search successfully.
527 @retval EFI_NOT_FOUND The requested descriptors does not exist.
531 SearchGcdMemorySpaces (
532 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
533 IN UINTN NumberOfDescriptors
,
534 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
536 OUT UINTN
*StartIndex
,
544 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
545 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
&&
546 BaseAddress
< MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
549 if (BaseAddress
+ Length
- 1 >= MemorySpaceMap
[Index
].BaseAddress
&&
550 BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
555 return EFI_NOT_FOUND
;
559 Sets the attributes for a specified range in Gcd Memory Space Map.
561 This function sets the attributes for a specified range in
562 Gcd Memory Space Map.
564 @param MemorySpaceMap Gcd Memory Space Map as array
565 @param NumberOfDescriptors Number of descriptors in map
566 @param BaseAddress BaseAddress for the range
567 @param Length Length for the range
568 @param Attributes Attributes to set
570 @retval EFI_SUCCESS Memory attributes set successfully
571 @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
575 SetGcdMemorySpaceAttributes (
576 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
577 IN UINTN NumberOfDescriptors
,
578 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
587 EFI_PHYSICAL_ADDRESS RegionStart
;
591 // Get all memory descriptors covered by the memory range
593 Status
= SearchGcdMemorySpaces (
601 if (EFI_ERROR (Status
)) {
606 // Go through all related descriptors and set attributes accordingly
608 for (Index
= StartIndex
; Index
<= EndIndex
; Index
++) {
609 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
613 // Calculate the start and end address of the overlapping range
615 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) {
616 RegionStart
= BaseAddress
;
618 RegionStart
= MemorySpaceMap
[Index
].BaseAddress
;
620 if (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
621 RegionLength
= BaseAddress
+ Length
- RegionStart
;
623 RegionLength
= MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
- RegionStart
;
626 // Set memory attributes according to MTRR attribute and the original attribute of descriptor
628 gDS
->SetMemorySpaceAttributes (
631 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) | (MemorySpaceMap
[Index
].Capabilities
& Attributes
)
640 Refreshes the GCD Memory Space attributes according to MTRRs.
642 This function refreshes the GCD Memory Space attributes according to MTRRs.
646 RefreshGcdMemoryAttributes (
654 EFI_PHYSICAL_ADDRESS BaseAddress
;
657 UINT64 CurrentAttributes
;
659 UINTN NumberOfDescriptors
;
660 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
661 UINT64 DefaultAttributes
;
662 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
663 MTRR_FIXED_SETTINGS MtrrFixedSettings
;
664 UINT32 FirmwareVariableMtrrCount
;
665 UINT8 DefaultMemoryType
;
667 if (!IsMtrrSupported ()) {
671 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
672 ASSERT (FirmwareVariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
674 mIsFlushingGCD
= TRUE
;
675 MemorySpaceMap
= NULL
;
678 // Initialize the valid bits mask and valid address mask for MTRRs
680 InitializeMtrrMask ();
683 // Get the memory attribute of variable MTRRs
685 MtrrGetMemoryAttributeInVariableMtrr (
687 mValidMtrrAddressMask
,
692 // Get the memory space map from GCD
694 Status
= gDS
->GetMemorySpaceMap (
695 &NumberOfDescriptors
,
698 ASSERT_EFI_ERROR (Status
);
700 DefaultMemoryType
= (UINT8
) MtrrGetDefaultMemoryType ();
701 DefaultAttributes
= GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType
);
704 // Set default attributes to all spaces.
706 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
707 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
710 gDS
->SetMemorySpaceAttributes (
711 MemorySpaceMap
[Index
].BaseAddress
,
712 MemorySpaceMap
[Index
].Length
,
713 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) |
714 (MemorySpaceMap
[Index
].Capabilities
& DefaultAttributes
)
719 // Go for variable MTRRs with WB attribute
721 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
722 if (VariableMtrr
[Index
].Valid
&&
723 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) {
724 SetGcdMemorySpaceAttributes (
727 VariableMtrr
[Index
].BaseAddress
,
728 VariableMtrr
[Index
].Length
,
735 // Go for variable MTRRs with the attribute except for WB and UC attributes
737 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
738 if (VariableMtrr
[Index
].Valid
&&
739 VariableMtrr
[Index
].Type
!= MTRR_CACHE_WRITE_BACK
&&
740 VariableMtrr
[Index
].Type
!= MTRR_CACHE_UNCACHEABLE
) {
741 Attributes
= GetMemorySpaceAttributeFromMtrrType ((UINT8
) VariableMtrr
[Index
].Type
);
742 SetGcdMemorySpaceAttributes (
745 VariableMtrr
[Index
].BaseAddress
,
746 VariableMtrr
[Index
].Length
,
753 // Go for variable MTRRs with UC attribute
755 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
756 if (VariableMtrr
[Index
].Valid
&&
757 VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
) {
758 SetGcdMemorySpaceAttributes (
761 VariableMtrr
[Index
].BaseAddress
,
762 VariableMtrr
[Index
].Length
,
769 // Go for fixed MTRRs
774 MtrrGetFixedMtrr (&MtrrFixedSettings
);
775 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
776 RegValue
= MtrrFixedSettings
.Mtrr
[Index
];
778 // Check for continuous fixed MTRR sections
780 for (SubIndex
= 0; SubIndex
< 8; SubIndex
++) {
781 MtrrType
= (UINT8
) RShiftU64 (RegValue
, SubIndex
* 8);
782 CurrentAttributes
= GetMemorySpaceAttributeFromMtrrType (MtrrType
);
785 // A new MTRR attribute begins
787 Attributes
= CurrentAttributes
;
790 // If fixed MTRR attribute changed, then set memory attribute for previous atrribute
792 if (CurrentAttributes
!= Attributes
) {
793 SetGcdMemorySpaceAttributes (
800 BaseAddress
= mFixedMtrrTable
[Index
].BaseAddress
+ mFixedMtrrTable
[Index
].Length
* SubIndex
;
802 Attributes
= CurrentAttributes
;
805 Length
+= mFixedMtrrTable
[Index
].Length
;
809 // Handle the last fixed MTRR region
811 SetGcdMemorySpaceAttributes (
820 // Free memory space map allocated by GCD service GetMemorySpaceMap ()
822 if (MemorySpaceMap
!= NULL
) {
823 FreePool (MemorySpaceMap
);
826 mIsFlushingGCD
= FALSE
;
830 Initialize Interrupt Descriptor Table for interrupt handling.
834 InitInterruptDescriptorTable (
839 EFI_VECTOR_HANDOFF_INFO
*VectorInfoList
;
840 EFI_VECTOR_HANDOFF_INFO
*VectorInfo
;
843 Status
= EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid
, (VOID
**) &VectorInfoList
);
844 if (Status
== EFI_SUCCESS
&& VectorInfoList
!= NULL
) {
845 VectorInfo
= VectorInfoList
;
847 Status
= InitializeCpuInterruptHandlers (VectorInfo
);
848 ASSERT_EFI_ERROR (Status
);
853 Callback function for idle events.
855 @param Event Event whose notification function is being invoked.
856 @param Context The pointer to the notification function's context,
857 which is implementation-dependent.
862 IdleLoopEventCallback (
872 Initialize the state information for the CPU Architectural Protocol.
874 @param ImageHandle Image handle this driver.
875 @param SystemTable Pointer to the System Table.
877 @retval EFI_SUCCESS Thread can be successfully created
878 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
879 @retval EFI_DEVICE_ERROR Cannot create the thread
885 IN EFI_HANDLE ImageHandle
,
886 IN EFI_SYSTEM_TABLE
*SystemTable
890 EFI_EVENT IdleLoopEvent
;
892 InitializeFloatingPointUnits ();
895 // Make sure interrupts are disabled
897 DisableInterrupts ();
902 InitGlobalDescriptorTable ();
905 // Setup IDT pointer, IDT and interrupt entry points
907 InitInterruptDescriptorTable ();
910 // Enable the local APIC for Virtual Wire Mode.
912 ProgramVirtualWireMode ();
915 // Install CPU Architectural Protocol
917 Status
= gBS
->InstallMultipleProtocolInterfaces (
919 &gEfiCpuArchProtocolGuid
, &gCpu
,
922 ASSERT_EFI_ERROR (Status
);
925 // Refresh GCD memory space map according to MTRR value.
927 RefreshGcdMemoryAttributes ();
930 // Setup a callback for idle events
932 Status
= gBS
->CreateEventEx (
935 IdleLoopEventCallback
,
940 ASSERT_EFI_ERROR (Status
);
942 InitializeMpSupport ();