2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
4 Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef _CPU_PISMMCPUDXESMM_H_
16 #define _CPU_PISMMCPUDXESMM_H_
20 #include <Protocol/MpService.h>
21 #include <Protocol/SmmConfiguration.h>
22 #include <Protocol/SmmCpu.h>
23 #include <Protocol/SmmAccess2.h>
24 #include <Protocol/SmmReadyToLock.h>
25 #include <Protocol/SmmCpuService.h>
27 #include <Guid/AcpiS3Context.h>
28 #include <Guid/PiSmmMemoryAttributesTable.h>
30 #include <Library/BaseLib.h>
31 #include <Library/IoLib.h>
32 #include <Library/TimerLib.h>
33 #include <Library/SynchronizationLib.h>
34 #include <Library/DebugLib.h>
35 #include <Library/BaseMemoryLib.h>
36 #include <Library/PcdLib.h>
37 #include <Library/CacheMaintenanceLib.h>
38 #include <Library/MtrrLib.h>
39 #include <Library/SmmCpuPlatformHookLib.h>
40 #include <Library/SmmServicesTableLib.h>
41 #include <Library/MemoryAllocationLib.h>
42 #include <Library/UefiBootServicesTableLib.h>
43 #include <Library/UefiRuntimeServicesTableLib.h>
44 #include <Library/DebugAgentLib.h>
45 #include <Library/HobLib.h>
46 #include <Library/LocalApicLib.h>
47 #include <Library/UefiCpuLib.h>
48 #include <Library/CpuExceptionHandlerLib.h>
49 #include <Library/ReportStatusCodeLib.h>
50 #include <Library/SmmCpuFeaturesLib.h>
51 #include <Library/PeCoffGetEntryPointLib.h>
53 #include <AcpiCpuData.h>
54 #include <CpuHotPlugData.h>
56 #include <Register/Cpuid.h>
57 #include <Register/Msr.h>
59 #include "CpuService.h"
60 #include "SmmProfile.h"
63 // MSRs required for configuration of SMM Code Access Check
65 #define EFI_MSR_SMM_MCA_CAP 0x17D
66 #define SMM_CODE_ACCESS_CHK_BIT BIT58
68 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
69 #define SMM_CODE_CHK_EN_BIT BIT2
74 #define IA32_PG_P BIT0
75 #define IA32_PG_RW BIT1
76 #define IA32_PG_U BIT2
77 #define IA32_PG_WT BIT3
78 #define IA32_PG_CD BIT4
79 #define IA32_PG_A BIT5
80 #define IA32_PG_D BIT6
81 #define IA32_PG_PS BIT7
82 #define IA32_PG_PAT_2M BIT12
83 #define IA32_PG_PAT_4K IA32_PG_PS
84 #define IA32_PG_PMNT BIT62
85 #define IA32_PG_NX BIT63
87 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
89 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
90 // X64 PAE PDPTE does not have such restriction
92 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
94 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
96 #define PAGING_4K_MASK 0xFFF
97 #define PAGING_2M_MASK 0x1FFFFF
98 #define PAGING_1G_MASK 0x3FFFFFFF
100 #define PAGING_PAE_INDEX_MASK 0x1FF
102 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
103 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
104 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
114 PAGE_ATTRIBUTE Attribute
;
117 } PAGE_ATTRIBUTE_TABLE
;
120 // Size of Task-State Segment defined in IA32 Manual
123 #define TSS_X64_IST1_OFFSET 36
124 #define TSS_IA32_CR3_OFFSET 28
125 #define TSS_IA32_ESP_OFFSET 56
132 #define PROTECT_MODE_CODE_SEGMENT 0x08
133 #define LONG_MODE_CODE_SEGMENT 0x38
136 // The size 0x20 must be bigger than
137 // the size of template code of SmmInit. Currently,
138 // the size of SmmInit requires the 0x16 Bytes buffer
141 #define BACK_BUF_SIZE 0x20
143 #define EXCEPTION_VECTOR_NUMBER 0x20
145 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
147 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS
;
148 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
149 #define ARRIVAL_EXCEPTION_DELAYED 0x2
150 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
153 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
154 // Contains the SMM Configuration Protocols that is produced.
155 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
157 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
162 EFI_HANDLE SmmCpuHandle
;
164 EFI_PROCESSOR_INFORMATION
*ProcessorInfo
;
165 SMM_CPU_OPERATION
*Operation
;
166 UINTN
*CpuSaveStateSize
;
169 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion
[1];
170 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext
;
171 EFI_SMM_ENTRY_POINT SmmCoreEntry
;
173 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration
;
174 } SMM_CPU_PRIVATE_DATA
;
176 extern SMM_CPU_PRIVATE_DATA
*gSmmCpuPrivate
;
177 extern CPU_HOT_PLUG_DATA mCpuHotPlugData
;
178 extern UINTN mMaxNumberOfCpus
;
179 extern UINTN mNumberOfCpus
;
180 extern EFI_SMM_CPU_PROTOCOL mSmmCpu
;
183 /// The mode of the CPU at the time an SMI occurs
185 extern UINT8 mSmmSaveStateRegisterLma
;
189 // SMM CPU Protocol function prototypes.
193 Read information from the CPU save state.
195 @param This EFI_SMM_CPU_PROTOCOL instance
196 @param Width The number of bytes to read from the CPU save state.
197 @param Register Specifies the CPU register to read form the save state.
198 @param CpuIndex Specifies the zero-based index of the CPU save state
199 @param Buffer Upon return, this holds the CPU register value read from the save state.
201 @retval EFI_SUCCESS The register was read from Save State
202 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
203 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
209 IN CONST EFI_SMM_CPU_PROTOCOL
*This
,
211 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
217 Write data to the CPU save state.
219 @param This EFI_SMM_CPU_PROTOCOL instance
220 @param Width The number of bytes to read from the CPU save state.
221 @param Register Specifies the CPU register to write to the save state.
222 @param CpuIndex Specifies the zero-based index of the CPU save state
223 @param Buffer Upon entry, this holds the new CPU register value.
225 @retval EFI_SUCCESS The register was written from Save State
226 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
227 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct
233 IN CONST EFI_SMM_CPU_PROTOCOL
*This
,
235 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
237 IN CONST VOID
*Buffer
241 Read a CPU Save State register on the target processor.
243 This function abstracts the differences that whether the CPU Save State register is in the
244 IA32 CPU Save State Map or X64 CPU Save State Map.
246 This function supports reading a CPU Save State register in SMBase relocation handler.
248 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
249 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
250 @param[in] Width The number of bytes to read from the CPU save state.
251 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
253 @retval EFI_SUCCESS The register was read from Save State.
254 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
255 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
260 ReadSaveStateRegister (
262 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
268 Write value to a CPU Save State register on the target processor.
270 This function abstracts the differences that whether the CPU Save State register is in the
271 IA32 CPU Save State Map or X64 CPU Save State Map.
273 This function supports writing a CPU Save State register in SMBase relocation handler.
275 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
276 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
277 @param[in] Width The number of bytes to read from the CPU save state.
278 @param[in] Buffer Upon entry, this holds the new CPU register value.
280 @retval EFI_SUCCESS The register was written to Save State.
281 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
282 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct.
287 WriteSaveStateRegister (
289 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
291 IN CONST VOID
*Buffer
303 extern IA32_FAR_ADDRESS gSmmJmpAddr
;
305 extern CONST UINT8 gcSmmInitTemplate
[];
306 extern CONST UINT16 gcSmmInitSize
;
307 extern UINT32 gSmmCr0
;
308 extern UINT32 gSmmCr3
;
309 extern UINT32 gSmmCr4
;
310 extern UINTN gSmmInitStack
;
313 Semaphore operation for all processor relocate SMMBase.
317 SmmRelocationSemaphoreComplete (
322 /// The type of SMM CPU Information
326 volatile EFI_AP_PROCEDURE Procedure
;
327 volatile VOID
*Parameter
;
328 volatile UINT32
*Run
;
329 volatile BOOLEAN
*Present
;
330 } SMM_CPU_DATA_BLOCK
;
333 SmmCpuSyncModeTradition
,
334 SmmCpuSyncModeRelaxedAp
,
340 // Pointer to an array. The array should be located immediately after this structure
341 // so that UC cache-ability can be set together.
343 SMM_CPU_DATA_BLOCK
*CpuData
;
344 volatile UINT32
*Counter
;
345 volatile UINT32 BspIndex
;
346 volatile BOOLEAN
*InsideSmm
;
347 volatile BOOLEAN
*AllCpusInSync
;
348 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode
;
349 volatile BOOLEAN SwitchBsp
;
350 volatile BOOLEAN
*CandidateBsp
;
351 } SMM_DISPATCHER_MP_SYNC_DATA
;
353 #define MSR_SPIN_LOCK_INIT_NUM 15
360 #define SMM_PSD_OFFSET 0xfb00
363 /// All global semaphores' pointer
366 volatile UINT32
*Counter
;
367 volatile BOOLEAN
*InsideSmm
;
368 volatile BOOLEAN
*AllCpusInSync
;
370 SPIN_LOCK
*CodeAccessCheckLock
;
371 SPIN_LOCK
*MemoryMappedLock
;
372 } SMM_CPU_SEMAPHORE_GLOBAL
;
375 /// All semaphores for each processor
379 volatile UINT32
*Run
;
380 volatile BOOLEAN
*Present
;
381 } SMM_CPU_SEMAPHORE_CPU
;
384 /// All MSRs semaphores' pointer and counter
388 UINTN AvailableCounter
;
389 } SMM_CPU_SEMAPHORE_MSR
;
392 /// All semaphores' information
395 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal
;
396 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu
;
397 SMM_CPU_SEMAPHORE_MSR SemaphoreMsr
;
398 } SMM_CPU_SEMAPHORES
;
400 extern IA32_DESCRIPTOR gcSmiGdtr
;
401 extern EFI_PHYSICAL_ADDRESS mGdtBuffer
;
402 extern UINTN mGdtBufferSize
;
403 extern IA32_DESCRIPTOR gcSmiIdtr
;
404 extern VOID
*gcSmiIdtrPtr
;
405 extern UINT64 gPhyMask
;
406 extern SMM_DISPATCHER_MP_SYNC_DATA
*mSmmMpSyncData
;
407 extern UINTN mSmmStackArrayBase
;
408 extern UINTN mSmmStackArrayEnd
;
409 extern UINTN mSmmStackSize
;
410 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService
;
411 extern IA32_DESCRIPTOR gcSmiInitGdtr
;
412 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores
;
413 extern UINTN mSemaphoreSize
;
414 extern SPIN_LOCK
*mPFLock
;
415 extern SPIN_LOCK
*mConfigSmmCodeAccessCheckLock
;
416 extern SPIN_LOCK
*mMemoryMappedLock
;
419 Create 4G PageTable in SMRAM.
421 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
422 @return PageTable Address
427 IN BOOLEAN Is32BitPageTable
432 Initialize global data for MP synchronization.
434 @param Stacks Base address of SMI stack buffer for all processors.
435 @param StackSize Stack size for each processor in SMM.
439 InitializeMpServiceData (
445 Initialize Timer for SMM AP Sync.
454 Start Timer for SMM AP Sync.
464 Check if the SMM AP Sync timer is timeout.
466 @param Timer The start timer from the begin.
476 Initialize IDT for SMM Stack Guard.
481 InitializeIDTSmmStackGuard (
486 Initialize Gdt for all processors.
488 @param[in] Cr3 CR3 value.
489 @param[out] GdtStepSize The step size for GDT table.
491 @return GdtBase for processor 0.
492 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
497 OUT UINTN
*GdtStepSize
501 This function sets GDT/IDT buffer to be RO and XP.
510 Register the SMM Foundation entry point.
512 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
513 @param SmmEntryPoint SMM Foundation EntryPoint
515 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
521 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL
*This
,
522 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
526 Create PageTable for SMM use.
528 @return PageTable Address
537 Schedule a procedure to run on the specified CPU.
539 @param Procedure The address of the procedure to run
540 @param CpuIndex Target CPU number
541 @param ProcArguments The parameter to pass to the procedure
543 @retval EFI_INVALID_PARAMETER CpuNumber not valid
544 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
545 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
546 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
547 @retval EFI_SUCCESS - The procedure has been successfully scheduled
553 IN EFI_AP_PROCEDURE Procedure
,
555 IN OUT VOID
*ProcArguments OPTIONAL
559 Schedule a procedure to run on the specified CPU in a blocking fashion.
561 @param Procedure The address of the procedure to run
562 @param CpuIndex Target CPU Index
563 @param ProcArguments The parameter to pass to the procedure
565 @retval EFI_INVALID_PARAMETER CpuNumber not valid
566 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
567 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
568 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
569 @retval EFI_SUCCESS The procedure has been successfully scheduled
574 SmmBlockingStartupThisAp (
575 IN EFI_AP_PROCEDURE Procedure
,
577 IN OUT VOID
*ProcArguments OPTIONAL
581 This function sets the attributes for the memory region specified by BaseAddress and
582 Length from their current attributes to the attributes specified by Attributes.
584 @param[in] BaseAddress The physical address that is the start address of a memory region.
585 @param[in] Length The size in bytes of the memory region.
586 @param[in] Attributes The bit mask of attributes to set for the memory region.
588 @retval EFI_SUCCESS The attributes were set for the memory region.
589 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
590 BaseAddress and Length cannot be modified.
591 @retval EFI_INVALID_PARAMETER Length is zero.
592 Attributes specified an illegal combination of attributes that
593 cannot be set together.
594 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
595 the memory resource range.
596 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
597 resource range specified by BaseAddress and Length.
598 The bit mask of attributes is not support for the memory resource
599 range specified by BaseAddress and Length.
604 SmmSetMemoryAttributes (
605 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
611 This function clears the attributes for the memory region specified by BaseAddress and
612 Length from their current attributes to the attributes specified by Attributes.
614 @param[in] BaseAddress The physical address that is the start address of a memory region.
615 @param[in] Length The size in bytes of the memory region.
616 @param[in] Attributes The bit mask of attributes to clear for the memory region.
618 @retval EFI_SUCCESS The attributes were cleared for the memory region.
619 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
620 BaseAddress and Length cannot be modified.
621 @retval EFI_INVALID_PARAMETER Length is zero.
622 Attributes specified an illegal combination of attributes that
623 cannot be set together.
624 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
625 the memory resource range.
626 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
627 resource range specified by BaseAddress and Length.
628 The bit mask of attributes is not support for the memory resource
629 range specified by BaseAddress and Length.
634 SmmClearMemoryAttributes (
635 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
641 Initialize MP synchronization data.
646 InitializeMpSyncData (
652 Find out SMRAM information including SMRR base and SMRR size.
654 @param SmrrBase SMRR base
655 @param SmrrSize SMRR size
660 OUT UINT32
*SmrrBase
,
665 Relocate SmmBases for each processor.
667 Execute on first boot and all S3 resumes
677 Page Fault handler for SMM use.
679 @param InterruptType Defines the type of interrupt or exception that
680 occurred on the processor.This parameter is processor architecture specific.
681 @param SystemContext A pointer to the processor context when
682 the interrupt occurred on the processor.
687 IN EFI_EXCEPTION_TYPE InterruptType
,
688 IN EFI_SYSTEM_CONTEXT SystemContext
692 Perform the remaining tasks.
696 PerformRemainingTasks (
701 Perform the pre tasks.
710 Initialize MSR spin lock by MSR index.
712 @param MsrIndex MSR index value.
716 InitMsrSpinLockByIndex (
721 Hook return address of SMM Save State so that semaphore code
722 can be executed immediately after AP exits SMM to indicate to
723 the BSP that an AP has exited SMM after SMBASE relocation.
725 @param[in] CpuIndex The processor index.
726 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
727 immediately after AP exits SMM.
733 IN
volatile BOOLEAN
*RebasedFlag
737 Configure SMM Code Access Check feature for all processors.
738 SMM Feature Control MSR will be locked after configuration.
741 ConfigSmmCodeAccessCheck (
746 Hook the code executed immediately after an RSM instruction on the currently
747 executing CPU. The mode of code executed immediately after RSM must be
748 detected, and the appropriate hook must be selected. Always clear the auto
749 HALT restart flag if it is set.
751 @param[in] CpuIndex The processor index for the currently
753 @param[in] CpuState Pointer to SMRAM Save State Map for the
754 currently executing CPU.
755 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
756 32-bit mode from 64-bit SMM.
757 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
760 @retval The value of the original instruction pointer before it was hooked.
767 SMRAM_SAVE_STATE_MAP
*CpuState
,
768 UINT64 NewInstructionPointer32
,
769 UINT64 NewInstructionPointer
773 Get the size of the SMI Handler in bytes.
775 @retval The size, in bytes, of the SMI Handler.
785 Install the SMI handler for the CPU specified by CpuIndex. This function
786 is called by the CPU that was elected as monarch during System Management
789 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
790 The value must be between 0 and the NumberOfCpus field
791 in the System Management System Table (SMST).
792 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
793 @param[in] SmiStack The stack to use when an SMI is processed by the
794 the CPU specified by CpuIndex.
795 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
796 processed by the CPU specified by CpuIndex.
797 @param[in] GdtBase The base address of the GDT to use when an SMI is
798 processed by the CPU specified by CpuIndex.
799 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
800 processed by the CPU specified by CpuIndex.
801 @param[in] IdtBase The base address of the IDT to use when an SMI is
802 processed by the CPU specified by CpuIndex.
803 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
804 processed by the CPU specified by CpuIndex.
805 @param[in] Cr3 The base address of the page tables to use when an SMI
806 is processed by the CPU specified by CpuIndex.
823 Search module name by input IP address and output it.
825 @param CallerIpAddress Caller instruction pointer.
830 IN UINTN CallerIpAddress
834 This function sets memory attribute according to MemoryAttributesTable.
837 SetMemMapAttributes (
842 This function sets UEFI memory attribute according to UEFI memory map.
845 SetUefiMemMapAttributes (
850 Return if the Address is forbidden as SMM communication buffer.
852 @param[in] Address the address to be checked
854 @return TRUE The address is forbidden as SMM communication buffer.
855 @return FALSE The address is allowed as SMM communication buffer.
858 IsSmmCommBufferForbiddenAddress (
863 This function caches the UEFI memory map information.
871 This function sets memory attribute for page table.
874 SetPageTableAttributes (
879 Return page table base.
881 @return page table base.
889 This function sets the attributes for the memory region specified by BaseAddress and
890 Length from their current attributes to the attributes specified by Attributes.
892 @param[in] BaseAddress The physical address that is the start address of a memory region.
893 @param[in] Length The size in bytes of the memory region.
894 @param[in] Attributes The bit mask of attributes to set for the memory region.
895 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
897 @retval EFI_SUCCESS The attributes were set for the memory region.
898 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
899 BaseAddress and Length cannot be modified.
900 @retval EFI_INVALID_PARAMETER Length is zero.
901 Attributes specified an illegal combination of attributes that
902 cannot be set together.
903 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
904 the memory resource range.
905 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
906 resource range specified by BaseAddress and Length.
907 The bit mask of attributes is not support for the memory resource
908 range specified by BaseAddress and Length.
913 SmmSetMemoryAttributesEx (
914 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
916 IN UINT64 Attributes
,
917 OUT BOOLEAN
*IsSplitted OPTIONAL
921 This function clears the attributes for the memory region specified by BaseAddress and
922 Length from their current attributes to the attributes specified by Attributes.
924 @param[in] BaseAddress The physical address that is the start address of a memory region.
925 @param[in] Length The size in bytes of the memory region.
926 @param[in] Attributes The bit mask of attributes to clear for the memory region.
927 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
929 @retval EFI_SUCCESS The attributes were cleared for the memory region.
930 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
931 BaseAddress and Length cannot be modified.
932 @retval EFI_INVALID_PARAMETER Length is zero.
933 Attributes specified an illegal combination of attributes that
934 cannot be set together.
935 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
936 the memory resource range.
937 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
938 resource range specified by BaseAddress and Length.
939 The bit mask of attributes is not support for the memory resource
940 range specified by BaseAddress and Length.
945 SmmClearMemoryAttributesEx (
946 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
948 IN UINT64 Attributes
,
949 OUT BOOLEAN
*IsSplitted OPTIONAL
953 This API provides a way to allocate memory for page table.
955 This API can be called more once to allocate memory for page tables.
957 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
958 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
959 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
962 @param Pages The number of 4 KB pages to allocate.
964 @return A pointer to the allocated buffer or NULL if allocation fails.
968 AllocatePageTableMemory (
973 Allocate pages for code.
975 @param[in] Pages Number of pages to be allocated.
977 @return Allocated memory.
985 Allocate aligned pages for code.
987 @param[in] Pages Number of pages to be allocated.
988 @param[in] Alignment The requested alignment of the allocation.
989 Must be a power of two.
990 If Alignment is zero, then byte alignment is used.
992 @return Allocated memory.
995 AllocateAlignedCodePages (
1002 // S3 related global variable and function prototype.
1005 extern BOOLEAN mSmmS3Flag
;
1008 Initialize SMM S3 resume state structure used during S3 Resume.
1010 @param[in] Cr3 The base address of the page tables to use in SMM.
1014 InitSmmS3ResumeState (
1028 Restore SMM Configuration in S3 boot path.
1032 RestoreSmmConfigurationInS3 (
1037 Get ACPI S3 enable flag.
1041 GetAcpiS3EnableFlag (
1046 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1048 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1049 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1050 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1054 TransferApToSafeState (
1055 IN UINTN ApHltLoopCode
,
1056 IN UINTN TopOfStack
,
1057 IN UINTN NumberToFinishAddress